mirror of
https://github.com/holub/mame
synced 2025-04-25 09:50:04 +03:00
LaserWriter II NT: Further WIP, passes another self test [Lord Nightmare]
This commit is contained in:
Lord-Nightmare
parent
029b93f95e
commit
33150c5149
@ -4,11 +4,11 @@
|
||||
|
||||
Apple LaserWriter II NT driver
|
||||
|
||||
0x000000 - 0x1fffff ???/ROM (switches based on overlay)
|
||||
0x000000 - 0x1fffff SRAM/ROM (switches based on overlay)
|
||||
0x200000 - 0x3fffff ROM
|
||||
0x400000 - 0x5fffff RAM
|
||||
0x600000 - 0x7fffff ??? more RAM?
|
||||
0x800000 - 0x9fffff LED/Printer Controls
|
||||
0x800000 - 0x9fffff LED/Printer Controls(MSB), FIFO to print mechanism(LSB)
|
||||
0xa00000 - 0xbfffff Zilog 8530 SCC (Serial Control Chip) Read
|
||||
0xc00000 - 0xdfffff Zilog 8530 SCC (Serial Control Chip) Write
|
||||
0xe00000 - 0xefffff Rockwell 6522 VIA
|
||||
@ -34,7 +34,8 @@
|
||||
0xC - <Passes> 400000-5fffff comprehensive DRAM data test
|
||||
0xB - <Passes?> Unknown test
|
||||
0xA - <Hacked to pass, not understood> dies if something to do with 600000-7fffff doesn't mirror 400000-5fffff ?
|
||||
0x8 - <Fails> Unknown test
|
||||
0x8 - <Passes> SRAM test 000000-000FFF
|
||||
0x0 - <quickly runs off into weeds> not sure...
|
||||
|
||||
If one of the self tests fails, the uppermost bit will oscillate (c000 4000 c000 4000 etc) forever
|
||||
|
||||
@ -47,6 +48,7 @@
|
||||
2KB SRAM
|
||||
X2804 EEPROM (custom marked as 335-0022) [note that technically a 2808 or 2816 can go here and will work too]
|
||||
1MB ROM
|
||||
MMI67L401 64x4 FIFO, x2
|
||||
|
||||
+------------------------------------------------------------------------------------------------------------------------+=====+
|
||||
| 1 2 3 4 5 6 7 8 9 10 11 | #
|
||||
@ -113,6 +115,7 @@ public:
|
||||
DECLARE_READ16_MEMBER(bankedarea_r);
|
||||
DECLARE_WRITE16_MEMBER(bankedarea_w);
|
||||
DECLARE_WRITE8_MEMBER(led_out_w);
|
||||
DECLARE_WRITE8_MEMBER(fifo_out_w);
|
||||
DECLARE_READ8_MEMBER(via_pa_r);
|
||||
DECLARE_WRITE8_MEMBER(via_pa_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(via_ca2_w);
|
||||
@ -135,7 +138,7 @@ private:
|
||||
required_device<via6522_device> m_via;
|
||||
#endif
|
||||
|
||||
uint16_t *m_ram_ptr, *m_rom_ptr;
|
||||
uint16_t *m_dram_ptr, *m_sram_ptr, *m_rom_ptr;
|
||||
bool m_overlay;
|
||||
};
|
||||
|
||||
@ -145,30 +148,43 @@ Address maps (x = ignored; * = selects address within this range)
|
||||
a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 (a0 via UDS/LDS)
|
||||
* * * PAL16R6 U80
|
||||
* * * * * * decoded by pals
|
||||
0 0 A * * * * * * * * * * * * * * * * * * * * * R ROM
|
||||
0 0 A 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
|
||||
0 0 A 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
|
||||
0 0 A 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
|
||||
0 0 A 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
|
||||
0 0 A 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
|
||||
Overlay ON:
|
||||
0 0 0 * * * * * * * * * * * * * * * * * * * * * R ROM
|
||||
0 0 0 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
|
||||
0 0 0 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
|
||||
0 0 0 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
|
||||
0 0 0 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
|
||||
0 0 0 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
|
||||
Overlay OFF:
|
||||
0 0 0 ? ? ?0? x x x x x x * * * * * * * * * * * * RW SRAM
|
||||
Unknown:
|
||||
? ? ? ? ? ? x x x x x x (*) (*) * * * * * * * * * 1 RW 2804 EEPROM
|
||||
(technically a10 and a11 are ignored, but if a 2808 or 2816 is put in this spot the address lines do connect to the appropriate pins)
|
||||
Common:
|
||||
0 0 1 * * * * * * * * * * * * * * * * * * * * * R ROM
|
||||
0 0 1 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
|
||||
0 0 1 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
|
||||
0 0 1 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
|
||||
0 0 1 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
|
||||
0 0 1 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
|
||||
0 1 0 * * * * * * * * * * * * * * * * * * * * * RW DRAM
|
||||
0 1 1 * * * * * * * * * * * * * * * * * * * * * RW ???? DRAM mirror?
|
||||
1 0 0 ? ? ? x x x x x x x x x x x x x x x x x 0 W 64x8 FIFO
|
||||
1 0 0 ? ? ? x x x x x x x x x x x x x x x x x 1 W Status LEDs and mech
|
||||
1 0 1 ? ? ? x x x x x x x x x x x x x x x * * 1 R 8530 SCC Read
|
||||
1 1 0 ? ? ? x x x x x x x x x x x x x x x * * 0 W 8530 SCC Write
|
||||
1 1 1 ?x? ?0? ? x x x x x x x x x x x x x * * * * 0 RW 65C22 VIA
|
||||
1 1 1 ?x? ?1? ? x x x x x x x x x x x x x * * * * 0 RW debugger rom/pod area
|
||||
TODO:
|
||||
? ? ? ? ? ? x x x x x x * * * * * * * * * * * * RW SRAM
|
||||
? ? ? ? ? ? x x x x x x (*) (*) * * * * * * * * * 1 RW 2804 EEPROM
|
||||
(technically a10 and a11 are ignored, but if a 2808 or 2816 is put in this spot the address lines do connect to the appropriate pins)
|
||||
| | | | |
|
||||
map when overlay is set, i.e. A above is considered 'x':
|
||||
map when overlay is set:
|
||||
000000-1fffff ROM (second half is open bus)
|
||||
map when overlay is clear:
|
||||
000000-03ffff SRAM(?)
|
||||
040000-1fffff ????
|
||||
200000-3fffff ROM (second half is open bus)
|
||||
400000-5fffff DRAM?
|
||||
600000-7fffff unknown, DRAM mirror?
|
||||
800000-83ffff LEDs and status bits to printer mechanism
|
||||
400000-5fffff DRAM
|
||||
600000-7fffff DRAM mirror
|
||||
800000-83ffff LEDs and status bits to printer mechanism, FIFO
|
||||
840000-9fffff unknown
|
||||
a00000-a3ffff SCC read
|
||||
a40000-bfffff unknown
|
||||
@ -179,23 +195,8 @@ e40000-f7ffff unknown
|
||||
f80000-fbffff debug area (first read must be 0xAAAA5555, then 68k will jump to address of second read)
|
||||
fc0000-ffffff unknown
|
||||
|
||||
map when overlay is clear, i.e. A above is considered '1':
|
||||
000000-1fffff unknown, maybe RAM???? maybe eeprom goes here too? eeprom is specifically disabled when overlay is set
|
||||
200000-3fffff ROM (second half is open bus)
|
||||
400000-5fffff DRAM?
|
||||
600000-7fffff unknown, DRAM mirror?
|
||||
800000-83ffff LEDs and status bits to printer mechanism
|
||||
840000-9fffff unknown
|
||||
a00000-a3ffff SCC read
|
||||
a40000-bfffff unknown
|
||||
c00000-c3ffff SCC write
|
||||
c40000-dfffff unknown
|
||||
e00000-e3ffff VIA
|
||||
e40000-f7ffff unknown
|
||||
f80000-fbffff unknown
|
||||
fc0000-ffffff unknown
|
||||
|
||||
The ADB bitbang transceiver connects to the
|
||||
The ADB bit-bang transceiver MCU connects to the VIA CB1 (adbclk) and CB2 (adbdata) pins,
|
||||
as well as PA0 (ST1), PA2 (ST2) and PA3 (ADB /INT)
|
||||
*/
|
||||
|
||||
static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
|
||||
@ -203,9 +204,9 @@ static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
|
||||
AM_RANGE(0x000000, 0x1fffff) AM_READWRITE(bankedarea_r, bankedarea_w)
|
||||
AM_RANGE(0x200000, 0x2fffff) AM_ROM AM_REGION("rom", 0) // 1MB ROM
|
||||
//AM_RANGE(0x300000, 0x3fffff) // open bus?
|
||||
AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_REGION("mainram", 0) AM_MIRROR(0x200000) // 2MB DRAM
|
||||
//AM_RANGE(0x600000, 0x600fff) AM_RAM AM_MIRROR(0x1ff000) // 4096 bytes SRAM????
|
||||
AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_REGION("dram", 0) AM_MIRROR(0x200000) // 2MB DRAM
|
||||
AM_RANGE(0x800000, 0x800001) AM_WRITE8(led_out_w, 0xff00) AM_MIRROR(0x1ffffe) // mirror is a guess given that the pals can only decode A18-A23
|
||||
AM_RANGE(0x800000, 0x800001) AM_WRITE8(fifo_out_w, 0x00ff) AM_MIRROR(0x1ffffe) // mirror is a guess given that the pals can only decode A18-A23
|
||||
AM_RANGE(0xc00000, 0xc00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff) AM_MIRROR(0x1ffff8)
|
||||
AM_RANGE(0xc00004, 0xc00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff) AM_MIRROR(0x1ffff8)
|
||||
AM_RANGE(0xa00000, 0xa00001) AM_DEVREAD8 ("scc", scc8530_device, ca_r, 0xff00) AM_MIRROR(0x1ffff8)
|
||||
@ -230,7 +231,8 @@ INPUT_PORTS_END
|
||||
void lwriter_state::machine_start()
|
||||
{
|
||||
m_rom_ptr = (uint16_t*)memregion("rom")->base();
|
||||
m_ram_ptr = (uint16_t*)memregion("mainram")->base();
|
||||
m_dram_ptr = (uint16_t*)memregion("dram")->base();
|
||||
m_sram_ptr = (uint16_t*)memregion("sram")->base();
|
||||
// do stuff here later on like setting up printer mechanisms HLE timers etc
|
||||
}
|
||||
|
||||
@ -247,18 +249,31 @@ READ16_MEMBER(lwriter_state::bankedarea_r)
|
||||
{
|
||||
return m_rom_ptr[offset];
|
||||
}
|
||||
// what actually maps here? dram? the sram and eeprom?
|
||||
return 0xFFFF;//m_ram_ptr[offset];
|
||||
else if (offset <= 0x01ffff)
|
||||
{
|
||||
if (offset > 0x7ff)
|
||||
logerror("Attempt to read banked area (with overlay off) past end of SRAM from offset %08X!\n",offset<<1);
|
||||
return m_sram_ptr[offset&0x7FF];
|
||||
}
|
||||
logerror("Attempt to read banked area (with overlay off) past end of SRAM from offset %08X! Returning 0xFFFF!\n",offset<<1);
|
||||
return 0xFFFF;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER (lwriter_state::bankedarea_w)
|
||||
WRITE16_MEMBER(lwriter_state::bankedarea_w)
|
||||
{
|
||||
if (!m_overlay)
|
||||
if (m_overlay)
|
||||
{
|
||||
COMBINE_DATA(&m_ram_ptr[offset]);
|
||||
logerror("Attempt to write banked area (with overlay ON) with data %04X to offset %08X IGNORED!\n",data, offset<<1);
|
||||
return;
|
||||
}
|
||||
else
|
||||
fprintf(stderr, "Attempt to write data %04X to offset %08X IGNORED!\n", data, offset);
|
||||
else if (offset <= 0x01ffff)
|
||||
{
|
||||
if (offset > 0x7ff)
|
||||
logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X!\n",data, offset<<1);
|
||||
COMBINE_DATA(&m_sram_ptr[offset&0x7FF]);
|
||||
return;
|
||||
}
|
||||
logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X IGNORED!\n", data, offset<<1);
|
||||
}
|
||||
|
||||
/* 4 diagnostic LEDs, plus 4 i/o lines for the printer */
|
||||
@ -269,6 +284,13 @@ WRITE8_MEMBER(lwriter_state::led_out_w)
|
||||
popmessage("LED status: %x %x %x %x %x %x %x %x\n", data&0x80, data&0x40, data&0x20, data&0x10, data&0x8, data&0x4, data&0x2, data&0x1);
|
||||
}
|
||||
|
||||
/* FIFO to printer, 64 bytes long */
|
||||
WRITE8_MEMBER(lwriter_state::fifo_out_w)
|
||||
{
|
||||
/** TODO: actually emulate this */
|
||||
logerror("FIFO written with: %02X\n", data&0xFF);
|
||||
}
|
||||
|
||||
/* via stuff */
|
||||
READ8_MEMBER(lwriter_state::via_pa_r)
|
||||
{
|
||||
@ -401,16 +423,17 @@ MACHINE_CONFIG_END
|
||||
|
||||
|
||||
ROM_START(lwriter)
|
||||
ROM_REGION16_BE (0x1000000, "rom", 0)
|
||||
ROM_LOAD16_BYTE ("342-0545.l0", 0x000001, 0x20000, CRC (6431742d) SHA1 (040bd5b84b49b86f2b0fe9ece378bbc7a10a94ec)) // Label: "342-0545-A JAPAN // TC531000CP-F700 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L0
|
||||
ROM_LOAD16_BYTE ("342-0546.h0", 0x000000, 0x20000, CRC (c592bfb7) SHA1 (b595ae225238f7fabd1566a3133ea6154e082e2d)) // Label: "342-0546-A JAPAN // TC531000CP-F701 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H0
|
||||
ROM_LOAD16_BYTE ("342-0547.l1", 0x040001, 0x20000, CRC (205a5ea8) SHA1 (205fefbb5c67a07d57cb6184c69648321a34a8fe)) // Label: "342-0547-A JAPAN // TC531000CP-F702 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L1
|
||||
ROM_LOAD16_BYTE ("342-0548.h1", 0x040000, 0x20000, CRC (f616e1c3) SHA1 (b9e2cd4d07990b2d1936be97b6e89ef21f06b462)) // Label: "342-0548-A JAPAN // TC531000CP-F703 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H1
|
||||
ROM_LOAD16_BYTE ("342-0549.l2", 0x080001, 0x20000, CRC (0b0b051a) SHA1 (64a80085001570c3f99d9865031715bf49bd7698)) // Label: "342-0549-A JAPAN // TC531000CP-F704 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L2
|
||||
ROM_LOAD16_BYTE ("342-0550.h2", 0x080000, 0x20000, CRC (82adcf85) SHA1 (e2ab728afdae802c0c67fc25c9ba278b9cb04e31)) // Label: "342-0550-A JAPAN // TC531000CP-F705 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H2
|
||||
ROM_LOAD16_BYTE ("342-0551.l3", 0x0c0001, 0x20000, CRC (176b3346) SHA1 (eb8dfc7e44f2bc884097e51a47e2f10ee091c9e9)) // Label: "342-0551-A JAPAN // TC531000CP-F706 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L3
|
||||
ROM_LOAD16_BYTE ("342-0552.h3", 0x0c0000, 0x20000, CRC (69b175c6) SHA1 (a84c82be1ec7e373bb097ee74b941920a3b091aa)) // Label: "342-0552-A JAPAN // TC531000CP-F707 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H3
|
||||
ROM_REGION( 0x200000, "mainram", ROMREGION_ERASEFF )
|
||||
ROM_REGION16_BE( 0x200000, "rom", ROMREGION_ERASEFF )
|
||||
ROM_LOAD16_BYTE("342-0545.l0", 0x000001, 0x20000, CRC (6431742d) SHA1 (040bd5b84b49b86f2b0fe9ece378bbc7a10a94ec)) // Label: "342-0545-A JAPAN // TC531000CP-F700 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L0
|
||||
ROM_LOAD16_BYTE("342-0546.h0", 0x000000, 0x20000, CRC (c592bfb7) SHA1 (b595ae225238f7fabd1566a3133ea6154e082e2d)) // Label: "342-0546-A JAPAN // TC531000CP-F701 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H0
|
||||
ROM_LOAD16_BYTE("342-0547.l1", 0x040001, 0x20000, CRC (205a5ea8) SHA1 (205fefbb5c67a07d57cb6184c69648321a34a8fe)) // Label: "342-0547-A JAPAN // TC531000CP-F702 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L1
|
||||
ROM_LOAD16_BYTE("342-0548.h1", 0x040000, 0x20000, CRC (f616e1c3) SHA1 (b9e2cd4d07990b2d1936be97b6e89ef21f06b462)) // Label: "342-0548-A JAPAN // TC531000CP-F703 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H1
|
||||
ROM_LOAD16_BYTE("342-0549.l2", 0x080001, 0x20000, CRC (0b0b051a) SHA1 (64a80085001570c3f99d9865031715bf49bd7698)) // Label: "342-0549-A JAPAN // TC531000CP-F704 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L2
|
||||
ROM_LOAD16_BYTE("342-0550.h2", 0x080000, 0x20000, CRC (82adcf85) SHA1 (e2ab728afdae802c0c67fc25c9ba278b9cb04e31)) // Label: "342-0550-A JAPAN // TC531000CP-F705 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H2
|
||||
ROM_LOAD16_BYTE("342-0551.l3", 0x0c0001, 0x20000, CRC (176b3346) SHA1 (eb8dfc7e44f2bc884097e51a47e2f10ee091c9e9)) // Label: "342-0551-A JAPAN // TC531000CP-F706 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L3
|
||||
ROM_LOAD16_BYTE("342-0552.h3", 0x0c0000, 0x20000, CRC (69b175c6) SHA1 (a84c82be1ec7e373bb097ee74b941920a3b091aa)) // Label: "342-0552-A JAPAN // TC531000CP-F707 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H3
|
||||
ROM_REGION( 0x200000, "dram", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x1000, "sram", ROMREGION_ERASEFF )
|
||||
|
||||
ROM_END
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user