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https://github.com/holub/mame
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LaserWriter II NT: Further WIP, passes another self test [Lord Nightmare]
This commit is contained in:
Lord-Nightmare
parent
029b93f95e
commit
33150c5149
@ -4,11 +4,11 @@
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Apple LaserWriter II NT driver
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Apple LaserWriter II NT driver
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0x000000 - 0x1fffff ???/ROM (switches based on overlay)
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0x000000 - 0x1fffff SRAM/ROM (switches based on overlay)
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0x200000 - 0x3fffff ROM
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0x200000 - 0x3fffff ROM
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0x400000 - 0x5fffff RAM
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0x400000 - 0x5fffff RAM
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0x600000 - 0x7fffff ??? more RAM?
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0x600000 - 0x7fffff ??? more RAM?
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0x800000 - 0x9fffff LED/Printer Controls
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0x800000 - 0x9fffff LED/Printer Controls(MSB), FIFO to print mechanism(LSB)
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0xa00000 - 0xbfffff Zilog 8530 SCC (Serial Control Chip) Read
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0xa00000 - 0xbfffff Zilog 8530 SCC (Serial Control Chip) Read
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0xc00000 - 0xdfffff Zilog 8530 SCC (Serial Control Chip) Write
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0xc00000 - 0xdfffff Zilog 8530 SCC (Serial Control Chip) Write
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0xe00000 - 0xefffff Rockwell 6522 VIA
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0xe00000 - 0xefffff Rockwell 6522 VIA
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@ -34,7 +34,8 @@
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0xC - <Passes> 400000-5fffff comprehensive DRAM data test
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0xC - <Passes> 400000-5fffff comprehensive DRAM data test
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0xB - <Passes?> Unknown test
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0xB - <Passes?> Unknown test
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0xA - <Hacked to pass, not understood> dies if something to do with 600000-7fffff doesn't mirror 400000-5fffff ?
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0xA - <Hacked to pass, not understood> dies if something to do with 600000-7fffff doesn't mirror 400000-5fffff ?
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0x8 - <Fails> Unknown test
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0x8 - <Passes> SRAM test 000000-000FFF
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0x0 - <quickly runs off into weeds> not sure...
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If one of the self tests fails, the uppermost bit will oscillate (c000 4000 c000 4000 etc) forever
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If one of the self tests fails, the uppermost bit will oscillate (c000 4000 c000 4000 etc) forever
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@ -47,6 +48,7 @@
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2KB SRAM
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2KB SRAM
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X2804 EEPROM (custom marked as 335-0022) [note that technically a 2808 or 2816 can go here and will work too]
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X2804 EEPROM (custom marked as 335-0022) [note that technically a 2808 or 2816 can go here and will work too]
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1MB ROM
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1MB ROM
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MMI67L401 64x4 FIFO, x2
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+------------------------------------------------------------------------------------------------------------------------+=====+
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+------------------------------------------------------------------------------------------------------------------------+=====+
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| 1 2 3 4 5 6 7 8 9 10 11 | #
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| 1 2 3 4 5 6 7 8 9 10 11 | #
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@ -113,6 +115,7 @@ public:
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DECLARE_READ16_MEMBER(bankedarea_r);
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DECLARE_READ16_MEMBER(bankedarea_r);
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DECLARE_WRITE16_MEMBER(bankedarea_w);
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DECLARE_WRITE16_MEMBER(bankedarea_w);
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DECLARE_WRITE8_MEMBER(led_out_w);
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DECLARE_WRITE8_MEMBER(led_out_w);
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DECLARE_WRITE8_MEMBER(fifo_out_w);
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DECLARE_READ8_MEMBER(via_pa_r);
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DECLARE_READ8_MEMBER(via_pa_r);
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DECLARE_WRITE8_MEMBER(via_pa_w);
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DECLARE_WRITE8_MEMBER(via_pa_w);
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DECLARE_WRITE_LINE_MEMBER(via_ca2_w);
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DECLARE_WRITE_LINE_MEMBER(via_ca2_w);
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@ -135,7 +138,7 @@ private:
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required_device<via6522_device> m_via;
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required_device<via6522_device> m_via;
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#endif
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#endif
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uint16_t *m_ram_ptr, *m_rom_ptr;
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uint16_t *m_dram_ptr, *m_sram_ptr, *m_rom_ptr;
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bool m_overlay;
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bool m_overlay;
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};
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};
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@ -145,30 +148,43 @@ Address maps (x = ignored; * = selects address within this range)
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a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 (a0 via UDS/LDS)
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a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 (a0 via UDS/LDS)
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* * * PAL16R6 U80
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* * * PAL16R6 U80
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* * * * * * decoded by pals
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* * * * * * decoded by pals
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0 0 A * * * * * * * * * * * * * * * * * * * * * R ROM
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Overlay ON:
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0 0 A 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
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0 0 0 * * * * * * * * * * * * * * * * * * * * * R ROM
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0 0 A 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
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0 0 0 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
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0 0 A 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
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0 0 0 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
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0 0 A 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
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0 0 0 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
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0 0 A 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
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0 0 0 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
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0 0 0 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
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Overlay OFF:
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0 0 0 ? ? ?0? x x x x x x * * * * * * * * * * * * RW SRAM
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Unknown:
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? ? ? ? ? ? x x x x x x (*) (*) * * * * * * * * * 1 RW 2804 EEPROM
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(technically a10 and a11 are ignored, but if a 2808 or 2816 is put in this spot the address lines do connect to the appropriate pins)
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Common:
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0 0 1 * * * * * * * * * * * * * * * * * * * * * R ROM
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0 0 1 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
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0 0 1 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
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0 0 1 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
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0 0 1 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
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0 0 1 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
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0 1 0 * * * * * * * * * * * * * * * * * * * * * RW DRAM
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0 1 0 * * * * * * * * * * * * * * * * * * * * * RW DRAM
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0 1 1 * * * * * * * * * * * * * * * * * * * * * RW ???? DRAM mirror?
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0 1 1 * * * * * * * * * * * * * * * * * * * * * RW ???? DRAM mirror?
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1 0 0 ? ? ? x x x x x x x x x x x x x x x x x 0 W 64x8 FIFO
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1 0 0 ? ? ? x x x x x x x x x x x x x x x x x 1 W Status LEDs and mech
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1 0 0 ? ? ? x x x x x x x x x x x x x x x x x 1 W Status LEDs and mech
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1 0 1 ? ? ? x x x x x x x x x x x x x x x * * 1 R 8530 SCC Read
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1 0 1 ? ? ? x x x x x x x x x x x x x x x * * 1 R 8530 SCC Read
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1 1 0 ? ? ? x x x x x x x x x x x x x x x * * 0 W 8530 SCC Write
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1 1 0 ? ? ? x x x x x x x x x x x x x x x * * 0 W 8530 SCC Write
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1 1 1 ?x? ?0? ? x x x x x x x x x x x x x * * * * 0 RW 65C22 VIA
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1 1 1 ?x? ?0? ? x x x x x x x x x x x x x * * * * 0 RW 65C22 VIA
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1 1 1 ?x? ?1? ? x x x x x x x x x x x x x * * * * 0 RW debugger rom/pod area
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1 1 1 ?x? ?1? ? x x x x x x x x x x x x x * * * * 0 RW debugger rom/pod area
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TODO:
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? ? ? ? ? ? x x x x x x * * * * * * * * * * * * RW SRAM
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? ? ? ? ? ? x x x x x x (*) (*) * * * * * * * * * 1 RW 2804 EEPROM
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(technically a10 and a11 are ignored, but if a 2808 or 2816 is put in this spot the address lines do connect to the appropriate pins)
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map when overlay is set, i.e. A above is considered 'x':
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map when overlay is set:
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000000-1fffff ROM (second half is open bus)
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000000-1fffff ROM (second half is open bus)
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map when overlay is clear:
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000000-03ffff SRAM(?)
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040000-1fffff ????
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200000-3fffff ROM (second half is open bus)
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200000-3fffff ROM (second half is open bus)
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400000-5fffff DRAM?
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400000-5fffff DRAM
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600000-7fffff unknown, DRAM mirror?
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600000-7fffff DRAM mirror
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800000-83ffff LEDs and status bits to printer mechanism
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800000-83ffff LEDs and status bits to printer mechanism, FIFO
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840000-9fffff unknown
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840000-9fffff unknown
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a00000-a3ffff SCC read
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a00000-a3ffff SCC read
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a40000-bfffff unknown
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a40000-bfffff unknown
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@ -179,23 +195,8 @@ e40000-f7ffff unknown
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f80000-fbffff debug area (first read must be 0xAAAA5555, then 68k will jump to address of second read)
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f80000-fbffff debug area (first read must be 0xAAAA5555, then 68k will jump to address of second read)
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fc0000-ffffff unknown
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fc0000-ffffff unknown
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map when overlay is clear, i.e. A above is considered '1':
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The ADB bit-bang transceiver MCU connects to the VIA CB1 (adbclk) and CB2 (adbdata) pins,
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000000-1fffff unknown, maybe RAM???? maybe eeprom goes here too? eeprom is specifically disabled when overlay is set
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as well as PA0 (ST1), PA2 (ST2) and PA3 (ADB /INT)
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200000-3fffff ROM (second half is open bus)
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400000-5fffff DRAM?
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600000-7fffff unknown, DRAM mirror?
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800000-83ffff LEDs and status bits to printer mechanism
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840000-9fffff unknown
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a00000-a3ffff SCC read
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a40000-bfffff unknown
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c00000-c3ffff SCC write
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c40000-dfffff unknown
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e00000-e3ffff VIA
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e40000-f7ffff unknown
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f80000-fbffff unknown
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fc0000-ffffff unknown
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The ADB bitbang transceiver connects to the
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*/
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*/
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static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
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static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
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@ -203,9 +204,9 @@ static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
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AM_RANGE(0x000000, 0x1fffff) AM_READWRITE(bankedarea_r, bankedarea_w)
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AM_RANGE(0x000000, 0x1fffff) AM_READWRITE(bankedarea_r, bankedarea_w)
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AM_RANGE(0x200000, 0x2fffff) AM_ROM AM_REGION("rom", 0) // 1MB ROM
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AM_RANGE(0x200000, 0x2fffff) AM_ROM AM_REGION("rom", 0) // 1MB ROM
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//AM_RANGE(0x300000, 0x3fffff) // open bus?
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//AM_RANGE(0x300000, 0x3fffff) // open bus?
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AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_REGION("mainram", 0) AM_MIRROR(0x200000) // 2MB DRAM
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AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_REGION("dram", 0) AM_MIRROR(0x200000) // 2MB DRAM
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//AM_RANGE(0x600000, 0x600fff) AM_RAM AM_MIRROR(0x1ff000) // 4096 bytes SRAM????
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AM_RANGE(0x800000, 0x800001) AM_WRITE8(led_out_w, 0xff00) AM_MIRROR(0x1ffffe) // mirror is a guess given that the pals can only decode A18-A23
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AM_RANGE(0x800000, 0x800001) AM_WRITE8(led_out_w, 0xff00) AM_MIRROR(0x1ffffe) // mirror is a guess given that the pals can only decode A18-A23
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AM_RANGE(0x800000, 0x800001) AM_WRITE8(fifo_out_w, 0x00ff) AM_MIRROR(0x1ffffe) // mirror is a guess given that the pals can only decode A18-A23
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AM_RANGE(0xc00000, 0xc00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xc00000, 0xc00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xc00004, 0xc00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xc00004, 0xc00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xa00000, 0xa00001) AM_DEVREAD8 ("scc", scc8530_device, ca_r, 0xff00) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xa00000, 0xa00001) AM_DEVREAD8 ("scc", scc8530_device, ca_r, 0xff00) AM_MIRROR(0x1ffff8)
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@ -230,7 +231,8 @@ INPUT_PORTS_END
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void lwriter_state::machine_start()
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void lwriter_state::machine_start()
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{
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{
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m_rom_ptr = (uint16_t*)memregion("rom")->base();
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m_rom_ptr = (uint16_t*)memregion("rom")->base();
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m_ram_ptr = (uint16_t*)memregion("mainram")->base();
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m_dram_ptr = (uint16_t*)memregion("dram")->base();
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m_sram_ptr = (uint16_t*)memregion("sram")->base();
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// do stuff here later on like setting up printer mechanisms HLE timers etc
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// do stuff here later on like setting up printer mechanisms HLE timers etc
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}
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}
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@ -247,18 +249,31 @@ READ16_MEMBER(lwriter_state::bankedarea_r)
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{
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{
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return m_rom_ptr[offset];
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return m_rom_ptr[offset];
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}
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}
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// what actually maps here? dram? the sram and eeprom?
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else if (offset <= 0x01ffff)
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return 0xFFFF;//m_ram_ptr[offset];
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{
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if (offset > 0x7ff)
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logerror("Attempt to read banked area (with overlay off) past end of SRAM from offset %08X!\n",offset<<1);
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return m_sram_ptr[offset&0x7FF];
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}
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logerror("Attempt to read banked area (with overlay off) past end of SRAM from offset %08X! Returning 0xFFFF!\n",offset<<1);
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return 0xFFFF;
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}
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}
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WRITE16_MEMBER (lwriter_state::bankedarea_w)
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WRITE16_MEMBER(lwriter_state::bankedarea_w)
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{
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{
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if (!m_overlay)
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if (m_overlay)
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{
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{
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COMBINE_DATA(&m_ram_ptr[offset]);
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logerror("Attempt to write banked area (with overlay ON) with data %04X to offset %08X IGNORED!\n",data, offset<<1);
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return;
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}
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}
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else
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else if (offset <= 0x01ffff)
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fprintf(stderr, "Attempt to write data %04X to offset %08X IGNORED!\n", data, offset);
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{
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if (offset > 0x7ff)
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logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X!\n",data, offset<<1);
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COMBINE_DATA(&m_sram_ptr[offset&0x7FF]);
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return;
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}
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logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X IGNORED!\n", data, offset<<1);
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}
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}
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/* 4 diagnostic LEDs, plus 4 i/o lines for the printer */
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/* 4 diagnostic LEDs, plus 4 i/o lines for the printer */
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@ -269,6 +284,13 @@ WRITE8_MEMBER(lwriter_state::led_out_w)
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popmessage("LED status: %x %x %x %x %x %x %x %x\n", data&0x80, data&0x40, data&0x20, data&0x10, data&0x8, data&0x4, data&0x2, data&0x1);
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popmessage("LED status: %x %x %x %x %x %x %x %x\n", data&0x80, data&0x40, data&0x20, data&0x10, data&0x8, data&0x4, data&0x2, data&0x1);
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}
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}
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/* FIFO to printer, 64 bytes long */
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WRITE8_MEMBER(lwriter_state::fifo_out_w)
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{
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/** TODO: actually emulate this */
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logerror("FIFO written with: %02X\n", data&0xFF);
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}
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/* via stuff */
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/* via stuff */
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READ8_MEMBER(lwriter_state::via_pa_r)
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READ8_MEMBER(lwriter_state::via_pa_r)
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{
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{
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@ -401,16 +423,17 @@ MACHINE_CONFIG_END
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ROM_START(lwriter)
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ROM_START(lwriter)
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ROM_REGION16_BE (0x1000000, "rom", 0)
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ROM_REGION16_BE( 0x200000, "rom", ROMREGION_ERASEFF )
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ROM_LOAD16_BYTE ("342-0545.l0", 0x000001, 0x20000, CRC (6431742d) SHA1 (040bd5b84b49b86f2b0fe9ece378bbc7a10a94ec)) // Label: "342-0545-A JAPAN // TC531000CP-F700 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L0
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ROM_LOAD16_BYTE("342-0545.l0", 0x000001, 0x20000, CRC (6431742d) SHA1 (040bd5b84b49b86f2b0fe9ece378bbc7a10a94ec)) // Label: "342-0545-A JAPAN // TC531000CP-F700 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L0
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ROM_LOAD16_BYTE ("342-0546.h0", 0x000000, 0x20000, CRC (c592bfb7) SHA1 (b595ae225238f7fabd1566a3133ea6154e082e2d)) // Label: "342-0546-A JAPAN // TC531000CP-F701 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H0
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ROM_LOAD16_BYTE("342-0546.h0", 0x000000, 0x20000, CRC (c592bfb7) SHA1 (b595ae225238f7fabd1566a3133ea6154e082e2d)) // Label: "342-0546-A JAPAN // TC531000CP-F701 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H0
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ROM_LOAD16_BYTE ("342-0547.l1", 0x040001, 0x20000, CRC (205a5ea8) SHA1 (205fefbb5c67a07d57cb6184c69648321a34a8fe)) // Label: "342-0547-A JAPAN // TC531000CP-F702 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L1
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ROM_LOAD16_BYTE("342-0547.l1", 0x040001, 0x20000, CRC (205a5ea8) SHA1 (205fefbb5c67a07d57cb6184c69648321a34a8fe)) // Label: "342-0547-A JAPAN // TC531000CP-F702 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L1
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ROM_LOAD16_BYTE ("342-0548.h1", 0x040000, 0x20000, CRC (f616e1c3) SHA1 (b9e2cd4d07990b2d1936be97b6e89ef21f06b462)) // Label: "342-0548-A JAPAN // TC531000CP-F703 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H1
|
ROM_LOAD16_BYTE("342-0548.h1", 0x040000, 0x20000, CRC (f616e1c3) SHA1 (b9e2cd4d07990b2d1936be97b6e89ef21f06b462)) // Label: "342-0548-A JAPAN // TC531000CP-F703 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H1
|
||||||
ROM_LOAD16_BYTE ("342-0549.l2", 0x080001, 0x20000, CRC (0b0b051a) SHA1 (64a80085001570c3f99d9865031715bf49bd7698)) // Label: "342-0549-A JAPAN // TC531000CP-F704 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L2
|
ROM_LOAD16_BYTE("342-0549.l2", 0x080001, 0x20000, CRC (0b0b051a) SHA1 (64a80085001570c3f99d9865031715bf49bd7698)) // Label: "342-0549-A JAPAN // TC531000CP-F704 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L2
|
||||||
ROM_LOAD16_BYTE ("342-0550.h2", 0x080000, 0x20000, CRC (82adcf85) SHA1 (e2ab728afdae802c0c67fc25c9ba278b9cb04e31)) // Label: "342-0550-A JAPAN // TC531000CP-F705 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H2
|
ROM_LOAD16_BYTE("342-0550.h2", 0x080000, 0x20000, CRC (82adcf85) SHA1 (e2ab728afdae802c0c67fc25c9ba278b9cb04e31)) // Label: "342-0550-A JAPAN // TC531000CP-F705 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H2
|
||||||
ROM_LOAD16_BYTE ("342-0551.l3", 0x0c0001, 0x20000, CRC (176b3346) SHA1 (eb8dfc7e44f2bc884097e51a47e2f10ee091c9e9)) // Label: "342-0551-A JAPAN // TC531000CP-F706 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L3
|
ROM_LOAD16_BYTE("342-0551.l3", 0x0c0001, 0x20000, CRC (176b3346) SHA1 (eb8dfc7e44f2bc884097e51a47e2f10ee091c9e9)) // Label: "342-0551-A JAPAN // TC531000CP-F706 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @L3
|
||||||
ROM_LOAD16_BYTE ("342-0552.h3", 0x0c0000, 0x20000, CRC (69b175c6) SHA1 (a84c82be1ec7e373bb097ee74b941920a3b091aa)) // Label: "342-0552-A JAPAN // TC531000CP-F707 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H3
|
ROM_LOAD16_BYTE("342-0552.h3", 0x0c0000, 0x20000, CRC (69b175c6) SHA1 (a84c82be1ec7e373bb097ee74b941920a3b091aa)) // Label: "342-0552-A JAPAN // TC531000CP-F707 // (C) 87 APPLE 8940EAI // (C) 83-87 ADOBE V47.0 // (C) 81 LINOTYPE" TC531000 @H3
|
||||||
ROM_REGION( 0x200000, "mainram", ROMREGION_ERASEFF )
|
ROM_REGION( 0x200000, "dram", ROMREGION_ERASEFF )
|
||||||
|
ROM_REGION( 0x1000, "sram", ROMREGION_ERASEFF )
|
||||||
|
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user