Converted chsuper.c driver to use the new RAMDAC device, and cleaned up the vram in it

This commit is contained in:
Angelo Salese 2011-12-01 19:04:44 +00:00
parent 75bc60e497
commit 332613a611
2 changed files with 28 additions and 55 deletions

View File

@ -25,6 +25,8 @@ To Do:
- ilpag, steaser: some minor issues with the blitter emulation;
- ilpag: sound uses a MP7524 8-bit DAC (bottom right, by the edge connector -PJB), but the MCU controls the sound writes?
- steaser: sound uses an OkiM6295 (controlled by the sub MCU), check if it can be simulated;
- deucesw2: colour cycling effect on attract mode is ugly (background should be blue, it's instead a MAME-esque
palette), protection?
*****************************************************************************************************************/

View File

@ -1,5 +1,9 @@
/*******************************************************************************************
Champion Super (c) 1999 <unknown>
driver by Angelo Salese & David Haywood
Notes:
-To init chsuper3, just soft-reset and keep pressed both service keys (9 & 0)
@ -14,7 +18,7 @@ TODO:
#include "cpu/z180/z180.h"
#include "sound/dac.h"
#include "machine/nvram.h"
#include "video/ramdac.h"
class chsuper_state : public driver_device
{
@ -23,20 +27,23 @@ public:
: driver_device(mconfig, type, tag) { }
int m_tilexor;
struct { int r,g,b,offs,offs_internal; } m_pal;
UINT8 *m_vram;
};
static VIDEO_START(chsuper)
{
chsuper_state *state = machine.driver_data<chsuper_state>();
state->m_vram = auto_alloc_array_clear(machine, UINT8, 1 << 16);
}
static SCREEN_UPDATE(chsuper)
{
//chsuper_state *state = screen->machine().driver_data<chsuper_state>();
chsuper_state *state = screen->machine().driver_data<chsuper_state>();
const gfx_element *gfx = screen->machine().gfx[0];
UINT8 *vram = screen->machine().region("vram")->base();
UINT8 *vram = state->m_vram;
int count = 0x0000;
int y,x;
@ -46,8 +53,6 @@ static SCREEN_UPDATE(chsuper)
{
int tile = ((vram[count+1]<<8) | vram[count]) & 0xffff;
//tile ^=state->m_tilexor;
drawgfx_opaque(bitmap,cliprect,gfx,tile,0,0,0,x*4,y*8);
count+=2;
}
@ -56,40 +61,6 @@ static SCREEN_UPDATE(chsuper)
return 0;
}
static WRITE8_HANDLER( paletteram_io_w )
{
chsuper_state *state = space->machine().driver_data<chsuper_state>();
switch(offset)
{
case 0:
state->m_pal.offs = data;
break;
case 2:
state->m_pal.offs_internal = 0;
break;
case 1:
switch(state->m_pal.offs_internal)
{
case 0:
state->m_pal.r = ((data & 0x3f) << 2) | ((data & 0x30) >> 4);
state->m_pal.offs_internal++;
break;
case 1:
state->m_pal.g = ((data & 0x3f) << 2) | ((data & 0x30) >> 4);
state->m_pal.offs_internal++;
break;
case 2:
state->m_pal.b = ((data & 0x3f) << 2) | ((data & 0x30) >> 4);
palette_set_color(space->machine(), state->m_pal.offs, MAKE_RGB(state->m_pal.r, state->m_pal.g, state->m_pal.b));
state->m_pal.offs_internal = 0;
state->m_pal.offs++;
break;
}
break;
}
}
static READ8_HANDLER( ff_r )
{
return 0xff;
@ -97,9 +68,9 @@ static READ8_HANDLER( ff_r )
static WRITE8_HANDLER( chsuper_vram_w )
{
UINT8 *vram = space->machine().region("vram")->base();
chsuper_state *state = space->machine().driver_data<chsuper_state>();
vram[offset] = data;
state->m_vram[offset] = data;
}
static ADDRESS_MAP_START( chsuper_prg_map, AS_PROGRAM, 8 )
@ -117,7 +88,9 @@ static ADDRESS_MAP_START( chsuper_portmap, AS_IO, 8 )
AM_RANGE( 0x00e9, 0x00e9 ) AM_READ_PORT("IN1")
AM_RANGE( 0x00ea, 0x00ea ) AM_READ_PORT("DSW0")
AM_RANGE( 0x00ed, 0x00ef ) AM_WRITENOP //lamps
AM_RANGE( 0x00fc, 0x00fe ) AM_WRITE( paletteram_io_w )
AM_RANGE( 0x00fc, 0x00fc ) AM_DEVWRITE_MODERN("ramdac", ramdac_device, index_w)
AM_RANGE( 0x00fd, 0x00fd ) AM_DEVWRITE_MODERN("ramdac", ramdac_device, pal_w)
AM_RANGE( 0x00fe, 0x00fe ) AM_DEVWRITE_MODERN("ramdac", ramdac_device, mask_w)
AM_RANGE( 0x8300, 0x8300 ) AM_READ( ff_r ) //probably data for the dac
AM_RANGE( 0xff20, 0xff3f ) AM_DEVWRITE("dac", dac_w) // unk writes
ADDRESS_MAP_END
@ -201,6 +174,15 @@ static GFXDECODE_START( chsuper )
GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 0, 1 )
GFXDECODE_END
static ADDRESS_MAP_START( ramdac_map, AS_0, 8 )
AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE_MODERN("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
ADDRESS_MAP_END
static RAMDAC_INTERFACE( ramdac_intf )
{
0
};
static MACHINE_CONFIG_START( chsuper, chsuper_state )
/* basic machine hardware */
@ -224,6 +206,7 @@ static MACHINE_CONFIG_START( chsuper, chsuper_state )
MCFG_PALETTE_LENGTH(0x100)
MCFG_VIDEO_START(chsuper)
MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -244,8 +227,6 @@ ROM_START( chsuper3 )
ROM_LOAD( "a.bin", 0x00000, 0x80000, CRC(ace8b591) SHA1(e9ba5efebdc9b655056ed8b2621f062f50e0528f) )
ROM_LOAD( "b.bin", 0x80000, 0x80000, CRC(5f58c722) SHA1(d339ae27af010b058eae9084fba85fb2fbed3952) )
ROM_REGION( 0x10000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x80000, "adpcm", 0 )
ROM_COPY( "maincpu", 0x10000, 0x00000, 0x70000 )
ROM_END
@ -258,8 +239,6 @@ ROM_START( chsuper2 )
ROM_LOAD( "chsuper2-a.bin", 0x00000, 0x80000, CRC(7caa8ebe) SHA1(440306a208ec8afd570b15f05b5dc542acc98510) )
ROM_LOAD( "chsuper2-b.bin", 0x80000, 0x80000, CRC(7bb463d7) SHA1(fb3842ba53e545fa47574c91df7281a9cb417395) )
ROM_REGION( 0x10000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x80000, "adpcm", 0 )
ROM_COPY( "maincpu", 0x10000, 0x00000, 0x70000 )
ROM_END
@ -268,8 +247,6 @@ ROM_START( chmpnum )
ROM_REGION( 0x80000, "maincpu", 0 ) // code + samples
ROM_LOAD( "3.ic11", 0x00000, 0x80000, CRC(46aa2ce7) SHA1(036d67a26c890c4dc26599bfcd2c67f12e30fb52) )
ROM_REGION( 0x010000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x100000, "gfx1", 0 )
ROM_LOAD( "1.ic18", 0x00000, 0x80000, CRC(8e202eaa) SHA1(156b498873111e5890c00d447201ba4bcbe6e633) )
ROM_LOAD( "2.ic19", 0x80000, 0x80000, CRC(dc0790b0) SHA1(4550f85e609338635a3987f7832517ed1d6388d4) )
@ -299,8 +276,6 @@ static DRIVER_INIT( chsuper2 )
}
memcpy(rom,buffer,0x100000);
state->m_tilexor = 0x0000;
}
static DRIVER_INIT( chsuper3 )
@ -324,8 +299,6 @@ static DRIVER_INIT( chsuper3 )
}
memcpy(rom,buffer,0x100000);
state->m_tilexor = 0x0000;
}
static DRIVER_INIT( chmpnum )
@ -353,8 +326,6 @@ static DRIVER_INIT( chmpnum )
}
memcpy(rom,buffer,0x100000);
state->m_tilexor = 0x0000;
}