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variable name consistency, pass 3 (n/w)

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This commit is contained in:
Lord-Nightmare 2016-09-06 14:12:32 -04:00
parent cde1fe2633
commit 3374f55b2a
3 changed files with 12 additions and 12 deletions
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12
src/mame/drivers/superqix.cpp
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@ -184,7 +184,7 @@ READ8_MEMBER(superqix_state::sqix_from_mcu_r)
TIMER_CALLBACK_MEMBER(superqix_state::mcu_acknowledge_callback) TIMER_CALLBACK_MEMBER(superqix_state::mcu_acknowledge_callback)
{ {
m_Z80HasWritten = 1; m_Z80HasWritten = 1;
m_fromZ80 = m_portb; m_fromZ80 = m_fromZ80pending;
// logerror("Z80->MCU %02x\n",m_fromZ80); // logerror("Z80->MCU %02x\n",m_fromZ80);
} }
@ -197,7 +197,7 @@ READ8_MEMBER(superqix_state::mcu_acknowledge_r)
WRITE8_MEMBER(superqix_state::sqix_z80_mcu_w) WRITE8_MEMBER(superqix_state::sqix_z80_mcu_w)
{ {
// logerror("%04x: sqix_z80_mcu_w %02x\n",space.device().safe_pc(),data); // logerror("%04x: sqix_z80_mcu_w %02x\n",space.device().safe_pc(),data);
m_portb = data; m_fromZ80pending = data;
} }
WRITE8_MEMBER(superqix_state::bootleg_mcu_p1_w) WRITE8_MEMBER(superqix_state::bootleg_mcu_p1_w)
@ -409,12 +409,12 @@ WRITE8_MEMBER(superqix_state::hotsmash_68705_portB_w)
READ8_MEMBER(superqix_state::hotsmash_68705_portC_r) READ8_MEMBER(superqix_state::hotsmash_68705_portC_r)
{ {
return m_portC; return m_portC_internal;
} }
WRITE8_MEMBER(superqix_state::hotsmash_68705_portC_w) WRITE8_MEMBER(superqix_state::hotsmash_68705_portC_w)
{ {
m_portC = data; m_portC_internal = data;
if ((data & 0x08) == 0) if ((data & 0x08) == 0)
{ {
@ -526,13 +526,13 @@ void superqix_state::machine_init_common()
save_item(NAME(m_port3_latch)); save_item(NAME(m_port3_latch));
save_item(NAME(m_fromMCU)); save_item(NAME(m_fromMCU));
save_item(NAME(m_fromZ80)); save_item(NAME(m_fromZ80));
save_item(NAME(m_portb)); save_item(NAME(m_fromZ80pending));
save_item(NAME(m_nmi_mask)); save_item(NAME(m_nmi_mask));
// hotsmash ??? // hotsmash ???
save_item(NAME(m_portA_in)); save_item(NAME(m_portA_in));
save_item(NAME(m_portB_out)); save_item(NAME(m_portB_out));
save_item(NAME(m_portC)); save_item(NAME(m_portC_internal));
} }
MACHINE_START_MEMBER(superqix_state,superqix) MACHINE_START_MEMBER(superqix_state,superqix)

4
src/mame/includes/superqix.h
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@ -34,7 +34,7 @@ public:
UINT8 m_port3_latch; UINT8 m_port3_latch;
UINT8 m_fromMCU; UINT8 m_fromMCU;
UINT8 m_fromZ80; UINT8 m_fromZ80;
UINT8 m_portb; UINT8 m_fromZ80pending;
int m_MCUHasWritten; int m_MCUHasWritten;
int m_Z80HasWritten; int m_Z80HasWritten;
int m_invert_coin_lockout; int m_invert_coin_lockout;
@ -42,7 +42,7 @@ public:
int m_sign[2]; int m_sign[2];
UINT8 m_portA_in; UINT8 m_portA_in;
UINT8 m_portB_out; UINT8 m_portB_out;
UINT8 m_portC; UINT8 m_portC_internal;
int m_curr_player; int m_curr_player;
int m_gfxbank; int m_gfxbank;
std::unique_ptr<bitmap_ind16> m_fg_bitmap[2]; std::unique_ptr<bitmap_ind16> m_fg_bitmap[2];

8
src/mame/machine/arkanoid.cpp
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@ -125,20 +125,20 @@ TIMER_CALLBACK_MEMBER(arkanoid_state::timer_68705_increment)
READ8_MEMBER(arkanoid_state::arkanoid_68705_port_c_r) READ8_MEMBER(arkanoid_state::arkanoid_68705_port_c_r)
{ {
int port_c_in = 0; int portC_in = 0;
/* bit 0 is latch 1 on ic26, is high if m_Z80HasWritten(latch 1) is set */ /* bit 0 is latch 1 on ic26, is high if m_Z80HasWritten(latch 1) is set */
if (m_Z80HasWritten) if (m_Z80HasWritten)
port_c_in |= 0x01; portC_in |= 0x01;
/* bit 1 is the negative output of latch 2 on ic26, is high if m_68705write is clear */ /* bit 1 is the negative output of latch 2 on ic26, is high if m_68705write is clear */
if (!m_MCUHasWritten) if (!m_MCUHasWritten)
port_c_in |= 0x02; portC_in |= 0x02;
/* bit 2 is an output, to clear latch 1, return whatever state it was set to in m_portC_out */ /* bit 2 is an output, to clear latch 1, return whatever state it was set to in m_portC_out */
/* bit 3 is an output, to set latch 2, return whatever state it was set to in m_portC_out */ /* bit 3 is an output, to set latch 2, return whatever state it was set to in m_portC_out */
return (m_portC_internal & m_ddrC) | (port_c_in & ~m_ddrC); return (m_portC_internal & m_ddrC) | (portC_in & ~m_ddrC);
} }
WRITE8_MEMBER(arkanoid_state::arkanoid_68705_port_c_w) WRITE8_MEMBER(arkanoid_state::arkanoid_68705_port_c_w)