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Merge pull request #2273 from wilbertpol/hcd62121-2
hcd62121: Improve rotate and shift instructions. Identified COM and P…
This commit is contained in:
ajrhacker
GitHub
commit
33d9488ef4
@ -21,8 +21,22 @@ TODO:
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#include "hcd62121.h"
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/* From the battery check routine at 20:e874 it looks like
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bit 3 of the flag register should be the Zero flag. */
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enum
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{
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HCD62121_IP=1, HCD62121_SP, HCD62121_F, HCD62121_LAR,
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HCD62121_CS, HCD62121_DS, HCD62121_SS, HCD62121_DSIZE,
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/* 128 byte register file */
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HCD62121_R00, HCD62121_R04, HCD62121_R08, HCD62121_R0C,
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HCD62121_R10, HCD62121_R14, HCD62121_R18, HCD62121_R1C,
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HCD62121_R20, HCD62121_R24, HCD62121_R28, HCD62121_R2C,
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HCD62121_R30, HCD62121_R34, HCD62121_R38, HCD62121_R3C,
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HCD62121_R40, HCD62121_R44, HCD62121_R48, HCD62121_R4C,
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HCD62121_R50, HCD62121_R54, HCD62121_R58, HCD62121_R5C,
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HCD62121_R60, HCD62121_R64, HCD62121_R68, HCD62121_R6C,
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HCD62121_R70, HCD62121_R74, HCD62121_R78, HCD62121_R7C
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};
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constexpr u8 FLAG_Z = 0x08;
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constexpr u8 FLAG_C = 0x02;
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constexpr u8 FLAG_ZL = 0x04;
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@ -45,10 +59,14 @@ hcd62121_cpu_device::hcd62121_cpu_device(const machine_config &mconfig, const ch
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, m_sseg(0)
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, m_f(0)
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, m_lar(0)
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, m_opt(0)
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, m_port(0)
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, m_program(nullptr)
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, m_icount(0)
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, m_kol_cb(*this)
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, m_koh_cb(*this)
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, m_port_cb(*this)
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, m_opt_cb(*this)
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, m_ki_cb(*this)
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, m_in0_cb(*this)
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{
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@ -280,6 +298,8 @@ void hcd62121_cpu_device::device_start()
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m_kol_cb.resolve_safe();
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m_koh_cb.resolve_safe();
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m_port_cb.resolve_safe();
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m_opt_cb.resolve_safe();
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m_ki_cb.resolve_safe(0);
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m_in0_cb.resolve_safe(0);
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@ -295,6 +315,8 @@ void hcd62121_cpu_device::device_start()
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save_item(NAME(m_reg));
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save_item(NAME(m_temp1));
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save_item(NAME(m_temp2));
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save_item(NAME(m_opt));
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save_item(NAME(m_port));
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// Register state for debugger
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state_add(STATE_GENPC, "GENPC", m_rtemp).callexport().formatstr("%8s");
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@ -489,6 +511,8 @@ void hcd62121_cpu_device::device_reset()
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m_lar = 0;
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m_f = 0;
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m_dsize = 0;
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m_opt = 0;
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m_port = 0;
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for (auto & elem : m_reg)
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{
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@ -746,6 +770,45 @@ void hcd62121_cpu_device::execute_run()
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switch (op)
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{
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case 0x00: /* rorb/rolb r1,4 */
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case 0x01: /* rorw/rolw r1,4 */
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case 0x02: /* rorq/rolq r1,4 */
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case 0x03: /* rort/rolt r1,4 */
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/* Nibble rotate */
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{
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int size = datasize(op);
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u8 reg1 = read_op();
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u8 d1 = 0, d2 = 0;
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read_reg(size, reg1);
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if (reg1 & 0x80)
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{
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// rotate right
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d2 = (m_temp1[size-1] & 0x0f) << 4;
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0x0f) << 4;
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m_temp1[i] = (m_temp1[i] >> 4) | d2;
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d2 = d1;
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}
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}
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else
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{
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// rotate left
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d2 = (m_temp1[size-1] & 0xf0) >> 4;
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0xf0) >> 4;
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m_temp1[i] = (m_temp1[i] << 4) | d2;
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d2 = d1;
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}
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}
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write_reg(size, reg1);
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}
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break;
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case 0x04: /* mskb r1,r2 */
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case 0x05: /* mskw r1,r2 */
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case 0x06: /* mskq r1,r2 */
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@ -761,11 +824,11 @@ void hcd62121_cpu_device::execute_run()
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}
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break;
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case 0x08: /* shb r1,4 */
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case 0x09: /* shw r1,4 */
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case 0x0A: /* shq r1,4 */
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case 0x0B: /* sht r1,4 */
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/* Shift is a nibble shift! */
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case 0x08: /* shrb/shlb r1,4 */
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case 0x09: /* shrw/shlw r1,4 */
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case 0x0A: /* shrq/shlq r1,4 */
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case 0x0B: /* shrt/shlt r1,4 */
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/* Nibble shift */
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{
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int size = datasize(op);
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u8 reg1 = read_op();
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@ -773,19 +836,25 @@ void hcd62121_cpu_device::execute_run()
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read_reg(size, reg1);
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for (int i = 0; i < size; i++)
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if (reg1 & 0x80)
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{
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if (reg1 & 0x80)
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// shift right
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0x0f) << 4;
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m_temp1[i] = (m_temp1[i] >> 4) | d2;
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d2 = d1;
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}
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else
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}
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else
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{
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// shift left
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0xf0) >> 4;
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m_temp1[i] = (m_temp1[i] << 4) | d2;
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d2 = d1;
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}
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d2 = d1;
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}
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write_reg(size, reg1);
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@ -872,11 +941,11 @@ void hcd62121_cpu_device::execute_run()
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}
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break;
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case 0x20: /* shrb r1 */
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case 0x21: /* shrw r1 */
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case 0x22: /* shrq r1 */
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case 0x23: /* shrt r1 */
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/* Shift is a single shift! */
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case 0x20: /* rorb/rolb r1 */
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case 0x21: /* rorw/rolw r1 */
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case 0x22: /* rorq/rolq r1 */
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case 0x23: /* rort/rolt r1 */
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/* Single bit rotate */
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{
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int size = datasize(op);
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u8 reg1 = read_op();
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@ -884,11 +953,27 @@ void hcd62121_cpu_device::execute_run()
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read_reg(size, reg1);
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for (int i = 0; i < size; i++)
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if (reg1 & 0x80)
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{
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d1 = (m_temp1[i] & 0x01) << 7;
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m_temp1[i] = (m_temp1[i] >> 1) | d2;
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d2 = d1;
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// rotate right
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d2 = (m_temp1[size-1] & 0x01) << 7;
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0x01) << 7;
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m_temp1[i] = (m_temp1[i] >> 1) | d2;
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d2 = d1;
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}
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}
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else
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{
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// rotate left
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d2 = (m_temp1[size-1] & 0x80) >> 7;
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0x80) >> 7;
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m_temp1[i] = (m_temp1[i] << 1) | d2;
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d2 = d1;
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}
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}
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write_reg(size, reg1);
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@ -912,11 +997,11 @@ void hcd62121_cpu_device::execute_run()
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}
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break;
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case 0x28: /* shlb r1 */
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case 0x29: /* shlw r1 */
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case 0x2A: /* shlq r1 */
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case 0x2B: /* shlt r1 */
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/* Shift is a single shift! */
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case 0x28: /* shrb/shlb r1 */
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case 0x29: /* shrw/shlw r1 */
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case 0x2A: /* shrq/shlq r1 */
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case 0x2B: /* shrt/shlt r1 */
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/* Single bit shift */
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{
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int size = datasize(op);
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u8 reg1 = read_op();
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@ -924,11 +1009,25 @@ void hcd62121_cpu_device::execute_run()
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read_reg(size, reg1);
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for (int i = 0; i < size; i++)
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if (reg1 & 0x80)
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{
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d1 = (m_temp1[i] & 0x80) >> 7;
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m_temp1[i] = (m_temp1[i] << 1) | d2;
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d2 = d1;
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// shift right
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0x01) << 7;
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m_temp1[i] = (m_temp1[i] >> 1) | d2;
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d2 = d1;
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}
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}
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else
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{
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// shift left
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for (int i = 0; i < size; i++)
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{
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d1 = (m_temp1[i] & 0x80) >> 7;
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m_temp1[i] = (m_temp1[i] << 1) | d2;
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d2 = d1;
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}
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}
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write_reg(size, reg1);
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@ -1202,8 +1301,8 @@ void hcd62121_cpu_device::execute_run()
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}
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break;
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case 0xB1: /* unk_B1 reg/i8 */
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case 0xB3: /* unk_B3 reg/i8 */
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case 0xB1: /* unk_B1 reg/i8 - PORTx control/direction? */
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case 0xB3: /* unk_B3 reg/i8 - timer/irq related? */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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read_op();
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break;
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@ -1224,7 +1323,7 @@ void hcd62121_cpu_device::execute_run()
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m_kol_cb(read_op());
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break;
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case 0xB9: /* unk_B9 reg/i8 */
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case 0xB9: /* unk_B9 reg/i8 - timer/irq related? */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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read_op();
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break;
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@ -1240,6 +1339,11 @@ void hcd62121_cpu_device::execute_run()
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}
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break;
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case 0xBC: /* unk_BC reg/i8 */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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read_op();
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break;
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case 0xBF: /* jmpncl? a16 */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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{
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@ -1406,25 +1510,28 @@ void hcd62121_cpu_device::execute_run()
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case 0xE0: /* in0 reg */
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{
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logerror("%06x: in0 read\n", (m_cseg << 16) | m_ip);
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u8 reg1 = read_op();
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m_reg[reg1 & 0x7f] = m_in0_cb();
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}
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break;
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case 0xE1: /* unk_E1 reg/i8 (in?) */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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read_op();
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case 0xE1: /* movb reg,OPT */
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m_reg[read_op() & 0x7f] = m_opt;
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break;
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case 0xE2: /* in kb, reg */
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m_reg[read_op() & 0x7f] = m_ki_cb();
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break;
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case 0xE6: /* movb reg,PORT */
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m_reg[read_op() & 0x7f] = m_port;
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break;
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case 0xE3: /* unk_e3 reg/i8 (in?) */
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case 0xE4: /* unk_e4 reg/i8 (in?) */
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case 0xE5: /* unk_e5 reg/i8 (in?) */
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case 0xE6: /* unk_e6 reg/i8 (in?) */
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case 0xE7: /* unk_e7 reg/i8 (in?) */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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read_op();
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@ -1452,9 +1559,17 @@ void hcd62121_cpu_device::execute_run()
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m_reg[read_op() & 0x7f] = m_sseg;
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break;
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case 0xF0: /* unk_F0 reg/i8 (out?) */
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case 0xF0: /* movb OPT,reg */
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m_opt = m_reg[read_op() & 0x7f];
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m_opt_cb(m_opt);
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break;
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case 0xF2: /* movb PORT,reg */
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m_port = m_reg[read_op() & 0x7f];
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m_port_cb(m_port);
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break;
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case 0xF1: /* unk_F1 reg/i8 (out?) */
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case 0xF2: /* unk_F2 reg/i8 (out?) */
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case 0xF3: /* unk_F3 reg/i8 (out?) */
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case 0xF4: /* unk_F4 reg/i8 (out?) */
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case 0xF5: /* unk_F5 reg/i8 (out?) */
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@ -1464,9 +1579,9 @@ void hcd62121_cpu_device::execute_run()
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read_op();
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break;
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case 0xFC: /* unk_FC - disable interrupts?? */
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case 0xFC: /* unk_FC - disable interrupts/stop timer?? */
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case 0xFD: /* unk_FD */
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case 0xFE: /* unk_FE */
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case 0xFE: /* unk_FE - wait for/start timer */
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logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
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break;
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@ -4,24 +4,12 @@
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#define __HCD62121_H__
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enum
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{
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HCD62121_IP=1, HCD62121_SP, HCD62121_F, HCD62121_LAR,
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HCD62121_CS, HCD62121_DS, HCD62121_SS, HCD62121_DSIZE,
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/* 128 byte register file */
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HCD62121_R00, HCD62121_R04, HCD62121_R08, HCD62121_R0C,
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HCD62121_R10, HCD62121_R14, HCD62121_R18, HCD62121_R1C,
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HCD62121_R20, HCD62121_R24, HCD62121_R28, HCD62121_R2C,
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HCD62121_R30, HCD62121_R34, HCD62121_R38, HCD62121_R3C,
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HCD62121_R40, HCD62121_R44, HCD62121_R48, HCD62121_R4C,
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HCD62121_R50, HCD62121_R54, HCD62121_R58, HCD62121_R5C,
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HCD62121_R60, HCD62121_R64, HCD62121_R68, HCD62121_R6C,
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HCD62121_R70, HCD62121_R74, HCD62121_R78, HCD62121_R7C
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};
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#define MCFG_HCD62121_KOL_CB(_devcb) devcb = &hcd62121_cpu_device::set_kol_callback(*device, DEVCB_##_devcb);
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#define MCFG_HCD62121_KOH_CB(_devcb) devcb = &hcd62121_cpu_device::set_koh_callback(*device, DEVCB_##_devcb);
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#define MCFG_HCD62121_PORT_CB(_devcb) devcb = &hcd62121_cpu_device::set_port_callback(*device, DEVCB_##_devcb);
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#define MCFG_HCD62121_OPT_CB(_devcb) devcb = &hcd62121_cpu_device::set_opt_callback(*device, DEVCB_##_devcb);
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#define MCFG_HCD62121_KI_CB(_devcb) devcb = &hcd62121_cpu_device::set_ki_callback(*device, DEVCB_##_devcb);
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#define MCFG_HCD62121_IN0_CB(_devcb) devcb = &hcd62121_cpu_device::set_in0_callback(*device, DEVCB_##_devcb);
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@ -34,6 +22,8 @@ public:
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template<class _Object> static devcb_base &set_kol_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_kol_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_koh_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_koh_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_port_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_port_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_opt_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_opt_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_ki_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_ki_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_in0_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_in0_cb.set_callback(object); }
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@ -99,6 +89,13 @@ private:
|
||||
u8 m_f;
|
||||
u16 m_lar;
|
||||
u8 m_reg[0x80];
|
||||
|
||||
// OPT7 - OPT0 output pins (pins 65-72)
|
||||
u8 m_opt;
|
||||
|
||||
// PORT7 - PORT0 I/O pins (pins 73-80)
|
||||
u8 m_port;
|
||||
|
||||
u8 m_temp1[0x10];
|
||||
u8 m_temp2[0x10];
|
||||
u32 m_rtemp;
|
||||
@ -109,6 +106,8 @@ private:
|
||||
|
||||
devcb_write8 m_kol_cb;
|
||||
devcb_write8 m_koh_cb;
|
||||
devcb_write8 m_port_cb;
|
||||
devcb_write8 m_opt_cb;
|
||||
devcb_read8 m_ki_cb;
|
||||
devcb_read8 m_in0_cb;
|
||||
};
|
||||
|
||||
@ -25,11 +25,14 @@ enum
|
||||
ARG_ILR, /* indirect last address register access */
|
||||
ARG_LAR, /* last address register */
|
||||
ARG_DSZ, /* dsize register? */
|
||||
ARG_OPT, /* OPTx (output) pins */
|
||||
ARG_PORT, /* PORTx (output) pins */
|
||||
ARG_TIM, /* timing related register? */
|
||||
ARG_KLO, /* KO1 - KO8 output lines */
|
||||
ARG_KHI, /* KO9 - KO14(?) output lines */
|
||||
ARG_KI, /* K input lines */
|
||||
ARG_4 /* for nibble shifts */
|
||||
ARG_RS, /* rotate/shift */
|
||||
ARG_RS4 /* nibble rotate/shift */
|
||||
};
|
||||
|
||||
struct hcd62121_dasm
|
||||
@ -43,12 +46,12 @@ struct hcd62121_dasm
|
||||
static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{
|
||||
/* 0x00 */
|
||||
{ "un00?", ARG_NONE, ARG_NONE }, { "un01?", ARG_NONE, ARG_NONE },
|
||||
{ "un02?", ARG_NONE, ARG_NONE }, { "un03?", ARG_NONE, ARG_NONE },
|
||||
{ "ro?b", ARG_REG, ARG_RS4 }, { "ro?w", ARG_REG, ARG_RS4 },
|
||||
{ "ro?q", ARG_REG, ARG_RS4 }, { "ro?t", ARG_REG, ARG_RS4 },
|
||||
{ "mskb", ARG_REGREG, ARG_NONE }, { "mskw", ARG_REGREG, ARG_NONE },
|
||||
{ "mskq", ARG_REGREG, ARG_NONE }, { "mskt", ARG_REGREG, ARG_NONE },
|
||||
{ "sh?b", ARG_REG, ARG_4 }, { "sh?w", ARG_REG, ARG_4 },
|
||||
{ "sh?q", ARG_REG, ARG_4 }, { "sh?t", ARG_REG, ARG_4 },
|
||||
{ "sh?b", ARG_REG, ARG_RS4 }, { "sh?w", ARG_REG, ARG_RS4 },
|
||||
{ "sh?q", ARG_REG, ARG_RS4 }, { "sh?t", ARG_REG, ARG_RS4 },
|
||||
{ "tstb", ARG_REGREG, ARG_NONE }, { "tstw", ARG_REGREG, ARG_NONE },
|
||||
{ "tstq", ARG_REGREG, ARG_NONE }, { "tstt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
@ -63,12 +66,12 @@ static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{ "imskq", ARG_REGREG, ARG_NONE }, { "imskt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
/* 0x20 */
|
||||
{ "shrb", ARG_REG, ARG_NONE }, { "shrw", ARG_REG, ARG_NONE },
|
||||
{ "shrq", ARG_REG, ARG_NONE }, { "shrt", ARG_REG, ARG_NONE },
|
||||
{ "ro?b", ARG_REG, ARG_RS }, { "ro?w", ARG_REG, ARG_RS },
|
||||
{ "ro?q", ARG_REG, ARG_RS }, { "ro?t", ARG_REG, ARG_RS },
|
||||
{ "orb", ARG_REGREG, ARG_NONE }, { "orw", ARG_REGREG, ARG_NONE },
|
||||
{ "orq", ARG_REGREG, ARG_NONE }, { "ort", ARG_REGREG, ARG_NONE },
|
||||
{ "shlb", ARG_REG, ARG_NONE }, { "shlw", ARG_REG, ARG_NONE },
|
||||
{ "shlq", ARG_REG, ARG_NONE }, { "shlt", ARG_REG, ARG_NONE },
|
||||
{ "sh?b", ARG_REG, ARG_RS }, { "sh?w", ARG_REG, ARG_RS },
|
||||
{ "sh?q", ARG_REG, ARG_RS }, { "sh?t", ARG_REG, ARG_RS },
|
||||
{ "andb", ARG_REGREG, ARG_NONE }, { "andw", ARG_REGREG, ARG_NONE },
|
||||
{ "andq", ARG_REGREG, ARG_NONE }, { "andt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
@ -83,12 +86,12 @@ static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{ "addq", ARG_REGREG, ARG_NONE }, { "addt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
/* 0x40 */
|
||||
{ "shrb?", ARG_IRG, ARG_NONE }, { "shrw?", ARG_IRG, ARG_NONE },
|
||||
{ "shrq?", ARG_IRG, ARG_NONE }, { "shrt?", ARG_IRG, ARG_NONE },
|
||||
{ "ro?b", ARG_IRG, ARG_RS4 }, { "ro?w", ARG_IRG, ARG_RS4 },
|
||||
{ "ro?q", ARG_IRG, ARG_RS4 }, { "ro?t", ARG_IRG, ARG_RS4 },
|
||||
{ "mskb", ARG_IRGREG, ARG_NONE }, { "mskw", ARG_IRGREG, ARG_NONE },
|
||||
{ "mskq", ARG_IRGREG, ARG_NONE }, { "mskt", ARG_IRGREG, ARG_NONE },
|
||||
{ "shrb", ARG_IRG, ARG_NONE }, { "shrw", ARG_IRG, ARG_NONE },
|
||||
{ "shrq", ARG_IRG, ARG_NONE }, { "shrt", ARG_IRG, ARG_NONE },
|
||||
{ "sh?b", ARG_IRG, ARG_RS4 }, { "sh?w", ARG_IRG, ARG_RS4 },
|
||||
{ "sh?q", ARG_IRG, ARG_RS4 }, { "sh?t", ARG_IRG, ARG_RS4 },
|
||||
{ "tstb", ARG_IRGREG, ARG_NONE }, { "tstw", ARG_IRGREG, ARG_NONE },
|
||||
{ "tstq", ARG_IRGREG, ARG_NONE }, { "tstt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
@ -103,12 +106,12 @@ static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{ "imskq", ARG_IRGREG, ARG_NONE }, { "imskt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
/* 0x60 */
|
||||
{ "shrb", ARG_IRG, ARG_NONE }, { "shrw", ARG_IRG, ARG_NONE },
|
||||
{ "shrq", ARG_IRG, ARG_NONE }, { "shrt", ARG_IRG, ARG_NONE },
|
||||
{ "ro?b", ARG_IRG, ARG_RS }, { "ro?w", ARG_IRG, ARG_RS },
|
||||
{ "ro?q", ARG_IRG, ARG_RS }, { "ro?t", ARG_IRG, ARG_RS },
|
||||
{ "orb", ARG_IRGREG, ARG_NONE }, { "orw", ARG_IRGREG, ARG_NONE },
|
||||
{ "orq", ARG_IRGREG, ARG_NONE }, { "ort", ARG_IRGREG, ARG_NONE },
|
||||
{ "shlb", ARG_IRG, ARG_NONE }, { "shlw", ARG_IRG, ARG_NONE },
|
||||
{ "shlq", ARG_IRG, ARG_NONE }, { "shlt", ARG_IRG, ARG_NONE },
|
||||
{ "sh?b", ARG_IRG, ARG_RS }, { "sh?w", ARG_IRG, ARG_RS },
|
||||
{ "sh?q", ARG_IRG, ARG_RS }, { "sh?t", ARG_IRG, ARG_RS },
|
||||
{ "andb", ARG_IRGREG, ARG_NONE }, { "andw", ARG_IRGREG, ARG_NONE },
|
||||
{ "andq", ARG_IRGREG, ARG_NONE }, { "andt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
@ -159,7 +162,7 @@ static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{ "out", ARG_KLO, ARG_REG }, { "out", ARG_KLO, ARG_I8 },
|
||||
{ "unB8?", ARG_NONE, ARG_NONE }, { "unB9?", ARG_I8, ARG_NONE },
|
||||
{ "unBA?", ARG_NONE, ARG_NONE }, { "jmpcl?", ARG_A16, ARG_NONE },
|
||||
{ "unBC?", ARG_NONE, ARG_NONE }, { "unBD?", ARG_NONE, ARG_NONE },
|
||||
{ "unBC?", ARG_I8, ARG_NONE }, { "unBD?", ARG_NONE, ARG_NONE },
|
||||
{ "unBE?", ARG_NONE, ARG_NONE }, { "jmpncl?", ARG_A16, ARG_NONE },
|
||||
|
||||
/* 0xc0 */
|
||||
@ -180,21 +183,21 @@ static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{ "movb", ARG_F, ARG_REG }, { "movb", ARG_F, ARG_I8 },
|
||||
{ "unDA?", ARG_NONE, ARG_NONE }, { "unDb?", ARG_NONE, ARG_NONE },
|
||||
{ "movb", ARG_DS, ARG_REG }, { "movb", ARG_DS, ARG_I8 },
|
||||
{ "movw", ARG_LAR, ARG_REG }, { "movw?", ARG_LAR, ARG_I16 },
|
||||
{ "movw", ARG_LAR, ARG_REG }, { "movw?", ARG_LAR, ARG_I8 },
|
||||
|
||||
/* 0xe0 */
|
||||
{ "in0", ARG_REG, ARG_NONE }, { "unE1?", ARG_I8, ARG_NONE },
|
||||
{ "in0", ARG_REG, ARG_NONE }, { "movb", ARG_REG, ARG_OPT },
|
||||
{ "in", ARG_REG, ARG_KI }, { "movb", ARG_REG, ARG_DSZ },
|
||||
{ "movb", ARG_REG, ARG_F }, { "movb", ARG_REG, ARG_TIM },
|
||||
{ "unE6?", ARG_I8, ARG_NONE }, { "unE7?", ARG_I8, ARG_NONE },
|
||||
{ "movb", ARG_REG, ARG_F }, { "unE5?", ARG_I8, ARG_NONE },
|
||||
{ "movb", ARG_REG, ARG_PORT }, { "unE7?", ARG_I8, ARG_NONE },
|
||||
{ "movw", ARG_REG, ARG_LAR }, { "movw?", ARG_REG, ARG_LAR },
|
||||
{ "movw", ARG_REG, ARG_PC }, { "movw", ARG_REG, ARG_SP },
|
||||
{ "unEC?", ARG_NONE, ARG_NONE }, { "movb", ARG_REG, ARG_DS },
|
||||
{ "movb", ARG_REG, ARG_CS }, { "movb", ARG_REG, ARG_SS },
|
||||
|
||||
/* 0xf0 */
|
||||
{ "unF0?", ARG_I8, ARG_NONE }, { "unF1?", ARG_I8, ARG_NONE },
|
||||
{ "unF2?", ARG_I8, ARG_NONE }, { "unF3?", ARG_I8, ARG_NONE },
|
||||
{ "movb", ARG_OPT, ARG_REG }, { "unF1?", ARG_I8, ARG_NONE },
|
||||
{ "movb", ARG_PORT, ARG_REG }, { "unF3?", ARG_I8, ARG_NONE },
|
||||
{ "unF4?", ARG_I8, ARG_NONE }, { "unF5?", ARG_I8, ARG_NONE },
|
||||
{ "unF6?", ARG_I8, ARG_NONE }, { "unF7?", ARG_I8, ARG_NONE },
|
||||
{ "unF8?", ARG_NONE, ARG_NONE }, { "unF9?", ARG_NONE, ARG_NONE },
|
||||
@ -216,9 +219,9 @@ CPU_DISASSEMBLE(hcd62121)
|
||||
|
||||
inst = &hcd62121_ops[op];
|
||||
|
||||
/* Special case for nibble shift instruction */
|
||||
if (inst->arg2 == ARG_4)
|
||||
util::stream_format(stream, "sh%c%c ", (oprom[pos] & 0x80) ? 'l' : 'r', inst->str[3]);
|
||||
/* Special cases for shift and rotate instructions */
|
||||
if (inst->arg2 == ARG_RS || inst->arg2 == ARG_RS4)
|
||||
util::stream_format(stream, "%c%c%c%c ", inst->str[0], inst->str[1], (oprom[pos] & 0x80) ? 'r' : 'l', inst->str[3]);
|
||||
else
|
||||
util::stream_format(stream, "%-8s", inst->str);
|
||||
|
||||
@ -336,6 +339,12 @@ CPU_DISASSEMBLE(hcd62121)
|
||||
case ARG_DSZ:
|
||||
util::stream_format(stream, "dsize");
|
||||
break;
|
||||
case ARG_OPT:
|
||||
util::stream_format(stream, "OPT");
|
||||
break;
|
||||
case ARG_PORT:
|
||||
util::stream_format(stream, "PORT");
|
||||
break;
|
||||
case ARG_TIM:
|
||||
util::stream_format(stream, "TIM?");
|
||||
break;
|
||||
@ -376,6 +385,10 @@ CPU_DISASSEMBLE(hcd62121)
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos++]);
|
||||
break;
|
||||
case ARG_I16:
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos+1]);
|
||||
util::stream_format(stream, "%02x", oprom[pos]);
|
||||
pos += 2;
|
||||
break;
|
||||
case ARG_A16:
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
@ -416,13 +429,19 @@ CPU_DISASSEMBLE(hcd62121)
|
||||
case ARG_DSZ:
|
||||
util::stream_format(stream, ",dsize");
|
||||
break;
|
||||
case ARG_OPT:
|
||||
util::stream_format(stream, ",OPT");
|
||||
break;
|
||||
case ARG_PORT:
|
||||
util::stream_format(stream, ",PORT");
|
||||
break;
|
||||
case ARG_TIM:
|
||||
util::stream_format(stream, ",TIM?");
|
||||
break;
|
||||
case ARG_KI:
|
||||
util::stream_format(stream, ",KI");
|
||||
break;
|
||||
case ARG_4:
|
||||
case ARG_RS4:
|
||||
util::stream_format(stream, ",4");
|
||||
break;
|
||||
default:
|
||||
|
||||
@ -10,6 +10,12 @@ The unit is switched off by default, you have to switch it on by pressing 'Q'.
|
||||
Currently (year2011) it is on by default, the only key that works is '\'
|
||||
which turns it off. After that nothing happens.
|
||||
|
||||
Normal operation:
|
||||
- AC/ON - turns the unit on
|
||||
- SHIFT + OFF - turns the unit off
|
||||
|
||||
The unit automatically powers off after no operation for about 6 minutes (intro/quick start, page viii).
|
||||
|
||||
Debugging information:
|
||||
1. g 10b3 (Initialise system)
|
||||
2. cs=23
|
||||
@ -28,48 +34,91 @@ class cfx9850_state : public driver_device
|
||||
{
|
||||
public:
|
||||
cfx9850_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_video_ram(*this, "video_ram"),
|
||||
m_display_ram(*this, "display_ram"),
|
||||
m_ko_port(*this, "KO.%u", 0),
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_video_ram(*this, "video_ram")
|
||||
, m_display_ram(*this, "display_ram")
|
||||
, m_ko_port(*this, "KO%u", 1)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_ko(0)
|
||||
, m_port(0)
|
||||
, m_opt(0)
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(kol_w);
|
||||
DECLARE_WRITE8_MEMBER(koh_w);
|
||||
DECLARE_WRITE8_MEMBER(port_w);
|
||||
DECLARE_WRITE8_MEMBER(opt_w);
|
||||
DECLARE_READ8_MEMBER(ki_r);
|
||||
DECLARE_READ8_MEMBER(in0_r);
|
||||
required_shared_ptr<u8> m_video_ram;
|
||||
required_shared_ptr<u8> m_display_ram;
|
||||
u16 m_ko; // KO lines KO1 - KO14
|
||||
DECLARE_PALETTE_INIT(cfx9850);
|
||||
u32 screen_update_cfx9850(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
protected:
|
||||
required_ioport_array<12> m_ko_port;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
private:
|
||||
u16 m_ko; // KO lines KO1 - KO14
|
||||
u8 m_port; // PORT lines PORT0 - PORT7 (serial I/O)
|
||||
u8 m_opt; // OPT lines OPT0 - OPT7 (contrast)
|
||||
};
|
||||
|
||||
|
||||
static ADDRESS_MAP_START(cfx9850, AS_PROGRAM, 8, cfx9850_state)
|
||||
AM_RANGE( 0x000000, 0x007fff ) AM_ROM
|
||||
AM_RANGE( 0x080000, 0x0807ff ) AM_RAM AM_SHARE("video_ram")
|
||||
// AM_RANGE( 0x100000, 0x10ffff ) // some memory mapped i/o?
|
||||
// AM_RANGE( 0x110000, 0x11ffff ) // some memory mapped i/o?
|
||||
// AM_RANGE( 0x100000, 0x10ffff ) // some memory mapped i/o???
|
||||
// AM_RANGE( 0x110000, 0x11ffff ) // some memory mapped i/o???
|
||||
AM_RANGE( 0x200000, 0x27ffff ) AM_ROM AM_REGION( "bios", 0 )
|
||||
AM_RANGE( 0x400000, 0x40ffff ) AM_RAM
|
||||
AM_RANGE( 0x600000, 0x6007ff ) AM_MIRROR(0xf800) AM_RAM AM_SHARE("display_ram")
|
||||
// AM_RANGE( 0xe10000, 0xe1ffff ) // some memory mapped i/o?
|
||||
// AM_RANGE( 0xe10000, 0xe1ffff ) // some memory mapped i/o???
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
WRITE8_MEMBER(cfx9850_state::kol_w)
|
||||
{
|
||||
m_ko = (m_ko & 0xff00) | data;
|
||||
logerror("KO is now %04x\n", m_ko);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(cfx9850_state::koh_w)
|
||||
{
|
||||
m_ko = (m_ko & 0x00ff) | (data << 8);
|
||||
logerror("KO is now %04x\n", m_ko);
|
||||
}
|
||||
|
||||
|
||||
// 7------- PORT7 - RX enable?
|
||||
// -6------ PORT6 - NC / CP45
|
||||
// --5----- PORT5 - TX enable?
|
||||
// ---4---- PORT4 - data out (see code at 2225A0)
|
||||
// ----3--- PORT3 - NC / CP28
|
||||
// -----2-- PORT2 - NC / CP29
|
||||
// ------1- PORT1 - NC / CP30
|
||||
// -------0 PORT0 - display (enable?) related? + CP31
|
||||
WRITE8_MEMBER(cfx9850_state::port_w)
|
||||
{
|
||||
m_port = data;
|
||||
logerror("PORT is now %02x\n", m_port);
|
||||
}
|
||||
|
||||
|
||||
// 7------- OPT7 - NC / CP46
|
||||
// -6------ OPT6 - NC / CP25
|
||||
// --5----- OPT5 - NC / CP26
|
||||
// ---4---- OPT4 - NC / CP27
|
||||
// ----3--- OPT3 - contrast (TC74HC4066AFS pin 12)
|
||||
// -----2-- OPT2 - contrast (TC74HC4066AFS pin 6)
|
||||
// ------1- OPT1 - contrast (TC74HC4066AFS pin 5)
|
||||
// -------0 OPT0 - contrast (TC74HC4066AFS pin 13)
|
||||
WRITE8_MEMBER(cfx9850_state::opt_w)
|
||||
{
|
||||
m_opt = data;
|
||||
logerror("OPT is now %02x\n", m_opt);
|
||||
}
|
||||
|
||||
|
||||
@ -91,98 +140,104 @@ READ8_MEMBER(cfx9850_state::ki_r)
|
||||
|
||||
READ8_MEMBER(cfx9850_state::in0_r)
|
||||
{
|
||||
// battery level
|
||||
return 0x30;
|
||||
// battery level?
|
||||
// bit4 -> if reset CPU keeps restarting (several unknown instructions before jumping to 0)
|
||||
// perhaps a battery present check?
|
||||
// bit 5 -> 0 = low battery
|
||||
|
||||
// --XX ---- VDET
|
||||
// ---- -X-- data-in
|
||||
return 0x30 & ~ 0x00;
|
||||
}
|
||||
|
||||
|
||||
static INPUT_PORTS_START(cfx9850)
|
||||
PORT_START("KO.0")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("AC On/Off") PORT_CODE(KEYCODE_BACKSLASH)
|
||||
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_START("KO1")
|
||||
/* KI1 */ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("AC On/Off") PORT_CODE(KEYCODE_BACKSLASH)
|
||||
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.1")
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXE Enter") PORT_CODE(KEYCODE_ENTER)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("(-) Ares") PORT_CODE(KEYCODE_MINUS)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXP Pi") PORT_CODE(KEYCODE_EQUALS)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". SPACE") PORT_CODE(KEYCODE_SPACE)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 Z") PORT_CODE(KEYCODE_Z)
|
||||
PORT_START("KO2")
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXE Enter") PORT_CODE(KEYCODE_ENTER)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("(-) Ares") PORT_CODE(KEYCODE_MINUS)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXP Pi") PORT_CODE(KEYCODE_EQUALS)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". SPACE") PORT_CODE(KEYCODE_SPACE)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 Z") PORT_CODE(KEYCODE_Z)
|
||||
PORT_BIT(0x83, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.2")
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- ] Y") PORT_CODE(KEYCODE_Y)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ [ X") PORT_CODE(KEYCODE_X)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3 W") PORT_CODE(KEYCODE_W)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2 V") PORT_CODE(KEYCODE_V)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1 U") PORT_CODE(KEYCODE_U)
|
||||
PORT_START("KO3")
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- ] Y") PORT_CODE(KEYCODE_Y)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ [ X") PORT_CODE(KEYCODE_X)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3 W") PORT_CODE(KEYCODE_W)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2 V") PORT_CODE(KEYCODE_V)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1 U") PORT_CODE(KEYCODE_U)
|
||||
PORT_BIT(0x83, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.3")
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ } T") PORT_CODE(KEYCODE_T)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("* { S") PORT_CODE(KEYCODE_S)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 R") PORT_CODE(KEYCODE_R)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 Q") PORT_CODE(KEYCODE_Q)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 P") PORT_CODE(KEYCODE_P)
|
||||
PORT_START("KO4")
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ } T") PORT_CODE(KEYCODE_T)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("* { S") PORT_CODE(KEYCODE_S)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 R") PORT_CODE(KEYCODE_R)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 Q") PORT_CODE(KEYCODE_Q)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 P") PORT_CODE(KEYCODE_P)
|
||||
PORT_BIT(0x83, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.4")
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DEL DG") PORT_CODE(KEYCODE_BACKSPACE)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9 O") PORT_CODE(KEYCODE_O)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 N") PORT_CODE(KEYCODE_N)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 M") PORT_CODE(KEYCODE_M)
|
||||
PORT_START("KO5")
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DEL DG") PORT_CODE(KEYCODE_BACKSPACE)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9 O") PORT_CODE(KEYCODE_O)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 N") PORT_CODE(KEYCODE_N)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 M") PORT_CODE(KEYCODE_M)
|
||||
PORT_BIT(0x87, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.5")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TAB L") PORT_CODE(KEYCODE_L)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(", K") PORT_CODE(KEYCODE_K)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(") x^-1 J") PORT_CODE(KEYCODE_J)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("( .. I") PORT_CODE(KEYCODE_I)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F<=>0 H") PORT_CODE(KEYCODE_H)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("a b/c G") PORT_CODE(KEYCODE_G)
|
||||
PORT_START("KO6")
|
||||
/* KI2 */ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TAB L") PORT_CODE(KEYCODE_L)
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(", K") PORT_CODE(KEYCODE_K)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(") x^-1 J") PORT_CODE(KEYCODE_J)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("( .. I") PORT_CODE(KEYCODE_I)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F<=>0 H") PORT_CODE(KEYCODE_H)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("a b/c G") PORT_CODE(KEYCODE_G)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.6")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("tan tan^-1 F") PORT_CODE(KEYCODE_F)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("cos cas^-1 E") PORT_CODE(KEYCODE_E)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("sin sin^-1 D") PORT_CODE(KEYCODE_D)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ln e^x C") PORT_CODE(KEYCODE_C)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("log 10^x B") PORT_CODE(KEYCODE_B)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("x,d,t A") PORT_CODE(KEYCODE_A)
|
||||
PORT_START("KO7")
|
||||
/* KI2 */ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("tan tan^-1 F") PORT_CODE(KEYCODE_F)
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("cos cas^-1 E") PORT_CODE(KEYCODE_E)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("sin sin^-1 D") PORT_CODE(KEYCODE_D)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ln e^x C") PORT_CODE(KEYCODE_C)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("log 10^x B") PORT_CODE(KEYCODE_B)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("x,d,t A") PORT_CODE(KEYCODE_A)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.7")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXIT QUIT") PORT_CODE(KEYCODE_STOP)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/\\ .. ..") PORT_CODE(KEYCODE_COMMA)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("x^2 sqrt ..") PORT_CODE(KEYCODE_SLASH)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ALPHA ..-LOCK") PORT_CODE(KEYCODE_CAPSLOCK)
|
||||
PORT_START("KO8")
|
||||
/* KI2 */ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXIT QUIT") PORT_CODE(KEYCODE_STOP)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/\\ .. ..") PORT_CODE(KEYCODE_COMMA)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("x^2 sqrt ..") PORT_CODE(KEYCODE_SLASH)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ALPHA ..-LOCK") PORT_CODE(KEYCODE_CAPSLOCK)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.8")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Up") PORT_CODE(KEYCODE_UP)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("MENU SET UP") PORT_CODE(KEYCODE_OPENBRACE)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("VARS PRGM") PORT_CODE(KEYCODE_CLOSEBRACE)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("OPTN") PORT_CODE(KEYCODE_LCONTROL)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT)
|
||||
PORT_START("KO9")
|
||||
/* KI2 */ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Up") PORT_CODE(KEYCODE_UP)
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("MENU SET UP") PORT_CODE(KEYCODE_OPENBRACE)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("VARS PRGM") PORT_CODE(KEYCODE_CLOSEBRACE)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("OPTN") PORT_CODE(KEYCODE_LCONTROL)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.9")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6 G<=>T") PORT_CODE(KEYCODE_F6)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5 G-Solv") PORT_CODE(KEYCODE_F5)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4 Sketch") PORT_CODE(KEYCODE_F4)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3 V-Window") PORT_CODE(KEYCODE_F3)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2 Zoom") PORT_CODE(KEYCODE_F2)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1 Trace") PORT_CODE(KEYCODE_F1)
|
||||
PORT_START("KO10")
|
||||
/* KI2 */ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6 G<=>T") PORT_CODE(KEYCODE_F6)
|
||||
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5 G-Solv") PORT_CODE(KEYCODE_F5)
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4 Sketch") PORT_CODE(KEYCODE_F4)
|
||||
/* KI5 */ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3 V-Window") PORT_CODE(KEYCODE_F3)
|
||||
/* KI6 */ PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2 Zoom") PORT_CODE(KEYCODE_F2)
|
||||
/* KI7 */ PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1 Trace") PORT_CODE(KEYCODE_F1)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
// KO11 is not connected
|
||||
PORT_START("KO.10")
|
||||
PORT_START("KO11")
|
||||
PORT_BIT(0xff, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.11")
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TEST") PORT_CODE(KEYCODE_TILDE)
|
||||
PORT_START("KO12")
|
||||
/* KI4 */ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TEST") PORT_CODE(KEYCODE_TILDE)
|
||||
PORT_BIT(0xf7, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
INPUT_PORTS_END
|
||||
|
||||
@ -225,10 +280,12 @@ u32 cfx9850_state::screen_update_cfx9850(screen_device &screen, bitmap_ind16 &bi
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START(cfx9850, cfx9850_state)
|
||||
MCFG_CPU_ADD("maincpu", HCD62121, 4300000) /* 4.3 MHz */
|
||||
MCFG_CPU_ADD("maincpu", HCD62121, 4300000) /* X1 - 4.3 MHz */
|
||||
MCFG_CPU_PROGRAM_MAP(cfx9850)
|
||||
MCFG_HCD62121_KOL_CB(WRITE8(cfx9850_state, kol_w))
|
||||
MCFG_HCD62121_KOH_CB(WRITE8(cfx9850_state, koh_w))
|
||||
MCFG_HCD62121_PORT_CB(WRITE8(cfx9850_state, port_w))
|
||||
MCFG_HCD62121_OPT_CB(WRITE8(cfx9850_state, opt_w))
|
||||
MCFG_HCD62121_KI_CB(READ8(cfx9850_state, ki_r))
|
||||
MCFG_HCD62121_IN0_CB(READ8(cfx9850_state, in0_r))
|
||||
|
||||
@ -241,7 +298,7 @@ static MACHINE_CONFIG_START(cfx9850, cfx9850_state)
|
||||
|
||||
MCFG_DEFAULT_LAYOUT(layout_lcd)
|
||||
|
||||
// TODO: Verify amount of colors and palette
|
||||
// TODO: Verify amount of colors and palette. Colors can be changed by changing the contrast.
|
||||
MCFG_PALETTE_ADD("palette", 4)
|
||||
MCFG_PALETTE_INIT_OWNER(cfx9850_state, cfx9850)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -274,7 +274,7 @@ static const dasm_table_entry dasm_table[] =
|
||||
// { "h8_24", _16be, 0, CPU_DISASSEMBLE_NAME(h8_24) },
|
||||
// { "h8_32", _16be, 0, CPU_DISASSEMBLE_NAME(h8_32) },
|
||||
{ "hc11", _8bit, 0, CPU_DISASSEMBLE_NAME(mb88) },
|
||||
{ "hcd62121", _16be, 0, CPU_DISASSEMBLE_NAME(hcd62121) },
|
||||
{ "hcd62121", _8bit, 0, CPU_DISASSEMBLE_NAME(hcd62121) },
|
||||
{ "hd61700", _8bit, 0, CPU_DISASSEMBLE_NAME(hd61700) },
|
||||
{ "hd6301", _8bit, 0, CPU_DISASSEMBLE_NAME(hd6301) },
|
||||
{ "hd6309", _8bit, 0, CPU_DISASSEMBLE_NAME(hd6309) },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user