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Replaced FLAG fake IO port with a DEVCB2 callback [smf]

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This commit is contained in:
smf- 2014-01-11 01:00:43 +00:00
parent 5a89e028d5
commit 340b217886
20 changed files with 79 additions and 69 deletions
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7
src/emu/cpu/s2650/s2650.c
View File

@ -34,7 +34,8 @@ const device_type S2650 = &device_creator<s2650_device>;
s2650_device::s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, S2650, "S2650", tag, owner, clock, "s2650", __FILE__ )
, m_program_config("program", ENDIANNESS_LITTLE, 8, 15)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 9)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 9),
m_flag_handler(*this)
{
}
@ -151,7 +152,7 @@ inline void s2650_device::set_psu(UINT8 new_val)
m_psu = new_val;
if ((new_val ^ old) & FO)
m_io->write_byte(S2650_FO_PORT, (new_val & FO) ? 1 : 0);
m_flag_handler((new_val & FO) ? 1 : 0);
}
inline UINT8 s2650_device::get_sp()
@ -781,6 +782,8 @@ static void BRA_EA(void) _BRA_EA()
void s2650_device::device_start()
{
m_flag_handler.resolve_safe();
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
m_io = &space(AS_IO);

9
src/emu/cpu/s2650/s2650.h
View File

@ -18,13 +18,15 @@ enum
S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */
S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */
S2650_SENSE_PORT = 0x0102, /* Fake Sense Line */
S2650_FO_PORT = 0x0103 /* Fake FO Line */
};
extern const device_type S2650;
#define MCFG_S2650_FLAG_HANDLER(_devcb) \
devcb = &s2650_device::set_flag_handler(*device, DEVCB2_##_devcb);
class s2650_device : public cpu_device
{
public:
@ -33,6 +35,9 @@ public:
DECLARE_WRITE_LINE_MEMBER(write_sense);
// static configuration helpers
template<class _Object> static devcb2_base &set_flag_handler(device_t &device, _Object object) { return downcast<s2650_device &>(device).m_flag_handler.set_callback(object); }
protected:
// device-level overrides
virtual void device_start();
@ -66,6 +71,8 @@ private:
address_space_config m_program_config;
address_space_config m_io_config;
devcb2_write_line m_flag_handler;
UINT16 m_ppc; /* previous program counter (page + iar) */
UINT16 m_page; /* 8K page select register (A14..A13) */
UINT16 m_iar; /* instruction address register (A12..A0) */

27
src/mame/drivers/cvs.c
View File

@ -109,9 +109,14 @@ Todo & FIXME:
*
*************************************/
WRITE_LINE_MEMBER(cvs_state::write_s2650_flag)
{
m_s2650_flag = state;
}
READ8_MEMBER(cvs_state::cvs_video_or_color_ram_r)
{
if (*m_fo_state)
if (m_s2650_flag)
return m_video_ram[offset];
else
return m_color_ram[offset];
@ -119,7 +124,7 @@ READ8_MEMBER(cvs_state::cvs_video_or_color_ram_r)
WRITE8_MEMBER(cvs_state::cvs_video_or_color_ram_w)
{
if (*m_fo_state)
if (m_s2650_flag)
m_video_ram[offset] = data;
else
m_color_ram[offset] = data;
@ -128,7 +133,7 @@ WRITE8_MEMBER(cvs_state::cvs_video_or_color_ram_w)
READ8_MEMBER(cvs_state::cvs_bullet_ram_or_palette_r)
{
if (*m_fo_state)
if (m_s2650_flag)
return m_palette_ram[offset & 0x0f];
else
return m_bullet_ram[offset];
@ -136,7 +141,7 @@ READ8_MEMBER(cvs_state::cvs_bullet_ram_or_palette_r)
WRITE8_MEMBER(cvs_state::cvs_bullet_ram_or_palette_w)
{
if (*m_fo_state)
if (m_s2650_flag)
m_palette_ram[offset & 0x0f] = data;
else
m_bullet_ram[offset] = data;
@ -145,7 +150,7 @@ WRITE8_MEMBER(cvs_state::cvs_bullet_ram_or_palette_w)
READ8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_r)
{
if (*m_fo_state)
if (m_s2650_flag)
return m_character_ram[(0 * 0x800) | 0x400 | m_character_ram_page_start | offset];
else
return m_s2636_0->work_ram_r(space, offset);
@ -153,7 +158,7 @@ READ8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_r)
WRITE8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_w)
{
if (*m_fo_state)
if (m_s2650_flag)
{
offset |= (0 * 0x800) | 0x400 | m_character_ram_page_start;
m_character_ram[offset] = data;
@ -166,7 +171,7 @@ WRITE8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_w)
READ8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_r)
{
if (*m_fo_state)
if (m_s2650_flag)
return m_character_ram[(1 * 0x800) | 0x400 | m_character_ram_page_start | offset];
else
return m_s2636_1->work_ram_r(space, offset);
@ -174,7 +179,7 @@ READ8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_r)
WRITE8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_w)
{
if (*m_fo_state)
if (m_s2650_flag)
{
offset |= (1 * 0x800) | 0x400 | m_character_ram_page_start;
m_character_ram[offset] = data;
@ -187,7 +192,7 @@ WRITE8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_w)
READ8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_r)
{
if (*m_fo_state)
if (m_s2650_flag)
return m_character_ram[(2 * 0x800) | 0x400 | m_character_ram_page_start | offset];
else
return m_s2636_2->work_ram_r(space, offset);
@ -195,7 +200,7 @@ READ8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_r)
WRITE8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_w)
{
if (*m_fo_state)
if (m_s2650_flag)
{
offset |= (2 * 0x800) | 0x400 | m_character_ram_page_start;
m_character_ram[offset] = data;
@ -468,7 +473,6 @@ static ADDRESS_MAP_START( cvs_main_cpu_io_map, AS_IO, 8, cvs_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(cvs_collision_clear, cvs_video_fx_w)
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READ(cvs_collision_r) AM_WRITE(audio_command_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_SHARE("fo_state")
ADDRESS_MAP_END
@ -1006,6 +1010,7 @@ static MACHINE_CONFIG_START( cvs, cvs_state )
MCFG_CPU_PROGRAM_MAP(cvs_main_cpu_map)
MCFG_CPU_IO_MAP(cvs_main_cpu_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cvs_state, cvs_main_cpu_interrupt)
MCFG_S2650_FLAG_HANDLER(WRITELINE(cvs_state, write_s2650_flag))
MCFG_CPU_ADD("audiocpu", S2650, 894886.25)
MCFG_CPU_PROGRAM_MAP(cvs_dac_cpu_map)

6
src/mame/drivers/dkong.c
View File

@ -653,13 +653,13 @@ WRITE8_MEMBER(dkong_state::s2650_data_w)
m_hunchloopback = data;
}
WRITE8_MEMBER(dkong_state::s2650_fo_w)
WRITE_LINE_MEMBER(dkong_state::s2650_fo_w)
{
#if DEBUG_PROTECTION
logerror("write : pc = %04x, FO = %02x\n",space.device().safe_pc(), data);
#endif
m_main_fo = data;
m_main_fo = state;
if (m_main_fo)
m_hunchloopback = 0xfb;
@ -884,7 +884,6 @@ static ADDRESS_MAP_START( s2650_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0x00) AM_READ(s2650_port0_r)
AM_RANGE(0x01, 0x01) AM_READ(s2650_port1_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_WRITE(s2650_fo_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_WRITE(s2650_data_w)
ADDRESS_MAP_END
@ -1657,6 +1656,7 @@ static MACHINE_CONFIG_START( dkong_base, dkong_state )
MCFG_CPU_ADD("maincpu", Z80, CLOCK_1H)
MCFG_CPU_PROGRAM_MAP(dkong_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", dkong_state, vblank_irq)
MCFG_S2650_FLAG_HANDLER(WRITELINE(dkong_state, s2650_fo_w))
MCFG_MACHINE_START_OVERRIDE(dkong_state,dkong2b)
MCFG_MACHINE_RESET_OVERRIDE(dkong_state,dkong)

1
src/mame/drivers/galaxia.c
View File

@ -151,7 +151,6 @@ static ADDRESS_MAP_START( galaxia_io_map, AS_IO, 8, galaxia_state )
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(galaxia_collision_r, galaxia_ctrlport_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(galaxia_collision_clear, galaxia_dataport_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_SHARE("fo_state")
ADDRESS_MAP_END

2
src/mame/drivers/laserbat.c
View File

@ -178,7 +178,6 @@ static ADDRESS_MAP_START( laserbat_io_map, AS_IO, 8, laserbat_state )
AM_RANGE(0x06, 0x06) AM_WRITE(laserbat_input_mux_w)
AM_RANGE(0x07, 0x07) AM_WRITE(laserbat_csound2_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_SHARE("fo_state")
ADDRESS_MAP_END
@ -191,7 +190,6 @@ static ADDRESS_MAP_START( catnmous_io_map, AS_IO, 8, laserbat_state )
AM_RANGE(0x06, 0x06) AM_WRITE(laserbat_input_mux_w)
AM_RANGE(0x07, 0x07) AM_WRITENOP // unknown
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_SHARE("fo_state")
ADDRESS_MAP_END
// the same as in zaccaria.c ?

1
src/mame/drivers/quasar.c
View File

@ -126,7 +126,6 @@ static ADDRESS_MAP_START( quasar_io, AS_IO, 8, quasar_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(cvs_collision_clear) AM_WRITE(quasar_sh_command_w)
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READ(cvs_collision_r) AM_WRITENOP
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_SHARE("fo_state")
ADDRESS_MAP_END
/*************************************

5
src/mame/drivers/quizshow.c
View File

@ -41,14 +41,12 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_dac(*this, "dac"),
m_main_ram(*this, "main_ram"),
m_fo_state(*this, "fo_state")
m_main_ram(*this, "main_ram")
{ }
required_device<cpu_device> m_maincpu;
required_device<dac_device> m_dac;
required_shared_ptr<UINT8> m_main_ram;
required_shared_ptr<UINT8> m_fo_state;
tilemap_t *m_tilemap;
UINT32 m_clocks;
@ -240,7 +238,6 @@ static ADDRESS_MAP_START( quizshow_io_map, AS_IO, 8, quizshow_state )
// AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_NOP // unused
// AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_NOP // unused
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(quizshow_tape_signal_r)
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_SHARE("fo_state")
ADDRESS_MAP_END

9
src/mame/drivers/zac_1.c
View File

@ -44,7 +44,7 @@ public:
DECLARE_READ8_MEMBER(ctrl_r);
DECLARE_WRITE8_MEMBER(ctrl_w);
DECLARE_READ8_MEMBER(serial_r);
DECLARE_WRITE8_MEMBER(serial_w);
DECLARE_WRITE_LINE_MEMBER(serial_w);
DECLARE_READ8_MEMBER(reset_int_r);
DECLARE_WRITE8_MEMBER(reset_int_w);
TIMER_DEVICE_CALLBACK_MEMBER(zac_1_inttimer);
@ -75,7 +75,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( zac_1_io, AS_IO, 8, zac_1_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(ctrl_r,ctrl_w)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(serial_r,serial_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(serial_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( zac_1 )
@ -180,7 +180,7 @@ READ8_MEMBER( zac_1_state::serial_r )
return 0;
}
WRITE8_MEMBER( zac_1_state::serial_w )
WRITE_LINE_MEMBER( zac_1_state::serial_w )
{
// to printer
}
@ -246,6 +246,7 @@ static MACHINE_CONFIG_START( zac_1, zac_1_state )
MCFG_CPU_PROGRAM_MAP(zac_1_map)
MCFG_CPU_IO_MAP(zac_1_io)
MCFG_NVRAM_ADD_0FILL("ram")
MCFG_S2650_FLAG_HANDLER(WRITELINE(zac_1_state, serial_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("zac_1_inttimer", zac_1_state, zac_1_inttimer, attotime::from_hz(200))
MCFG_TIMER_DRIVER_ADD_PERIODIC("zac_1_outtimer", zac_1_state, zac_1_outtimer, attotime::from_hz(187500))
@ -270,7 +271,7 @@ static ADDRESS_MAP_START( locomotp_io, AS_IO, 8, zac_1_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(ctrl_r,ctrl_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(reset_int_r)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(serial_r,serial_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(serial_r)
ADDRESS_MAP_END
READ8_MEMBER( zac_1_state::reset_int_r )

7
src/mame/drivers/zac_2.c
View File

@ -21,7 +21,7 @@ public:
DECLARE_READ8_MEMBER(data_r);
DECLARE_WRITE8_MEMBER(data_w);
DECLARE_READ8_MEMBER(serial_r);
DECLARE_WRITE8_MEMBER(serial_w);
DECLARE_WRITE_LINE_MEMBER(serial_w);
UINT8 m_t_c;
UINT8 m_out_offs;
required_device<cpu_device> m_maincpu;
@ -53,7 +53,7 @@ static ADDRESS_MAP_START(zac_2_io, AS_IO, 8, zac_2_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(ctrl_r,ctrl_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(data_r,data_w)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(serial_r,serial_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(serial_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( zac_2 )
@ -164,7 +164,7 @@ READ8_MEMBER( zac_2_state::serial_r )
return 0;
}
WRITE8_MEMBER( zac_2_state::serial_w )
WRITE_LINE_MEMBER( zac_2_state::serial_w )
{
// to printer
}
@ -203,6 +203,7 @@ static MACHINE_CONFIG_START( zac_2, zac_2_state )
MCFG_CPU_PROGRAM_MAP(zac_2_map)
MCFG_CPU_IO_MAP(zac_2_io)
MCFG_NVRAM_ADD_0FILL("ram")
MCFG_S2650_FLAG_HANDLER(WRITELINE(zac_2_state, serial_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("zac_2_inttimer", zac_2_state, zac_2_inttimer, attotime::from_hz(200))
MCFG_TIMER_DRIVER_ADD_PERIODIC("zac_2_outtimer", zac_2_state, zac_2_outtimer, attotime::from_hz(187500))

4
src/mame/includes/cvs.h
View File

@ -24,7 +24,6 @@ public:
: driver_device(mconfig, type, tag),
m_video_ram(*this, "video_ram"),
m_bullet_ram(*this, "bullet_ram"),
m_fo_state(*this, "fo_state"),
m_cvs_4_bit_dac_data(*this, "4bit_dac"),
m_tms5110_ctl_data(*this, "tms5110_ctl"),
m_dac3_state(*this, "dac3_state"),
@ -42,7 +41,6 @@ public:
/* memory pointers */
required_shared_ptr<UINT8> m_video_ram;
required_shared_ptr<UINT8> m_bullet_ram;
required_shared_ptr<UINT8> m_fo_state;
optional_shared_ptr<UINT8> m_cvs_4_bit_dac_data;
optional_shared_ptr<UINT8> m_tms5110_ctl_data;
optional_shared_ptr<UINT8> m_dac3_state;
@ -59,6 +57,7 @@ public:
int m_stars_scroll;
/* misc */
int m_s2650_flag;
emu_timer *m_cvs_393hz_timer;
UINT8 m_cvs_393hz_clock;
@ -83,6 +82,7 @@ public:
UINT8 m_character_ram[3 * 0x800]; /* only half is used, but
by allocating twice the amount,
we can use the same gfx_layout */
DECLARE_WRITE_LINE_MEMBER(write_s2650_flag);
DECLARE_READ8_MEMBER(cvs_input_r);
DECLARE_READ8_MEMBER(cvs_393hz_clock_r);
DECLARE_WRITE8_MEMBER(cvs_speech_rom_address_lo_w);

2
src/mame/includes/dkong.h
View File

@ -193,7 +193,7 @@ public:
DECLARE_WRITE8_MEMBER(s2650_mirror_w);
DECLARE_READ8_MEMBER(epos_decrypt_rom);
DECLARE_WRITE8_MEMBER(s2650_data_w);
DECLARE_WRITE8_MEMBER(s2650_fo_w);
DECLARE_WRITE_LINE_MEMBER(s2650_fo_w);
DECLARE_READ8_MEMBER(s2650_port0_r);
DECLARE_READ8_MEMBER(s2650_port1_r);
DECLARE_WRITE8_MEMBER(dkong3_2a03_reset_w);

2
src/mame/includes/laserbat.h
View File

@ -16,7 +16,6 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_fo_state(*this, "fo_state"),
m_ay1(*this, "ay1"),
m_ay2(*this, "ay2"),
m_s2636_1(*this, "s2636_1"),
@ -28,7 +27,6 @@ public:
required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_audiocpu;
required_shared_ptr<UINT8> m_fo_state;
optional_device<ay8910_device> m_ay1;
optional_device<ay8910_device> m_ay2;
required_device<s2636_device> m_s2636_1;

9
src/mess/drivers/binbug.c
View File

@ -71,7 +71,7 @@ public:
DECLARE_WRITE8_MEMBER(binbug_ctrl_w);
DECLARE_READ8_MEMBER(binbug_serial_r);
DECLARE_WRITE8_MEMBER(binbug_serial_w);
DECLARE_WRITE_LINE_MEMBER(binbug_serial_w);
const UINT8 *m_p_chargen;
UINT8 m_framecnt;
virtual void video_start();
@ -93,9 +93,9 @@ READ8_MEMBER( binbug_state::binbug_serial_r )
return m_keyboard->tx_r() & (m_cass->input() < 0.03);
}
WRITE8_MEMBER( binbug_state::binbug_serial_w )
WRITE_LINE_MEMBER( binbug_state::binbug_serial_w )
{
m_cass->output(BIT(data, 0) ? -1.0 : +1.0);
m_cass->output(state ? -1.0 : +1.0);
}
static ADDRESS_MAP_START(binbug_mem, AS_PROGRAM, 8, binbug_state)
@ -109,7 +109,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(binbug_io, AS_IO, 8, binbug_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_WRITE(binbug_ctrl_w)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(binbug_serial_r,binbug_serial_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(binbug_serial_r)
ADDRESS_MAP_END
/* Input ports */
@ -299,6 +299,7 @@ static MACHINE_CONFIG_START( binbug, binbug_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(binbug_mem)
MCFG_CPU_IO_MAP(binbug_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(binbug_state, binbug_serial_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

9
src/mess/drivers/cd2650.c
View File

@ -52,7 +52,7 @@ public:
DECLARE_WRITE8_MEMBER(beep_w);
DECLARE_WRITE8_MEMBER(kbd_put);
DECLARE_READ8_MEMBER(cass_r);
DECLARE_WRITE8_MEMBER(cass_w);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_QUICKLOAD_LOAD_MEMBER(cd2650);
const UINT8 *m_p_chargen;
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -73,9 +73,9 @@ WRITE8_MEMBER( cd2650_state::beep_w )
m_beep->set_state(BIT(data, 3));
}
WRITE8_MEMBER( cd2650_state::cass_w )
WRITE_LINE_MEMBER( cd2650_state::cass_w )
{
m_cass->output(BIT(data, 0) ? -1.0 : +1.0);
m_cass->output(state ? -1.0 : +1.0);
}
READ8_MEMBER( cd2650_state::cass_r )
@ -100,7 +100,7 @@ static ADDRESS_MAP_START( cd2650_io, AS_IO, 8, cd2650_state)
ADDRESS_MAP_UNMAP_HIGH
//AM_RANGE(0x80, 0x84) disk i/o
AM_RANGE(S2650_DATA_PORT,S2650_DATA_PORT) AM_READWRITE(keyin_r, beep_w)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(cass_r, cass_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
/* Input ports */
@ -279,6 +279,7 @@ static MACHINE_CONFIG_START( cd2650, cd2650_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(cd2650_mem)
MCFG_CPU_IO_MAP(cd2650_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(cd2650_state, cass_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

9
src/mess/drivers/dolphunk.c
View File

@ -99,7 +99,7 @@ public:
{ }
DECLARE_READ8_MEMBER(cass_r);
DECLARE_WRITE8_MEMBER(cass_w);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_READ8_MEMBER(port07_r);
DECLARE_WRITE8_MEMBER(port00_w);
DECLARE_WRITE8_MEMBER(port06_w);
@ -119,9 +119,9 @@ READ8_MEMBER( dolphunk_state::cass_r )
return (m_cass->input() > 0.03) ? 1 : 0;
}
WRITE8_MEMBER( dolphunk_state::cass_w )
WRITE_LINE_MEMBER( dolphunk_state::cass_w )
{
m_cass_state = BIT(data, 0); // get flag bit
m_cass_state = state; // get flag bit
}
WRITE8_MEMBER( dolphunk_state::port00_w )
@ -183,7 +183,7 @@ static ADDRESS_MAP_START( dolphunk_io, AS_IO, 8, dolphunk_state )
AM_RANGE(0x00, 0x03) AM_WRITE(port00_w) // 4-led display
AM_RANGE(0x06, 0x06) AM_WRITE(port06_w) // speaker (NOT a keyclick)
AM_RANGE(0x07, 0x07) AM_READ(port07_r) // pushbuttons
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(cass_r,cass_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
AM_RANGE(0x102, 0x103) AM_NOP // stops error log filling up while using debug
ADDRESS_MAP_END
@ -220,6 +220,7 @@ static MACHINE_CONFIG_START( dolphunk, dolphunk_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(dolphunk_mem)
MCFG_CPU_IO_MAP(dolphunk_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(dolphunk_state, cass_w))
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_dolphunk)

9
src/mess/drivers/instruct.c
View File

@ -66,7 +66,7 @@ public:
DECLARE_READ8_MEMBER(portfd_r);
DECLARE_READ8_MEMBER(portfe_r);
DECLARE_READ8_MEMBER(sense_r);
DECLARE_WRITE8_MEMBER(flag_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
DECLARE_WRITE8_MEMBER(port_w);
DECLARE_WRITE8_MEMBER(portf8_w);
DECLARE_WRITE8_MEMBER(portf9_w);
@ -88,9 +88,9 @@ private:
};
// flag led
WRITE8_MEMBER( instruct_state::flag_w )
WRITE_LINE_MEMBER( instruct_state::flag_w )
{
output_set_value("led8", !BIT(data, 0));
output_set_value("led8", state);
}
// user port
@ -229,7 +229,7 @@ static ADDRESS_MAP_START( instruct_io, AS_IO, 8, instruct_state )
AM_RANGE(0xfd, 0xfd) AM_READ(portfd_r)
AM_RANGE(0xfe, 0xfe) AM_READ(portfe_r)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(port_r,port_w)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(sense_r,flag_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(sense_r)
ADDRESS_MAP_END
/* Input ports */
@ -417,6 +417,7 @@ static MACHINE_CONFIG_START( instruct, instruct_state )
MCFG_CPU_PROGRAM_MAP(instruct_mem)
MCFG_CPU_IO_MAP(instruct_io)
MCFG_CPU_PERIODIC_INT_DRIVER(instruct_state, t2l_int, 120)
MCFG_S2650_FLAG_HANDLER(WRITELINE(instruct_state, flag_w))
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_instruct)

9
src/mess/drivers/phunsy.c
View File

@ -43,7 +43,7 @@ public:
DECLARE_WRITE8_MEMBER( phunsy_data_w );
DECLARE_WRITE8_MEMBER( kbd_put );
DECLARE_READ8_MEMBER(cass_r);
DECLARE_WRITE8_MEMBER(cass_w);
DECLARE_WRITE_LINE_MEMBER(cass_w);
const UINT8 *m_p_chargen;
UINT8 m_data_out;
UINT8 m_keyboard_input;
@ -67,9 +67,9 @@ WRITE8_MEMBER( phunsy_state::phunsy_1800_w )
m_ram_1800[offset] = data;
}
WRITE8_MEMBER( phunsy_state::cass_w )
WRITE_LINE_MEMBER( phunsy_state::cass_w )
{
m_cass->output(BIT(data, 0) ? -1.0 : +1.0);
m_cass->output(state ? -1.0 : +1.0);
}
READ8_MEMBER( phunsy_state::cass_r )
@ -174,7 +174,7 @@ static ADDRESS_MAP_START( phunsy_io, AS_IO, 8, phunsy_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( S2650_CTRL_PORT, S2650_CTRL_PORT ) AM_WRITE( phunsy_ctrl_w )
AM_RANGE( S2650_DATA_PORT,S2650_DATA_PORT) AM_READWRITE( phunsy_data_r, phunsy_data_w )
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(cass_r, cass_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
@ -294,6 +294,7 @@ static MACHINE_CONFIG_START( phunsy, phunsy_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(phunsy_mem)
MCFG_CPU_IO_MAP(phunsy_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(phunsy_state, cass_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

8
src/mess/drivers/pipbug.c
View File

@ -54,7 +54,6 @@ public:
}
DECLARE_WRITE8_MEMBER(pipbug_ctrl_w);
DECLARE_WRITE8_MEMBER(pipbug_serial_w);
required_device<rs232_port_device> m_rs232;
required_device<cpu_device> m_maincpu;
DECLARE_QUICKLOAD_LOAD_MEMBER( pipbug );
@ -65,11 +64,6 @@ WRITE8_MEMBER( pipbug_state::pipbug_ctrl_w )
// 0x80 is written here - not connected in the baby 2650
}
WRITE8_MEMBER( pipbug_state::pipbug_serial_w )
{
m_rs232->tx(data);
}
static ADDRESS_MAP_START(pipbug_mem, AS_PROGRAM, 8, pipbug_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( 0x0000, 0x03ff) AM_ROM
@ -79,7 +73,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(pipbug_io, AS_IO, 8, pipbug_state)
// ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_WRITE(pipbug_ctrl_w)
AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_WRITE(pipbug_serial_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READNOP // this has to return zero or the parameter to write_sense is ignored
ADDRESS_MAP_END
@ -173,6 +166,7 @@ static MACHINE_CONFIG_START( pipbug, pipbug_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(pipbug_mem)
MCFG_CPU_IO_MAP(pipbug_io)
MCFG_S2650_FLAG_HANDLER(DEVWRITELINE("rs232", rs232_port_device, tx))
/* video hardware */
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "serial_terminal")

13
src/mess/drivers/ravens.c
View File

@ -96,7 +96,7 @@ public:
DECLARE_WRITE8_MEMBER(kbd_put);
DECLARE_MACHINE_RESET(ravens2);
DECLARE_READ8_MEMBER(cass_r);
DECLARE_WRITE8_MEMBER(cass_w);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_QUICKLOAD_LOAD_MEMBER( ravens );
UINT8 m_term_char;
UINT8 m_term_data;
@ -105,9 +105,9 @@ public:
required_device<cassette_image_device> m_cass;
};
WRITE8_MEMBER( ravens_state::cass_w )
WRITE_LINE_MEMBER( ravens_state::cass_w )
{
m_cass->output(BIT(data, 0) ? -1.0 : +1.0);
m_cass->output(state ? -1.0 : +1.0);
}
READ8_MEMBER( ravens_state::cass_r )
@ -207,7 +207,7 @@ static ADDRESS_MAP_START( ravens_io, AS_IO, 8, ravens_state )
AM_RANGE(0x09, 0x09) AM_WRITE(leds_w) // LED output port
AM_RANGE(0x10, 0x15) AM_WRITE(display_w) // 6-led display
AM_RANGE(0x17, 0x17) AM_READ(port17_r) // pushbuttons
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(cass_r,cass_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ravens2_io, AS_IO, 8, ravens_state )
@ -215,7 +215,7 @@ static ADDRESS_MAP_START( ravens2_io, AS_IO, 8, ravens_state )
AM_RANGE(0x07, 0x07) AM_READ(port07_r)
AM_RANGE(0x1b, 0x1b) AM_WRITE(port1b_w)
AM_RANGE(0x1c, 0x1c) AM_WRITE(port1c_w)
AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(cass_r,cass_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
/* Input ports */
@ -341,6 +341,7 @@ static MACHINE_CONFIG_START( ravens, ravens_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz) // frequency is unknown
MCFG_CPU_PROGRAM_MAP(ravens_mem)
MCFG_CPU_IO_MAP(ravens_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(ravens_state, cass_w))
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_ravens)
@ -360,6 +361,8 @@ static MACHINE_CONFIG_START( ravens2, ravens_state )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz) // frequency is unknown
MCFG_CPU_PROGRAM_MAP(ravens_mem)
MCFG_CPU_IO_MAP(ravens2_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(ravens_state, cass_w))
MCFG_MACHINE_RESET_OVERRIDE(ravens_state, ravens2)
/* video hardware */