mirror of
https://github.com/holub/mame
synced 2025-04-19 23:12:11 +03:00
New clones marked as NOT_WORKING
-------------------------------- TX-0 upgraded system (8 kWords of RAM, old order code) * tx0_64kw: Swap LR and MBR when MLR and LMB are specified together * tx0_8kw: Recognize a few more composite OPRs in disassembly
This commit is contained in:
AJR
parent
51a053d396
commit
34225baaab
@ -13,9 +13,10 @@ license:CC0
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<description>Munching Squares</description>
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<year>196?</year>
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<publisher>MIT</publisher>
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<info name="usage" value="Press read in switch, then restart after loader halts at 17777. Use TAC switches to vary display."/>
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<info name="usage" value="Press read in switch, then restart after loader halts at 17777. Use TAC switches to vary display pattern."/>
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<sharedfeat name="compatibility" value="NEWCODE"/>
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<part name="ptp" interface="tx0_ptp">
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<feature name="blocks_used" value="20-52, 17756-17777"/>
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<dataarea name="ptap" size="327">
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<rom name="bin_munchingSquares.bin" size="327" crc="54afd9a3" sha1="a7fc6d62ea1cef21f1563cb8b86a5e63198af0ae"/>
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</dataarea>
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@ -16,7 +16,7 @@
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#include "debugger.h"
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#define LOG_RIM (1 << 1U)
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//#define VERBOSE (LOG_RIM)
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#define VERBOSE (LOG_RIM)
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#include "logmacro.h"
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@ -42,8 +42,9 @@
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#define INCREMENT_PC_8KW (PC = (PC+1) & ADDRESS_MASK_8KW)
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DEFINE_DEVICE_TYPE(TX0_8KW, tx0_8kw_device, "tx0_8kw_cpu", "MIT Lincoln Laboratory TX-0 8KW")
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DEFINE_DEVICE_TYPE(TX0_64KW, tx0_64kw_device, "tx0_64kw_cpu", "MIT Lincoln Laboratory TX-0 64KW")
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DEFINE_DEVICE_TYPE(TX0_8KW, tx0_8kw_device, "tx0_8kw_cpu", "MIT Lincoln Laboratory TX-0 8KW (new)")
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DEFINE_DEVICE_TYPE(TX0_8KW_OLD, tx0_8kwo_device, "tx0_8kwo_cpu", "MIT Lincoln Laboratory TX-0 8KW (old)")
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DEFINE_DEVICE_TYPE(TX0_64KW, tx0_64kw_device, "tx0_64kw_cpu", "MIT Lincoln Laboratory TX-0 64KW")
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tx0_device::tx0_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addr_bits, int address_mask, int ir_mask)
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@ -66,8 +67,18 @@ tx0_device::tx0_device(const machine_config &mconfig, device_type type, const ch
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m_program_config.m_is_octal = true;
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}
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tx0_8kw_device::tx0_8kw_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: tx0_device(mconfig, type, tag, owner, clock, 13, ADDRESS_MASK_8KW, 037)
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{
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}
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tx0_8kw_device::tx0_8kw_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: tx0_device(mconfig, TX0_8KW, tag, owner, clock, 13, ADDRESS_MASK_8KW, 037)
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: tx0_8kw_device(mconfig, TX0_8KW, tag, owner, clock)
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{
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}
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tx0_8kwo_device::tx0_8kwo_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: tx0_8kw_device(mconfig, TX0_8KW_OLD, tag, owner, clock)
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{
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}
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@ -583,11 +594,13 @@ void tx0_64kw_device::execute_instruction_64kw()
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/* (1.2) TBR = Store the contents of the TBR in the MBR. */
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MBR |= m_tbr;
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if ((MAR & 0000003) == 2)
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if ((MAR & 0000003) == 2 && ((MAR & 0000600) >> 7) == 1)
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/* LMB and MBL used simultaneously interchange LR and MBR */
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std::swap(LR, MBR);
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else if ((MAR & 0000003) == 2)
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/* (1.3) LMB = Store the contents of the LR in the MBR. */
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MBR = LR;
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if (((MAR & 0000600) >> 7) == 1)
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else if (((MAR & 0000600) >> 7) == 1)
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/* (1.3) MLR = Store the contents of the MBR (memory buffer
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register) in the live reg. */
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LR = MBR;
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@ -638,6 +651,227 @@ void tx0_64kw_device::execute_instruction_64kw()
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}
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}
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/* execute one instruction */
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void tx0_8kwo_device::execute_instruction_8kw()
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{
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if (! m_cycle)
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{
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m_cycle = 1; /* most frequent case */
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switch (IR)
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{
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case 0: /* STOre */
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case 4: /* Store LR */
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case 8: /* ADD */
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case 12: /* Load LR */
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break;
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case 16: /* TRansfer on Negative */
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if (AC & 0400000)
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{
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PC = MAR & 0017777;
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m_cycle = 0; /* instruction only takes one cycle if branch
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is taken */
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}
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break;
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case 20: /* TRAnsfer */
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PC = MAR & 0017777;
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m_cycle = 0; /* instruction only takes one cycle if branch
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is taken */
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break;
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case 24: /* OPeRate */
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case 25:
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case 26:
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case 27:
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case 28:
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case 29:
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case 30:
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case 31:
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if (IR & 004)
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/* (0.8) CLL = Clear the left nine digital positions of the AC */
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AC &= 0000777;
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if (IR & 002)
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/* (0.8) CLR = Clear the right nine digital positions of the AC */
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AC &= 0777000;
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if (((IR & 001) == 01) && ((MAR & 010000) == 000000))
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{
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/* (0.8) IOS In-Out Stop = Stop machine so that an In-Out command
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(specified by digits 6 7 8 of MAR) may be executed */
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/* ((MAR & 0007000) >> 9) is device ID */
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/* 7: */
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/* (0.8) P7H = Punch holes 1-6 in flexo tape specified by AC
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digital positions 2, 5, 8, 11, 14, and 17. Also punches a 7th
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hole on tape. */
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/* 6: */
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/* (0.8) P6H = Same as P7H but no seventh hole */
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/* 4: */
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/* (0.8) PNT = Print one flexowriter character specified by AC
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digits 2, 5, 8, 11, 14, and 17. */
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/* 1: */
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/* (0.8) R1C = Read one line of flexo tape so that tape positions
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1, 2, 3, 4, 5, and 6 will be put in the AC digital positions 0,
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3, 6, 9, 12 and 15. */
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/* 3: */
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/* (0.8) R3C = Read one line of flexo tape into AC digits 0, 3, 6,
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9, 12 and 15. Then cycle the AC one digital position; read the
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next line on tape into AC digits 0, 3, 6, 9, 12 and 15, cycle
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the AC right one digital position and read the third and last
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line into AC digits 0, 3, 6, 9, 12 and 15. (This command is
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equal to a triple CYR-R1C.) */
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/* 2: */
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/* (0.8) DIS = Intensify a point on the scope with x and y
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coordinates where x is specified by AC digits 0-8 with digit 0
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being used as the sign and y is specified by AC digits 9-17
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with digit 9 being used as the sign for y. The complement
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system is in effect when the signs are negative. */
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/* (5 is undefined) */
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int index = (MAR & 0007000) >> 9;
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m_ios = 0;
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call_io_handler(index);
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m_ioh = 1;
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}
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if (((IR & 001) == 00) && ((MAR & 010000) == 010000))
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{ /* (IOS) EX0 through EX7 = operate user's EXternal equipment. */
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switch ((MAR & 0007000) >> 9)
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{
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/* ... */
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}
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}
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break;
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}
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}
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else
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{
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m_cycle = 0; /* always true */
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switch (IR)
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{
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case 0: /* STOre */
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tx0_write(MAR, (MBR = AC));
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break;
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case 4: /* Store LR */
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tx0_write(MAR, (MBR = LR));
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break;
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case 8: /* ADD */
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MBR = tx0_read(MAR);
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AC = AC + MBR;
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AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
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break;
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case 12: /* Load LR */
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LR = MBR = tx0_read(MAR);
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break;
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case 16: /* TRansfer on Negative */
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case 20: /* TRAnsfer */
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break;
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case 24: /* OPeRate */
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case 25:
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case 26:
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case 27:
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case 28:
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case 29:
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case 30:
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case 31:
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MBR = 0;
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if ((MAR & 0000104) == 0000100)
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/* (1.1) PEN = Read the light pen flip-flops 1 and 2 into AC(0) and
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AC(1). */
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/*...*/{ }
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if ((MAR & 0000104) == 0000004)
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/* (1.1) TAC = Insert a one in each digital position of the AC
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wherever there is a one in the corresponding digital position
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of the TAC. */
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AC |= m_tac;
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if ((MAR & 0000003) == 1)
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/* (1.2) AMB = Store the contents of the AC in the MBR. */
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MBR = AC;
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if (MAR & 0000040)
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/* (1.2) COM = Complement every digit in the accumulator */
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AC ^= 0777777;
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if ((MAR & 0000003) == 3)
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/* (1.2) TBR = Store the contents of the TBR in the MBR. */
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MBR |= m_tbr;
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uint32_t tmp = MBR;
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if ((MAR & 0000003) == 2)
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/* (1.3) LMB = Store the contents of the LR in the MBR. */
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MBR = LR;
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if (((MAR & 0000600) >> 7) == 1)
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/* (1.3) MLR = Store the contents of the MBR (memory buffer
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register) in the live reg. */
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LR = tmp;
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if ((MAR & 0000704) == 0000104)
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/* (1.3) ORL = Inclusive or MBR into LR. */
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LR |= tmp;
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if ((MAR & 0000704) == 0000304)
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/* (1.3) ANL = And MBR into LR. */
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LR &= tmp;
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if (((MAR & 0000600) >> 7) == 2)
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/* (1.4) SHR = Shift the AC right one place, i.e. multiply the AC
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by 2^-1 */
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AC >>= 1;
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if (((MAR & 0000600) >> 7) == 3)
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/* (1.4) CYR = Cycle the AC right one digital position (AC(17) will
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become AC(0)) */
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AC = (AC >> 1) | ((AC & 1) << 17);
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if (MAR & 0000020)
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/* (1.4) PAD = Partial add AC to MBR, that is, for every digital
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position of the MBR that contains a one, complement the digit
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in the corresponding digital position of the AC. This is also
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called a half add. */
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AC ^= MBR;
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if (MAR & 0000010)
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{ /* (1.7) CRY = Partial add the 18 digits of the AC to the
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corresponding 18 digits of the carry.
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To determine what the 18 digits of the carry are, use the
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following rule:
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"Grouping the AC and MBR digits into pairs and proceeding from
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right to left, assign the carry digit of the next pair to a one
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if in the present pair MBR = 1 and AC = 0 or if in the present
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pair AC = 1 and carry 1.
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(Note: the 0th digit pair determines the 17th pair's carry
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digit)" */
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AC ^= MBR;
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AC = AC + MBR;
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AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
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}
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if (((IR & 001) == 01) && ((MAR & 017000) == 010000))
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/* (1.8) Hlt = Halt the computer */
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m_run = 0;
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break;
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}
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}
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}
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void tx0_device::indexed_address_eval()
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{
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MAR = MAR + XR;
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@ -969,11 +1203,8 @@ void tx0_8kw_device::execute_instruction_8kw()
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}
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if (((! (MAR & 0000400)) && (MAR & 0000200)) && ((! (MAR & 0000004)) && (MAR & 0000002)))
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{ /* LMB and MBL used simultaneously interchange LR and MBR */
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int tmp = MBR;
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MBR = LR;
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LR = tmp;
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}
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/* LMB and MBL used simultaneously interchange LR and MBR */
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std::swap(LR, MBR);
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else if ((! (MAR & 0000400)) && (MAR & 0000200))
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/* (1.4) MBL = Transfer MBR contents to LR */
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LR = MBR;
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@ -1073,6 +1304,11 @@ std::unique_ptr<util::disasm_interface> tx0_8kw_device::create_disassembler()
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return std::make_unique<tx0_8kw_disassembler>();
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}
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std::unique_ptr<util::disasm_interface> tx0_8kwo_device::create_disassembler()
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{
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return std::make_unique<tx0_8kwo_disassembler>();
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}
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std::unique_ptr<util::disasm_interface> tx0_64kw_device::create_disassembler()
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{
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return std::make_unique<tx0_64kw_disassembler>();
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@ -133,11 +133,27 @@ public:
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tx0_8kw_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
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protected:
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tx0_8kw_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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virtual void execute_run() override;
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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private:
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void execute_instruction_8kw();
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virtual void execute_instruction_8kw();
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};
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class tx0_8kwo_device : public tx0_8kw_device
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{
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public:
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// construction/destruction
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tx0_8kwo_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
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protected:
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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private:
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virtual void execute_instruction_8kw() override;
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};
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@ -156,7 +172,8 @@ private:
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};
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DECLARE_DEVICE_TYPE(TX0_64KW, tx0_64kw_device)
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DECLARE_DEVICE_TYPE(TX0_8KW, tx0_8kw_device)
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DECLARE_DEVICE_TYPE(TX0_64KW, tx0_64kw_device)
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DECLARE_DEVICE_TYPE(TX0_8KW_OLD, tx0_8kwo_device)
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DECLARE_DEVICE_TYPE(TX0_8KW, tx0_8kw_device)
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#endif // MAME_CPU_TX0_TX0_H
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@ -38,7 +38,7 @@
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1.4 | 600020 (PAD) Partial add (exclusive or) MBR to AC
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1.4 | 600400 (SHR) Shift AC right once
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1.4 | 600600 (CYR) Cycle AC right once
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1.7 | 600010 (CRY) Add carry digits to AC (according to LR)
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1.7 | 600010 (CRY) Add carry digits to AC (according to MBR)
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1.8 | 603000 (HLT) Halt computer
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ANL and ORL were added in the first half of 1959 (M-5001-6).
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@ -72,7 +72,7 @@
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1.6 | 600400 (SHR) Shift AC right once
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1.6 | 600600 (CYR) Cycle AC right once
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1.6 | 607000 (SPF) Set PFR from MBR
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1.7 | 600010 (CRY) Add carry digits to AC (according to LR)
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1.7 | 600010 (CRY) Add carry digits to AC (according to MBR)
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1.8 | 600001 (MBX) Transfer MBR to XR
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1.8 | 603000 (HLT) Halt computer
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@ -119,7 +119,15 @@ offs_t tx0_64kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
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// Addressable instructions (only 3 in this version)
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util::stream_format(stream, "%s %06o", s_addressable_insts[(inst & 0600000) >> 13], inst & 0177777);
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}
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else switch (inst)
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else
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dasm_opr(stream, inst);
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return 1 | SUPPORTED;
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}
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void tx0_64kw_disassembler::dasm_opr(std::ostream &stream, u32 inst)
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{
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switch (inst)
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{
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case 0600012:
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stream << "cry";
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@ -245,6 +253,10 @@ offs_t tx0_64kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
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stream << "clc";
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break;
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case 0740062:
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stream << "lcc";
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break;
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case 0740200:
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stream << "cal";
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break;
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@ -276,6 +288,46 @@ offs_t tx0_64kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
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util::stream_format(stream, "opr %o", inst & 0177777);
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break;
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}
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}
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offs_t tx0_8kwo_disassembler::disassemble(std::ostream &stream, offs_t pc, const tx0_8kwo_disassembler::data_buffer &opcodes, const tx0_8kwo_disassembler::data_buffer ¶ms)
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{
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u32 inst = opcodes.r32(pc) & 0777777;
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if (inst < 0600000)
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{
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// Addressable instructions (only 6 in this version)
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if ((inst & 060000) != 0)
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util::stream_format(stream, "%06o", inst);
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else
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util::stream_format(stream, "%s %05o", s_addressable_insts[(inst & 0700000) >> 13], inst & 017777);
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}
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else switch (inst)
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{
|
||||
case 0600105:
|
||||
stream << "orl";
|
||||
break;
|
||||
|
||||
case 0600125:
|
||||
stream << "ora";
|
||||
break;
|
||||
|
||||
case 0600305:
|
||||
stream << "anl";
|
||||
break;
|
||||
|
||||
case 0600325:
|
||||
stream << "ana";
|
||||
break;
|
||||
|
||||
case 0610000: case 0611000: case 0612000: case 0613000: case 0614000: case 0615000: case 0616000: case 0617000:
|
||||
util::stream_format(stream, "ex%d", BIT(inst, 9, 3));
|
||||
break;
|
||||
|
||||
default:
|
||||
dasm_opr(stream, inst);
|
||||
break;
|
||||
}
|
||||
|
||||
return 1 | SUPPORTED;
|
||||
}
|
||||
@ -309,10 +361,10 @@ offs_t tx0_8kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((inst & 037000) == 02000)
|
||||
if ((inst & 0137020) == 0102020)
|
||||
{
|
||||
stream << "tbr";
|
||||
if ((inst & 0100757) == 0)
|
||||
if ((inst & 000757) == 0)
|
||||
return 1 | SUPPORTED;
|
||||
stream << 'U';
|
||||
}
|
||||
@ -642,6 +694,10 @@ offs_t tx0_8kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
|
||||
stream << "alo";
|
||||
break;
|
||||
|
||||
case 040227:
|
||||
stream << "anl 20"; // no consistent mnemonic used in program macros
|
||||
break;
|
||||
|
||||
case 040230:
|
||||
stream << "all";
|
||||
break;
|
||||
@ -662,6 +718,10 @@ offs_t tx0_8kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
|
||||
stream << "anlUcom";
|
||||
break;
|
||||
|
||||
case 040250:
|
||||
stream << "alrUamz";
|
||||
break;
|
||||
|
||||
case 040260:
|
||||
stream << "alc";
|
||||
break;
|
||||
@ -694,6 +754,10 @@ offs_t tx0_8kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
|
||||
stream << "clc";
|
||||
break;
|
||||
|
||||
case 0100041:
|
||||
stream << "clcUxro";
|
||||
break;
|
||||
|
||||
case 0100062:
|
||||
stream << "lcc";
|
||||
break;
|
||||
@ -718,6 +782,18 @@ offs_t tx0_8kw_disassembler::disassemble(std::ostream &stream, offs_t pc, const
|
||||
stream << "cal";
|
||||
break;
|
||||
|
||||
case 0100201:
|
||||
stream << "calUxro";
|
||||
break;
|
||||
|
||||
case 0100212:
|
||||
stream << "lalUlro";
|
||||
break;
|
||||
|
||||
case 0100222:
|
||||
stream << "lacUlro";
|
||||
break;
|
||||
|
||||
case 0100240:
|
||||
stream << "calUcom";
|
||||
break;
|
||||
|
||||
@ -12,8 +12,20 @@ public:
|
||||
tx0_64kw_disassembler() = default;
|
||||
virtual ~tx0_64kw_disassembler() = default;
|
||||
|
||||
protected:
|
||||
virtual u32 opcode_alignment() const override;
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
|
||||
void dasm_opr(std::ostream &stream, u32 inst);
|
||||
};
|
||||
|
||||
class tx0_8kwo_disassembler : public tx0_64kw_disassembler
|
||||
{
|
||||
public:
|
||||
tx0_8kwo_disassembler() = default;
|
||||
|
||||
protected:
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
};
|
||||
|
||||
class tx0_8kw_disassembler : public util::disasm_interface
|
||||
@ -22,6 +34,7 @@ public:
|
||||
tx0_8kw_disassembler() = default;
|
||||
virtual ~tx0_8kw_disassembler() = default;
|
||||
|
||||
protected:
|
||||
virtual u32 opcode_alignment() const override;
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
};
|
||||
|
||||
@ -1612,6 +1612,31 @@ void tx0_state::tx0_64kw(machine_config &config)
|
||||
SOFTWARE_LIST(config, "ptp_list").set_original("tx0_ptp").set_filter("64,OLDCODE");
|
||||
}
|
||||
|
||||
void tx0_state::tx0_8kwo(machine_config &config)
|
||||
{
|
||||
tx0_64kw(config);
|
||||
|
||||
/* basic machine hardware */
|
||||
/* TX0 CPU @ approx. 167 kHz (no master clock, but the memory cycle time is
|
||||
approximately 6usec) */
|
||||
TX0_8KW_OLD(config.replace(), m_maincpu, 166667);
|
||||
m_maincpu->cpy().set(FUNC(tx0_state::tx0_io_cpy));
|
||||
m_maincpu->r1l().set(FUNC(tx0_state::tx0_io_r1l));
|
||||
m_maincpu->dis().set(FUNC(tx0_state::tx0_io_dis));
|
||||
m_maincpu->r3l().set(FUNC(tx0_state::tx0_io_r3l));
|
||||
m_maincpu->prt().set(FUNC(tx0_state::tx0_io_prt));
|
||||
m_maincpu->rsv().set_nop();
|
||||
m_maincpu->p6h().set(FUNC(tx0_state::tx0_io_p6h));
|
||||
m_maincpu->p7h().set(FUNC(tx0_state::tx0_io_p7h));
|
||||
m_maincpu->sel().set(FUNC(tx0_state::tx0_sel));
|
||||
m_maincpu->res().set(FUNC(tx0_state::tx0_io_reset_callback));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &tx0_state::tx0_8kw_map);
|
||||
/* dummy interrupt: handles input */
|
||||
m_maincpu->set_vblank_int("screen", FUNC(tx0_state::tx0_interrupt));
|
||||
|
||||
SOFTWARE_LIST(config.replace(), "ptp_list").set_original("tx0_ptp").set_filter("8,OLDCODE");
|
||||
}
|
||||
|
||||
void tx0_state::tx0_8kw(machine_config &config)
|
||||
{
|
||||
tx0_64kw(config);
|
||||
@ -1642,6 +1667,11 @@ ROM_START(tx0_64kw)
|
||||
/* space filled with our font */
|
||||
ROM_END
|
||||
|
||||
ROM_START(tx0_8kwo)
|
||||
ROM_REGION(tx0_fontdata_size, "gfx1", ROMREGION_ERASEFF)
|
||||
/* space filled with our font */
|
||||
ROM_END
|
||||
|
||||
ROM_START(tx0_8kw)
|
||||
ROM_REGION(tx0_fontdata_size, "gfx1", ROMREGION_ERASEFF)
|
||||
/* space filled with our font */
|
||||
@ -1653,6 +1683,7 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1956, tx0_64kw, 0, 0, tx0_64kw, tx0, tx0_state, init_tx0, "MIT", "TX-0 original demonstrator (64 kWords of RAM)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING)
|
||||
COMP( 1962, tx0_8kw, tx0_64kw, 0, tx0_8kw, tx0, tx0_state, init_tx0, "MIT", "TX-0 upgraded system (8 kWords of RAM)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING)
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1956, tx0_64kw, tx0_8kw, 0, tx0_64kw, tx0, tx0_state, init_tx0, "MIT", "TX-0 original demonstrator (64 kWords of RAM)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING)
|
||||
COMP( 1959, tx0_8kwo, tx0_8kw, 0, tx0_8kwo, tx0, tx0_state, init_tx0, "MIT", "TX-0 upgraded system (8 kWords of RAM, old order code)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING)
|
||||
COMP( 1962, tx0_8kw, 0, 0, tx0_8kw, tx0, tx0_state, init_tx0, "MIT", "TX-0 upgraded system (8 kWords of RAM, new order code)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING)
|
||||
|
||||
@ -145,6 +145,7 @@ public:
|
||||
{ }
|
||||
|
||||
void tx0_64kw(machine_config &config);
|
||||
void tx0_8kwo(machine_config &config);
|
||||
void tx0_8kw(machine_config &config);
|
||||
|
||||
void init_tx0();
|
||||
|
||||
@ -41737,6 +41737,7 @@ twinsed2 // (c) 1994 Electronic Devices
|
||||
|
||||
@source:tx0.cpp
|
||||
tx0_64kw // April 1956 MIT TX-0 (64kw RAM)
|
||||
tx0_8kwo // 1959 MIT TX-0 (8kw RAM)
|
||||
tx0_8kw // 1962 MIT TX-0 (8kw RAM)
|
||||
|
||||
@source:tx1.cpp
|
||||
|
||||
@ -596,6 +596,7 @@ static const dasm_table_entry dasm_table[] =
|
||||
{ "tp0320", be, 0, []() -> util::disasm_interface * { return new tp0320_disassembler; } },
|
||||
{ "tx0_64kw", be, -2, []() -> util::disasm_interface * { return new tx0_64kw_disassembler; } },
|
||||
{ "tx0_8kw", be, -2, []() -> util::disasm_interface * { return new tx0_8kw_disassembler; } },
|
||||
{ "tx0_8kwo", be, -2, []() -> util::disasm_interface * { return new tx0_8kwo_disassembler; } },
|
||||
{ "ucom4", le, 0, []() -> util::disasm_interface * { return new ucom4_disassembler; } },
|
||||
{ "unsp10", be, -1, []() -> util::disasm_interface * { return new unsp_disassembler; } },
|
||||
{ "unsp12", be, -1, []() -> util::disasm_interface * { return new unsp_12_disassembler; } },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user