diff --git a/src/mame/drivers/xavix.cpp b/src/mame/drivers/xavix.cpp
index 2a2f0e3d2c9..4de7e25d6fe 100644
--- a/src/mame/drivers/xavix.cpp
+++ b/src/mame/drivers/xavix.cpp
@@ -4,30 +4,10 @@
 
     Skeleton driver for XaviX TV PNP console and childs (Let's! Play TV Classic)
 
-    CPU is an M6502 derivative where opcode 0x22 has 3 bytes of operands.
-    Definitely not: 65C816 or Mitsu M740.
-
-    Code at F34F is thus:
-
-    F34F:  STA $6200,X
-    F352:  INX
-    F353:  BNE $F34F
-    F355:  UNK 12 FA 80
-    F359:  UNK 12 A8 80
-    F35D:  UNK 12 1B 80
-    F361:  SEC
-    F362:  LDA #$CD
-    F364:  SBC #$CA
-
-    later on
-
-    F3C9:  UNK 00 E4 C4
-
-    TODO:
-    - identify CPU
-    - figure out ROM banking
+    CPU is an M6502 derivative with added opcodes for far-call handling
 
     Notes from http://www.videogameconsolelibrary.com/pg00-xavix.htm#page=reviews (thanks Guru!)
+	(** this isn't entirely accurate, XaviX Tennis appears to be Super Xavix, see other notes in driver)
 
     XaviXPORT arrived on the scene with 3 game titles (XaviX Tennis, XaviX Bowling and XaviX Baseball) using their
     original XaviX Multiprocessor.  This proprietary chip is reported to contain an 8-bit high speed central processing
@@ -41,6 +21,10 @@
     SSD COMPANY LIMITED is already working on their next chip called "XaviX II" that is said to be a 32-bit RISC processor
     with 3D capabilities.
 
+	Important addresses
+
+	0x18340 in Monster Truck is the self-test mode, shows me which registers need to retain their values etc.
+
 ***************************************************************************/
 
 
@@ -59,9 +43,21 @@ public:
 	xavix_state(const machine_config &mconfig, device_type type, const char *tag)
 		: driver_device(mconfig, type, tag),
 		m_maincpu(*this, "maincpu"),
+		m_mainram(*this, "mainram"),
+		m_spr_attr0(*this, "spr_attr0"),
+		m_spr_attr1(*this, "spr_attr1"),
+		m_spr_ypos(*this, "spr_attr2"),
+		m_spr_xpos(*this, "spr_attr3"),
+		m_spr_attr5(*this, "spr_attr5"),
+		m_spr_attr6(*this, "spr_attr6"),
+		m_spr_attr7(*this, "spr_attr7"),
 		m_palram1(*this, "palram1"),
 		m_palram2(*this, "palram2"),
-		m_palette(*this, "palette")
+		m_spr_attra(*this, "spr_attra"),
+		m_palette(*this, "palette"),
+		m_in0(*this, "IN0"),
+		m_in1(*this, "IN1"),
+		m_gfxdecode(*this, "gfxdecode")
 	{ }
 
 	// devices
@@ -75,16 +71,22 @@ public:
 	DECLARE_WRITE8_MEMBER(xavix_7900_w);
 
 	DECLARE_WRITE8_MEMBER(dma_trigger_w);
-	DECLARE_WRITE8_MEMBER(dmasrc_lo_w);
-	DECLARE_WRITE8_MEMBER(dmasrc_md_w);
-	DECLARE_WRITE8_MEMBER(dmasrc_hi_w);
-	DECLARE_WRITE8_MEMBER(dmadst_lo_w);
-	DECLARE_WRITE8_MEMBER(dmadst_hi_w);
-	DECLARE_WRITE8_MEMBER(dmalen_lo_w);
-	DECLARE_WRITE8_MEMBER(dmalen_hi_w);
+	DECLARE_WRITE8_MEMBER(rom_dmasrc_lo_w);
+	DECLARE_WRITE8_MEMBER(rom_dmasrc_md_w);
+	DECLARE_WRITE8_MEMBER(rom_dmasrc_hi_w);
+	DECLARE_WRITE8_MEMBER(rom_dmadst_lo_w);
+	DECLARE_WRITE8_MEMBER(rom_dmadst_hi_w);
+	DECLARE_WRITE8_MEMBER(rom_dmalen_lo_w);
+	DECLARE_WRITE8_MEMBER(rom_dmalen_hi_w);
 	DECLARE_READ8_MEMBER(dma_trigger_r);
 
-	DECLARE_READ8_MEMBER(xavix_7a01_r);
+	DECLARE_WRITE8_MEMBER(vid_dma_params_1_w);
+	DECLARE_WRITE8_MEMBER(vid_dma_params_2_w);
+	DECLARE_WRITE8_MEMBER(vid_dma_trigger_w);
+	DECLARE_READ8_MEMBER(vid_dma_trigger_r);
+
+	DECLARE_READ8_MEMBER(xavix_io_0_r);
+	DECLARE_READ8_MEMBER(xavix_io_1_r);
 
 	DECLARE_WRITE8_MEMBER(irq_enable_w);
 	DECLARE_WRITE8_MEMBER(irq_vector0_lo_w);
@@ -101,9 +103,16 @@ public:
 	DECLARE_WRITE8_MEMBER(xavix_75ff_w);
 	DECLARE_READ8_MEMBER(xavix_75f9_r);
 
+	DECLARE_READ8_MEMBER(pal_ntsc_r);
+
+	DECLARE_READ8_MEMBER(mult_r);
+	DECLARE_WRITE8_MEMBER(mult_param_w);
+
 	INTERRUPT_GEN_MEMBER(interrupt);
 	TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb);
 
+	DECLARE_DRIVER_INIT(xavix);
+
 	void xavix_map(address_map &map);
 protected:
 	// driver_device overrides
@@ -113,15 +122,15 @@ protected:
 	virtual void video_start() override;
 
 private:
-	uint8_t m_dmasrc_lo_data;
-	uint8_t m_dmasrc_md_data;
-	uint8_t m_dmasrc_hi_data;
+	uint8_t m_rom_dmasrc_lo_data;
+	uint8_t m_rom_dmasrc_md_data;
+	uint8_t m_rom_dmasrc_hi_data;
 
-	uint8_t m_dmadst_lo_data;
-	uint8_t m_dmadst_hi_data;
+	uint8_t m_rom_dmadst_lo_data;
+	uint8_t m_rom_dmadst_hi_data;
 
-	uint8_t m_dmalen_lo_data;
-	uint8_t m_dmalen_hi_data;
+	uint8_t m_rom_dmalen_lo_data;
+	uint8_t m_rom_dmalen_hi_data;
 
 	uint8_t m_irq_enable_data;
 	uint8_t m_irq_vector0_lo_data;
@@ -129,13 +138,42 @@ private:
 	uint8_t m_irq_vector1_lo_data;
 	uint8_t m_irq_vector1_hi_data;
 
+	uint8_t m_multparams[3];
+	uint8_t m_multresults[2];
+
+	uint8_t m_vid_dma_param1[2];
+	uint8_t m_vid_dma_param2[2];
+
 	uint8_t get_vectors(int which, int half);
 
+	required_shared_ptr<uint8_t> m_mainram;
+
+	required_shared_ptr<uint8_t> m_spr_attr0;
+	required_shared_ptr<uint8_t> m_spr_attr1;
+	required_shared_ptr<uint8_t> m_spr_ypos;
+	required_shared_ptr<uint8_t> m_spr_xpos;
+
+	required_shared_ptr<uint8_t> m_spr_attr5;
+	required_shared_ptr<uint8_t> m_spr_attr6;
+	required_shared_ptr<uint8_t> m_spr_attr7;
+
 	required_shared_ptr<uint8_t> m_palram1;
 	required_shared_ptr<uint8_t> m_palram2;
+
+	required_shared_ptr<uint8_t> m_spr_attra;
+	
 	required_device<palette_device> m_palette;
 
+	required_ioport m_in0;
+	required_ioport m_in1;
+
+	required_device<gfxdecode_device> m_gfxdecode;
+
 	void handle_palette(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+	double hue2rgb(double p, double q, double t);
+
+	int m_rgnlen;
+	uint8_t* m_rgn;
 };
 
 void xavix_state::video_start()
@@ -143,10 +181,20 @@ void xavix_state::video_start()
 }
 
 
+double xavix_state::hue2rgb(double p, double q, double t)
+{
+	if (t < 0) t += 1;
+	if (t > 1) t -= 1;
+	if (t < 1 / 6.0f) return p + (q - p) * 6 * t;
+	if (t < 1 / 2.0f) return q;
+	if (t < 2 / 3.0f) return p + (q - p) * (2 / 3.0f - t) * 6;
+	return p;
+}
+
 
 void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
 {
-	// Palette (WRONG! it's probably more like the rad_eu3a14.cpp etc. ones)
+	// not verified
 	int offs = 0;
 	for (int index = 0; index < 256; index++)
 	{
@@ -154,17 +202,42 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
 		dat |= m_palram2[offs]<<8;
 		offs++;
 
-		int r = (dat & 0x000f) >> 0;
-		int g = (dat & 0x00f0) >> 4;
-		int b = (dat & 0x0f00) >> 8;
-		int i = (dat & 0xf000) >> 12;
-		i+=1;
+		int l_raw = (dat & 0x1f00) >> 8;
+		int sl_raw =(dat & 0x00e0) >> 5;
+		int h_raw = (dat & 0x001f) >> 0;
 
-		r = (r * i)-1;
-		g = (g * i)-1;
-		b = (b * i)-1;
+		//if (h_raw > 24)
+		//	printf("hraw >24 (%02x)\n", h_raw);
+
+		//if (l_raw > 17)
+		//	printf("lraw >17 (%02x)\n", l_raw);
+
+		//if (sl_raw > 7)
+		//	printf("sl_raw >5 (%02x)\n", sl_raw);
+
+		double l = (double)l_raw / 17.0f;
+		double s = (double)sl_raw / 7.0f;
+		double h = (double)h_raw / 24.0f;
+
+		double r, g, b;
+
+		if (s == 0) {
+			r = g = b = l; // greyscale
+		}
+		else {
+			double q = l < 0.5f ? l * (1 + s) : l + s - l * s;
+			double p = 2 * l - q;
+			r = hue2rgb(p, q, h + 1 / 3.0f);
+			g = hue2rgb(p, q, h);
+			b = hue2rgb(p, q, h - 1 / 3.0f);
+		}
+
+		int r_real = r * 255.0f;
+		int g_real = g * 255.0f;
+		int b_real = b * 255.0f;
+
+		m_palette->set_pen_color(index, r_real, g_real, b_real);
 
-		m_palette->set_pen_color(index, r, g, b);
 	}
 }
 
@@ -172,6 +245,55 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
 uint32_t xavix_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
 {
 	handle_palette(screen, bitmap, cliprect);
+
+	// why are the first two logos in Monster Truck stored as tilemaps in main ram?
+	// test mode isn't? is the code meant to process them instead? - there are no sprites in the sprite list at the time (and only one in test mode)
+	gfx_element *gfx = m_gfxdecode->gfx(1);
+	int count = 0;
+	for (int y = 0; y < 16; y++)
+	{
+		for (int x = 0; x < 16; x++)
+		{
+			int tile = m_mainram[count++];
+			
+			int gfxbase = (m_spr_attra[1] << 8) | (m_spr_attra[0]);
+			// upper bit is often set, maybe just because it relies on mirroring, maybe other purpose
+
+			tile += (gfxbase<<1);
+
+			gfx->opaque(bitmap,cliprect,tile,0,0,0,x*16,y*16);
+		}
+	}
+	
+	//printf("frame\n");
+	for (int i = 0; i < 0x100; i++)
+	{
+		int ypos = m_spr_ypos[i];
+		int xpos = m_spr_xpos[i];
+		int tile = m_spr_attr6[i];
+		tile += 0x4b00;
+
+		ypos = 0xff - ypos;
+
+		xpos -= 136;
+		ypos -= 192;
+
+
+		xpos &=0xff;
+		ypos &=0xff;
+
+		//if (!(ypos & 1))
+		
+		gfx->transpen(bitmap,cliprect,tile,10,0,0,xpos,ypos,0);
+
+		/*
+		if ((m_spr_ypos[i] != 0x81) && (m_spr_ypos[i] != 0x80) && (m_spr_ypos[i] != 0x00))
+		{
+			printf("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", m_spr_ypos[i], m_spr_attr0[i], m_spr_attr1[i], m_spr_xpos[i], m_spr_attr5[i], m_spr_attr6[i], m_spr_attr7[i] );
+		}
+		*/
+	}
+
 	return 0;
 }
 
@@ -180,72 +302,68 @@ WRITE8_MEMBER(xavix_state::dma_trigger_w)
 {
 	logerror("%s: dma_trigger_w %02x\n", machine().describe_context(), data);
 
-	uint32_t source = (m_dmasrc_hi_data << 16) | (m_dmasrc_md_data<<8) | m_dmasrc_lo_data;
-	uint16_t dest = (m_dmadst_hi_data<<8) | m_dmadst_lo_data;
-	uint16_t len = (m_dmalen_hi_data<<8) | m_dmalen_lo_data;
+	uint32_t source = (m_rom_dmasrc_hi_data << 16) | (m_rom_dmasrc_md_data<<8) | m_rom_dmasrc_lo_data;
+	uint16_t dest = (m_rom_dmadst_hi_data<<8) | m_rom_dmadst_lo_data;
+	uint16_t len = (m_rom_dmalen_hi_data<<8) | m_rom_dmalen_lo_data;
 
-	// TODO: don't do tag lookups here once satisfied this is correct
-	const uint32_t rgnlen = memregion("bios")->bytes();
-	uint8_t *rgn = memregion("bios")->base();
-	
-	source &= rgnlen-1;
+	source &= m_rgnlen-1;
 	logerror("  (possible DMA op SRC %08x DST %04x LEN %04x)\n", source, dest, len);
 
 	address_space& destspace = m_maincpu->space(AS_PROGRAM);
 
 	for (int i = 0; i < len; i++)
 	{
-		uint8_t dat = rgn[(source + i) & (rgnlen-1)];
+		uint8_t dat = m_rgn[(source + i) & (m_rgnlen-1)];
 		destspace.write_byte(dest + i, dat);
 	}
 }
 
-WRITE8_MEMBER(xavix_state::dmasrc_lo_w)
+WRITE8_MEMBER(xavix_state::rom_dmasrc_lo_w)
 {
-	logerror("%s: dmasrc_lo_w %02x\n", machine().describe_context(), data);
-	m_dmasrc_lo_data = data;
+	logerror("%s: rom_dmasrc_lo_w %02x\n", machine().describe_context(), data);
+	m_rom_dmasrc_lo_data = data;
 }
 
-WRITE8_MEMBER(xavix_state::dmasrc_md_w)
+WRITE8_MEMBER(xavix_state::rom_dmasrc_md_w)
 {
-	logerror("%s: dmasrc_md_w %02x\n", machine().describe_context(), data);
-	m_dmasrc_md_data = data;
+	logerror("%s: rom_dmasrc_md_w %02x\n", machine().describe_context(), data);
+	m_rom_dmasrc_md_data = data;
 }
 
-WRITE8_MEMBER(xavix_state::dmasrc_hi_w)
+WRITE8_MEMBER(xavix_state::rom_dmasrc_hi_w)
 {
-	logerror("%s: dmasrc_hi_w %02x\n", machine().describe_context(), data);
-	m_dmasrc_hi_data = data;
+	logerror("%s: rom_dmasrc_hi_w %02x\n", machine().describe_context(), data);
+	m_rom_dmasrc_hi_data = data;
 	// this would mean Taito Nostalgia relies on mirroring tho, as it has the high bits set... so could just be wrong
-	logerror("  (DMA ROM source of %02x%02x%02x)\n", m_dmasrc_hi_data, m_dmasrc_md_data, m_dmasrc_lo_data);
+	logerror("  (DMA ROM source of %02x%02x%02x)\n", m_rom_dmasrc_hi_data, m_rom_dmasrc_md_data, m_rom_dmasrc_lo_data);
 }
 
-WRITE8_MEMBER(xavix_state::dmadst_lo_w)
+WRITE8_MEMBER(xavix_state::rom_dmadst_lo_w)
 {
-	logerror("%s: dmadst_lo_w %02x\n", machine().describe_context(), data);
-	m_dmadst_lo_data = data;
+	logerror("%s: rom_dmadst_lo_w %02x\n", machine().describe_context(), data);
+	m_rom_dmadst_lo_data = data;
 }
 
-WRITE8_MEMBER(xavix_state::dmadst_hi_w)
+WRITE8_MEMBER(xavix_state::rom_dmadst_hi_w)
 {
-	logerror("%s: dmadst_hi_w %02x\n", machine().describe_context(), data);
-	m_dmadst_hi_data = data;
+	logerror("%s: rom_dmadst_hi_w %02x\n", machine().describe_context(), data);
+	m_rom_dmadst_hi_data = data;
 
-	logerror("  (DMA dest of %02x%02x)\n", m_dmadst_hi_data, m_dmadst_lo_data);
+	logerror("  (DMA dest of %02x%02x)\n", m_rom_dmadst_hi_data, m_rom_dmadst_lo_data);
 }
 
-WRITE8_MEMBER(xavix_state::dmalen_lo_w)
+WRITE8_MEMBER(xavix_state::rom_dmalen_lo_w)
 {
-	logerror("%s: dmalen_lo_w %02x\n", machine().describe_context(), data);
-	m_dmalen_lo_data = data;
+	logerror("%s: rom_dmalen_lo_w %02x\n", machine().describe_context(), data);
+	m_rom_dmalen_lo_data = data;
 }
 
-WRITE8_MEMBER(xavix_state::dmalen_hi_w)
+WRITE8_MEMBER(xavix_state::rom_dmalen_hi_w)
 {
-	logerror("%s: dmalen_hi_w %02x\n", machine().describe_context(), data);
-	m_dmalen_hi_data = data;
+	logerror("%s: rom_dmalen_hi_w %02x\n", machine().describe_context(), data);
+	m_rom_dmalen_hi_data = data;
 
-	logerror("  (DMA len of %02x%02x)\n", m_dmalen_hi_data, m_dmalen_lo_data);
+	logerror("  (DMA len of %02x%02x)\n", m_rom_dmalen_hi_data, m_rom_dmalen_lo_data);
 }
 
 READ8_MEMBER(xavix_state::dma_trigger_r)
@@ -347,10 +465,16 @@ READ8_MEMBER(xavix_state::xavix_75f9_r)
 	return 0x00;
 }
 
-
-READ8_MEMBER(xavix_state::xavix_7a01_r)
+READ8_MEMBER(xavix_state::xavix_io_0_r)
 {
-	//logerror("%s: xavix_7a01_r (random status?)\n", machine().describe_context());
+	//return 0x00;
+	//return 0x01; // enter test mode
+	return m_in0->read();
+}
+
+READ8_MEMBER(xavix_state::xavix_io_1_r)
+{
+	//logerror("%s: xavix_io_1_r (random status?)\n", machine().describe_context());
 	/*	
 
 	rad_mtrk checks for 0x40 at (interrupt code)
@@ -395,8 +519,8 @@ READ8_MEMBER(xavix_state::xavix_7a01_r)
 
 	*/
 
-	
-	return 0x02;
+	//return 0x02;
+	return m_in1->read();
 }
 
 READ8_MEMBER(xavix_state::xavix_75f4_r)
@@ -411,25 +535,110 @@ READ8_MEMBER(xavix_state::xavix_75f5_r)
 	return 0xff;
 }
 
-// DATA reads from 0x8000-0xffff are banked by byte 0xff of 'ram'
+READ8_MEMBER(xavix_state::mult_r)
+{
+	return m_multresults[offset];
+}
+
+WRITE8_MEMBER(xavix_state::mult_param_w)
+{
+	COMBINE_DATA(&m_multparams[offset]);
+	// there are NOPs after one of the writes, so presumably the operation is write triggerd and not intstant
+	// see test code at 0184a4 in monster truck
+
+	if (offset == 2)
+	{
+		// assume 0 is upper bits, might be 'mode' instead, check
+		uint16_t param1 = (m_multparams[0]<<8) | (m_multparams[1]);
+		uint8_t param2 = (m_multparams[2]);
+
+		uint16_t result =  param1*param2;
+
+		m_multresults[1] = (result>>8)&0xff;
+		m_multresults[0] = result&0xff;
+	}
+}
+
+WRITE8_MEMBER(xavix_state::vid_dma_params_1_w)
+{
+	m_vid_dma_param1[offset] = data;
+}
+
+WRITE8_MEMBER(xavix_state::vid_dma_params_2_w)
+{
+	m_vid_dma_param2[offset] = data;
+}
+
+WRITE8_MEMBER(xavix_state::vid_dma_trigger_w)
+{
+	uint16_t len = data & 0x07;
+	uint16_t src = (m_vid_dma_param1[1]<<8) | m_vid_dma_param1[0];
+	uint16_t dst = (m_vid_dma_param2[0]<<8);
+	dst += 0x6000;
+
+	uint8_t unk = m_vid_dma_param2[1];
+
+	logerror("%s: vid_dma_trigger_w with trg %02x size %04x src %04x dest %04x unk (%02x)\n", machine().describe_context(), data & 0xf8, len,src,dst,unk);
+
+	if (unk)
+	{
+		fatalerror("m_vid_dma_param2[1] != 0x00 (is %02x)\n", m_vid_dma_param2[1]);
+	}
+
+	if (len == 0x00)
+	{
+		len = 0x08;
+		logerror(" (length was 0x0, assuming 0x8)\n");
+	}
+
+	len = len << 8;
+
+	address_space& dmaspace = m_maincpu->space(AS_PROGRAM);
+
+	if (data & 0x40)
+	{
+		for (int i = 0; i < len; i++)
+		{
+			uint8_t dat = dmaspace.read_byte(src + i);
+			dmaspace.write_byte(dst + i, dat);
+		}
+	}
+}
+
+READ8_MEMBER(xavix_state::vid_dma_trigger_r)
+{
+	// expects bit 0x40 to clear in most cases
+	return 0x00;
+}
+
+READ8_MEMBER(xavix_state::pal_ntsc_r)
+{
+	// only seen 0x10 checked in code
+	// in monster truck the tile base address gets set based on this, there are 2 copies of the test screen in rom, one for pal, one for ntsc, see 1854c
+	return 0x10;
+}
+
+// DATA reads from 0x8000-0xffff are banked by byte 0xff of 'ram' (this is handled in the CPU core)
 
 ADDRESS_MAP_START(xavix_state::xavix_map)
 	AM_RANGE(0x000000, 0x0001ff) AM_RAM
-	AM_RANGE(0x000200, 0x003fff) AM_RAM
+	AM_RANGE(0x000200, 0x003fff) AM_RAM AM_SHARE("mainram")
 
-	// 6xxx ranges could be the video controller
-
-	AM_RANGE(0x006000, 0x0061ff) AM_RAM // taitons1 writes to other areas here, but might already be off the rails
-	AM_RANGE(0x006200, 0x0062ff) AM_RAM // cleared to 0x80 by both games
-	AM_RANGE(0x006300, 0x0067ff) AM_RAM // taitons1 writes to other areas here, but might already be off the rails
-	
-	// could be palettes?
+	// 6xxx ranges are the video hardware
+	// appears to be 256 sprites (shares will be renamed once their purpose is known)
+	AM_RANGE(0x006000, 0x0060ff) AM_RAM AM_SHARE("spr_attr0")
+	AM_RANGE(0x006100, 0x0061ff) AM_RAM AM_SHARE("spr_attr1")
+	AM_RANGE(0x006200, 0x0062ff) AM_RAM AM_SHARE("spr_attr2") // cleared to 0x8f0 by both games, maybe enable registers?
+	AM_RANGE(0x006300, 0x0063ff) AM_RAM AM_SHARE("spr_attr3")
+	AM_RANGE(0x006400, 0x0064ff) AM_RAM // 6400 range unused by code, does it exist?
+	AM_RANGE(0x006500, 0x0065ff) AM_RAM AM_SHARE("spr_attr5")
+	AM_RANGE(0x006600, 0x0066ff) AM_RAM AM_SHARE("spr_attr6")
+	AM_RANGE(0x006700, 0x0067ff) AM_RAM AM_SHARE("spr_attr7")
 	AM_RANGE(0x006800, 0x0068ff) AM_RAM AM_SHARE("palram1") // written with 6900
 	AM_RANGE(0x006900, 0x0069ff) AM_RAM AM_SHARE("palram2") // startup (taitons1)
+	AM_RANGE(0x006a00, 0x006a1f) AM_RAM AM_SHARE("spr_attra") // test mode, pass flag 0x20
 
-	AM_RANGE(0x006a00, 0x006a00) AM_WRITENOP
-	AM_RANGE(0x006a01, 0x006a01) AM_WRITENOP
-
+	/*
 	AM_RANGE(0x006fc0, 0x006fc0) AM_WRITENOP // startup
 
 	AM_RANGE(0x006fc8, 0x006fc8) AM_WRITENOP
@@ -443,82 +652,83 @@ ADDRESS_MAP_START(xavix_state::xavix_map)
 
 	//AM_RANGE(0x006fd7, 0x006fd7) AM_READNOP AM_WRITENOP
 	AM_RANGE(0x006fd8, 0x006fd8) AM_WRITENOP // startup (taitons1)
-
-	//AM_RANGE(0x006fe0, 0x006fe0) AM_READNOP AM_WRITENOP // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40   (see function call at c273) write values are hardcoded, similar code at 18401
-	AM_RANGE(0x006fe1, 0x006fe1) AM_WRITENOP
-	AM_RANGE(0x006fe2, 0x006fe2) AM_WRITENOP
-	AM_RANGE(0x006fe5, 0x006fe5) AM_WRITENOP
-	AM_RANGE(0x006fe6, 0x006fe6) AM_WRITENOP
+	*/
+	AM_RANGE(0x006fe0, 0x006fe0) AM_READWRITE(vid_dma_trigger_r, vid_dma_trigger_w) // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40   (see function call at c273) write values are hardcoded, similar code at 18401
+	AM_RANGE(0x006fe1, 0x006fe2) AM_WRITE(vid_dma_params_1_w)
+	AM_RANGE(0x006fe5, 0x006fe6) AM_WRITE(vid_dma_params_2_w)
 
 	// function in rad_mtrk at 0184b7 uses this
-	AM_RANGE(0x006fe8, 0x006fe8) AM_WRITENOP // cleared in interrupt 0
-	AM_RANGE(0x006fe9, 0x006fe9) AM_WRITENOP // startup - cleared in interrupt 0
+	AM_RANGE(0x006fe8, 0x006fe8) AM_RAM // r/w tested
+	AM_RANGE(0x006fe9, 0x006fe9) AM_RAM // r/w tested
 	AM_RANGE(0x006fea, 0x006fea) AM_WRITENOP 
 
-	AM_RANGE(0x006ff0, 0x006ff0) AM_WRITENOP // cleared in interrupt 0
+	AM_RANGE(0x006ff0, 0x006ff0) AM_RAM // r/w tested
 	AM_RANGE(0x006ff1, 0x006ff1) AM_WRITENOP // startup - cleared in interrupt 0
 	AM_RANGE(0x006ff2, 0x006ff2) AM_WRITENOP // set to 07 after clearing above things in interrupt 0
 
 	AM_RANGE(0x006ff8, 0x006ff8) AM_RAM // always seems to be a read/store or read/modify/store
-	//AM_RANGE(0x006ff9, 0x006ff9) AM_READNOP
+	AM_RANGE(0x006ff9, 0x006ff9) AM_READ(pal_ntsc_r)
 
 	// 7xxx ranges system controller?
 
-	AM_RANGE(0x0075f0, 0x0075f0) AM_RAM // read/written 8 times in a row
-	AM_RANGE(0x0075f1, 0x0075f1) AM_RAM // read/written 8 times in a row
+	AM_RANGE(0x0075f0, 0x0075f0) AM_RAM // r/w tested read/written 8 times in a row
+	AM_RANGE(0x0075f1, 0x0075f1) AM_RAM // r/w tested read/written 8 times in a row
 	AM_RANGE(0x0075f4, 0x0075f4) AM_READ(xavix_75f4_r) // related to 75f0 (read after writing there - rad_mtrk)
 	AM_RANGE(0x0075f5, 0x0075f5) AM_READ(xavix_75f5_r) // related to 75f1 (read after writing there - rad_mtrk)
 
 	// taitons1 after 75f7/75f8
-	AM_RANGE(0x0075f6, 0x0075f6) AM_WRITE(xavix_75f6_w)
+	AM_RANGE(0x0075f6, 0x0075f6) AM_RAM // r/w tested AM_WRITE(xavix_75f6_w)
 	// taitons1 written as a pair
-	AM_RANGE(0x0075f7, 0x0075f7) AM_WRITE(xavix_75f7_w)
-	AM_RANGE(0x0075f8, 0x0075f8) AM_WRITE(xavix_75f8_w)
+	//AM_RANGE(0x0075f7, 0x0075f7) AM_WRITE(xavix_75f7_w)
+	AM_RANGE(0x0075f8, 0x0075f8) AM_RAM // r/w tested AM_WRITE(xavix_75f8_w)
 	// taitons1 written after 75f6, then read
 	//AM_RANGE(0x0075f9, 0x0075f9) AM_READWRITE(xavix_75f9_r, xavix_75f9_w)
 	// at another time
-	AM_RANGE(0x0075fd, 0x0075fd) AM_WRITENOP
-	AM_RANGE(0x0075fe, 0x0075fe) AM_WRITENOP
+	AM_RANGE(0x0075fa, 0x0075fa) AM_RAM // r/w tested
+	AM_RANGE(0x0075fb, 0x0075fb) AM_RAM // r/w tested
+	AM_RANGE(0x0075fc, 0x0075fc) AM_RAM // r/w tested
+
+	AM_RANGE(0x0075fd, 0x0075fd) AM_RAM // r/w tested
+	//AM_RANGE(0x0075fe, 0x0075fe) AM_WRITENOP
 	// taitons1 written other 75xx operations
-	AM_RANGE(0x0075ff, 0x0075ff) AM_WRITE(xavix_75ff_w)
+	//AM_RANGE(0x0075ff, 0x0075ff) AM_WRITE(xavix_75ff_w)
 
-	AM_RANGE(0x007810, 0x007810) AM_WRITENOP // startup
+	//AM_RANGE(0x007810, 0x007810) AM_WRITENOP // startup
 
-	AM_RANGE(0x007900, 0x007900) AM_WRITE(xavix_7900_w) // startup
-	AM_RANGE(0x007902, 0x007902) AM_WRITENOP // startup
+	//AM_RANGE(0x007900, 0x007900) AM_WRITE(xavix_7900_w) // startup
+	//AM_RANGE(0x007902, 0x007902) AM_WRITENOP // startup
 
 	// DMA trigger for below (written after the others) waits on status of bit 1 in a loop
 	AM_RANGE(0x007980, 0x007980) AM_READWRITE(dma_trigger_r, dma_trigger_w)
 	// DMA source
-	AM_RANGE(0x007981, 0x007981) AM_WRITE(dmasrc_lo_w)
-	AM_RANGE(0x007982, 0x007982) AM_WRITE(dmasrc_md_w)
-	AM_RANGE(0x007983, 0x007983) AM_WRITE(dmasrc_hi_w)
+	AM_RANGE(0x007981, 0x007981) AM_WRITE(rom_dmasrc_lo_w)
+	AM_RANGE(0x007982, 0x007982) AM_WRITE(rom_dmasrc_md_w)
+	AM_RANGE(0x007983, 0x007983) AM_WRITE(rom_dmasrc_hi_w)
 	// DMA dest
-	AM_RANGE(0x007984, 0x007984) AM_WRITE(dmadst_lo_w)
-	AM_RANGE(0x007985, 0x007985) AM_WRITE(dmadst_hi_w)
+	AM_RANGE(0x007984, 0x007984) AM_WRITE(rom_dmadst_lo_w)
+	AM_RANGE(0x007985, 0x007985) AM_WRITE(rom_dmadst_hi_w)
 	// DMA length
-	AM_RANGE(0x007986, 0x007986) AM_WRITE(dmalen_lo_w)
-	AM_RANGE(0x007987, 0x007987) AM_WRITE(dmalen_hi_w)
-
-	//AM_RANGE(0x007a00, 0x007a00) AM_READNOP // startup (taitons1)
-	AM_RANGE(0x007a01, 0x007a01) AM_READ(xavix_7a01_r) AM_WRITENOP // startup (taitons1)
+	AM_RANGE(0x007986, 0x007986) AM_WRITE(rom_dmalen_lo_w)
+	AM_RANGE(0x007987, 0x007987) AM_WRITE(rom_dmalen_hi_w)
 
+	// GPIO stuff
+	AM_RANGE(0x007a00, 0x007a00) AM_READ(xavix_io_0_r)
+	AM_RANGE(0x007a01, 0x007a01) AM_READ(xavix_io_1_r) //AM_WRITENOP // startup (taitons1)
 	//AM_RANGE(0x007a02, 0x007a02) AM_WRITENOP // startup, gets set to 20, 7a00 is then also written with 20 
 	//AM_RANGE(0x007a03, 0x007a03) AM_READNOP AM_WRITENOP // startup (gets set to 84 which is the same as the bits checked on 7a01, possible port direction register?)
 
-	AM_RANGE(0x007a80, 0x007a80) AM_WRITENOP
+	//AM_RANGE(0x007a80, 0x007a80) AM_WRITENOP
 
 	//AM_RANGE(0x007b80, 0x007b80) AM_READNOP
-	AM_RANGE(0x007b81, 0x007b81) AM_WRITENOP
-	AM_RANGE(0x007b82, 0x007b82) AM_WRITENOP
+	//AM_RANGE(0x007b81, 0x007b81) AM_WRITENOP
+	//AM_RANGE(0x007b82, 0x007b82) AM_WRITENOP
 
-	AM_RANGE(0x007c02, 0x007c02) AM_WRITENOP // once
+	//AM_RANGE(0x007c01, 0x007c01) AM_RAM // r/w tested
+	//AM_RANGE(0x007c02, 0x007c02) AM_WRITENOP // once
 
-	AM_RANGE(0x007ff2, 0x007ff2) AM_WRITENOP
-	AM_RANGE(0x007ff3, 0x007ff3) AM_WRITENOP
-	AM_RANGE(0x007ff4, 0x007ff4) AM_WRITENOP
-	//AM_RANGE(0x007ff5, 0x007ff5) AM_READNOP
-	//AM_RANGE(0x007ff6, 0x007ff6) AM_READNOP
+	// this is a multiplication chip
+	AM_RANGE(0x007ff2, 0x007ff4) AM_WRITE(mult_param_w)
+	AM_RANGE(0x007ff5, 0x007ff6) AM_READ(mult_r)
 	
 	// maybe irq enable, written after below
 	AM_RANGE(0x007ff9, 0x007ff9) AM_WRITE(irq_enable_w)
@@ -529,13 +739,13 @@ ADDRESS_MAP_START(xavix_state::xavix_map)
 	AM_RANGE(0x007ffe, 0x007ffe) AM_WRITE(irq_vector1_lo_w)
 	AM_RANGE(0x007fff, 0x007fff) AM_WRITE(irq_vector1_hi_w)
 
-	AM_RANGE(0x008000, 0x7fffff) AM_ROM AM_REGION("bios", 0x008000) AM_MIRROR(0x800000) // rad_mtrk relies on rom mirroring
+//  rom is installed in init due to different rom sizes and mirroring required
+//	AM_RANGE(0x008000, 0x7fffff) AM_ROM AM_REGION("bios", 0x008000) AM_MIRROR(0x800000) // rad_mtrk relies on rom mirroring
 ADDRESS_MAP_END
 
 static INPUT_PORTS_START( xavix )
-	/* dummy active high structure */
-	PORT_START("SYSA")
-	PORT_DIPNAME( 0x01, 0x00, "SYSA" )
+	PORT_START("IN0")
+	PORT_DIPNAME( 0x01, 0x00, "IN0" )
 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
 	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
@@ -560,32 +770,59 @@ static INPUT_PORTS_START( xavix )
 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
 
-	/* dummy active low structure */
-	PORT_START("DSWA")
-	PORT_DIPNAME( 0x01, 0x01, "DSWA" )
-	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_START("IN1")
+	PORT_DIPNAME( 0x01, 0x00, "IN1" )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
+	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
+	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
+	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
+	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
+	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
+	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
+	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
+INPUT_PORTS_END
+
+/* Test mode lists the following
+
+  LED (on power button?)
+  Throttle Low
+  Throttle High
+  Reverse
+  NO2
+  Steering Left (4 positions)
+  Steering Right (4 positions)
+  Horn
+
+*/
+
+
+static INPUT_PORTS_START( rad_mtrk )
+	PORT_INCLUDE(xavix)
+
+	PORT_MODIFY("IN0")
+	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Nitro")
+	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Throttle High")
+	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Throttle Low")
+	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Reverse / Back")
+
+	PORT_MODIFY("IN1")
+	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Horn")
+	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) // some kind of 'power off' (fades screen to black, jumps to an infinite loop) maybe low battery condition or just the power button?
 INPUT_PORTS_END
 
 /* correct, 4bpp gfxs */
@@ -622,11 +859,24 @@ static const gfx_layout charlayout8bpp =
 	8*8*8
 };
 
+static const gfx_layout char16layout8bpp =
+{
+	16,16,
+	RGN_FRAC(1,1),
+	8,
+	{ STEP8(0,1) },
+	{ STEP16(0,8) },
+	{ STEP16(0,16*8) },
+	16*16*8
+};
+
+
 
 static GFXDECODE_START( xavix )
-	GFXDECODE_ENTRY( "bios", 0, charlayout,   0, 1 )
-	GFXDECODE_ENTRY( "bios", 0, char16layout, 0, 1 )
+	GFXDECODE_ENTRY( "bios", 0, charlayout,   0, 16 )
+	GFXDECODE_ENTRY( "bios", 0, char16layout, 0, 16 )
 	GFXDECODE_ENTRY( "bios", 0, charlayout8bpp, 0, 1 )
+	GFXDECODE_ENTRY( "bios", 0, char16layout8bpp, 0, 1 )
 GFXDECODE_END
 
 
@@ -636,15 +886,15 @@ void xavix_state::machine_start()
 
 void xavix_state::machine_reset()
 {
-	m_dmasrc_lo_data = 0;
-	m_dmasrc_md_data = 0;
-	m_dmasrc_hi_data = 0;
+	m_rom_dmasrc_lo_data = 0;
+	m_rom_dmasrc_md_data = 0;
+	m_rom_dmasrc_hi_data = 0;
 
-	m_dmadst_lo_data = 0;
-	m_dmadst_hi_data = 0;
+	m_rom_dmadst_lo_data = 0;
+	m_rom_dmadst_hi_data = 0;
 
-	m_dmalen_lo_data = 0;
-	m_dmalen_hi_data = 0;
+	m_rom_dmalen_lo_data = 0;
+	m_rom_dmalen_hi_data = 0;
 
 	m_irq_enable_data = 0;
 	m_irq_vector0_lo_data = 0;
@@ -692,7 +942,7 @@ MACHINE_CONFIG_START(xavix_state::xavix)
 	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
 	MCFG_SCREEN_UPDATE_DRIVER(xavix_state, screen_update)
 	MCFG_SCREEN_SIZE(32*8, 32*8)
-	MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1)
+	MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 28*8-1)
 	MCFG_SCREEN_PALETTE("palette")
 
 	MCFG_GFXDECODE_ADD("gfxdecode", "palette", xavix)
@@ -701,10 +951,18 @@ MACHINE_CONFIG_START(xavix_state::xavix)
 
 	/* sound hardware */
 	MCFG_SPEAKER_STANDARD_MONO("mono")
-//  MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/4)
-//  MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
+	// sound is PCM
 MACHINE_CONFIG_END
 
+DRIVER_INIT_MEMBER(xavix_state,xavix)
+{
+	m_rgnlen = memregion("bios")->bytes();
+	m_rgn = memregion("bios")->base();
+
+	// mirror the rom across the space
+	address_space &space = m_maincpu->space(AS_PROGRAM);
+	space.install_rom(0x8000, m_rgnlen, ((~(m_rgnlen-1))<<1)&0xffffff, m_rgn+0x8000);
+}
 
 /***************************************************************************
 
@@ -713,64 +971,85 @@ MACHINE_CONFIG_END
 ***************************************************************************/
 
 ROM_START( taitons1 )
-	ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 )
+	ROM_REGION( 0x200000, "bios", ROMREGION_ERASE00 )
 	ROM_LOAD( "taitonostalgia1.u3", 0x000000, 0x200000, CRC(25bd8c67) SHA1(a109cd2da6aa4596e3ca3abd1afce2d0001a473f) )
-	ROM_RELOAD(0x200000,0x200000)
-	ROM_RELOAD(0x400000,0x200000)
-	ROM_RELOAD(0x600000,0x200000)
+ROM_END
+
+ROM_START( rad_box )
+	ROM_REGION(0x200000, "bios", ROMREGION_ERASE00)
+	ROM_LOAD("boxing.bin", 0x000000, 0x200000, CRC(5cd40714) SHA1(165260228c029a9502ca0598c84c24fd9bdeaebe) )
 ROM_END
 
 ROM_START( rad_ping )
-	ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 )
+	ROM_REGION( 0x100000, "bios", ROMREGION_ERASE00 )
 	ROM_LOAD( "pingpong.bin", 0x000000, 0x100000, CRC(629f7f47) SHA1(2bb19fd202f1e6c319d2f7d18adbfed8a7669235) )
-	ROM_RELOAD(0x100000,0x100000)
-	ROM_RELOAD(0x200000,0x100000)
-	ROM_RELOAD(0x300000,0x100000)
-	ROM_RELOAD(0x400000,0x100000)
-	ROM_RELOAD(0x500000,0x100000)
-	ROM_RELOAD(0x600000,0x100000)
-	ROM_RELOAD(0x700000,0x100000)
 ROM_END
 
-ROM_START( rad_mtrk )
-	ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 )
-	ROM_LOAD( "monstertruck.bin", 0x000000, 0x400000, CRC(dccda0a7) SHA1(7953cf29643672f8367639555b797c20bb533eab) )
-	ROM_RELOAD(0x400000,0x400000)
+ROM_START( rad_crdn )
+	ROM_REGION( 0x100000, "bios", ROMREGION_ERASE00 )
+	ROM_LOAD( "cardnight.bin", 0x000000, 0x100000, CRC(d19eba08) SHA1(cedb9fe785f2a559f518a1d8ecf80d500ddc63c7) )
 ROM_END
 
 ROM_START( rad_bb2 )
-	ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 )
+	ROM_REGION( 0x200000, "bios", ROMREGION_ERASE00 )
 	ROM_LOAD( "baseball2.bin", 0x000000, 0x200000, CRC(bdbf6202) SHA1(18d5cc2d77cbb734629a7a5b6e0f419d21beedbd) )
-	ROM_RELOAD(0x200000,0x200000)
-	ROM_RELOAD(0x400000,0x200000)
-	ROM_RELOAD(0x600000,0x200000)
 ROM_END
 
+ROM_START( rad_mtrk )
+	ROM_REGION( 0x400000, "bios", ROMREGION_ERASE00 )
+	ROM_LOAD( "monstertruck.bin", 0x000000, 0x400000, CRC(dccda0a7) SHA1(7953cf29643672f8367639555b797c20bb533eab) )
+ROM_END
+
+ROM_START( eka_strt )
+	ROM_REGION( 0x080000, "bios", ROMREGION_ERASE00 )
+	ROM_LOAD( "ekarastartcart.bin", 0x000000, 0x080000, CRC(8c12c0c2) SHA1(8cc1b098894af25a4bfccada884125b66f5fe8b2) )
+ROM_END
+
+/* Standalone TV Games */
+
+CONS( 2006, taitons1,  0,   0,  xavix,  xavix,   xavix_state, xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON )
+
+CONS( 2000, rad_ping,  0,   0,  xavix,  xavix,    xavix_state, xavix, "Radica / SSD Company LTD / Simmer Technology", "Play TV Ping Pong", MACHINE_IS_SKELETON ) // "Simmer Technology" is also known as "Hummer Technology Co., Ltd"
+CONS( 2003, rad_mtrk,  0,   0,  xavix,  rad_mtrk, xavix_state, xavix, "Radica / SSD Company LTD",                     "Play TV Monster Truck", MACHINE_IS_SKELETON )
+CONS( 200?, rad_box,   0,   0,  xavix,  xavix,    xavix_state, xavix, "Radica / SSD Company LTD",                     "Play TV Boxing", MACHINE_IS_SKELETON)
+CONS( 200?, rad_crdn,  0,   0,  xavix,  xavix,    xavix_state, xavix, "Radica / SSD Company LTD",                     "Play TV Card Night", MACHINE_IS_SKELETON)
+CONS( 2002, rad_bb2,   0,   0,  xavix,  xavix,    xavix_state, xavix, "Radica / SSD Company LTD",                     "Play TV Baseball 2", MACHINE_IS_SKELETON ) // contains string "Radica RBB2 V1.0"
+
+CONS (200?, eka_strt,  0,   0,  xavix,  xavix,    xavix_state, xavix, "Takara / SSD Company LTD",                     "e-kara Starter", MACHINE_IS_SKELETON)
+
+/* The 'XaviXPORT' isn't a real console, more of a TV adapter, all the actual hardware (CPU including video hw, sound hw) is in the cartridges and controllers
+   and can vary between games, see notes at top of driver.
+
+   According to sources XaviX Tennis should be a standard XaviX CPU, but at the very least makes significantly more use of custom opcodes than the above titles
+   which only appears to use the call far / return far for extended memory space.
+   
+   Furthermore it also seems to require some regular 6502 opcodes to be replaced with custom ones, yet the other games expect these to act normally.  This
+   leads me to believe that XaviX Tennis is almost certainly a Super XaviX title.
+
+   The CPU die on XaviX Tennis is internally marked as NEC 85054-611 and is very different to thw two below
+
+   Radica Monster truck die is marked SSD PL7351 with SSD98 also printed on the die
+   Radia Ping Pong      die is marked SSD PA7270 with SSD97 also printed on the die (otherwise looks identical to Monster Truck)
+	
+   Star Wars Saga Edition also seems to be making use of additional opcodes, meaning it could also be Super Xavix, or something in-between (unless they're
+   caused by the bad dump, but it looks intentional)
+
+*/
+
 ROM_START( xavtenni )
 	ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 )
 	ROM_LOAD( "xavixtennis.bin", 0x000000, 0x800000, CRC(23a1d918) SHA1(2241c59e8ea8328013e55952ebf9060ea0a4675b) )
 ROM_END
 
-/* Standalone TV Games */
 
-CONS( 2006, taitons1,  0,   0,  xavix,  xavix, xavix_state, 0, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON )
-
-CONS( 2000, rad_ping,  0,   0,  xavix,  xavix, xavix_state, 0, "Radica / SSD Company LTD / Simmer Technology", "Play TV Ping Pong", MACHINE_IS_SKELETON ) // "Simmer Technology" is also known as "Hummer Technology Co., Ltd"
-CONS( 2003, rad_mtrk,  0,   0,  xavix,  xavix, xavix_state, 0, "Radica / SSD Company LTD",                     "Play TV Monster Truck", MACHINE_IS_SKELETON )
-CONS( 2002, rad_bb2,   0,   0,  xavix,  xavix, xavix_state, 0, "Radica / SSD Company LTD",                     "Play TV Baseball 2", MACHINE_IS_SKELETON ) // contains string "Radica RBB2 V1.0"
-
-/* The 'XaviXPORT' isn't a real console, more of a TV adapter, all the actual hardware (CPU including video hw, sound hw) is in the cartridges and controllers
-   and can vary between games, see notes at top of driver.
-
-   According to sources XaviX Tennis should be a standard XaviX CPU, but at the very least makes significantly more use of custom opcodes than all the other
-   games which only use the call far / return far for extended memory space.
-   
-   Furthermore it also seems to require some regular 6502 opcodes to be replaced with custom ones, yet the other games expect these to act normally.  This
-   leads me to believe that XaviX Tennis is more likely to be a Super XaviX title.
-
-   The CPU die on XaviX Tennis is internally marked as NEC 85054-611
-
-*/
-CONS( 2004, xavtenni,  0,   0,  xavix,  xavix, xavix_state, 0, "SSD Company LTD", "XaviX Tennis (XaviXPORT)", MACHINE_IS_SKELETON )
+ROM_START( ttv_sw )
+	ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 )
+	// wasn't giving consistent reads
+	ROM_LOAD( "jedibad.bin", 0x000000, 0x800000, BAD_DUMP CRC(a12862fe) SHA1(9b5a07bdf35f72f2e2d127de5e6849ce5fa2afa0) )
+ROM_END
+
+
+CONS( 2004, xavtenni,  0,   0,  xavix,  xavix, xavix_state, xavix, "SSD Company LTD",         "XaviX Tennis (XaviXPORT)", MACHINE_IS_SKELETON )
+CONS( 2005, ttv_sw,    0,   0,  xavix,  xavix, xavix_state, xavix, "Tiger / SSD Company LTD", "Star Wars Saga Edition - Lightsaber Battle Game", MACHINE_IS_SKELETON )
 
 
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 9e655c5156f..d33a0579699 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -38954,10 +38954,14 @@ xsleenaj                        // TA-0019 (c) 1986
 
 @source:xavix.cpp
 taitons1                        //
-xavtenni                        //
 rad_ping                        //
 rad_mtrk                        //
 rad_bb2                         //
+rad_box                         //
+rad_crdn                        //
+eka_strt                        //
+xavtenni                        //
+ttv_sw                          //
 
 @source:xbox.cpp
 xbox                            //