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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
palm: improve interrupt handling
* fix debugger register access * consolidate internal state * add ros selection and bus out callbacks * add internal control instruction handler
This commit is contained in:
Patrick Mackinlay
parent
8203e170a1
commit
34b7c397c1
@ -8,7 +8,7 @@
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* - IBM 5100 Maintenance Information Manual, SY31-0405-3, Fourth Edition (October 1979), International Business Machines Corporation
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*
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* TODO:
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* - machine check/interrupts
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* - machine check
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* - instruction timing
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*/
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@ -30,6 +30,8 @@ template <typename T, typename U, typename V> constexpr T IBIT(T x, U n, V w)
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return BIT(x, sizeof(T) * 8 - n - w, w);
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}
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static u8 constexpr il_priority[] = { 0, 1, 2, 2, 3, 3, 3, 3 };
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DEFINE_DEVICE_TYPE(PALM, palm_device, "palm", "IBM PALM")
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palm_device::palm_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
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@ -38,29 +40,41 @@ palm_device::palm_device(machine_config const &mconfig, char const *tag, device_
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, m_rws_config("rws", ENDIANNESS_BIG, 16, 16)
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, m_ioc_config("ioc", ENDIANNESS_BIG, 8, 4)
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, m_iod_config("iod", ENDIANNESS_BIG, 8, 4)
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, m_getb_bus(*this)
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, m_select_ros(*this)
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, m_icount(0)
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, m_r{}
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, m_il(0)
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, m_il_pending(0)
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, m_irpt_req(0)
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{
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}
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enum ff_mask : u8
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{
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FF_IPL = 0x80, // initial program load
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FF_MSS = 0x40, // microprogram storage switch
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FF_IE = 0x08, // interrupt enable
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FF_IR3 = 0x04, // interrupt request 3
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FF_IR2 = 0x02, // interrupt request 2
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FF_IR1 = 0x01, // interrupt request 1
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FF_IR = 0x07, // interrupt request
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};
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void palm_device::device_start()
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{
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set_icountptr(m_icount);
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state_add(STATE_GENPC, "GENPC", m_r[m_il][0]).mask(0xfffe).noshow();
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state_add(STATE_GENPCBASE, "CURPC", m_r[m_il][0]).mask(0xfffe);
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state_add(STATE_GENPC, "GENPC", m_pc).noshow();
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state_add<u16>(STATE_GENPCBASE, "CURPC", [this]() { return m_r[m_il][0] & 0xfffeU; });
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state_add(0, "IL", m_il);
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for (unsigned i = 0; i < std::size(m_r[m_il]); i++)
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state_add(i + 1, util::string_format("R%d", i).c_str(), m_r[m_il][i]);
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state_add<u16>(i + 1, util::string_format("R%d", i).c_str(), [this, i]() { return m_r[m_il][i]; }, [this, i](u16 data) { m_r[m_il][i] = data; });
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save_item(NAME(m_pc));
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save_item(NAME(m_r));
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save_item(NAME(m_il));
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save_item(NAME(m_il_pending));
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save_item(NAME(m_irpt_req));
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save_item(NAME(m_ff));
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space(AS_ROS).specific(m_ros);
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space(AS_RWS).specific(m_rws);
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@ -72,10 +86,13 @@ void palm_device::device_reset()
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{
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space(AS_RWS).install_ram(0, sizeof(m_r) - 1, m_r);
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m_il = 0;
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// select instruction source
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m_ff = FF_IPL | FF_MSS;
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m_select_ros((m_ff & FF_MSS) && !(m_ff & FF_IPL));
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// read initial PC from ROS
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m_r[m_il][0] = m_ros.read_word(0);
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m_il = 0;
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m_pc = m_r[m_il][0] = m_ros.read_word(0);
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}
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#define Rx r[IBIT(op, 4, 4)]
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@ -88,13 +105,14 @@ void palm_device::execute_run()
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{
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while (m_icount > 0)
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{
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// immediately switch to highest pending interrupt level
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if (m_il != m_il_pending)
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// handle pending interrupts
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u8 const il = il_priority[m_ff & FF_IR];
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if ((m_ff & FF_IE) && m_il != il)
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{
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m_il = m_il_pending;
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m_il = il;
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// notify the debugger
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if (m_il && machine().debug_flags & DEBUG_FLAG_ENABLED)
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if (m_il && (machine().debug_flags & DEBUG_FLAG_ENABLED))
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debug()->interrupt_hook(m_il - 1, m_r[m_il][0] & ~1);
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}
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@ -133,7 +151,13 @@ void palm_device::execute_run()
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case 0xf: Ry += (7 - count_leading_ones_32(u32(m_iod.read_byte(DA)) << 24)) * 2; break; // get to register and add
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}
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break;
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case 0x1: m_ioc.write_byte(DA, IMM); break; // control
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case 0x1:
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// control
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if (DA == 0)
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control(IMM);
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m_ioc.write_byte(DA, IMM);
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break;
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case 0x2: Rx = m_rws.read_word(IMM * 2); break; // load halfword direct
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case 0x3: m_rws.write_word(IMM * 2, Rx); break; // store halfword direct
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case 0x4:
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@ -185,6 +209,8 @@ void palm_device::execute_run()
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}
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else
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{
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m_getb_bus(DA, Ry);
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if (MOD < 0xc)
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{
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// get byte
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@ -201,13 +227,12 @@ void palm_device::execute_run()
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// TODO: average instruction time quoted as 1.75µs (~27 machine cycles)
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m_icount -= 27;
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m_pc = r[0];
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}
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}
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void palm_device::execute_set_input(int irqline, int state)
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{
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u8 const il_priority[] = { 0, 1, 2, 3, 3, 3, 3, 3 };
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switch (irqline)
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{
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case INPUT_LINE_NMI:
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@ -217,12 +242,9 @@ void palm_device::execute_set_input(int irqline, int state)
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default:
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// interrupt lines are active low
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if (!state)
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m_irpt_req |= 1U << irqline;
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m_ff |= 1U << irqline;
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else
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m_irpt_req &= ~(1U << irqline);
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// update pending interrupt level
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m_il_pending = il_priority[m_irpt_req & 7];
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m_ff &= ~(1U << irqline);
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break;
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}
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}
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@ -278,3 +300,31 @@ s16 palm_device::modifier(unsigned const modifier) const
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else
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return 0;
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}
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void palm_device::control(u8 data)
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{
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LOG("control 0x%02x (%s)\n", data, machine().describe_context());
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// 0 reset controller errors
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// 1: 0=disable interrupts
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// 2: 0=enable interrupts
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if (!IBIT(data, 1))
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m_ff &= ~FF_IE;
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else if (!IBIT(data, 2))
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m_ff |= FF_IE;
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// TODO: 3 not used?
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// 4 not used (0:display & select frame on)
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// 5 state transition
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if (!IBIT(data, 5))
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{
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m_ff &= ~FF_IPL;
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m_ff ^= FF_MSS;
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m_select_ros((m_ff & FF_MSS) && !(m_ff & FF_IPL));
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}
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// TODO: 6..7 not used (frame bit #1,2?)
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}
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@ -20,6 +20,9 @@ public:
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static unsigned constexpr AS_IOC = AS_IO;
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static unsigned constexpr AS_IOD = 4;
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auto getb_bus() { return m_getb_bus.bind(); }
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auto select_ros() { return m_select_ros.bind(); }
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palm_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
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protected:
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@ -43,6 +46,8 @@ protected:
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bool condition(unsigned const modifier, u16 const data, u8 const mask) const;
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s16 modifier(unsigned const modifier) const;
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void control(u8 data);
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private:
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// address spaces
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address_space_config const m_ros_config;
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@ -55,13 +60,16 @@ private:
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memory_access<4, 0, 0, ENDIANNESS_BIG>::specific m_ioc;
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memory_access<4, 0, 0, ENDIANNESS_BIG>::specific m_iod;
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devcb_write8 m_getb_bus;
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devcb_write_line m_select_ros;
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// mame state
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int m_icount;
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u16 m_pc;
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u16 m_r[4][16]; // registers
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u8 m_il; // interrupt level
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u8 m_il_pending; // pending interrupt level
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u8 m_irpt_req; // interrupt line state
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u8 m_ff; // controller flip-flops
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};
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DECLARE_DEVICE_TYPE(PALM, palm_device)
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