mirror of
https://github.com/holub/mame
synced 2025-07-05 18:08:04 +03:00
(MESS) unior : added PIT and UART devices, and sound.
This commit is contained in:
parent
a66b49c9ab
commit
34ba472e45
@ -4,6 +4,7 @@
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2009-05-12 Skeleton driver.
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2009-05-12 Skeleton driver.
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2013-10-09 Added DMA and CRTC
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2013-10-09 Added DMA and CRTC
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2013-10-11 Added PPI, PIT, UART, sound
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Some info obtained from EMU-80.
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Some info obtained from EMU-80.
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The schematic is difficult to read, and some code is guesswork.
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The schematic is difficult to read, and some code is guesswork.
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@ -12,6 +13,8 @@ The monitor will only allow certain characters to be typed, thus the
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modifier keys appear to do nothing. There is no need to use the enter
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modifier keys appear to do nothing. There is no need to use the enter
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key; using spacebar and the correct parameters is enough.
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key; using spacebar and the correct parameters is enough.
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If you press Shift, indicators for numlock and capslock will appear.
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Monitor commands:
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Monitor commands:
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C
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C
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D - hex dump
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D - hex dump
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@ -26,18 +29,19 @@ L - list registers
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M
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M
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ToDo:
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ToDo:
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- Some devices
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- Cassette
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- Beeper (requires a timer chip)
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- Colour
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- Cassette (requires a UART)
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- Colour?
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****************************************************************************/
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****************************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "cpu/i8085/i8085.h"
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#include "cpu/i8085/i8085.h"
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#include "machine/i8251.h"
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#include "machine/pit8253.h"
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#include "machine/i8255.h"
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#include "machine/i8255.h"
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#include "machine/8257dma.h"
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#include "machine/8257dma.h"
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#include "video/i8275.h"
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#include "video/i8275.h"
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#include "sound/speaker.h"
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class unior_state : public driver_device
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class unior_state : public driver_device
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@ -46,11 +50,12 @@ public:
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unior_state(const machine_config &mconfig, device_type type, const char *tag)
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unior_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_maincpu(*this, "maincpu")
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, m_pit(*this, "pit")
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, m_dma(*this, "dma")
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, m_dma(*this, "dma")
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{ }
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{ }
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DECLARE_WRITE8_MEMBER(vram_w);
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DECLARE_WRITE8_MEMBER(vram_w);
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DECLARE_WRITE8_MEMBER(unior_50_w);
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DECLARE_WRITE8_MEMBER(scroll_w);
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DECLARE_READ8_MEMBER(ppi0_b_r);
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DECLARE_READ8_MEMBER(ppi0_b_r);
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DECLARE_WRITE8_MEMBER(ppi0_b_w);
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DECLARE_WRITE8_MEMBER(ppi0_b_w);
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DECLARE_READ8_MEMBER(ppi1_a_r);
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DECLARE_READ8_MEMBER(ppi1_a_r);
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@ -69,21 +74,10 @@ private:
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virtual void machine_reset();
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virtual void machine_reset();
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virtual void video_start();
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virtual void video_start();
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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required_device<pit8253_device> m_pit;
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required_device<i8257_device> m_dma;
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required_device<i8257_device> m_dma;
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};
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};
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WRITE8_MEMBER( unior_state::vram_w )
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{
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m_p_vram[offset] = data;
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}
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// pulses a 1 to scroll
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WRITE8_MEMBER( unior_state::unior_50_w )
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{
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if (data)
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memcpy(m_p_vram, m_p_vram+80, 24*80);
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}
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static ADDRESS_MAP_START( unior_mem, AS_PROGRAM, 8, unior_state )
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static ADDRESS_MAP_START( unior_mem, AS_PROGRAM, 8, unior_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0xf7ff) AM_RAM
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AM_RANGE(0x0000, 0xf7ff) AM_RAM
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@ -96,10 +90,11 @@ static ADDRESS_MAP_START( unior_io, AS_IO, 8, unior_state )
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AM_RANGE(0x30, 0x38) AM_DEVREADWRITE("dma", i8257_device, i8257_r, i8257_w) // dma data
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AM_RANGE(0x30, 0x38) AM_DEVREADWRITE("dma", i8257_device, i8257_r, i8257_w) // dma data
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AM_RANGE(0x3c, 0x3f) AM_DEVREADWRITE("ppi0", i8255_device, read, write) // cassette player control
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AM_RANGE(0x3c, 0x3f) AM_DEVREADWRITE("ppi0", i8255_device, read, write) // cassette player control
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AM_RANGE(0x4c, 0x4f) AM_DEVREADWRITE("ppi1", i8255_device, read, write)
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AM_RANGE(0x4c, 0x4f) AM_DEVREADWRITE("ppi1", i8255_device, read, write)
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AM_RANGE(0x50, 0x50) AM_WRITE(unior_50_w)
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AM_RANGE(0x50, 0x50) AM_WRITE(scroll_w)
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AM_RANGE(0x60, 0x61) AM_DEVREADWRITE("crtc", i8275_device, read, write)
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AM_RANGE(0x60, 0x61) AM_DEVREADWRITE("crtc", i8275_device, read, write)
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AM_RANGE(0xdc, 0xdf) AM_NOP // timer chip + beeper
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AM_RANGE(0xdc, 0xdf) AM_DEVREADWRITE("pit", pit8253_device, read, write )
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AM_RANGE(0xec, 0xed) AM_NOP // cassette data to&from UART
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AM_RANGE(0xec, 0xec) AM_DEVREADWRITE("uart",i8251_device, data_r, data_w)
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AM_RANGE(0xed, 0xed) AM_DEVREADWRITE("uart", i8251_device, status_r, control_w)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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/* Input ports */
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/* Input ports */
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@ -216,17 +211,11 @@ static INPUT_PORTS_START( unior )
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INPUT_PORTS_END
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INPUT_PORTS_END
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void unior_state::machine_reset()
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/*************************************************
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{
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m_maincpu->set_state_int(I8085_PC, 0xF800);
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}
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void unior_state::video_start()
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Video
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{
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m_p_chargen = memregion("chargen")->base();
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m_p_vram = memregion("vram")->base();
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}
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*************************************************/
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/* F4 Character Displayer */
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/* F4 Character Displayer */
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static const gfx_layout unior_charlayout =
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static const gfx_layout unior_charlayout =
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@ -246,6 +235,18 @@ static GFXDECODE_START( unior )
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GFXDECODE_ENTRY( "chargen", 0x0000, unior_charlayout, 0, 1 )
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GFXDECODE_ENTRY( "chargen", 0x0000, unior_charlayout, 0, 1 )
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GFXDECODE_END
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GFXDECODE_END
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WRITE8_MEMBER( unior_state::vram_w )
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{
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m_p_vram[offset] = data;
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}
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// pulses a 1 to scroll
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WRITE8_MEMBER( unior_state::scroll_w )
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{
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if (data)
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memcpy(m_p_vram, m_p_vram+80, 24*80);
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}
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static I8275_DISPLAY_PIXELS(display_pixels)
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static I8275_DISPLAY_PIXELS(display_pixels)
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{
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{
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unior_state *state = device->machine().driver_data<unior_state>();
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unior_state *state = device->machine().driver_data<unior_state>();
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@ -264,7 +265,7 @@ static I8275_DISPLAY_PIXELS(display_pixels)
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bitmap.pix32(y, x + i) = palette[BIT(gfx, 5-i) ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x + i) = palette[BIT(gfx, 5-i) ? (hlgt ? 2 : 1) : 0];
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}
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}
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static const i8275_interface i8275_intf =
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static const i8275_interface crtc_intf =
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{
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{
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6,
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6,
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0,
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0,
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@ -287,6 +288,41 @@ PALETTE_INIT_MEMBER(unior_state,unior)
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palette_set_colors(machine(), 0, unior_palette, ARRAY_LENGTH(unior_palette));
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palette_set_colors(machine(), 0, unior_palette, ARRAY_LENGTH(unior_palette));
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}
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}
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/*************************************************
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i8253
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*************************************************/
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static const struct pit8253_interface pit_intf =
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{
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{
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{
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XTAL_20MHz / 9, // unknown frequency
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DEVCB_LINE_VCC,
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DEVCB_NULL // looks like vertical or horizontal sync pulses
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},
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{
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XTAL_16MHz / 9, // unknown frequency
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DEVCB_LINE_VCC,
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DEVCB_NULL // UART transmit/receive clock
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},
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{
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XTAL_16MHz / 9 / 64, // unknown frequency
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DEVCB_NULL,
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DEVCB_DEVICE_LINE_MEMBER("speaker", speaker_sound_device, level_w)
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}
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}
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};
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/*************************************************
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i8255
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*************************************************/
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READ8_MEMBER( unior_state::ppi0_b_r )
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READ8_MEMBER( unior_state::ppi0_b_r )
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{
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{
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return 0;
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return 0;
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@ -331,7 +367,7 @@ WRITE8_MEMBER( unior_state::ppi1_a_w )
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/*
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/*
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d0,1,2 = connect to what might be a 74LS138, then to an external slot
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d0,1,2 = connect to what might be a 74LS138, then to an external slot
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d4 = unknown
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d4 = speaker gate
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d5 = unknown
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d5 = unknown
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d6 = connect to A7 of the palette prom
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d6 = connect to A7 of the palette prom
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d7 = not used
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d7 = not used
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@ -339,6 +375,7 @@ d7 = not used
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WRITE8_MEMBER( unior_state::ppi1_c_w )
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WRITE8_MEMBER( unior_state::ppi1_c_w )
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{
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{
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m_4e = data;
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m_4e = data;
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m_pit->gate2_w(BIT(data, 4));
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}
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}
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// ports a & b are for the keyboard
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// ports a & b are for the keyboard
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@ -353,6 +390,13 @@ static I8255A_INTERFACE( ppi1_intf )
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DEVCB_DRIVER_MEMBER(unior_state, ppi1_c_w),
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DEVCB_DRIVER_MEMBER(unior_state, ppi1_c_w),
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};
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};
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/*************************************************
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i8257
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*************************************************/
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READ8_MEMBER(unior_state::dma_r)
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READ8_MEMBER(unior_state::dma_r)
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{
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{
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if (offset < 0xf800)
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if (offset < 0xf800)
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@ -361,7 +405,7 @@ READ8_MEMBER(unior_state::dma_r)
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return m_p_vram[offset & 0x7ff];
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return m_p_vram[offset & 0x7ff];
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}
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}
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static I8257_INTERFACE( i8257_intf )
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static I8257_INTERFACE( dma_intf )
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{
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{
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DEVCB_CPU_INPUT_LINE("maincpu", I8085_HALT),
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DEVCB_CPU_INPUT_LINE("maincpu", I8085_HALT),
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DEVCB_NULL,
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DEVCB_NULL,
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@ -377,6 +421,24 @@ WRITE8_MEMBER( unior_state::cpu_status_callback )
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m_dma->i8257_hlda_w(BIT(data, 3));
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m_dma->i8257_hlda_w(BIT(data, 3));
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}
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}
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/*************************************************
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Machine
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*************************************************/
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void unior_state::machine_reset()
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{
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m_maincpu->set_state_int(I8085_PC, 0xF800);
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}
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void unior_state::video_start()
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{
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m_p_chargen = memregion("chargen")->base();
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m_p_vram = memregion("vram")->base();
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}
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static MACHINE_CONFIG_START( unior, unior_state )
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static MACHINE_CONFIG_START( unior, unior_state )
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/* basic machine hardware */
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu",I8080, XTAL_20MHz / 9) // unknown clock
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MCFG_CPU_ADD("maincpu",I8080, XTAL_20MHz / 9) // unknown clock
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@ -395,10 +457,18 @@ static MACHINE_CONFIG_START( unior, unior_state )
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MCFG_PALETTE_LENGTH(3)
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MCFG_PALETTE_LENGTH(3)
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MCFG_PALETTE_INIT_OVERRIDE(unior_state,unior)
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MCFG_PALETTE_INIT_OVERRIDE(unior_state,unior)
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/* sound hardware */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
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/* Devices */
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MCFG_I8251_ADD("uart", default_i8251_interface)
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MCFG_PIT8253_ADD( "pit", pit_intf )
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MCFG_I8255_ADD( "ppi0", ppi0_intf )
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MCFG_I8255_ADD( "ppi0", ppi0_intf )
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MCFG_I8255_ADD( "ppi1", ppi1_intf )
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MCFG_I8255_ADD( "ppi1", ppi1_intf )
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MCFG_I8257_ADD("dma", XTAL_20MHz / 9, i8257_intf) // unknown clock
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MCFG_I8257_ADD("dma", XTAL_20MHz / 9, dma_intf) // unknown clock
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MCFG_I8275_ADD("crtc", i8275_intf)
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MCFG_I8275_ADD("crtc", crtc_intf)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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/* ROM definition */
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/* ROM definition */
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@ -408,6 +478,7 @@ ROM_START( unior )
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ROM_REGION( 0x0840, "chargen", ROMREGION_ERASEFF )
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ROM_REGION( 0x0840, "chargen", ROMREGION_ERASEFF )
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ROM_LOAD( "unior.fnt", 0x0000, 0x0800, CRC(4f654828) SHA1(8c0ac11ea9679a439587952e4908940b67c4105e))
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ROM_LOAD( "unior.fnt", 0x0000, 0x0800, CRC(4f654828) SHA1(8c0ac11ea9679a439587952e4908940b67c4105e))
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// according to schematic this should be 256 bytes
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ROM_LOAD( "palette.rom", 0x0800, 0x0040, CRC(b4574ceb) SHA1(f7a82c61ab137de8f6a99b0c5acf3ac79291f26a))
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ROM_LOAD( "palette.rom", 0x0800, 0x0040, CRC(b4574ceb) SHA1(f7a82c61ab137de8f6a99b0c5acf3ac79291f26a))
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ROM_REGION( 0x0800, "vram", ROMREGION_ERASEFF )
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ROM_REGION( 0x0800, "vram", ROMREGION_ERASEFF )
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@ -415,5 +486,5 @@ ROM_END
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/* Driver */
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/* Driver */
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/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP( 19??, unior, radio86, 0, unior, unior, driver_device, 0, "<unknown>", "Unior", GAME_NOT_WORKING | GAME_NO_SOUND)
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COMP( 19??, unior, radio86, 0, unior, unior, driver_device, 0, "<unknown>", "Unior", GAME_NOT_WORKING )
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