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vrc5074: Added save states. (nw)

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This commit is contained in:
Ted Green 2017-05-13 14:46:00 -06:00
parent d49614158d
commit 3553a7bf42
3 changed files with 7 additions and 37 deletions
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37
src/devices/machine/vrc5074.cpp
View File

@ -33,11 +33,6 @@ DEVICE_ADDRESS_MAP_START(target1_map, 32, vrc5074_device)
AM_RANGE(0x00000000, 0xFFFFFFFF) AM_READWRITE( target1_r, target1_w)
ADDRESS_MAP_END
// Target Window 2 map
DEVICE_ADDRESS_MAP_START(target2_map, 32, vrc5074_device)
AM_RANGE(0x00000000, 0xFFFFFFFF) AM_READWRITE( target2_r, target2_w)
ADDRESS_MAP_END
vrc5074_device::vrc5074_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_host_device(mconfig, VRC5074, "NEC VRC5074 System Controller", tag, owner, clock, "vrc5074", __FILE__),
m_cpu_space(nullptr), m_cpu(nullptr), cpu_tag(nullptr),
@ -116,16 +111,13 @@ void vrc5074_device::device_start()
m_timer[3] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vrc5074_device::nile_timer_callback), this));
// Save states
// m_ram
//save_pointer(NAME(m_ram.data()), m_ram_size / 4);
// m_simm
//save_pointer(NAME(m_simm[0].data()), m_simm0_size / 4);
//save_item(NAME(m_cpu_regs));
//save_item(NAME(m_pci1_laddr));
//save_item(NAME(m_pci2_laddr));
//save_item(NAME(m_pci_io_laddr));
//save_item(NAME(m_target1_laddr));
//save_item(NAME(m_target2_laddr));
// m_sdram
save_pointer(NAME(m_sdram[0].data()), m_sdram_size[0] / 4);
save_pointer(NAME(m_sdram[1].data()), m_sdram_size[1] / 4);
save_item(NAME(m_cpu_regs));
save_item(NAME(m_serial_regs));
save_item(NAME(m_nile_irq_state));
save_item(NAME(m_sdram_addr));
machine().save().register_postload(save_prepost_delegate(FUNC(vrc5074_device::postload), this));
}
@ -467,21 +459,6 @@ WRITE32_MEMBER (vrc5074_device::target1_w)
logerror("%08X:nile target1 write to offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, data, mem_mask);
}
// PCI Target Window 2
READ32_MEMBER (vrc5074_device::target2_r)
{
uint32_t result = m_cpu->space(AS_PROGRAM).read_dword(m_target2_laddr | (offset*4), mem_mask);
if (LOG_NILE_TARGET)
logerror("%08X:nile target2 read from offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc5074_device::target2_w)
{
m_cpu->space(AS_PROGRAM).write_dword(m_target2_laddr | (offset*4), data, mem_mask);
if (LOG_NILE_TARGET)
logerror("%08X:nile target2 write to offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, data, mem_mask);
}
// DMA Transfer
TIMER_CALLBACK_MEMBER (vrc5074_device::dma_transfer)
{

5
src/devices/machine/vrc5074.h
View File

@ -168,10 +168,6 @@ public:
DECLARE_READ32_MEMBER (target1_r);
DECLARE_WRITE32_MEMBER(target1_w);
virtual DECLARE_ADDRESS_MAP(target2_map, 32);
DECLARE_READ32_MEMBER (target2_r);
DECLARE_WRITE32_MEMBER(target2_w);
protected:
address_space *m_cpu_space;
virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override;
@ -209,7 +205,6 @@ private:
void setup_pci_space(void);
uint32_t m_pci_laddr[2], m_pci_mask[2], m_pci_type[2];
uint32_t m_target1_laddr, m_target2_laddr;
uint32_t m_sdram_addr[2];
};

2
src/mame/drivers/vegas.cpp
View File

@ -340,7 +340,6 @@ public:
uint8_t m_pending_analog_read;
uint8_t m_cmos_unlocked;
uint8_t m_dcs_idma_cs;
int m_count;
DECLARE_WRITE_LINE_MEMBER(vblank_assert);
DECLARE_DRIVER_INIT(gauntleg);
@ -421,7 +420,6 @@ void vegas_state::machine_start()
save_item(NAME(m_sio_led_state));
save_item(NAME(m_pending_analog_read));
save_item(NAME(m_cmos_unlocked));
//machine().save().register_postload(save_prepost_delegate(FUNC(vegas_state::remap_dynamic_addresses), this));
}