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Eliminated osd_cpu.h.

Browse Source 
Types are pretty much unified now.
Multiply operations are handled by eminline.h.
Divide operations were just silly in macros.
64/32-bit combination/extraction macros moved to osdcomm.h and renamed.

Also fixed compile errors in recent 68k changes.
This commit is contained in:
Aaron Giles 2009-10-12 08:37:04 +00:00
parent 90eca88290
commit 357e36fc84
17 changed files with 53 additions and 241 deletions
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2
.gitattributes vendored
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@ -3668,7 +3668,6 @@ src/osd/osdmini/minimisc.c svneol=native#text/plain
src/osd/osdmini/minisync.c svneol=native#text/plain
src/osd/osdmini/minitime.c svneol=native#text/plain
src/osd/osdmini/miniwork.c svneol=native#text/plain
src/osd/osdmini/osd_cpu.h svneol=native#text/plain
src/osd/osdmini/osdmini.mak svneol=native#text/plain
src/osd/windows/d3d8intf.c svneol=native#text/plain
src/osd/windows/d3d9intf.c svneol=native#text/plain
@ -3688,7 +3687,6 @@ src/osd/windows/main.c svneol=native#text/plain
src/osd/windows/mame.man svneol=CRLF#text/plain eol=crlf
src/osd/windows/mame.rc svneol=CRLF#text/plain eol=crlf
src/osd/windows/multidef.h svneol=native#text/plain
src/osd/windows/osd_cpu.h svneol=native#text/plain
src/osd/windows/osinline.h svneol=native#text/plain
src/osd/windows/output.c svneol=native#text/plain
src/osd/windows/output.h svneol=native#text/plain

41
src/emu/cpu/e132xs/e132xs.c
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@ -215,7 +215,6 @@
#include "cpuexec.h"
#include "eminline.h"
#include "e132xs.h"
#include "osd_cpu.h"
#ifdef MAME_DEBUG
#define DEBUG_PRINTF(x) do { mame_printf_debug x; } while (0)
@ -1793,7 +1792,7 @@ INLINE void hyperstone_movd(hyperstone_state *cpustate, struct regs_decode *deco
SET_DREG(SREG);
SET_DREGF(SREGF);
tmp = COMBINE_U64_U32_U32(SREG, SREGF);
tmp = CONCAT_64(SREG, SREGF);
SET_Z( tmp == 0 ? 1 : 0 );
SET_N( SIGN_BIT(SREG) );
@ -1817,7 +1816,7 @@ INLINE void hyperstone_divu(hyperstone_state *cpustate, struct regs_decode *deco
{
UINT64 dividend;
dividend = COMBINE_U64_U32_U32(DREG, DREGF);
dividend = CONCAT_64(DREG, DREGF);
if( SREG == 0 )
{
@ -1866,7 +1865,7 @@ INLINE void hyperstone_divs(hyperstone_state *cpustate, struct regs_decode *deco
{
INT64 dividend;
dividend = (INT64) COMBINE_64_32_32(DREG, DREGF);
dividend = (INT64) CONCAT_64(DREG, DREGF);
if( SREG == 0 || (DREG & 0x80000000) )
{
@ -2535,7 +2534,7 @@ INLINE void hyperstone_shrdi(hyperstone_state *cpustate, struct regs_decode *dec
high_order = DREG;
low_order = DREGF;
val = COMBINE_U64_U32_U32(high_order, low_order);
val = CONCAT_64(high_order, low_order);
if( N_VALUE )
SET_C((val >> (N_VALUE - 1)) & 1);
@ -2544,8 +2543,8 @@ INLINE void hyperstone_shrdi(hyperstone_state *cpustate, struct regs_decode *dec
val >>= N_VALUE;
high_order = HI32_32_64(val);
low_order = LO32_32_64(val);
high_order = EXTRACT_64HI(val);
low_order = EXTRACT_64LO(val);
SET_DREG(high_order);
SET_DREGF(low_order);
@ -2571,7 +2570,7 @@ INLINE void hyperstone_shrd(hyperstone_state *cpustate, struct regs_decode *deco
high_order = DREG;
low_order = DREGF;
val = COMBINE_U64_U32_U32(high_order, low_order);
val = CONCAT_64(high_order, low_order);
if( n )
SET_C((val >> (n - 1)) & 1);
@ -2580,8 +2579,8 @@ INLINE void hyperstone_shrd(hyperstone_state *cpustate, struct regs_decode *deco
val >>= n;
high_order = HI32_32_64(val);
low_order = LO32_32_64(val);
high_order = EXTRACT_64HI(val);
low_order = EXTRACT_64LO(val);
SET_DREG(high_order);
SET_DREGF(low_order);
@ -2624,7 +2623,7 @@ INLINE void hyperstone_sardi(hyperstone_state *cpustate, struct regs_decode *dec
high_order = DREG;
low_order = DREGF;
val = COMBINE_64_32_32(high_order, low_order);
val = CONCAT_64(high_order, low_order);
if( N_VALUE )
SET_C((val >> (N_VALUE - 1)) & 1);
@ -2673,7 +2672,7 @@ INLINE void hyperstone_sard(hyperstone_state *cpustate, struct regs_decode *deco
high_order = DREG;
low_order = DREGF;
val = COMBINE_64_32_32(high_order, low_order);
val = CONCAT_64(high_order, low_order);
if( n )
SET_C((val >> (n - 1)) & 1);
@ -2745,7 +2744,7 @@ INLINE void hyperstone_shldi(hyperstone_state *cpustate, struct regs_decode *dec
high_order = DREG;
low_order = DREGF;
val = COMBINE_U64_U32_U32(high_order, low_order);
val = CONCAT_64(high_order, low_order);
SET_C( (N_VALUE)?(((val<<(N_VALUE-1))&U64(0x8000000000000000))?1:0):0);
mask = ((((UINT64)1) << (32 - N_VALUE)) - 1) ^ 0xffffffff;
tmp = high_order << N_VALUE;
@ -2758,8 +2757,8 @@ INLINE void hyperstone_shldi(hyperstone_state *cpustate, struct regs_decode *dec
val <<= N_VALUE;
high_order = HI32_32_64(val);
low_order = LO32_32_64(val);
high_order = EXTRACT_64HI(val);
low_order = EXTRACT_64LO(val);
SET_DREG(high_order);
SET_DREGF(low_order);
@ -2789,7 +2788,7 @@ INLINE void hyperstone_shld(hyperstone_state *cpustate, struct regs_decode *deco
mask = ((((UINT64)1) << (32 - n)) - 1) ^ 0xffffffff;
val = COMBINE_U64_U32_U32(high_order, low_order);
val = CONCAT_64(high_order, low_order);
SET_C( (n)?(((val<<(n-1))&U64(0x8000000000000000))?1:0):0);
tmp = high_order << n;
@ -2801,8 +2800,8 @@ INLINE void hyperstone_shld(hyperstone_state *cpustate, struct regs_decode *deco
val <<= n;
high_order = HI32_32_64(val);
low_order = LO32_32_64(val);
high_order = EXTRACT_64HI(val);
low_order = EXTRACT_64LO(val);
SET_DREG(high_order);
SET_DREGF(low_order);
@ -4055,7 +4054,7 @@ INLINE void hyperstone_extend(hyperstone_state *cpustate, struct regs_decode *de
{
INT64 result;
result = (INT64)COMBINE_64_32_32(GET_G_REG(14), GET_G_REG(15)) + (INT64)((INT64)(INT32)(vals) * (INT64)(INT32)(vald));
result = (INT64)CONCAT_64(GET_G_REG(14), GET_G_REG(15)) + (INT64)((INT64)(INT32)(vals) * (INT64)(INT32)(vald));
vals = result >> 32;
vald = result & 0xffffffff;
@ -4079,7 +4078,7 @@ INLINE void hyperstone_extend(hyperstone_state *cpustate, struct regs_decode *de
{
INT64 result;
result = (INT64)COMBINE_64_32_32(GET_G_REG(14), GET_G_REG(15)) - (INT64)((INT64)(INT32)(vals) * (INT64)(INT32)(vald));
result = (INT64)CONCAT_64(GET_G_REG(14), GET_G_REG(15)) - (INT64)((INT64)(INT32)(vals) * (INT64)(INT32)(vald));
vals = result >> 32;
vald = result & 0xffffffff;
@ -4103,7 +4102,7 @@ INLINE void hyperstone_extend(hyperstone_state *cpustate, struct regs_decode *de
{
INT64 result;
result = (INT64)COMBINE_64_32_32(GET_G_REG(14), GET_G_REG(15)) + (INT64)((INT64)(INT32)((vald & 0xffff0000) >> 16) * (INT64)(INT32)((vals & 0xffff0000) >> 16)) + ((INT64)(INT32)(vald & 0xffff) * (INT64)(INT32)(vals & 0xffff));
result = (INT64)CONCAT_64(GET_G_REG(14), GET_G_REG(15)) + (INT64)((INT64)(INT32)((vald & 0xffff0000) >> 16) * (INT64)(INT32)((vals & 0xffff0000) >> 16)) + ((INT64)(INT32)(vald & 0xffff) * (INT64)(INT32)(vals & 0xffff));
vals = result >> 32;
vald = result & 0xffffffff;

2
src/emu/cpu/m68000/m68kmmu.h
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@ -12,7 +12,7 @@
*/
INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
{
UINT32 addr_out, tbl_entry, tbl_entry2, tamode, tbmode;
UINT32 addr_out, tbl_entry = 0, tbl_entry2, tamode = 0, tbmode = 0;
UINT32 root_aptr, root_limit, tofs, is, abits, bbits, cbits;
UINT32 resolved, tptr, shift;

1
src/emu/cpu/minx/minx.h
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@ -5,7 +5,6 @@
#include "cpuintrf.h"
#include "osd_cpu.h"
#include "driver.h"
enum

13
src/emu/cpu/mips/psx.c
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@ -64,7 +64,6 @@
*/
#include "debugger.h"
#include "osd_cpu.h"
#include "psx.h"
#define LOG_BIOSCALL ( 0 )
@ -1146,17 +1145,17 @@ static void multiplier_update( psxcpu_state *psxcpu )
{
case MULTIPLIER_OPERATION_MULT:
{
INT64 result = MUL_64_32_32( (INT32)psxcpu->multiplier_operand1, (INT32)psxcpu->multiplier_operand2 );
psxcpu->lo = LO32_32_64( result );
psxcpu->hi = HI32_32_64( result );
INT64 result = mul_32x32( (INT32)psxcpu->multiplier_operand1, (INT32)psxcpu->multiplier_operand2 );
psxcpu->lo = EXTRACT_64LO( result );
psxcpu->hi = EXTRACT_64HI( result );
}
break;
case MULTIPLIER_OPERATION_MULTU:
{
UINT64 result = MUL_U64_U32_U32( psxcpu->multiplier_operand1, psxcpu->multiplier_operand2 );
psxcpu->lo = LO32_U32_U64( result );
psxcpu->hi = HI32_U32_U64( result );
UINT64 result = mulu_32x32( psxcpu->multiplier_operand1, psxcpu->multiplier_operand2 );
psxcpu->lo = EXTRACT_64LO( result );
psxcpu->hi = EXTRACT_64HI( result );
}
break;

2
src/emu/cpu/tms32025/tms32025.c
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@ -147,7 +147,7 @@ struct _tms32025_state
UINT16 STR0, STR1;
UINT8 IFR;
UINT8 RPTC;
PAIR ACC; /* PAIR defined in os/osd_cpu.h */
PAIR ACC;
PAIR Preg;
UINT16 Treg;
UINT16 AR[8];

28
src/emu/cpu/tms34010/34010ops.c
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@ -516,11 +516,11 @@ static void dint(tms34010_state *tms, UINT16 op)
else \
{ \
INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \
INT64 dividend = COMBINE_64_32_32(*rd1, *rd2); \
INT64 quotient = DIV_64_64_32(dividend, *rs); \
INT32 remainder = MOD_32_64_32(dividend, *rs); \
INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
INT64 quotient = dividend / *rs; \
INT32 remainder = dividend % *rs; \
UINT32 signbits = (INT32)quotient >> 31; \
if (HI32_32_64(quotient) != signbits) \
if (EXTRACT_64HI(quotient) != signbits) \
{ \
SET_V_LOG(tms, 1); \
} \
@ -564,10 +564,10 @@ static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); }
else \
{ \
INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \
UINT64 dividend = COMBINE_U64_U32_U32(*rd1, *rd2); \
UINT64 quotient = DIV_U64_U64_U32(dividend, *rs); \
UINT32 remainder = MOD_U32_U64_U32(dividend, *rs); \
if (HI32_U32_U64(quotient) != 0) \
UINT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
UINT64 quotient = dividend / (UINT32)*rs; \
UINT32 remainder = dividend % (UINT32)*rs; \
if (EXTRACT_64HI(quotient) != 0) \
{ \
SET_V_LOG(tms, 1); \
} \
@ -730,12 +730,12 @@ static void modu_b(tms34010_state *tms, UINT16 op) { MODU(B); }
\
SEXTEND(m1, FW(tms,1)); \
CLR_NZ(tms); \
product = MUL_64_32_32(m1, *rd1); \
product = mul_32x32(m1, *rd1); \
SET_Z_LOG(tms, product == 0); \
SET_N_BIT(tms, product >> 32, 31); \
\
*rd1 = HI32_32_64(product); \
R##REG(tms,DSTREG(op)|1) = LO32_32_64(product); \
*rd1 = EXTRACT_64HI(product); \
R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \
\
COUNT_CYCLES(tms,20); \
}
@ -750,11 +750,11 @@ static void mpys_b(tms34010_state *tms, UINT16 op) { MPYS(B); }
\
ZEXTEND(m1, FW(tms,1)); \
CLR_Z(tms); \
product = MUL_U64_U32_U32(m1, *rd1); \
product = mulu_32x32(m1, *rd1); \
SET_Z_LOG(tms, product == 0); \
\
*rd1 = HI32_32_64(product); \
R##REG(tms,DSTREG(op)|1) = LO32_32_64(product); \
*rd1 = EXTRACT_64HI(product); \
R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \
\
COUNT_CYCLES(tms,21); \
}

1
src/emu/cpu/tms34010/tms34010.c
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@ -8,7 +8,6 @@
***************************************************************************/
#include "debugger.h"
#include "osd_cpu.h"
#include "tms34010.h"

1
src/emu/cpu/tms57002/tms57002.h
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@ -4,7 +4,6 @@
#define __TMS57002_H__
#include "cpuintrf.h"
#include "osd_cpu.h"
#include "driver.h"
enum {

1
src/emu/cpu/z8000/z8000.c
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@ -45,7 +45,6 @@
#include "debugger.h"
#include "z8000.h"
#include "osd_cpu.h"
#define VERBOSE 0

4
src/emu/cpu/z8000/z8000ops.c
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@ -5300,8 +5300,8 @@ static void ZB1_dddd_0000(z8000_state *cpustate)
static void ZB1_dddd_0111(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
cpustate->RQ(dst) = COMBINE_U64_U32_U32((cpustate->RQ(dst) & S32) ?
0xfffffffful : 0, LO32_U32_U64(cpustate->RQ(dst)));
cpustate->RQ(dst) = CONCAT_64((cpustate->RQ(dst) & S32) ?
0xfffffffful : 0, EXTRACT_64LO(cpustate->RQ(dst)));
}
/******************************************

2
src/emu/debug/textbuf.h
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@ -12,8 +12,6 @@
#ifndef __TEXTBUF_H__
#define __TEXTBUF_H__
#include "osd_cpu.h"
/***************************************************************************
TYPE DEFINITIONS

5
src/mame/machine/scudsp.c
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@ -51,7 +51,6 @@ Changelog:
******************************************************************************************/
#include "driver.h"
#include "machine/scudsp.h"
#include "osd_cpu.h"
#include "sound/scsp.h"
/*DSP macros*/
@ -420,8 +419,8 @@ static void dsp_operation(void)
SET_V(((dsp_reg.pl.si) ^ (dsp_reg.acl.si)) & ((dsp_reg.pl.si) ^ (i3)) & 0x80000000);
break;
case 0x6: /* AD2 */
i1 = COMBINE_64_32_32((INT32)dsp_reg.ph.si,dsp_reg.pl.si);
i2 = COMBINE_64_32_32((INT32)dsp_reg.ach.si,dsp_reg.acl.si);
i1 = CONCAT_64((INT32)dsp_reg.ph.si,dsp_reg.pl.si);
i2 = CONCAT_64((INT32)dsp_reg.ach.si,dsp_reg.acl.si);
dsp_reg.alu = i1 + i2;
SET_Z((dsp_reg.alu & S64(0xffffffffffff)) == 0);
SET_S((dsp_reg.alu & S64(0x800000000000)) > 0);

2
src/mame/video/vdc.c
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@ -7,7 +7,7 @@
#define STATE_VDW 2
#define STATE_VCR 3
/* todo: replace this with the PAIR structure from 'osd_cpu.h' */
/* todo: replace this with the PAIR structure */
typedef union
{
#ifdef LSB_FIRST

6
src/osd/osdcomm.h
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@ -189,6 +189,12 @@ __extension__ typedef signed long long INT64;
#endif
/* Concatenate/extract 32-bit halves of 64-bit values */
#define CONCAT_64(hi,lo) (((UINT64)(hi) << 32) | (UINT32)(lo))
#define EXTRACT_64HI(val) ((UINT32)((val) >> 32))
#define EXTRACT_64LO(val) ((UINT32)(val))
/* MINGW has adopted the MSVC formatting for 64-bit ints as of gcc 4.4 */
#if (defined(__MINGW32__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4))) || defined(_MSVC_VER)
#define I64FMT "I64"

91
src/osd/osdmini/osd_cpu.h
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@ -1,91 +0,0 @@
//============================================================
//
// osd_cpu.h - Minimal core CPU-specific data types
//
//============================================================
//
// Copyright Aaron Giles
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or
// without modification, are permitted provided that the
// following conditions are met:
//
// * Redistributions of source code must retain the above
// copyright notice, this list of conditions and the
// following disclaimer.
// * Redistributions in binary form must reproduce the
// above copyright notice, this list of conditions and
// the following disclaimer in the documentation and/or
// other materials provided with the distribution.
// * Neither the name 'MAME' nor the names of its
// contributors may be used to endorse or promote
// products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY AARON GILES ''AS IS'' AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
// FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
// EVENT SHALL AARON GILES BE LIABLE FOR ANY DIRECT,
// INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
// DAMAGE (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
// ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
// IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
//============================================================
/*******************************************************************************
* *
* Define size independent data types and operations. *
* *
* The following types must be supported by all platforms: *
* *
* UINT8 - Unsigned 8-bit Integer INT8 - Signed 8-bit integer *
* UINT16 - Unsigned 16-bit Integer INT16 - Signed 16-bit integer *
* UINT32 - Unsigned 32-bit Integer INT32 - Signed 32-bit integer *
* UINT64 - Unsigned 64-bit Integer INT64 - Signed 64-bit integer *
* *
* *
* The macro names for the artithmatic operations are composed as follows: *
* *
* XXX_R_A_B, where XXX - 3 letter operation code (ADD, SUB, etc.) *
* R - The type of the result *
* A - The type of operand 1 *
* B - The type of operand 2 (if binary operation) *
* *
* Each type is one of: U8,8,U16,16,U32,32,U64,64 *
* *
*******************************************************************************/
#pragma once
#ifndef OSD_CPU_H
#define OSD_CPU_H
/* Combine two 32-bit integers into a 64-bit integer */
#define COMBINE_64_32_32(A,B) ((((UINT64)(A))<<32) | (UINT32)(B))
#define COMBINE_U64_U32_U32(A,B) COMBINE_64_32_32(A,B)
/* Return upper 32 bits of a 64-bit integer */
#define HI32_32_64(A) (((UINT64)(A)) >> 32)
#define HI32_U32_U64(A) HI32_32_64(A)
/* Return lower 32 bits of a 64-bit integer */
#define LO32_32_64(A) ((A) & 0xffffffff)
#define LO32_U32_U64(A) LO32_32_64(A)
#define DIV_64_64_32(A,B) ((A)/(B))
#define DIV_U64_U64_U32(A,B) ((A)/(UINT32)(B))
#define MOD_32_64_32(A,B) ((A)%(B))
#define MOD_U32_U64_U32(A,B) ((A)%(UINT32)(B))
#define MUL_64_32_32(A,B) ((A)*(INT64)(B))
#define MUL_U64_U32_U32(A,B) ((A)*(UINT64)(UINT32)(B))
#endif /* defined OSD_CPU_H */

92
src/osd/windows/osd_cpu.h
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@ -1,92 +0,0 @@
//============================================================
//
// osd_cpu.h - Win32 CPU-specific data types
//
//============================================================
//
// Copyright Aaron Giles
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or
// without modification, are permitted provided that the
// following conditions are met:
//
// * Redistributions of source code must retain the above
// copyright notice, this list of conditions and the
// following disclaimer.
// * Redistributions in binary form must reproduce the
// above copyright notice, this list of conditions and
// the following disclaimer in the documentation and/or
// other materials provided with the distribution.
// * Neither the name 'MAME' nor the names of its
// contributors may be used to endorse or promote
// products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY AARON GILES ''AS IS'' AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
// FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
// EVENT SHALL AARON GILES BE LIABLE FOR ANY DIRECT,
// INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
// DAMAGE (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
// ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
// IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
//============================================================
/*******************************************************************************
* *
* Define size independent data types and operations. *
* *
* The following types must be supported by all platforms: *
* *
* UINT8 - Unsigned 8-bit Integer INT8 - Signed 8-bit integer *
* UINT16 - Unsigned 16-bit Integer INT16 - Signed 16-bit integer *
* UINT32 - Unsigned 32-bit Integer INT32 - Signed 32-bit integer *
* UINT64 - Unsigned 64-bit Integer INT64 - Signed 64-bit integer *
* *
* *
* The macro names for the artithmatic operations are composed as follows: *
* *
* XXX_R_A_B, where XXX - 3 letter operation code (ADD, SUB, etc.) *
* R - The type of the result *
* A - The type of operand 1 *
* B - The type of operand 2 (if binary operation) *
* *
* Each type is one of: U8,8,U16,16,U32,32,U64,64 *
* *
*******************************************************************************/
#pragma once
#ifndef OSD_CPU_H
#define OSD_CPU_H
/* Combine two 32-bit integers into a 64-bit integer */
#define COMBINE_64_32_32(A,B) ((((UINT64)(A))<<32) | (UINT32)(B))
#define COMBINE_U64_U32_U32(A,B) COMBINE_64_32_32(A,B)
/* Return upper 32 bits of a 64-bit integer */
#define HI32_32_64(A) (((UINT64)(A)) >> 32)
#define HI32_U32_U64(A) HI32_32_64(A)
/* Return lower 32 bits of a 64-bit integer */
#define LO32_32_64(A) ((A) & 0xffffffff)
#define LO32_U32_U64(A) LO32_32_64(A)
#define DIV_64_64_32(A,B) ((A)/(B))
#define DIV_U64_U64_U32(A,B) ((A)/(UINT32)(B))
#define MOD_32_64_32(A,B) ((A)%(B))
#define MOD_U32_U64_U32(A,B) ((A)%(UINT32)(B))
#define MUL_64_32_32(A,B) ((A)*(INT64)(B))
#define MUL_U64_U32_U32(A,B) ((A)*(UINT64)(UINT32)(B))
#endif /* defined OSD_CPU_H */