Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-10-05 08:41:31 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

Remove a bunch of space.device().safe_pc() from devices (nw)

Browse Source
This commit is contained in:
Olivier Galibert 2017-12-30 14:04:05 +01:00
parent 62aef15114
commit 35fffe0d2e
44 changed files with 469 additions and 475 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
src/devices/bus/centronics/epson_ex800.cpp
View File

@ -372,19 +372,19 @@ void epson_ex800_device::device_reset()
READ8_MEMBER(epson_ex800_device::porta_r)
{
logerror("PA R @%x\n", space.device().safe_pc());
logerror("PA R %s\n", machine().describe_context());
return machine().rand();
}
READ8_MEMBER(epson_ex800_device::portb_r)
{
logerror("PB R @%x\n", space.device().safe_pc());
logerror("PB R %s\n", machine().describe_context());
return machine().rand();
}
READ8_MEMBER(epson_ex800_device::portc_r)
{
logerror("PC R @%x\n", space.device().safe_pc());
logerror("PC R %s\n", machine().describe_context());
return machine().rand();
}
@ -393,31 +393,31 @@ WRITE8_MEMBER(epson_ex800_device::porta_w)
if (PA6) logerror("BNK0 selected.\n");
if (PA7) logerror("BNK1 selected.\n");
logerror("PA W %x @%x\n", data, space.device().safe_pc());
logerror("PA W %x %s\n", data, machine().describe_context());
}
WRITE8_MEMBER(epson_ex800_device::portb_w)
{
if (data & 3)
logerror("PB0/1 Line feed @%x\n", space.device().safe_pc());
logerror("PB0/1 Line feed %s\n", machine().describe_context());
if (!(data & 4))
logerror("PB2 Line feed @%x\n", space.device().safe_pc());
logerror("PB2 Line feed %s\n", machine().describe_context());
if (data & 8)
logerror("PB3 Online LED on @%x\n", space.device().safe_pc());
logerror("PB3 Online LED on %s\n", machine().describe_context());
else
logerror("PB3 Online LED off @%x\n", space.device().safe_pc());
logerror("PB3 Online LED off %s\n", machine().describe_context());
if (data & 16)
logerror("PB4 Serial @%x\n", space.device().safe_pc());
logerror("PB4 Serial %s\n", machine().describe_context());
if (data & 32)
logerror("PB4 Serial @%x\n", space.device().safe_pc());
logerror("PB4 Serial %s\n", machine().describe_context());
if (data & 64)
logerror("PB4 Serial @%x\n", space.device().safe_pc());
logerror("PB4 Serial %s\n", machine().describe_context());
if (data & 128)
logerror("PB3 Paper empty LED on @%x\n", space.device().safe_pc());
logerror("PB3 Paper empty LED on %s\n", machine().describe_context());
else
logerror("PB3 Paper empty LED off @%x\n", space.device().safe_pc());
logerror("PB3 Paper empty LED off %s\n", machine().describe_context());
// logerror("PB W %x @%x\n", data, space.device().safe_pc());
// logerror("PB W %x %s\n", data, machine().describe_context());
}
WRITE8_MEMBER(epson_ex800_device::portc_w)
@ -427,7 +427,7 @@ WRITE8_MEMBER(epson_ex800_device::portc_w)
else
m_beeper->set_state(1);
logerror("PC W %x @%x\n", data, space.device().safe_pc());
logerror("PC W %x %s\n", data, machine().describe_context());
}
@ -435,44 +435,44 @@ WRITE8_MEMBER(epson_ex800_device::portc_w)
READ8_MEMBER(epson_ex800_device::devsel_r)
{
logerror("DEVSEL R @%x with offset %x\n", space.device().safe_pc(), offset);
logerror("DEVSEL R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::devsel_w)
{
logerror("DEVSEL W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
logerror("DEVSEL W %x %s with offset %x\n", data, machine().describe_context(), offset);
}
READ8_MEMBER(epson_ex800_device::gate5a_r)
{
logerror("GATE5A R @%x with offset %x\n", space.device().safe_pc(), offset);
logerror("GATE5A R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::gate5a_w)
{
logerror("GATE5A W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
logerror("GATE5A W %x %s with offset %x\n", data, machine().describe_context(), offset);
}
READ8_MEMBER(epson_ex800_device::iosel_r)
{
logerror("IOSEL R @%x with offset %x\n", space.device().safe_pc(), offset);
logerror("IOSEL R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::iosel_w)
{
logerror("IOSEL W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
logerror("IOSEL W %x %s with offset %x\n", data, machine().describe_context(), offset);
}
READ8_MEMBER(epson_ex800_device::gate7a_r)
{
logerror("GATE7A R @%x with offset %x\n", space.device().safe_pc(), offset);
logerror("GATE7A R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::gate7a_w)
{
logerror("GATE7A W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
logerror("GATE7A W %x %s with offset %x\n", data, machine().describe_context(), offset);
}

8
src/devices/bus/gameboy/mbc.cpp
View File

@ -600,7 +600,7 @@ WRITE8_MEMBER(gb_rom_mbc6_device::write_bank)
{
if (offset < 0x2000)
{
logerror( "0x%04X: write to mbc6 ram enable area: %04X <- 0x%02X\n", space.device().safe_pc(), offset, data );
logerror( "%s write to mbc6 ram enable area: %04X <- 0x%02X\n", machine().describe_context(), offset, data );
}
else if (offset < 0x3000)
{
@ -647,18 +647,18 @@ WRITE8_MEMBER(gb_rom_mbc7_device::write_bank)
if (offset < 0x2000)
{
// FIXME: Add RAM enable support
logerror("0x%04X: Write to ram enable register 0x%04X <- 0x%02X\n", space.device().safe_pc( ), offset, data);
logerror("%s Write to ram enable register 0x%04X <- 0x%02X\n", machine().describe_context(), offset, data);
}
else if (offset < 0x3000)
{
logerror( "0x%04X: write to mbc7 rom select register: 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0x2000 + offset, data );
logerror( "%s write to mbc7 rom select register: 0x%04X <- 0x%02X\n", machine().describe_context(), 0x2000 + offset, data );
/* Bit 12 must be set for writing to the mbc register */
if (offset & 0x0100)
m_latch_bank2 = data;
}
else
{
logerror( "0x%04X: write to mbc7 rom area: 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0x3000 + offset, data );
logerror( "%s write to mbc7 rom area: 0x%04X <- 0x%02X\n", machine().describe_context(), 0x3000 + offset, data );
/* Bit 12 must be set for writing to the mbc register */
if (offset & 0x0100)
{

4
src/devices/bus/gameboy/rom.cpp
View File

@ -222,7 +222,7 @@ WRITE8_MEMBER(gb_rom_tama5_device::write_ram)
m_tama5_data = 0xff;
case 0x80: /* Unknown, some kind of read (when 07=01)/write (when 07=00/02) */
default:
logerror( "0x%04X: Unknown addressing mode\n", space.device() .safe_pc( ) );
logerror( "%s Unknown addressing mode\n", machine().describe_context() );
break;
}
break;
@ -248,7 +248,7 @@ WRITE8_MEMBER(gb_rom_tama5_device::write_ram)
m_rtc_reg = (m_tama5_data & 0xf0) >> 4;
break;
default:
logerror( "0x%04X: Unknown tama5 command 0x%02X\n", space.device() .safe_pc( ), data );
logerror( "%s Unknown tama5 command 0x%02X\n", machine().describe_context(), data );
break;
}
m_tama5_cmd = data;

40
src/devices/bus/megadrive/rom.cpp
View File

@ -628,47 +628,47 @@ READ16_MEMBER(md_rom_chinf3_device::read)
04dc10 chifi3, prot_r? 2800
04cefa chifi3, prot_r? 65262
*/
if (machine().device("maincpu")->safe_pc() == 0x01782) // makes 'VS' screen appear
if (machine().device<cpu_device>("maincpu")->pc() == 0x01782) // makes 'VS' screen appear
{
retdat = machine().device("maincpu")->state().state_int(M68K_D3) & 0xff;
retdat = machine().device<cpu_device>("maincpu")->state_int(M68K_D3) & 0xff;
retdat <<= 8;
return retdat;
}
else if (machine().device("maincpu")->safe_pc() == 0x1c24) // background gfx etc.
else if (machine().device<cpu_device>("maincpu")->pc() == 0x1c24) // background gfx etc.
{
retdat = machine().device("maincpu")->state().state_int(M68K_D3) & 0xff;
retdat = machine().device<cpu_device>("maincpu")->state_int(M68K_D3) & 0xff;
retdat <<= 8;
return retdat;
}
else if (machine().device("maincpu")->safe_pc() == 0x10c4a) // unknown
else if (machine().device<cpu_device>("maincpu")->pc() == 0x10c4a) // unknown
{
return machine().rand();
}
else if (machine().device("maincpu")->safe_pc() == 0x10c50) // unknown
else if (machine().device<cpu_device>("maincpu")->pc() == 0x10c50) // unknown
{
return machine().rand();
}
else if (machine().device("maincpu")->safe_pc() == 0x10c52) // relates to the game speed..
else if (machine().device<cpu_device>("maincpu")->pc() == 0x10c52) // relates to the game speed..
{
retdat = machine().device("maincpu")->state().state_int(M68K_D4) & 0xff;
retdat = machine().device<cpu_device>("maincpu")->state_int(M68K_D4) & 0xff;
retdat <<= 8;
return retdat;
}
else if (machine().device("maincpu")->safe_pc() == 0x061ae)
else if (machine().device<cpu_device>("maincpu")->pc() == 0x061ae)
{
retdat = machine().device("maincpu")->state().state_int(M68K_D3) & 0xff;
retdat = machine().device<cpu_device>("maincpu")->state_int(M68K_D3) & 0xff;
retdat <<= 8;
return retdat;
}
else if (machine().device("maincpu")->safe_pc() == 0x061b0)
else if (machine().device<cpu_device>("maincpu")->pc() == 0x061b0)
{
retdat = machine().device("maincpu")->state().state_int(M68K_D3) & 0xff;
retdat = machine().device<cpu_device>("maincpu")->state_int(M68K_D3) & 0xff;
retdat <<= 8;
return retdat;
}
else
{
logerror("%06x chifi3, prot_r? %04x\n", machine().device("maincpu")->safe_pc(), offset);
logerror("%06x chifi3, prot_r? %04x\n", machine().device<cpu_device>("maincpu")->pc(), offset);
}
return 0;
}
@ -693,7 +693,7 @@ WRITE16_MEMBER(md_rom_chinf3_device::write)
else if (data == 0x0000)
m_bank = 0;
else
logerror("%06x chifi3, bankw? %04x %04x\n", space.device().safe_pc(), offset, data);
logerror("%06x chifi3, bankw? %04x %04x\n", machine().device<cpu_device>("maincpu")->pc(), offset, data);
}
}
@ -1293,22 +1293,22 @@ READ16_MEMBER(md_rom_topf_device::read)
cpu #0 (PC=001771A2): unmapped program memory word read from 006BD294 & 00FF
*/
if (space.device().safe_pc()==0x1771a2) return 0x50;
if (machine().device<cpu_device>("maincpu")->pc()==0x1771a2) return 0x50;
else
{
m_latch++;
logerror("%06x topfig_6BD294_r %04x\n",space.device().safe_pc(), m_latch);
logerror("%06x topfig_6BD294_r %04x\n",machine().device<cpu_device>("maincpu")->pc(), m_latch);
return m_latch;
}
}
if (offset == 0x6f5344/2)
{
if (space.device().safe_pc()==0x4C94E)
return machine().device("maincpu")->state().state_int((M68K_D0)) & 0xff;
if (machine().device<cpu_device>("maincpu")->pc()==0x4C94E)
return machine().device<cpu_device>("maincpu")->state_int((M68K_D0)) & 0xff;
else
{
m_latch++;
logerror("%06x topfig_6F5344_r %04x\n", space.device().safe_pc(), m_latch);
logerror("%06x topfig_6F5344_r %04x\n", machine().device<cpu_device>("maincpu")->pc(), m_latch);
return m_latch;
}
}
@ -1346,7 +1346,7 @@ WRITE16_MEMBER(md_rom_topf_device::write)
m_bank[2] = 0;
}
else
logerror("%06x offset %06x, data %04x\n", space.device().safe_pc(), offset, data);
logerror("%06x offset %06x, data %04x\n", machine().device<cpu_device>("maincpu")->pc(), offset, data);
}
}

4
src/devices/bus/neogeo/prot_fatfury2.cpp
View File

@ -50,7 +50,7 @@ READ16_MEMBER( fatfury2_prot_device::protection_r )
return ((res & 0xf0) >> 4) | ((res & 0x0f) << 4);
default:
logerror("unknown protection read at pc %06x, offset %08x\n", space.device().safe_pc(), offset << 1);
logerror("unknown protection read at %s, offset %08x\n", machine().describe_context(), offset << 1);
return 0;
}
}
@ -95,7 +95,7 @@ WRITE16_MEMBER( fatfury2_prot_device::protection_w )
break;
default:
logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", space.device().safe_pc(), offset, data);
logerror("unknown protection write at %s, offset %08x, data %02x\n", machine().describe_context(), offset, data);
break;
}
}

6
src/devices/bus/neogeo/prot_kof98.cpp
View File

@ -112,17 +112,17 @@ WRITE16_MEMBER( kof98_prot_device::protection_w )
switch (data)
{
case 0x0090:
logerror ("%06x kof98 - protection 0x0090x\n", space.device().safe_pc());
logerror ("%s kof98 - protection 0x0090x\n", machine().describe_context());
m_prot_state = 1;
break;
case 0x00f0:
logerror ("%06x kof98 - protection 0x00f0x\n", space.device().safe_pc());
logerror ("%s kof98 - protection 0x00f0x\n", machine().describe_context());
m_prot_state = 2;
break;
default: // 00aa is written, but not needed?
logerror ("%06x kof98 - unknown protection write %04x\n", space.device().safe_pc(), data);
logerror ("%s kof98 - unknown protection write %04x\n", machine().describe_context(), data);
break;
}
}

8
src/devices/bus/neogeo/prot_misc.cpp
View File

@ -269,7 +269,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr
READ16_MEMBER( neoboot_prot_device::mslug5p_prot_r )
{
logerror("PC %06x: access protected\n", space.device().safe_pc());
logerror("%s access protected\n", machine().describe_context());
return 0xa0;
}
@ -278,12 +278,12 @@ READ16_MEMBER( neoboot_prot_device::mslug5p_prot_r )
WRITE16_MEMBER( neoboot_prot_device::ms5plus_bankswitch_w )
{
int bankaddress;
logerror("offset: %06x PC %06x: set banking %04x\n",offset,space.device().safe_pc(),data);
logerror("offset: %06x %s set banking %04x\n",offset,machine().describe_context(),data);
if ((offset == 0) && (data == 0xa0))
{
bankaddress = 0xa0;
m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
logerror("offset: %06x %s set banking %04x\n\n",offset,machine().describe_context(),bankaddress);
}
else if(offset == 2)
{
@ -291,7 +291,7 @@ WRITE16_MEMBER( neoboot_prot_device::ms5plus_bankswitch_w )
//data = data & 7;
bankaddress = data * 0x100000;
m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
logerror("offset: %06x %s set banking %04x\n\n",offset,machine().describe_context(),bankaddress);
}
}
*/

4
src/devices/bus/neogeo/prot_mslugx.cpp
View File

@ -54,7 +54,7 @@ WRITE16_MEMBER( mslugx_prot_device::protection_w )
break;
default:
logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", space.device().safe_pc(), offset << 1, data);
logerror("unknown protection write at %s, offset %08x, data %02x\n", machine().describe_context(), offset << 1, data);
break;
}
}
@ -79,7 +79,7 @@ READ16_MEMBER( mslugx_prot_device::protection_r )
break;
default:
logerror("unknown protection read at pc %06x, offset %08x\n", space.device().safe_pc(), offset << 1);
logerror("unknown protection read at %s, offset %08x\n", machine().describe_context(), offset << 1);
break;
}

4
src/devices/bus/nubus/nubus_asntmc3b.cpp
View File

@ -155,7 +155,7 @@ WRITE32_MEMBER( nubus_mac8390_device::en_w )
}
else
{
fatalerror("asntmc3nb: write %08x to DP83902 @ %x with unhandled mask %08x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
fatalerror("%s", util::string_format("asntmc3nb: write %08x to DP83902 @ %x with unhandled mask %08x %s\n", data, offset, mem_mask, machine().describe_context()).c_str());
}
}
@ -173,7 +173,7 @@ READ32_MEMBER( nubus_mac8390_device::en_r )
}
else
{
fatalerror("asntmc3nb: read DP83902 @ %x with unhandled mask %08x (PC=%x)\n", offset, mem_mask, space.device().safe_pc());
fatalerror("%s", util::string_format("asntmc3nb: read DP83902 @ %x with unhandled mask %08x %s\n", offset, mem_mask, machine().describe_context()).c_str());
}
return 0;

4
src/devices/bus/nubus/nubus_cb264.cpp
View File

@ -239,7 +239,7 @@ WRITE32_MEMBER( nubus_cb264_device::cb264_w )
break;
default:
// printf("cb264_w: %x to reg %x (mask %x PC %x)\n", data, offset*4, mem_mask, space.device().safe_pc());
// printf("cb264_w: %x to reg %x (mask %x %s)\n", data, offset*4, mem_mask, machine().describe_context());
break;
}
}
@ -257,7 +257,7 @@ READ32_MEMBER( nubus_cb264_device::cb264_r )
return m_cb264_toggle; // bit 0 is vblank?
default:
logerror("cb264_r: reg %x (mask %x PC %x)\n", offset*4, mem_mask, space.device().safe_pc());
logerror("cb264_r: reg %x (mask %x %s)\n", offset*4, mem_mask, machine().describe_context());
break;
}

34
src/devices/cpu/arm7/lpc210x.cpp
View File

@ -104,7 +104,7 @@ READ32_MEMBER( lpc210x_device::vic_r )
switch (offset*4)
{
default:
logerror("%08x unhandled read from VIC offset %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, mem_mask);
logerror("%s unhandled read from VIC offset %08x mem_mask %08x\n", machine().describe_context(), offset * 4, mem_mask);
}
return 0x00000000;
@ -116,7 +116,7 @@ WRITE32_MEMBER( lpc210x_device::vic_w )
switch (offset * 4)
{
default:
logerror("%08x unhandled write VIC offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, data, mem_mask);
logerror("%s unhandled write VIC offset %02x data %08x mem_mask %08x\n", machine().describe_context(), offset * 4, data, mem_mask);
}
}
@ -127,7 +127,7 @@ READ32_MEMBER( lpc210x_device::pin_r )
switch (offset*4)
{
default:
logerror("%08x unhandled read from PINSEL offset %08x mem_mask %08x\n",space.device().safe_pc(), offset * 4, mem_mask);
logerror("%s unhandled read from PINSEL offset %08x mem_mask %08x\n",machine().describe_context(), offset * 4, mem_mask);
}
return 0x00000000;
@ -139,7 +139,7 @@ WRITE32_MEMBER( lpc210x_device::pin_w )
switch (offset * 4)
{
default:
logerror("%08x unhandled write PINSEL offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, data, mem_mask);
logerror("%s unhandled write PINSEL offset %02x data %08x mem_mask %08x\n", machine().describe_context(), offset * 4, data, mem_mask);
}
}
@ -150,7 +150,7 @@ READ32_MEMBER( lpc210x_device::mam_r )
switch (offset*4)
{
default:
logerror("%08x unhandled read from MAM offset %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, mem_mask);
logerror("%s unhandled read from MAM offset %08x mem_mask %08x\n", machine().describe_context(), offset * 4, mem_mask);
}
return 0x00000000;
@ -162,7 +162,7 @@ WRITE32_MEMBER( lpc210x_device::mam_w )
switch (offset * 4)
{
default:
logerror("%08x unhandled write MAM offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, data, mem_mask);
logerror("%s unhandled write MAM offset %02x data %08x mem_mask %08x\n", machine().describe_context(), offset * 4, data, mem_mask);
}
}
@ -173,7 +173,7 @@ READ32_MEMBER( lpc210x_device::fio_r )
switch (offset*4)
{
default:
logerror("%08x unhandled read from FIO offset %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, mem_mask);
logerror("%s unhandled read from FIO offset %08x mem_mask %08x\n", machine().describe_context(), offset * 4, mem_mask);
}
return 0x00000000;
@ -185,7 +185,7 @@ WRITE32_MEMBER( lpc210x_device::fio_w )
switch (offset * 4)
{
default:
logerror("%08x unhandled write FIO offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, data, mem_mask);
logerror("%s unhandled write FIO offset %02x data %08x mem_mask %08x\n", machine().describe_context(), offset * 4, data, mem_mask);
}
}
@ -194,28 +194,28 @@ WRITE32_MEMBER( lpc210x_device::fio_w )
READ32_MEMBER( lpc210x_device::apbdiv_r )
{
logerror("%08x unhandled read from APBDIV offset %08x mem_mask %08x\n", space.device().safe_pc(), offset * 4, mem_mask);
logerror("%s unhandled read from APBDIV offset %08x mem_mask %08x\n", machine().describe_context(), offset * 4, mem_mask);
return 0x00000000;
}
WRITE32_MEMBER( lpc210x_device::apbdiv_w )
{
logerror("%08x unhandled write APBDIV offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(),offset * 4, data, mem_mask);
logerror("%s unhandled write APBDIV offset %02x data %08x mem_mask %08x\n", machine().describe_context(),offset * 4, data, mem_mask);
}
/* Syscon misc registers */
READ32_MEMBER( lpc210x_device::scs_r )
{
logerror("%08x unhandled read from SCS offset %08x mem_mask %08x\n", space.device().safe_pc(),offset * 4, mem_mask);
logerror("%s unhandled read from SCS offset %08x mem_mask %08x\n", machine().describe_context(),offset * 4, mem_mask);
return 0x00000000;
}
WRITE32_MEMBER( lpc210x_device::scs_w )
{
logerror("%08x unhandled write SCS offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(),offset * 4, data, mem_mask);
logerror("%s unhandled write SCS offset %02x data %08x mem_mask %08x\n", machine().describe_context(),offset * 4, data, mem_mask);
}
/* PLL Phase Locked Loop */
@ -225,7 +225,7 @@ READ32_MEMBER( lpc210x_device::pll_r )
switch (offset*4)
{
default:
logerror("%08x unhandled read from PLL offset %08x mem_mask %08x\n", space.device().safe_pc(),offset * 4, mem_mask);
logerror("%s unhandled read from PLL offset %08x mem_mask %08x\n", machine().describe_context(),offset * 4, mem_mask);
}
return 0xffffffff;
@ -237,7 +237,7 @@ WRITE32_MEMBER( lpc210x_device::pll_w )
switch (offset * 4)
{
default:
logerror("%08x unhandled write PLL offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(),offset * 4, data, mem_mask);
logerror("%s unhandled write PLL offset %02x data %08x mem_mask %08x\n", machine().describe_context(),offset * 4, data, mem_mask);
}
}
@ -252,7 +252,7 @@ uint32_t lpc210x_device::read_timer(address_space &space, int timer, int offset,
return m_TxPR[timer];
default:
logerror("%08x unhandled read from timer %d offset %02x mem_mask %08x\n", space.device().safe_pc(),timer, offset * 4, mem_mask);
logerror("%s unhandled read from timer %d offset %02x mem_mask %08x\n", machine().describe_context(),timer, offset * 4, mem_mask);
}
return 0x00000000;
@ -265,11 +265,11 @@ void lpc210x_device::write_timer(address_space &space, int timer, int offset, ui
{
case 0x0c:
COMBINE_DATA(&m_TxPR[timer]);
logerror("%08x Timer %d Prescale Register set to %08x\n", space.device().safe_pc(),timer, m_TxPR[timer]);
logerror("%s Timer %d Prescale Register set to %08x\n", machine().describe_context(),timer, m_TxPR[timer]);
break;
default:
logerror("%08x unhandled write timer %d offset %02x data %08x mem_mask %08x\n", space.device().safe_pc(),timer, offset * 4, data, mem_mask);
logerror("%s unhandled write timer %d offset %02x data %08x mem_mask %08x\n", machine().describe_context(),timer, offset * 4, data, mem_mask);
}
}

4
src/devices/cpu/es5510/es5510.cpp
View File

@ -357,12 +357,12 @@ static inline char * DESCRIBE_INSTR(char *s, uint64_t instr, uint32_t gpr, const
READ8_MEMBER(es5510_device::host_r)
{
// printf("%06x: DSP read offset %04x (data is %04x)\n",space.device().safe_pc(),offset,dsp_ram[offset]);
// printf("%06x: DSP read offset %04x (data is %04x)\n",pc(),offset,dsp_ram[offset]);
// VFX hack
if (core_stricmp(machine().system().name, "vfx") == 0)
{
if (space.device().safe_pc() == 0xc091f0)
if (pc == 0xc091f0)
{
return space.device().state().state_int(M68K_D2);
}

52
src/devices/cpu/m6800/m6801.cpp
View File

@ -839,7 +839,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
break;
case IO_P3DDR:
logerror("M6801 '%s' Port 3 DDR is a write-only register\n", space.device().tag());
logerror("M6801 '%s' Port 3 DDR is a write-only register\n", tag());
break;
case IO_P4DDR:
@ -851,7 +851,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
{
if (m_p3csr_is3_flag_read)
{
//logerror("M6801 '%s' Cleared IS3\n", space.device().tag());
//logerror("M6801 '%s' Cleared IS3\n", tag());
m_p3csr &= ~M6801_P3CSR_IS3_FLAG;
m_p3csr_is3_flag_read = 0;
}
@ -976,14 +976,14 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
{
if (m_trcsr_read_orfe)
{
//logerror("M6801 '%s' Cleared ORFE\n", space.device().tag());
//logerror("M6801 '%s' Cleared ORFE\n", tag());
m_trcsr_read_orfe = 0;
m_trcsr &= ~M6801_TRCSR_ORFE;
}
if (m_trcsr_read_rdrf)
{
//logerror("M6801 '%s' Cleared RDRF\n", space.device().tag());
//logerror("M6801 '%s' Cleared RDRF\n", tag());
m_trcsr_read_rdrf = 0;
m_trcsr &= ~M6801_TRCSR_RDRF;
}
@ -1012,7 +1012,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
case IO_ICR2H:
case IO_ICR2L:
default:
logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space.device().tag(),space.device().safe_pc(),offset);
logerror("PC %04x: warning - read from reserved internal register %02x\n", pc(),offset);
}
return data;
@ -1023,7 +1023,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
switch (offset)
{
case IO_P1DDR:
//logerror("M6801 '%s' Port 1 Data Direction Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 1 Data Direction Register: %02x\n", tag(), data);
if (m_port1_ddr != data)
{
@ -1036,7 +1036,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P2DDR:
//logerror("M6801 '%s' Port 2 Data Direction Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 2 Data Direction Register: %02x\n", tag(), data);
if (m_port2_ddr != data)
{
@ -1046,7 +1046,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P1DATA:
//logerror("M6801 '%s' Port 1 Data Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 1 Data Register: %02x\n", tag(), data);
m_port1_data = data;
if(m_port1_ddr == 0xff)
@ -1056,7 +1056,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P2DATA:
//logerror("M6801 '%s' Port 2 Data Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 2 Data Register: %02x\n", tag(), data);
m_port2_data = data;
m_port2_written = 1;
@ -1064,7 +1064,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P3DDR:
//logerror("M6801 '%s' Port 3 Data Direction Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 3 Data Direction Register: %02x\n", tag(), data);
if (m_port3_ddr != data)
{
@ -1077,7 +1077,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P4DDR:
//logerror("M6801 '%s' Port 4 Data Direction Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 4 Data Direction Register: %02x\n", tag(), data);
if (m_port4_ddr != data)
{
@ -1090,11 +1090,11 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P3DATA:
//logerror("M6801 '%s' Port 3 Data Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 3 Data Register: %02x\n", tag(), data);
if (m_p3csr_is3_flag_read)
{
//logerror("M6801 '%s' Cleared IS3\n", space.device().tag());
//logerror("M6801 '%s' Cleared IS3\n", tag());
m_p3csr &= ~M6801_P3CSR_IS3_FLAG;
m_p3csr_is3_flag_read = 0;
}
@ -1117,7 +1117,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_P4DATA:
//logerror("M6801 '%s' Port 4 Data Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 4 Data Register: %02x\n", tag(), data);
m_port4_data = data;
if(m_port4_ddr == 0xff)
@ -1127,7 +1127,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_TCSR:
//logerror("M6801 '%s' Timer Control and Status Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Timer Control and Status Register: %02x\n", tag(), data);
m_tcsr = data;
m_pending_tcsr &= m_tcsr;
@ -1137,7 +1137,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_CH:
//logerror("M6801 '%s' Counter High Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Counter High Register: %02x\n", tag(), data);
m_latch09 = data & 0xff; /* 6301 only */
CT = 0xfff8;
@ -1146,7 +1146,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_CL: /* 6301 only */
//logerror("M6801 '%s' Counter Low Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Counter Low Register: %02x\n", tag(), data);
CT = (m_latch09 << 8) | (data & 0xff);
TOH = CTH;
@ -1154,7 +1154,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_OCRH:
//logerror("M6801 '%s' Output Compare High Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Output Compare High Register: %02x\n", tag(), data);
if( m_output_compare.b.h != data)
{
@ -1164,7 +1164,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_OCRL:
//logerror("M6801 '%s' Output Compare Low Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Output Compare Low Register: %02x\n", tag(), data);
if( m_output_compare.b.l != data)
{
@ -1176,23 +1176,23 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
case IO_ICRH:
case IO_ICRL:
case IO_RDR:
//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space.device().tag(),space.device().safe_pc(),data,offset);
//logerror("PC %04x: warning - write %02x to read only internal register %02x\n",pc(),data,offset);
break;
case IO_P3CSR:
//logerror("M6801 '%s' Port 3 Control and Status Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Port 3 Control and Status Register: %02x\n", tag(), data);
m_p3csr = data;
break;
case IO_RMCR:
//logerror("M6801 '%s' Rate and Mode Control Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Rate and Mode Control Register: %02x\n", tag(), data);
set_rmcr(data);
break;
case IO_TRCSR:
//logerror("M6801 '%s' Transmit/Receive Control and Status Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' Transmit/Receive Control and Status Register: %02x\n", tag(), data);
if ((data & M6801_TRCSR_TE) && !(m_trcsr & M6801_TRCSR_TE))
{
@ -1210,7 +1210,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_TDR:
//logerror("M6800 '%s' Transmit Data Register: %02x\n", space.device().tag(), data);
//logerror("M6800 '%s' Transmit Data Register: %02x\n", tag(), data);
if (m_trcsr_read_tdre)
{
@ -1221,7 +1221,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
break;
case IO_RCR:
//logerror("M6801 '%s' RAM Control Register: %02x\n", space.device().tag(), data);
//logerror("M6801 '%s' RAM Control Register: %02x\n", tag(), data);
m_ram_ctrl = data;
break;
@ -1238,7 +1238,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
case IO_ICR2H:
case IO_ICR2L:
default:
logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space.device().tag(),space.device().safe_pc(),data,offset);
logerror("PC %04x: warning - write %02x to reserved internal register %02x\n", pc(),data,offset);
break;
}
}

4
src/devices/cpu/tms34010/tms34010.cpp
View File

@ -1119,7 +1119,7 @@ WRITE16_MEMBER( tms34010_device::io_register_w )
break;
case REG_PMASK:
if (data) logerror("Plane masking not supported. PC=%08X\n", space.device().safe_pc());
if (data) logerror("Plane masking not supported. %s\n", machine().describe_context());
break;
case REG_DPYCTL:
@ -1274,7 +1274,7 @@ WRITE16_MEMBER( tms34020_device::io_register_w )
case REG020_PMASKL:
case REG020_PMASKH:
if (data) logerror("Plane masking not supported. PC=%08X\n", space.device().safe_pc());
if (data) logerror("Plane masking not supported. %s\n", machine().describe_context());
break;
case REG020_DPYCTL:

10
src/devices/machine/am53cf96.cpp
View File

@ -34,11 +34,11 @@ READ8_MEMBER( am53cf96_device::read )
if (offset == REG_FIFO)
{
// osd_printf_debug("53cf96: read FIFO PC=%x\n", space.device().safe_pc());
// logerror("53cf96: read FIFO %s\n", machine().describe_context());
return 0;
}
// logerror("53cf96: read reg %d = %x (PC=%x)\n", reg, rv>>shift, space.device().safe_pc());
// logerror("53cf96: read reg %d = %x %s\n", reg, rv>>shift, machine().describe_context());
if (offset == REG_IRQSTATE)
{
@ -57,7 +57,7 @@ void am53cf96_device::device_timer(emu_timer &timer, device_timer_id tid, int pa
WRITE8_MEMBER( am53cf96_device::write )
{
// logerror("53cf96: w %x to reg %d (PC=%x)\n", data, offset, space.device().safe_pc());
// logerror("53cf96: w %x to reg %d %s\n", data, offset, machine().describe_context());
// if writing to the target ID, cache it off for later
if (offset == REG_STATUS)
@ -95,7 +95,7 @@ WRITE8_MEMBER( am53cf96_device::write )
case 2: // reset am53cf96
scsi_regs[REG_IRQSTATE] = 8; // indicate success
logerror("53cf96: reset target ID = %d (PC = %x)\n", last_id, space.device().safe_pc());
logerror("53cf96: reset target ID = %d %s\n", last_id, machine().describe_context());
xfer_state = 0;
break;
@ -118,7 +118,7 @@ WRITE8_MEMBER( am53cf96_device::write )
scsi_regs[REG_INTSTATE] = 4;
}
logerror("53cf96: command %x exec. target ID = %d (PC = %x)\n", fifo[1], last_id, space.device().safe_pc());
logerror("53cf96: command %x exec. target ID = %d %s\n", fifo[1], last_id, machine().describe_context());
select(last_id);
send_command(&fifo[1], 12);

64
src/devices/machine/gt64xxx.cpp
View File

@ -497,18 +497,18 @@ WRITE_LINE_MEMBER(gt64xxx_device::pci_stall)
READ32_MEMBER (gt64xxx_device::pci_config_r)
{
uint32_t result = 0;
LOGGALILEO("%06X:galileo pci_config_r from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, result, mem_mask);
LOGGALILEO("%s galileo pci_config_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (gt64xxx_device::pci_config_w)
{
LOGGALILEO("%06X:galileo pci_config_w to offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGGALILEO("%s galileo pci_config_w to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
}
// PCI Master Window 0
READ32_MEMBER (gt64xxx_device::master_mem0_r)
{
uint32_t result = this->space(AS_PCI_MEM).read_dword((m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), mem_mask);
LOGPCI("%06X:galileo pci mem0 read from offset %08X = %08X & %08X\n", space.device().safe_pc(), (m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), result, mem_mask);
LOGPCI("%s galileo pci mem0 read from offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), result, mem_mask);
return result;
}
WRITE32_MEMBER (gt64xxx_device::master_mem0_w)
@ -524,7 +524,7 @@ WRITE32_MEMBER (gt64xxx_device::master_mem0_w)
m_stall_windex++;
// Stall cpu until trigger
m_cpu_space->device().execute().spin_until_trigger(45678);
LOGMASKED(LOG_GALILEO | LOG_PCI, "%08X:Stalling CPU on PCI Stall\n", m_cpu_space->device().safe_pc());
LOGMASKED(LOG_GALILEO | LOG_PCI, "%s Stalling CPU on PCI Stall\n", machine().describe_context());
}
else {
fatalerror("master_mem0_w: m_stall_windex full\n");
@ -532,20 +532,20 @@ WRITE32_MEMBER (gt64xxx_device::master_mem0_w)
return;
}
this->space(AS_PCI_MEM).write_dword((m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), data, mem_mask);
LOGPCI("%06X:galileo pci mem0 write to offset %08X = %08X & %08X\n", space.device().safe_pc(), (m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), data, mem_mask);
LOGPCI("%s galileo pci mem0 write to offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), data, mem_mask);
}
// PCI Master Window 1
READ32_MEMBER (gt64xxx_device::master_mem1_r)
{
uint32_t result = this->space(AS_PCI_MEM).read_dword((m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), mem_mask);
LOGPCI("%06X:galileo pci mem1 read from offset %08X = %08X & %08X\n", space.device().safe_pc(), (m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), result, mem_mask);
LOGPCI("%s galileo pci mem1 read from offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), result, mem_mask);
return result;
}
WRITE32_MEMBER (gt64xxx_device::master_mem1_w)
{
this->space(AS_PCI_MEM).write_dword((m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), data, mem_mask);
LOGPCI("%06X:galileo pci mem1 write to offset %08X = %08X & %08X\n", space.device().safe_pc(), (m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), data, mem_mask);
LOGPCI("%s galileo pci mem1 write to offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), data, mem_mask);
}
// PCI Master IO
@ -554,7 +554,7 @@ READ32_MEMBER (gt64xxx_device::master_io_r)
uint32_t result = this->space(AS_PCI_IO).read_dword((m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), mem_mask);
if (m_prev_addr != offset) {
m_prev_addr = offset;
LOGPCI("%06X:galileo pci io read from offset %08X = %08X & %08X\n", space.device().safe_pc(), (m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), result, mem_mask);
LOGPCI("%s galileo pci io read from offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), result, mem_mask);
}
return result;
}
@ -563,60 +563,60 @@ WRITE32_MEMBER (gt64xxx_device::master_io_w)
this->space(AS_PCI_IO).write_dword((m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), data, mem_mask);
if (m_prev_addr != offset) {
m_prev_addr = offset;
LOGPCI("%06X:galileo pci io write to offset %08X = %08X & %08X\n", space.device().safe_pc(), (m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), data, mem_mask);
LOGPCI("%s galileo pci io write to offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), data, mem_mask);
}
}
READ32_MEMBER(gt64xxx_device::ras_0_r)
{
uint32_t result = m_ram[0][offset];
LOGPCI("%06X:galileo ras_0 read from offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, result, mem_mask);
LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask);
return result;
}
WRITE32_MEMBER(gt64xxx_device::ras_0_w)
{
COMBINE_DATA(&m_ram[0][offset]);
LOGPCI("%06X:galileo ras_0 write to offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, data, mem_mask);
LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
}
READ32_MEMBER(gt64xxx_device::ras_1_r)
{
uint32_t result = m_ram[1][offset];
LOGPCI("%06X:galileo ras_0 read from offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, result, mem_mask);
LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask);
return result;
}
WRITE32_MEMBER(gt64xxx_device::ras_1_w)
{
COMBINE_DATA(&m_ram[1][offset]);
LOGPCI("%06X:galileo ras_0 write to offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, data, mem_mask);
LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
}
READ32_MEMBER(gt64xxx_device::ras_2_r)
{
uint32_t result = m_ram[2][offset];
LOGPCI("%06X:galileo ras_0 read from offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, result, mem_mask);
LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask);
return result;
}
WRITE32_MEMBER(gt64xxx_device::ras_2_w)
{
COMBINE_DATA(&m_ram[2][offset]);
LOGPCI("%06X:galileo ras_0 write to offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, data, mem_mask);
LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
}
READ32_MEMBER(gt64xxx_device::ras_3_r)
{
uint32_t result = m_ram[3][offset];
LOGPCI("%06X:galileo ras_0 read from offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, result, mem_mask);
LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask);
return result;
}
WRITE32_MEMBER(gt64xxx_device::ras_3_w)
{
COMBINE_DATA(&m_ram[3][offset]);
LOGPCI("%06X:galileo ras_0 write to offset %08X = %08X & %08X\n", space.device().safe_pc(), offset * 4, data, mem_mask);
LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
}
@ -646,7 +646,7 @@ READ32_MEMBER (gt64xxx_device::cpu_if_r)
/* eat some time for those which poll this register */
//space.device().execute().eat_cycles(100);
LOGTIMERS("%08X:hires_timer_r = %08X\n", space.device().safe_pc(), result);
LOGTIMERS("%s hires_timer_r = %08X\n", machine().describe_context(), result);
break;
}
@ -660,7 +660,7 @@ READ32_MEMBER (gt64xxx_device::cpu_if_r)
case GREG_CONFIG_DATA:
result = config_data_r(space, offset);
LOGGALILEO("%08X:Galileo GREG_CONFIG_DATA read from offset %03X = %08X\n", space.device().safe_pc(), offset*4, result);
LOGGALILEO("%s Galileo GREG_CONFIG_DATA read from offset %03X = %08X\n", machine().describe_context(), offset*4, result);
break;
case GREG_CONFIG_ADDRESS:
@ -670,11 +670,11 @@ READ32_MEMBER (gt64xxx_device::cpu_if_r)
case GREG_INT_STATE:
case GREG_INT_MASK:
case GREG_TIMER_CONTROL:
// LOGGALILEO("%08X:Galileo read from offset %03X = %08X\n", space.device().safe_pc(), offset*4, result);
// LOGGALILEO("%s Galileo read from offset %03X = %08X\n", machine().describe_context(), offset*4, result);
break;
default:
LOGGALILEO("%08X:Galileo read from offset %03X = %08X\n", space.device().safe_pc(), offset*4, result);
LOGGALILEO("%s Galileo read from offset %03X = %08X\n", machine().describe_context(), offset*4, result);
break;
}
@ -714,7 +714,7 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
case GREG_CS3_HI:
map_cpu_space();
remap_cb();
LOGGALILEO("%08X:Galileo Memory Map data write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGGALILEO("%s Galileo Memory Map data write to offset %03X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
break;
case GREG_DMA0_CONTROL:
@ -741,9 +741,9 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
m_dma_timer->adjust(attotime::zero, 0, DMA_TIMER_PERIOD);
m_dma_active |= (1<< which);
//perform_dma(space, which);
LOGDMA("%08X:Galileo starting DMA Chan %i\n", space.device().safe_pc(), which);
LOGDMA("%s Galileo starting DMA Chan %i\n", machine().describe_context(), which);
}
LOGGALILEO("%08X:Galileo write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset * 4, data, mem_mask);
LOGGALILEO("%s Galileo write to offset %03X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
break;
}
@ -759,7 +759,7 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
data &= 0xffffff;
if (!timer->active)
timer->count = data;
LOGTIMERS("%08X:timer/counter %d count = %08X [start=%08X]\n", space.device().safe_pc(), offset % 4, data, timer->count);
LOGTIMERS("%s timer/counter %d count = %08X [start=%08X]\n", machine().describe_context(), offset % 4, data, timer->count);
break;
}
@ -767,7 +767,7 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
{
int which, mask;
LOGTIMERS("%08X:timer/counter control = %08X\n", space.device().safe_pc(), data);
LOGTIMERS("%s timer/counter control = %08X\n", machine().describe_context(), data);
for (which = 0, mask = 0x01; which < 4; which++, mask <<= 2)
{
galileo_timer *timer = &m_timer[which];
@ -796,14 +796,14 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
}
case GREG_INT_STATE:
LOGGALILEO("%08X:Galileo write to IRQ clear = %08X & %08X\n", offset*4, data, mem_mask);
LOGGALILEO("%s Galileo write to IRQ clear = %08X & %08X\n", offset*4, data, mem_mask);
m_reg[offset] = oldata & data;
update_irqs();
break;
case GREG_CONFIG_DATA:
pci_host_device::config_data_w(space, offset, data);
LOGGALILEO("%08X:Galileo PCI config data write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGGALILEO("%s Galileo PCI config data write to offset %03X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
break;
case GREG_CONFIG_ADDRESS:
@ -829,7 +829,7 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
modData = data;
}
pci_host_device::config_address_w(space, offset, modData);
LOGGALILEO("%08X:Galileo PCI config address write to offset %03X = %08X & %08X origData = %08X\n", space.device().safe_pc(), offset*4, modData, mem_mask, data);
LOGGALILEO("%s Galileo PCI config address write to offset %03X = %08X & %08X origData = %08X\n", machine().describe_context(), offset*4, modData, mem_mask, data);
break;
case GREG_DMA0_COUNT: case GREG_DMA1_COUNT: case GREG_DMA2_COUNT: case GREG_DMA3_COUNT:
@ -837,11 +837,11 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w)
case GREG_DMA0_DEST: case GREG_DMA1_DEST: case GREG_DMA2_DEST: case GREG_DMA3_DEST:
case GREG_DMA0_NEXT: case GREG_DMA1_NEXT: case GREG_DMA2_NEXT: case GREG_DMA3_NEXT:
case GREG_INT_MASK:
LOGGALILEO("%08X:Galileo write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGGALILEO("%s Galileo write to offset %03X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
break;
default:
LOGGALILEO("%08X:Galileo write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGGALILEO("%s Galileo write to offset %03X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
break;
}
}
@ -997,7 +997,7 @@ TIMER_CALLBACK_MEMBER (gt64xxx_device::perform_dma)
{
if (m_pci_stall_state)
{
if (m_retry_count<4) LOGDMA("%08X:Stalling DMA on voodoo retry_count: %i\n", m_cpu_space->device().safe_pc(), m_retry_count);
if (m_retry_count<4) LOGDMA("%s Stalling DMA on voodoo retry_count: %i\n", machine().describe_context(), m_retry_count);
// Save info
m_reg[GREG_DMA0_SOURCE + which] = srcaddr;
m_reg[GREG_DMA0_DEST + which] = dstaddr;

42
src/devices/machine/ldpr8210.cpp
View File

@ -216,7 +216,7 @@ void pioneer_pr8210_device::control_w(uint8_t data)
m_firstbittime = curtime;
m_accumulator = 0x5555;
if (LOG_SERIAL)
printf("Reset accumulator\n");
logerror("Reset accumulator\n");
}
// 0 bit delta is 1.05 msec, 1 bit delta is 2.11 msec
@ -227,7 +227,7 @@ void pioneer_pr8210_device::control_w(uint8_t data)
if (LOG_SERIAL)
{
int usecdiff = (int)(delta.attoseconds() / ATTOSECONDS_IN_USEC(1));
printf("bitdelta = %5d (%d) - accum = %04X\n", usecdiff, longpulse, m_accumulator);
logerror("bitdelta = %5d (%d) - accum = %04X\n", usecdiff, longpulse, m_accumulator);
}
// if we have a complete command, signal it
@ -250,7 +250,7 @@ void pioneer_pr8210_device::control_w(uint8_t data)
// log the command and wait for a keypress
if (LOG_SERIAL)
printf("--- Command = %02X\n", m_pia.porta >> 3);
logerror("--- Command = %02X\n", m_pia.porta >> 3);
// reset the first bit time so that the accumulator clears on the next write
m_firstbittime = curtime - SERIAL_MAX_WORD_TIME;
@ -307,9 +307,9 @@ void pioneer_pr8210_device::device_timer(emu_timer &timer, device_timer_id id, i
{
uint32_t line1718 = get_field_code(LASERDISC_CODE_LINE1718, false);
if ((line1718 & VBI_MASK_CAV_PICTURE) == VBI_CODE_CAV_PICTURE)
printf("%3d:VBI(%05d)\n", screen().vpos(), VBI_CAV_PICTURE(line1718));
logerror("%3d:VBI(%05d)\n", screen().vpos(), VBI_CAV_PICTURE(line1718));
else
printf("%3d:VBI()\n", screen().vpos());
logerror("%3d:VBI()\n", screen().vpos());
}
// update PIA registers based on vbi code
@ -394,9 +394,9 @@ void pioneer_pr8210_device::player_vsync(const vbi_metadata &vbi, int fieldnum,
if (LOG_VBLANK_VBI)
{
if ((vbi.line1718 & VBI_MASK_CAV_PICTURE) == VBI_CODE_CAV_PICTURE)
printf("%3d:VSYNC(%d,%05d)\n", screen().vpos(), fieldnum, VBI_CAV_PICTURE(vbi.line1718));
logerror("%3d:VSYNC(%d,%05d)\n", screen().vpos(), fieldnum, VBI_CAV_PICTURE(vbi.line1718));
else
printf("%3d:VSYNC(%d)\n", screen().vpos(), fieldnum);
logerror("%3d:VSYNC(%d)\n", screen().vpos(), fieldnum);
}
// signal VSYNC and set a timer to turn it off
@ -417,7 +417,7 @@ int32_t pioneer_pr8210_device::player_update(const vbi_metadata &vbi, int fieldn
{
// logging
if (LOG_VBLANK_VBI)
printf("%3d:Update(%d)\n", screen().vpos(), fieldnum);
logerror("%3d:Update(%d)\n", screen().vpos(), fieldnum);
// if the spindle is on, we advance by 1 track after completing field #1
return spdl_on() ? fieldnum : 0;
@ -484,19 +484,19 @@ READ8_MEMBER( pioneer_pr8210_device::i8049_pia_r )
// (C0) VBI decoding state 1
case 0xc0:
if (LOG_VBLANK_VBI)
printf("%3d:PIA(C0)\n", screen().vpos());
logerror("%3d:PIA(C0)\n", screen().vpos());
result = m_pia.vbi1;
break;
// (E0) VBI decoding state 2
case 0xe0:
if (LOG_VBLANK_VBI)
printf("%3d:PIA(E0)\n", screen().vpos());
logerror("%3d:PIA(E0)\n", screen().vpos());
result = m_pia.vbi2;
break;
default:
osd_printf_debug("%03X:Unknown PR-8210 PIA read from offset %02X\n", space.device().safe_pc(), offset);
logerror("%s Unknown PR-8210 PIA read from offset %02X\n", machine().describe_context(), offset);
break;
}
return result;
@ -568,7 +568,7 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_pia_w )
// no other writes known
default:
osd_printf_debug("%03X:Unknown PR-8210 PIA write to offset %02X = %02X\n", space.device().safe_pc(), offset, data);
logerror("%s Unknown PR-8210 PIA write to offset %02X = %02X\n", machine().describe_context(), offset, data);
break;
}
}
@ -650,11 +650,11 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_port1_w )
if (!override_control())
{
if (LOG_SIMUTREK)
printf("%3d:JUMP TRG\n", screen().vpos());
logerror("%3d:JUMP TRG\n", screen().vpos());
advance_slider(direction);
}
else if (LOG_SIMUTREK)
printf("%3d:Skipped JUMP TRG\n", screen().vpos());
logerror("%3d:Skipped JUMP TRG\n", screen().vpos());
}
// bit 1 low enables scanning
@ -882,7 +882,7 @@ void simutrek_special_device::data_w(uint8_t data)
{
synchronize(TID_LATCH_DATA, data);
if (LOG_SIMUTREK)
printf("%03d:**** Simutrek Command = %02X\n", screen().vpos(), data);
logerror("%03d:**** Simutrek Command = %02X\n", screen().vpos(), data);
}
@ -894,7 +894,7 @@ void simutrek_special_device::data_w(uint8_t data)
void simutrek_special_device::set_external_audio_squelch(int state)
{
if (LOG_SIMUTREK && m_audio_squelch != (state == 0))
printf("--> audio squelch = %d\n", state == 0);
logerror("--> audio squelch = %d\n", state == 0);
m_audio_squelch = (state == 0);
update_audio_squelch();
}
@ -916,14 +916,14 @@ void simutrek_special_device::player_vsync(const vbi_metadata &vbi, int fieldnum
// call the parent
if (LOG_SIMUTREK)
printf("%3d:VSYNC(%d)\n", screen().vpos(), fieldnum);
logerror("%3d:VSYNC(%d)\n", screen().vpos(), fieldnum);
pioneer_pr8210_device::player_vsync(vbi, fieldnum, curtime);
// process data
if (m_data_ready)
{
if (LOG_SIMUTREK)
printf("%3d:VSYNC IRQ\n", screen().vpos());
logerror("%3d:VSYNC IRQ\n", screen().vpos());
m_i8748_cpu->set_input_line(MCS48_INPUT_IRQ, ASSERT_LINE);
timer_set(screen().scan_period(), TID_IRQ_OFF);
}
@ -1043,18 +1043,18 @@ WRITE8_MEMBER( simutrek_special_device::i8748_port2_w )
{
int direction = (data & 0x08) ? 1 : -1;
if (LOG_SIMUTREK)
printf("%3d:JUMP TRG (Simutrek PC=%03X)\n", screen().vpos(), space.device().safe_pc());
logerror("%3d:JUMP TRG %s\n", screen().vpos(), machine().describe_context());
advance_slider(direction);
}
// bit $04 controls who owns the JUMP TRG command
if (LOG_SIMUTREK && ((data ^ prev) & 0x04))
printf("%3d:Simutrek ownership line = %d (Simutrek PC=%03X)\n", screen().vpos(), (data >> 2) & 1, space.device().safe_pc());
logerror("%3d:Simutrek ownership line = %d %s\n", screen().vpos(), (data >> 2) & 1, machine().describe_context());
m_controlnext = (~data >> 2) & 1;
// bits $03 control something (status?)
if (LOG_SIMUTREK && ((data ^ prev) & 0x03))
printf("Simutrek Status = %d\n", data & 0x03);
logerror("Simutrek Status = %d\n", data & 0x03);
}

2
src/devices/machine/ldv1000.cpp
View File

@ -417,7 +417,7 @@ READ8_MEMBER( pioneer_ldv1000_device::z80_controller_r )
WRITE8_MEMBER( pioneer_ldv1000_device::z80_controller_w )
{
if (LOG_STATUS_CHANGES && data != m_status)
logerror("%04X:CONTROLLER.W=%02X\n", space.device().safe_pc(), data);
logerror("%s:CONTROLLER.W=%02X\n", machine().describe_context(), data);
m_status = data;
}

41
src/devices/machine/ldvp931.cpp
View File

@ -348,16 +348,17 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output0_w )
if (LOG_PORTS && (m_i8049_out0 ^ data) & 0xff)
{
printf("%03X:out0:", space.device().safe_pc());
if ( (data & 0x80)) printf(" ???");
if ( (data & 0x40)) printf(" LED1");
if ( (data & 0x20)) printf(" LED2");
if ( (data & 0x10)) printf(" LED3");
if ( (data & 0x08)) printf(" EJECT");
if (!(data & 0x04)) printf(" AUDMUTE2");
if (!(data & 0x02)) printf(" AUDMUTE1");
if (!(data & 0x01)) printf(" VIDMUTE");
printf("\n");
std::string flags;
if ( (data & 0x80)) flags += " ???";
if ( (data & 0x40)) flags += " LED1";
if ( (data & 0x20)) flags += " LED2";
if ( (data & 0x10)) flags += " LED3";
if ( (data & 0x08)) flags += " EJECT";
if (!(data & 0x04)) flags += " AUDMUTE2";
if (!(data & 0x02)) flags += " AUDMUTE1";
if (!(data & 0x01)) flags += " VIDMUTE";
logerror("out0: %s %s\n", flags, machine().describe_context());
m_i8049_out0 = data;
}
@ -388,9 +389,9 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output1_w )
if (LOG_PORTS && (m_i8049_out1 ^ data) & 0x08)
{
osd_printf_debug("%03X:out1:", space.device().safe_pc());
if (!(data & 0x08)) osd_printf_debug(" SMS");
osd_printf_debug("\n");
std::string flags;
if (!(data & 0x08)) flags += " SMS";
logerror("out1: %s %s\n", flags, machine().describe_context());
m_i8049_out1 = data;
}
@ -536,13 +537,13 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_port1_w )
if (LOG_PORTS && (m_i8049_port1 ^ data) & 0x1f)
{
printf("%03X:port1:", space.device().safe_pc());
if (!(data & 0x10)) printf(" SPEED");
if (!(data & 0x08)) printf(" TIMENABLE");
if (!(data & 0x04)) printf(" REV");
if (!(data & 0x02)) printf(" FORW");
if (!(data & 0x01)) printf(" OPAMP");
printf("\n");
std::string flags;
if (!(data & 0x10)) flags += " SPEED";
if (!(data & 0x08)) flags += " TIMENABLE";
if (!(data & 0x04)) flags += " REV";
if (!(data & 0x02)) flags += " FORW";
if (!(data & 0x01)) flags += " OPAMP";
logerror("port1: %s %s\n", flags, machine().describe_context());
}
// if bit 0 is set, we are not tracking

32
src/devices/machine/mb8795.cpp
View File

@ -83,7 +83,7 @@ void mb8795_device::recv_cb(uint8_t *buf, int len)
READ8_MEMBER(mb8795_device::txstat_r)
{
// logerror("%s: txstat_r %02x (%08x)\n", tag(), txstat, space.device().safe_pc());
// logerror("txstat_r %02x %s\n", txstat, machine().describe_context());
return txstat;
}
@ -91,12 +91,12 @@ WRITE8_MEMBER(mb8795_device::txstat_w)
{
txstat = txstat & (0xf0 | ~data);
check_irq();
logerror("%s: txstat_w %02x (%08x)\n", tag(), txstat, space.device().safe_pc());
logerror("txstat_w %02x %s\n", txstat, machine().describe_context());
}
READ8_MEMBER(mb8795_device::txmask_r)
{
logerror("%s: txmask_r %02x (%08x)\n", tag(), txmask, space.device().safe_pc());
logerror("txmask_r %02x %s\n", txmask, machine().describe_context());
return txmask;
}
@ -104,12 +104,12 @@ WRITE8_MEMBER(mb8795_device::txmask_w)
{
txmask = data & 0xaf;
check_irq();
logerror("%s: txmask_w %02x (%08x)\n", tag(), txmask, space.device().safe_pc());
logerror("txmask_w %02x %s\n", txmask, machine().describe_context());
}
READ8_MEMBER(mb8795_device::rxstat_r)
{
logerror("%s: rxstat_r %02x (%08x)\n", tag(), rxstat, space.device().safe_pc());
logerror("rxstat_r %02x %s\n", rxstat, machine().describe_context());
return rxstat;
}
@ -117,12 +117,12 @@ WRITE8_MEMBER(mb8795_device::rxstat_w)
{
rxstat = rxstat & (0x70 | ~data);
check_irq();
logerror("%s: rxstat_w %02x (%08x)\n", tag(), rxstat, space.device().safe_pc());
logerror("rxstat_w %02x %s\n", rxstat, machine().describe_context());
}
READ8_MEMBER(mb8795_device::rxmask_r)
{
logerror("%s: rxmask_r %02x (%08x)\n", tag(), rxmask, space.device().safe_pc());
logerror("rxmask_r %02x %s\n", rxmask, machine().describe_context());
return rxmask;
}
@ -130,31 +130,31 @@ WRITE8_MEMBER(mb8795_device::rxmask_w)
{
rxmask = data & 0x9f;
check_irq();
logerror("%s: rxmask_w %02x (%08x)\n", tag(), rxmask, space.device().safe_pc());
logerror("rxmask_w %02x %s\n", rxmask, machine().describe_context());
}
READ8_MEMBER(mb8795_device::txmode_r)
{
logerror("%s: txmode_r %02x (%08x)\n", tag(), txmode, space.device().safe_pc());
logerror("txmode_r %02x %s\n", txmode, machine().describe_context());
return txmode;
}
WRITE8_MEMBER(mb8795_device::txmode_w)
{
txmode = data;
logerror("%s: txmode_w %02x (%08x)\n", tag(), txmode, space.device().safe_pc());
logerror("txmode_w %02x %s\n", txmode, machine().describe_context());
}
READ8_MEMBER(mb8795_device::rxmode_r)
{
logerror("%s: rxmode_r %02x (%08x)\n", tag(), rxmode, space.device().safe_pc());
logerror("rxmode_r %02x %s\n", rxmode, machine().describe_context());
return rxmode;
}
WRITE8_MEMBER(mb8795_device::rxmode_w)
{
rxmode = data;
logerror("%s: rxmode_w %02x (%08x)\n", tag(), rxmode, space.device().safe_pc());
logerror("rxmode_w %02x %s\n", rxmode, machine().describe_context());
}
WRITE8_MEMBER(mb8795_device::reset_w)
@ -165,7 +165,7 @@ WRITE8_MEMBER(mb8795_device::reset_w)
READ8_MEMBER(mb8795_device::tdc_lsb_r)
{
logerror("%s: tdc_lsb_r %02x (%08x)\n", tag(), txcount & 0xff, space.device().safe_pc());
logerror("tdc_lsb_r %02x %s\n", txcount & 0xff, machine().describe_context());
return txcount;
}
@ -174,7 +174,7 @@ READ8_MEMBER(mb8795_device::mac_r)
if(offset < 6)
return mac[offset];
if(offset == 7) {
logerror("%s: tdc_msb_r %02x (%08x)\n", tag(), txcount >> 8, space.device().safe_pc());
logerror("tdc_msb_r %02x %s\n", txcount >> 8, machine().describe_context());
return (txcount >> 8) & 0x3f;
}
return 0;
@ -206,7 +206,7 @@ void mb8795_device::tx_dma_w(uint8_t data, bool eof)
drq_tx_cb(drq_tx);
if(eof) {
logerror("%s: send packet, dest=%02x.%02x.%02x.%02x.%02x.%02x len=%04x loopback=%s\n", tag(),
logerror("send packet, dest=%02x.%02x.%02x.%02x.%02x.%02x len=%04x loopback=%s\n",
txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4], txbuf[5],
txlen,
txmode & EN_TMD_LB_DISABLE ? "off" : "on");
@ -265,7 +265,7 @@ void mb8795_device::receive()
keep = true;
break;
}
logerror("%s: received packet for %02x.%02x.%02x.%02x.%02x.%02x len=%04x, mode=%d -> %s\n", tag(),
logerror("received packet for %02x.%02x.%02x.%02x.%02x.%02x len=%04x, mode=%d -> %s\n",
rxbuf[0], rxbuf[1], rxbuf[2], rxbuf[3], rxbuf[4], rxbuf[5],
rxlen, rxmode & 3, keep ? "kept" : "dropped");
if(!keep)

14
src/devices/machine/pdc.cpp
View File

@ -516,7 +516,7 @@ WRITE8_MEMBER(pdc_device::fdd_68k_w)
}
break;
default:
if(TRACE_PDC_FDC) logerror("(!)PDC: Port %02X WRITE: %02X, PC: %X\n", address, data, space.device().safe_pc());
if(TRACE_PDC_FDC) logerror("(!)PDC: Port %02X WRITE: %02X %s\n", address, data, machine().describe_context());
break;
}
}
@ -531,7 +531,7 @@ WRITE8_MEMBER(pdc_device::p38_w)
READ8_MEMBER(pdc_device::p38_r)
{
reg_p38 ^= 0x20; /* Invert bit 5 (32) */
if(TRACE_PDC_CMD) logerror("PDC: Port 0x38 READ: %02X, PC: %X\n", reg_p38, space.device().safe_pc());
if(TRACE_PDC_CMD) logerror("PDC: Port 0x38 READ: %02X %s\n", reg_p38, machine().describe_context());
return reg_p38;
}
@ -539,7 +539,7 @@ READ8_MEMBER(pdc_device::p39_r)
{
uint8_t data = 1;
if(b_fdc_irq) data |= 8; // Set bit 3
if(TRACE_PDC_CMD) logerror("PDC: Port 0x39 READ: %02X, PC: %X\n", data, space.device().safe_pc());
if(TRACE_PDC_CMD) logerror("PDC: Port 0x39 READ: %02X %s\n", data, machine().describe_context());
return data;
}
@ -552,15 +552,15 @@ WRITE8_MEMBER(pdc_device::p50_5f_w)
switch(data)
{
case 0x00:
if(TRACE_PDC_FDC) logerror("PDC: FDD (all) Motor off. PC: %X\n", space.device().safe_pc());
if(TRACE_PDC_FDC) logerror("PDC: FDD (all) Motor off. %s\n", machine().describe_context());
m_fdc->subdevice<floppy_connector>("0")->get_device()->mon_w(1);
break;
case 0x80:
if(TRACE_PDC_FDC) logerror("PDC: FDD (all) Motor on. PC: %X\n", space.device().safe_pc());
if(TRACE_PDC_FDC) logerror("PDC: FDD (all) Motor on. %s\n", machine().describe_context());
m_fdc->subdevice<floppy_connector>("0")->get_device()->mon_w(0);
break;
default:
if(TRACE_PDC_FDC) logerror("PDC: Port 0x52 WRITE: %x\n PC: %X\n", data, space.device().safe_pc());
if(TRACE_PDC_FDC) logerror("PDC: Port 0x52 WRITE: %x %s\n", data, machine().describe_context());
}
break;
case 0x53: /* Probably set_rate here */
@ -570,7 +570,7 @@ WRITE8_MEMBER(pdc_device::p50_5f_w)
switch(data)
{
case 0x00:
if(TRACE_PDC_FDC) logerror("PDC: FDD 1 Motor off. PC: %X\n", space.device().safe_pc());
if(TRACE_PDC_FDC) logerror("PDC: FDD 1 Motor off. %s\n", machine().describe_context());
m_fdc->subdevice<floppy_connector>("0")->get_device()->mon_w(1);
break;
case 0x80:

32
src/devices/machine/vrc4373.cpp
View File

@ -294,76 +294,76 @@ void vrc4373_device::set_cpu_tag(const char *_cpu_tag)
READ32_MEMBER (vrc4373_device::pcictrl_r)
{
uint32_t result = 0;
LOGNILE("%06X:nile pcictrl_r from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, result, mem_mask);
LOGNILE("%s nile pcictrl_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc4373_device::pcictrl_w)
{
LOGNILE("%06X:nile pcictrl_w to offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGNILE("%s nile pcictrl_w to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
}
// PCI Master Window 1
READ32_MEMBER (vrc4373_device::master1_r)
{
uint32_t result = this->space(AS_PCI_MEM).read_dword(m_pci1_laddr | (offset*4), mem_mask);
LOGNILEMASTER("%06X:nile master1 read from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, result, mem_mask);
LOGNILEMASTER("%s nile master1 read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc4373_device::master1_w)
{
this->space(AS_PCI_MEM).write_dword(m_pci1_laddr | (offset*4), data, mem_mask);
LOGNILEMASTER("%06X:nile master1 write to offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGNILEMASTER("%s nile master1 write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
}
// PCI Master Window 2
READ32_MEMBER (vrc4373_device::master2_r)
{
uint32_t result = this->space(AS_PCI_MEM).read_dword(m_pci2_laddr | (offset*4), mem_mask);
LOGNILEMASTER("%06X:nile master2 read from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, result, mem_mask);
LOGNILEMASTER("%s nile master2 read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc4373_device::master2_w)
{
this->space(AS_PCI_MEM).write_dword(m_pci2_laddr | (offset*4), data, mem_mask);
LOGNILEMASTER("%06X:nile master2 write to offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGNILEMASTER("%s nile master2 write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
}
// PCI Master IO Window
READ32_MEMBER (vrc4373_device::master_io_r)
{
uint32_t result = this->space(AS_PCI_IO).read_dword(m_pci_io_laddr | (offset*4), mem_mask);
LOGNILEMASTER("%06X:nile master io read from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, result, mem_mask);
LOGNILEMASTER("%s nile master io read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc4373_device::master_io_w)
{
this->space(AS_PCI_IO).write_dword(m_pci_io_laddr | (offset*4), data, mem_mask);
LOGNILEMASTER("%06X:nile master io write to offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGNILEMASTER("%s nile master io write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
}
// PCI Target Window 1
READ32_MEMBER (vrc4373_device::target1_r)
{
uint32_t result = m_cpu->space(AS_PCI_CONFIG).read_dword(m_target1_laddr | (offset*4), mem_mask);
LOGNILETARGET("%08X:nile target1 read from offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, result, mem_mask);
LOGNILETARGET("%08X:nile target1 read from offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc4373_device::target1_w)
{
m_cpu->space(AS_PCI_CONFIG).write_dword(m_target1_laddr | (offset*4), data, mem_mask);
LOGNILETARGET("%08X:nile target1 write to offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, data, mem_mask);
LOGNILETARGET("%08X:nile target1 write to offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, data, mem_mask);
}
// PCI Target Window 2
READ32_MEMBER (vrc4373_device::target2_r)
{
uint32_t result = m_cpu->space(AS_PCI_CONFIG).read_dword(m_target2_laddr | (offset*4), mem_mask);
LOGNILETARGET("%08X:nile target2 read from offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, result, mem_mask);
LOGNILETARGET("%08X:nile target2 read from offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc4373_device::target2_w)
{
m_cpu->space(AS_PCI_CONFIG).write_dword(m_target2_laddr | (offset*4), data, mem_mask);
LOGNILETARGET("%08X:nile target2 write to offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, data, mem_mask);
LOGNILETARGET("%08X:nile target2 write to offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, data, mem_mask);
}
// DMA Transfer
@ -373,7 +373,7 @@ TIMER_CALLBACK_MEMBER (vrc4373_device::dma_transfer)
// Check for dma suspension
if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_SUS) {
LOGNILE("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PCI_CONFIG).device().safe_pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
LOGNILE("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
return;
}
@ -447,13 +447,13 @@ READ32_MEMBER (vrc4373_device::cpu_if_r)
default:
break;
}
LOGNILE("%06X:nile read from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, result, mem_mask);
LOGNILE("%s nile read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER(vrc4373_device::cpu_if_w)
{
LOGNILE("%06X:nile write to offset %02X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
LOGNILE("%s nile write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
uint32_t modData, oldData;
oldData = m_cpu_regs[offset];
@ -519,7 +519,7 @@ WRITE32_MEMBER(vrc4373_device::cpu_if_w)
// Start the transfer
m_dma_timer->set_param(which);
m_dma_timer->adjust(attotime::zero, 0, DMA_TIMER_PERIOD);
LOGNILE("%08X:nile Start DMA Lane %i PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PCI_CONFIG).device().safe_pc(), which, m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
LOGNILE("%08X:nile Start DMA Lane %i PCI: %08X MEM: %08X Words: %X\n", m_cpu->pc(), which, m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
}
break;
case NREG_ICSR:

54
src/devices/machine/vrc5074.cpp
View File

@ -448,7 +448,7 @@ READ32_MEMBER (vrc5074_device::pci0_r)
break;
}
if (LOG_NILE_MASTER)
logerror("%06X:nile pci0_r offset %08X = %08X & %08X\n", space.device().safe_pc(), pci_addr, result, mem_mask);
logerror("%s nile pci0_r offset %08X = %08X & %08X\n", machine().describe_context(), pci_addr, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc5074_device::pci0_w)
@ -487,7 +487,7 @@ WRITE32_MEMBER (vrc5074_device::pci0_w)
}
//this->space(AS_DATA).write_dword(m_pci0_laddr | (offset*4), data, mem_mask);
if (LOG_NILE_MASTER)
logerror("%06X:nile pci0_w offset %08X = %08X & %08X\n", space.device().safe_pc(), pci_addr, data, mem_mask);
logerror("%s nile pci0_w offset %08X = %08X & %08X\n", machine().describe_context(), pci_addr, data, mem_mask);
}
// PCI Master Window 1
@ -526,7 +526,7 @@ READ32_MEMBER (vrc5074_device::pci1_r)
break;
}
if (LOG_NILE_MASTER)
logerror("%06X:nile pci1_r offset %08X = %08X & %08X\n", space.device().safe_pc(), pci_addr, result, mem_mask);
logerror("%s nile pci1_r offset %08X = %08X & %08X\n", machine().describe_context(), pci_addr, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc5074_device::pci1_w)
@ -564,7 +564,7 @@ WRITE32_MEMBER (vrc5074_device::pci1_w)
}
//this->space(AS_DATA).write_dword(m_pci0_laddr | (offset*4), data, mem_mask);
if (LOG_NILE_MASTER)
logerror("%06X:nile pci1_w offset %08X = %08X & %08X\n", space.device().safe_pc(), pci_addr, data, mem_mask);
logerror("%s nile pci1_w offset %08X = %08X & %08X\n", machine().describe_context(), pci_addr, data, mem_mask);
}
// PCI Target Window 1
@ -572,7 +572,7 @@ READ32_MEMBER (vrc5074_device::target1_r)
{
uint32_t result = m_sdram[0][offset];
if (LOG_NILE_TARGET)
logerror("%08X:nile target1 read from offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, result, mem_mask);
logerror("%s nile target1 read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
return result;
}
WRITE32_MEMBER (vrc5074_device::target1_w)
@ -581,7 +581,7 @@ WRITE32_MEMBER (vrc5074_device::target1_w)
COMBINE_DATA(&m_sdram[0][offset]);
//m_sdram[0][offset] = data;
if (LOG_NILE_TARGET)
logerror("%08X:nile target1 write to offset %02X = %08X & %08X\n", m_cpu->device_t::safe_pc(), offset*4, data, mem_mask);
logerror("%s nile target1 write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
}
// DMA Transfer
@ -592,7 +592,7 @@ TIMER_CALLBACK_MEMBER (vrc5074_device::dma_transfer)
//// Check for dma suspension
//if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_SUS) {
// if (LOG_NILE)
// logerror("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PROGRAM).device().safe_pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
// logerror("%s nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", machine().describe_context(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
// return;
//}
@ -781,38 +781,38 @@ READ32_MEMBER(vrc5074_device::cpu_reg_r)
{
case NREG_CPUSTAT + 0: /* CPU status */
case NREG_CPUSTAT + 1: /* CPU status */
if (LOG_NILE) logerror("%08X:NILE READ: CPU status(%03X) = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
if (LOG_NILE) logerror("%s NILE READ: CPU status(%03X) = %08X\n", machine().describe_context(), offset * 4, result);
logit = 0;
break;
case NREG_INTCTRL + 0: /* Interrupt control */
case NREG_INTCTRL + 1: /* Interrupt control */
if (LOG_NILE) logerror("%08X:NILE READ: interrupt control(%03X) = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
if (LOG_NILE) logerror("%s NILE READ: interrupt control(%03X) = %08X\n", machine().describe_context(), offset * 4, result);
update_nile_irqs();
logit = 0;
break;
case NREG_INTSTAT0 + 0: /* Interrupt status 0 */
case NREG_INTSTAT0 + 1: /* Interrupt status 0 */
if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 0(%03X) = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
if (LOG_NILE) logerror("%s NILE READ: interrupt status 0(%03X) = %08X\n", machine().describe_context(), offset * 4, result);
logit = 0;
break;
case NREG_INTSTAT1 + 0: /* Interrupt status 1 */
case NREG_INTSTAT1 + 1: /* Interrupt status 1 */
if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 1/enable(%03X) = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
if (LOG_NILE) logerror("%s NILE READ: interrupt status 1/enable(%03X) = %08X\n", machine().describe_context(), offset * 4, result);
logit = 0;
break;
case NREG_INTCLR + 0: /* Interrupt clear */
case NREG_INTCLR + 1: /* Interrupt clear */
if (LOG_NILE) logerror("%08X:NILE READ: interrupt clear(%03X) = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
if (LOG_NILE) logerror("%s NILE READ: interrupt clear(%03X) = %08X\n", machine().describe_context(), offset * 4, result);
logit = 0;
break;
case NREG_INTPPES + 0: /* PCI Interrupt control */
case NREG_INTPPES + 1: /* PCI Interrupt control */
if (LOG_NILE) logerror("%08X:NILE READ: PCI interrupt ppes(%03X) = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
if (LOG_NILE) logerror("%s NILE READ: PCI interrupt ppes(%03X) = %08X\n", machine().describe_context(), offset * 4, result);
logit = 0;
break;
@ -838,12 +838,12 @@ READ32_MEMBER(vrc5074_device::cpu_reg_r)
result = m_cpu_regs[offset] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK;
}
if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, result);
if (LOG_TIMERS) logerror("%s NILE READ: timer %d counter(%03X) = %08X\n", machine().describe_context(), which, offset * 4, result);
logit = 0;
break;
}
if (LOG_NILE && logit)
logerror("%06X:cpu_reg_r offset %03X = %08X\n", m_cpu_space->device().safe_pc(), offset * 4, result);
logerror("%s cpu_reg_r offset %03X = %08X\n", machine().describe_context(), offset * 4, result);
return result;
}
@ -885,34 +885,34 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
if (data & 0x1) logerror("cpu_reg_w: System Cold Reset\n");
if (data & 0x2) logerror("cpu_reg_w: CPU Warm Reset\n");
case NREG_CPUSTAT + 1: /* CPU status */
if (LOG_NILE) logerror("%08X:NILE WRITE: CPU status(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
if (LOG_NILE) logerror("%s NILE WRITE: CPU status(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0;
break;
case NREG_INTCTRL + 0: /* Interrupt control */
case NREG_INTCTRL + 1: /* Interrupt control */
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
if (LOG_NILE) logerror("%s NILE WRITE: interrupt control(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0;
update_nile_irqs();
break;
case NREG_INTSTAT0 + 0: /* Interrupt status 0 */
case NREG_INTSTAT0 + 1: /* Interrupt status 0 */
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
if (LOG_NILE) logerror("%s NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0;
update_nile_irqs();
break;
case NREG_INTSTAT1 + 0: /* Interrupt status 1 */
case NREG_INTSTAT1 + 1: /* Interrupt status 1 */
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
if (LOG_NILE) logerror("%s NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0;
update_nile_irqs();
break;
case NREG_INTCLR + 0: /* Interrupt clear */
//case NREG_INTCLR + 1: /* Interrupt clear */
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
if (LOG_NILE) logerror("%s NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0;
//m_nile_irq_state &= ~(m_cpu_regs[offset] & ~0xf00);
m_nile_irq_state &= ~(data);
@ -921,7 +921,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_INTPPES + 0: /* PCI Interrupt control */
case NREG_INTPPES + 1: /* PCI Interrupt control */
if (LOG_NILE) logerror("%08X:NILE WRITE: PCI interrupt ppes(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
if (LOG_NILE) logerror("%s NILE WRITE: PCI interrupt ppes(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0;
break;
@ -945,7 +945,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_DMACTRL0:
case NREG_DMACTRL1:
which = (offset - NREG_DMACTRL0) / 6;
logerror("%08X:NILE WRITE: DMACTRL %d = %08X\n", m_cpu_space->device().safe_pc(), which, data);
logerror("%s NILE WRITE: DMACTRL %d = %08X\n", machine().describe_context(), which, data);
logit = 0;
break;
case NREG_T0CTRL + 1: /* SDRAM timer control (control bits) */
@ -953,7 +953,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_T2CTRL + 1: /* general purpose timer control (control bits) */
case NREG_T3CTRL + 1: /* watchdog timer control (control bits) */
which = (offset - NREG_T0CTRL) / 4;
if (LOG_NILE | LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, data, mem_mask);
if (LOG_NILE | LOG_TIMERS) logerror("%s NILE WRITE: timer %d control(%03X) = %08X & %08X\n", machine().describe_context(), which, offset * 4, data, mem_mask);
logit = 0;
m_timer_period[which] = (uint64_t(m_cpu_regs[NREG_T0CTRL + which * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double();
if (m_cpu_regs[offset] & 2) {
@ -982,7 +982,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_T2CNTR: /* general purpose timer control (counter) */
case NREG_T3CNTR: /* watchdog timer control (counter) */
which = (offset - NREG_T0CNTR) / 4;
if (LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d counter(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, data, mem_mask);
if (LOG_TIMERS) logerror("%s NILE WRITE: timer %d counter(%03X) = %08X & %08X\n", machine().describe_context(), which, offset * 4, data, mem_mask);
logit = 0;
if (m_cpu_regs[offset - 1] & 1)
@ -993,7 +993,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
}
if (LOG_NILE && logit)
logerror("%06X:cpu_reg_w offset %03X = %08X & %08X\n", m_cpu_space->device().safe_pc(), offset * 4, data, mem_mask);
logerror("%s cpu_reg_w offset %03X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
}
WRITE_LINE_MEMBER(vrc5074_device::uart_irq_callback)
@ -1011,7 +1011,7 @@ READ32_MEMBER(vrc5074_device::serial_r)
uint32_t result = m_uart->ins8250_r(space, offset>>1);
if (0 && LOG_NILE)
logerror("%06X:serial_r offset %03X = %08X (%08x)\n", m_cpu_space->device().safe_pc(), offset>>1, result, offset*4);
logerror("%s serial_r offset %03X = %08X (%08x)\n", machine().describe_context(), offset>>1, result, offset*4);
return result;
}
@ -1030,5 +1030,5 @@ WRITE32_MEMBER(vrc5074_device::serial_w)
}
}
if (0 && LOG_NILE)
logerror("%06X:serial_w offset %03X = %08X & %08X (%08x)\n", m_cpu_space->device().safe_pc(), offset>>1, data, mem_mask, offset*4);
logerror("%s serial_w offset %03X = %08X & %08X (%08x)\n", machine().describe_context(), offset>>1, data, mem_mask, offset*4);
}

8
src/devices/machine/wd33c93.cpp
View File

@ -474,7 +474,7 @@ WRITE8_MEMBER(wd33c93_device::write)
case 1:
{
LOG( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", space.device().safe_pc(), sasr, data );
LOG( "WD33C93: %s - Write REG=%02x, data = %02x\n", machine().describe_context(), sasr, data );
/* update the register */
regs[sasr] = data;
@ -482,7 +482,7 @@ WRITE8_MEMBER(wd33c93_device::write)
/* if we receive a command, schedule to process it */
if ( sasr == WD_COMMAND )
{
LOG( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", space.device().safe_pc(), data, getunit() );
LOG( "WDC33C93: %s - Executing command %08x - unit %d\n", machine().describe_context(), data, getunit() );
/* signal we're processing it */
regs[WD_AUXILIARY_STATUS] |= ASR_CIP;
@ -631,7 +631,7 @@ READ8_MEMBER(wd33c93_device::read)
m_irq_cb(0);
}
LOG( "WD33C93: PC=%08x - Status read (%02x)\n", space.device().safe_pc(), regs[WD_SCSI_STATUS] );
LOG( "WD33C93: %s - Status read (%02x)\n", machine().describe_context(), regs[WD_SCSI_STATUS] );
}
else if ( sasr == WD_DATA )
{
@ -700,7 +700,7 @@ READ8_MEMBER(wd33c93_device::read)
}
}
LOG( "WD33C93: PC=%08x - Data read (%02x)\n", space.device().safe_pc(), regs[WD_DATA] );
LOG( "WD33C93: %s - Data read (%02x)\n", machine().describe_context(), regs[WD_DATA] );
/* get the register value */
ret = regs[sasr];

4
src/devices/sound/l7a1045_l6028_dsp_a.cpp
View File

@ -218,14 +218,14 @@ WRITE16_MEMBER(l7a1045_sound_device::sound_select_w)
if (ACCESSING_BITS_0_7)
{
m_audiochannel = data;
if (m_audiochannel & 0xe0) printf("%08x: l7a1045_sound_select_w unknown channel %01x\n", space.device().safe_pc(), m_audiochannel & 0xff);
if (m_audiochannel & 0xe0) logerror("%s l7a1045_sound_select_w unknown channel %01x\n", machine().describe_context(), m_audiochannel & 0xff);
m_audiochannel &= 0x1f;
}
if (ACCESSING_BITS_8_15)
{
m_audioregister = (data >> 8);
if (m_audioregister >0x0a) printf("%08x: l7a1045_sound_select_w unknown register %01x\n", space.device().safe_pc(), m_audioregister & 0xff);
if (m_audioregister >0x0a) logerror("%s l7a1045_sound_select_w unknown register %01x\n", machine().describe_context(), m_audioregister & 0xff);
m_audioregister &= 0x0f;
}

8
src/devices/video/imagetek_i4100.cpp
View File

@ -689,7 +689,7 @@ WRITE16_MEMBER( imagetek_i4100_device::blitter_w )
int shift = (dst_offs & 0x80) ? 0 : 8;
uint16_t mask = (dst_offs & 0x80) ? 0x00ff : 0xff00;
// logerror("CPU #0 PC %06X : Blitter regs %08X, %08X, %08X\n", space.device().safe_pc(), tmap, src_offs, dst_offs);
// logerror("%s Blitter regs %08X, %08X, %08X\n", machine().describe_context(), tmap, src_offs, dst_offs);
dst_offs >>= 7 + 1;
switch (tmap)
@ -699,7 +699,7 @@ WRITE16_MEMBER( imagetek_i4100_device::blitter_w )
case 3:
break;
default:
logerror("CPU #0 PC %06X : Blitter unknown destination: %08X\n", space.device().safe_pc(), tmap);
logerror("%s Blitter unknown destination: %08X\n", machine().describe_context(), tmap);
return;
}
@ -709,7 +709,7 @@ WRITE16_MEMBER( imagetek_i4100_device::blitter_w )
src_offs %= m_gfxrom_size;
b1 = m_gfxrom[src_offs];
// logerror("CPU #0 PC %06X : Blitter opcode %02X at %06X\n", space.device().safe_pc(), b1, src_offs);
// logerror("%s Blitter opcode %02X at %06X\n", machine().describe_context(), b1, src_offs);
src_offs++;
count = ((~b1) & 0x3f) + 1;
@ -785,7 +785,7 @@ WRITE16_MEMBER( imagetek_i4100_device::blitter_w )
break;
default:
//logerror("CPU #0 PC %06X : Blitter unknown opcode %02X at %06X\n",space.device().safe_pc(),b1,src_offs-1);
//logerror("%s Blitter unknown opcode %02X at %06X\n",machine().describe_context(),b1,src_offs-1);
return;
}

2
src/devices/video/pc_vga.cpp
View File

@ -1869,7 +1869,7 @@ READ8_MEMBER(vga_device::port_03d0_r)
data = vga_crtc_r(space, offset, mem_mask);
if(offset == 8)
{
logerror("VGA: 0x3d8 read at %08x\n",space.device().safe_pc());
logerror("VGA: 0x3d8 read %s\n", machine().describe_context());
data = 0; // TODO: PC-200 reads back CGA register here, everything else returns open bus OR CGA emulation of register 0x3d8
}

16
src/devices/video/scn2674.cpp
View File

@ -559,19 +559,19 @@ READ8_MEMBER( scn2674_device::read )
*/
case 0:
LOG("Read Irq Register %02x %06x\n",m_irq_register,space.device().safe_pc());
LOG("Read Irq Register %02x %s\n",m_irq_register,machine().describe_context());
return m_irq_register;
case 1:
LOG("Read Status Register %02X %06x\n",m_status_register,space.device().safe_pc());
LOG("Read Status Register %02X %s\n",m_status_register,machine().describe_context());
return m_status_register;
case 2: LOG("Read Screen1_l Register %06x\n",space.device().safe_pc());return m_screen1_l;
case 3: LOG("Read Screen1_h Register %06x\n",space.device().safe_pc());return m_screen1_h & 0x3f;
case 4: LOG("Read Cursor_l Register %06x\n",space.device().safe_pc());return m_cursor_l;
case 5: LOG("Read Cursor_h Register %06x\n",space.device().safe_pc());return m_cursor_h;
case 6: LOG("Read Screen2_l Register %06x\n",space.device().safe_pc());return m_screen2_l;
case 7: LOG("Read Screen2_h Register %06x\n",space.device().safe_pc());return m_screen2_h;
case 2: LOG("Read Screen1_l Register %s\n",machine().describe_context());return m_screen1_l;
case 3: LOG("Read Screen1_h Register %s\n",machine().describe_context());return m_screen1_h & 0x3f;
case 4: LOG("Read Cursor_l Register %s\n",machine().describe_context());return m_cursor_l;
case 5: LOG("Read Cursor_h Register %s\n",machine().describe_context());return m_cursor_h;
case 6: LOG("Read Screen2_l Register %s\n",machine().describe_context());return m_screen2_l;
case 7: LOG("Read Screen2_h Register %s\n",machine().describe_context());return m_screen2_h;
}
return 0xff;

4
src/devices/video/voodoo_pci.cpp
View File

@ -190,7 +190,7 @@ READ32_MEMBER(voodoo_pci_device::vga_r)
if (ACCESSING_BITS_24_31)
result |= downcast<voodoo_banshee_device *>(m_voodoo.target())->banshee_vga_r(space, offset * 4 + 3 + 0xb0, mem_mask >> 24) << 24;
if (0)
logerror("%06X:voodoo_pci_device vga_r from offset %02X = %08X & %08X\n", space.device().safe_pc(), offset * 4, result, mem_mask);
logerror("%s voodoo_pci_device vga_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask);
return result;
}
WRITE32_MEMBER(voodoo_pci_device::vga_w)
@ -205,5 +205,5 @@ WRITE32_MEMBER(voodoo_pci_device::vga_w)
downcast<voodoo_banshee_device *>(m_voodoo.target())->banshee_vga_w(space, offset * 4 + 3 + 0xb0, data >> 24, mem_mask >> 24);
if (0)
logerror("%06X:voodoo_pci_device vga_w to offset %04X = %08X & %08X\n", space.device().safe_pc(), offset * 4, data, mem_mask);
logerror("%s voodoo_pci_device vga_w to offset %04X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
}

10
src/mame/audio/cage.cpp
View File

@ -370,7 +370,7 @@ READ32_MEMBER( atari_cage_device::tms32031_io_r )
}
if (LOG_32031_IOPORTS)
logerror("CAGE:%06X:%s read -> %08X\n", space.device().safe_pc(), register_names[offset & 0x7f], result);
logerror("%s CAGE:%s read -> %08X\n", machine().describe_context(), register_names[offset & 0x7f], result);
return result;
}
@ -382,7 +382,7 @@ WRITE32_MEMBER( atari_cage_device::tms32031_io_w )
COMBINE_DATA(&tms32031_io_regs[offset]);
if (LOG_32031_IOPORTS)
logerror("CAGE:%06X:%s write = %08X\n", space.device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
logerror("%s CAGE:%s write = %08X\n", machine().describe_context(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
switch (offset)
{
@ -459,7 +459,7 @@ void atari_cage_device::update_control_lines()
READ32_MEMBER( atari_cage_device::cage_from_main_r )
{
if (LOG_COMM)
logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), m_from_main);
logerror("%s CAGE read command = %04X\n", machine().describe_context(), m_from_main);
m_cpu_to_cage_ready = 0;
update_control_lines();
m_cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE);
@ -471,7 +471,7 @@ WRITE32_MEMBER( atari_cage_device::cage_from_main_ack_w )
{
if (LOG_COMM)
{
logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), m_from_main);
logerror("%s CAGE ack command = %04X\n", machine().describe_context(), m_from_main);
}
}
@ -479,7 +479,7 @@ WRITE32_MEMBER( atari_cage_device::cage_from_main_ack_w )
WRITE32_MEMBER( atari_cage_device::cage_to_main_w )
{
if (LOG_COMM)
logerror("%06X:Data from CAGE = %04X\n", space.device().safe_pc(), data);
logerror("%s Data from CAGE = %04X\n", machine().describe_context(), data);
m_soundlatch->write(space, 0, data, mem_mask);
m_cage_to_cpu_ready = 1;
update_control_lines();

40
src/mame/audio/dcs.cpp
View File

@ -1194,7 +1194,7 @@ READ16_MEMBER( dcs_audio_device::dsio_r )
dsio.channelbits ^= 0x0010;
result = (result & ~0x0010) | dsio.channelbits;
}
if (LOG_DCS_IO && offset != 2) logerror("%04X: dsio_r 0x%x = %04x\n", space.device().safe_pc(), offset, result);
if (LOG_DCS_IO && offset != 2) logerror("%s dsio_r 0x%x = %04x\n", machine().describe_context(), offset, result);
return result;
}
@ -1223,7 +1223,7 @@ WRITE16_MEMBER( dcs_audio_device::dsio_w )
m_data_bank->set_entry(DSIO_DM_PG % m_sounddata_banks);
break;
}
if (LOG_DCS_IO) logerror("%04X: dsio_w 0x%x = %04x\n", space.device().safe_pc(), offset, data);
if (LOG_DCS_IO) logerror("%s dsio_w 0x%x = %04x\n", machine().describe_context(), offset, data);
}
@ -1269,7 +1269,7 @@ READ16_MEMBER( dcs_audio_device::denver_r )
// SDRC Revision
result = 0x0003;
}
if (LOG_DCS_IO) logerror("%04X: denver_r %s 0x%x = %04x\n", space.device().safe_pc(), denver_regname[offset], offset, result);
if (LOG_DCS_IO) logerror("%s denver_r %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, result);
return result;
}
@ -1316,7 +1316,7 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
m_fifo_reset_w(1);
break;
}
if (LOG_DCS_IO) logerror("%04X: denver_w %s 0x%x = %04x\n", space.device().safe_pc(), denver_regname[offset], offset, data);
if (LOG_DCS_IO) logerror("%s denver_w %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, data);
}
@ -1331,7 +1331,7 @@ WRITE32_MEMBER( dcs_audio_device::dsio_idma_addr_w )
{
dsio_state &dsio = m_dsio;
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_addr = %04X\n", space.device().safe_pc(), data);
logerror("%s IDMA_addr = %04X\n", machine().describe_context(), data);
downcast<adsp2181_device *>(m_cpu)->idma_addr_w(data);
if (data == 0)
dsio.start_on_next_write = 2;
@ -1341,24 +1341,23 @@ WRITE32_MEMBER( dcs_audio_device::dsio_idma_addr_w )
WRITE32_MEMBER( dcs_audio_device::dsio_idma_data_w )
{
dsio_state &dsio = m_dsio;
uint32_t pc = space.device().safe_pc();
// IDMA is to internal memory only
m_ram_map->set_bank(0);
if (ACCESSING_BITS_0_15)
{
if (LOG_DCS_TRANSFERS && !(downcast<adsp2181_device *>(m_cpu)->idma_addr_r() & 0x0ffc))
logerror("%08X:IDMA_data_w(%04X) = %04X\n", pc, downcast<adsp2181_device *>(m_cpu)->idma_addr_r(), data & 0xffff);
logerror("%s IDMA_data_w(%04X) = %04X\n", machine().describe_context(), downcast<adsp2181_device *>(m_cpu)->idma_addr_r(), data & 0xffff);
downcast<adsp2181_device *>(m_cpu)->idma_data_w(data & 0xffff);
}
if (ACCESSING_BITS_16_31)
{
if (LOG_DCS_TRANSFERS && !(downcast<adsp2181_device *>(m_cpu)->idma_addr_r() & 0x0ffc))
logerror("%08X:IDMA_data_w(%04X) = %04X\n", pc, downcast<adsp2181_device *>(m_cpu)->idma_addr_r(), data >> 16);
logerror("%s IDMA_data_w(%04X) = %04X\n", machine().describe_context(), downcast<adsp2181_device *>(m_cpu)->idma_addr_r(), data >> 16);
downcast<adsp2181_device *>(m_cpu)->idma_data_w(data >> 16);
}
if (dsio.start_on_next_write && --dsio.start_on_next_write == 0)
{
logerror("%08X: Starting DSIO CPU\n", machine().device("maincpu")->safe_pc());
logerror("%08X: Starting DSIO CPU\n", machine().device<cpu_device>("maincpu")->pc());
m_cpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
}
// Restore internal/external mapping
@ -1375,7 +1374,7 @@ READ32_MEMBER( dcs_audio_device::dsio_idma_data_r )
// Restore internal/external mapping
m_ram_map->set_bank(m_dmovlay_val);
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_data_r(%04X) = %04X\n", space.device().safe_pc(), downcast<adsp2181_device *>(m_cpu)->idma_addr_r(), result);
logerror("%s IDMA_data_r(%04X) = %04X\n", machine().describe_context(), downcast<adsp2181_device *>(m_cpu)->idma_addr_r(), result);
return result;
}
@ -1541,7 +1540,7 @@ READ16_MEMBER( dcs_audio_device::input_latch_r )
if (m_auto_ack)
input_latch_ack_w(space,0,0,0xffff);
if (LOG_DCS_IO)
logerror("%08X:input_latch_r(%04X)\n", space.device().safe_pc(), m_input_data);
logerror("%s input_latch_r(%04X)\n", machine().describe_context(), m_input_data);
return m_input_data;
}
@ -1550,7 +1549,7 @@ READ32_MEMBER( dcs_audio_device::input_latch32_r )
if (m_auto_ack)
input_latch_ack_w(space,0,0,0xffff);
if (LOG_DCS_IO)
logerror("%08X:input_latch32_r(%04X)\n", space.device().safe_pc(), m_input_data);
logerror("%s input_latch32_r(%04X)\n", machine().describe_context(), m_input_data);
return m_input_data << 8;
}
@ -1571,7 +1570,7 @@ WRITE16_MEMBER( dcs_audio_device::output_latch_w )
{
m_pre_output_data = data;
if (LOG_DCS_IO)
logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space.device().safe_pc(), data, IS_OUTPUT_EMPTY());
logerror("%s output_latch_w(%04X) (empty=%d)\n", machine().describe_context(), data, IS_OUTPUT_EMPTY());
machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::latch_delayed_w),this), data>>8);
}
@ -1580,7 +1579,7 @@ WRITE32_MEMBER( dcs_audio_device::output_latch32_w )
{
m_pre_output_data = data >> 8;
if (LOG_DCS_IO)
logerror("%08X:output_latch32_w(%04X) (empty=%d)\n", space.device().safe_pc(), data>>8, IS_OUTPUT_EMPTY());
logerror("%s output_latch32_w(%04X) (empty=%d)\n", machine().describe_context(), data>>8, IS_OUTPUT_EMPTY());
machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::latch_delayed_w),this), data>>8);
}
@ -1637,8 +1636,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::output_control_delayed_w )
WRITE16_MEMBER( dcs_audio_device::output_control_w )
{
if (LOG_DCS_IO)
logerror("%04X:output_control_w = %04X\n", space.device().safe_pc(), data);
//printf("%04X:output_control_w = %04X\n", space.device().safe_pc(), data);
logerror("%s output_control_w = %04X\n", machine().describe_context(), data);
machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::output_control_delayed_w),this), data);
}
@ -1646,7 +1644,7 @@ WRITE16_MEMBER( dcs_audio_device::output_control_w )
READ16_MEMBER( dcs_audio_device::output_control_r )
{
if (LOG_DCS_IO)
logerror("%04X:output_control_r = %04X\n", space.device().safe_pc(), m_output_control);
logerror("%s output_control_r = %04X\n", machine().describe_context(), m_output_control);
m_output_control_cycles = m_cpu->total_cycles();
return m_output_control;
}
@ -1655,7 +1653,7 @@ READ16_MEMBER( dcs_audio_device::output_control_r )
int dcs_audio_device::data2_r()
{
if (LOG_DCS_IO)
logerror("%08X dcs:data2_r = %04X\n", machine().device("maincpu")->safe_pc(), m_output_control);
logerror("%08X dcs:data2_r = %04X\n", machine().device<cpu_device>("maincpu")->pc(), m_output_control);
if (m_rev >= REV_DSIO) {
// Not sure about this but allows sf2049 and roadburn to pass audio initialization tests at boot
return m_output_control << 8;
@ -1832,7 +1830,7 @@ READ16_MEMBER( dcs_audio_device::adsp_control_r )
break;
}
if (LOG_DCS_IO)
logerror("%04X: adsp_control_r(%06x) = %04X\n", space.device().safe_pc(), offset + 0x3fe0, result);
logerror("%s adsp_control_r(%06x) = %04X\n", machine().describe_context(), offset + 0x3fe0, result);
return result;
}
@ -1847,7 +1845,7 @@ WRITE16_MEMBER(dcs_audio_device:: adsp_control_w )
/* bit 9 forces a reset (not on 2181) */
if ((data & 0x0200) && !(m_rev == REV_DSIO || m_rev == REV_DENV))
{
logerror("%04X:Rebooting DCS due to SYSCONTROL write = %04X\n", space.device().safe_pc(), data);
logerror("%s Rebooting DCS due to SYSCONTROL write = %04X\n", machine().describe_context(), data);
m_cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
dcs_boot();
m_control_regs[SYSCONTROL_REG] = 0;
@ -1922,7 +1920,7 @@ WRITE16_MEMBER(dcs_audio_device:: adsp_control_w )
break;
}
if (LOG_DCS_IO)
logerror("%04X: adsp_control_w(%06x) = %04X\n", space.device().safe_pc(), offset + 0x3fe0, data);
logerror("%s adsp_control_w(%06x) = %04X\n", machine().describe_context(), offset + 0x3fe0, data);
}

199
src/mame/drivers/gp32.cpp
View File

@ -28,21 +28,16 @@
#include "softlist.h"
#include "speaker.h"
#define LOG_GENERAL (1U << 0)
#define LOG_STARTSTOP (1U << 1)
#define LOG_TIMER (1U << 2)
#define LOG_VRAM (1U << 3)
#define LOG_MISC (1U << 4)
#define LOG_TRACE (1U << 5)
#define VERBOSE_LEVEL ( 0 )
#define VERBOSE LOG_GENERAL
static inline void ATTR_PRINTF(3,4) verboselog(device_t &device, int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
device.logerror( "%s: %s", device.machine().describe_context( ), buf);
}
}
#include "logmacro.h"
#define CLOCK_MULTIPLIER 1
@ -78,7 +73,7 @@ void gp32_state::s3c240x_lcd_dma_reload()
m_s3c240x_lcd.offsize = BITS( m_s3c240x_lcd_regs[7], 21, 11);
m_s3c240x_lcd.pagewidth_cur = 0;
m_s3c240x_lcd.pagewidth_max = BITS( m_s3c240x_lcd_regs[7], 10, 0);
verboselog(*this, 3, "LCD - vramaddr %08X %08X offsize %08X pagewidth %08X\n", m_s3c240x_lcd.vramaddr_cur, m_s3c240x_lcd.vramaddr_max, m_s3c240x_lcd.offsize, m_s3c240x_lcd.pagewidth_max);
LOGMASKED(LOG_VRAM, "LCD - vramaddr %08X %08X offsize %08X pagewidth %08X\n", m_s3c240x_lcd.vramaddr_cur, m_s3c240x_lcd.vramaddr_max, m_s3c240x_lcd.offsize, m_s3c240x_lcd.pagewidth_max);
}
void gp32_state::s3c240x_lcd_dma_init()
@ -250,15 +245,15 @@ void gp32_state::s3c240x_lcd_render_16( )
TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_lcd_timer_exp)
{
screen_device *screen = machine().first_screen();
verboselog(*this, 2, "LCD timer callback\n");
LOGMASKED(LOG_TIMER, "LCD timer callback\n");
m_s3c240x_lcd.vpos = screen->vpos();
m_s3c240x_lcd.hpos = screen->hpos();
verboselog(*this, 3, "LCD - vpos %d hpos %d\n", m_s3c240x_lcd.vpos, m_s3c240x_lcd.hpos);
LOGMASKED(LOG_VRAM, "LCD - vpos %d hpos %d\n", m_s3c240x_lcd.vpos, m_s3c240x_lcd.hpos);
if (m_s3c240x_lcd.vramaddr_cur >= m_s3c240x_lcd.vramaddr_max)
{
s3c240x_lcd_dma_reload();
}
verboselog(*this, 3, "LCD - vramaddr %08X\n", m_s3c240x_lcd.vramaddr_cur);
LOGMASKED(LOG_VRAM, "LCD - vramaddr %08X\n", m_s3c240x_lcd.vramaddr_cur);
while (m_s3c240x_lcd.vramaddr_cur < m_s3c240x_lcd.vramaddr_max)
{
switch (m_s3c240x_lcd.bppmode)
@ -268,7 +263,7 @@ TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_lcd_timer_exp)
case BPPMODE_TFT_04 : s3c240x_lcd_render_04(); break;
case BPPMODE_TFT_08 : s3c240x_lcd_render_08(); break;
case BPPMODE_TFT_16 : s3c240x_lcd_render_16(); break;
default : verboselog(*this, 0, "s3c240x_lcd_timer_exp: bppmode %d not supported\n", m_s3c240x_lcd.bppmode); break;
default : LOGMASKED(LOG_GENERAL, "s3c240x_lcd_timer_exp: bppmode %d not supported\n", m_s3c240x_lcd.bppmode); break;
}
if ((m_s3c240x_lcd.vpos == 0) && (m_s3c240x_lcd.hpos == 0)) break;
}
@ -301,7 +296,7 @@ READ32_MEMBER(gp32_state::s3c240x_lcd_r)
}
break;
}
verboselog(*this, 9, "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(LCD) %08X -> %08X %s\n", 0x14A00000 + (offset << 2), data, machine().describe_context());
return data;
}
@ -321,20 +316,20 @@ void gp32_state::s3c240x_lcd_configure()
hozval = BITS( m_s3c240x_lcd_regs[2], 18, 8);
clkval = BITS( m_s3c240x_lcd_regs[0], 17, 8);
hclk = s3c240x_get_hclk(MPLLCON);
verboselog(*this, 3, "LCD - vspw %d vbpd %d lineval %d vfpd %d hspw %d hbpd %d hfpd %d hozval %d clkval %d hclk %d\n", vspw, vbpd, lineval, vfpd, hspw, hbpd, hfpd, hozval, clkval, hclk);
LOGMASKED(LOG_VRAM, "LCD - vspw %d vbpd %d lineval %d vfpd %d hspw %d hbpd %d hfpd %d hozval %d clkval %d hclk %d\n", vspw, vbpd, lineval, vfpd, hspw, hbpd, hfpd, hozval, clkval, hclk);
vclk = (double)(hclk / ((clkval + 1) * 2));
verboselog(*this, 3, "LCD - vclk %f\n", vclk);
LOGMASKED(LOG_VRAM, "LCD - vclk %f\n", vclk);
framerate = vclk / (((vspw + 1) + (vbpd + 1) + (lineval + 1) + (vfpd + 1)) * ((hspw + 1) + (hbpd + 1) + (hfpd + 1) + (hozval + 1)));
verboselog(*this, 3, "LCD - framerate %f\n", framerate);
LOGMASKED(LOG_VRAM, "LCD - framerate %f\n", framerate);
visarea.set(0, hozval, 0, lineval);
verboselog(*this, 3, "LCD - visarea min_x %d min_y %d max_x %d max_y %d\n", visarea.min_x, visarea.min_y, visarea.max_x, visarea.max_y);
LOGMASKED(LOG_VRAM, "LCD - visarea min_x %d min_y %d max_x %d max_y %d\n", visarea.min_x, visarea.min_y, visarea.max_x, visarea.max_y);
screen->configure(hozval + 1, lineval + 1, visarea, HZ_TO_ATTOSECONDS( framerate));
}
void gp32_state::s3c240x_lcd_start()
{
screen_device *screen = machine().first_screen();
verboselog(*this, 1, "LCD start\n");
LOGMASKED(LOG_STARTSTOP, "LCD start\n");
s3c240x_lcd_configure();
s3c240x_lcd_dma_init();
m_s3c240x_lcd_timer->adjust( screen->time_until_pos(0, 0));
@ -342,7 +337,7 @@ void gp32_state::s3c240x_lcd_start()
void gp32_state::s3c240x_lcd_stop()
{
verboselog(*this, 1, "LCD stop\n");
LOGMASKED(LOG_STARTSTOP, "LCD stop\n");
m_s3c240x_lcd_timer->adjust( attotime::never);
}
@ -361,7 +356,7 @@ void gp32_state::s3c240x_lcd_recalc()
WRITE32_MEMBER(gp32_state::s3c240x_lcd_w)
{
uint32_t old_value = m_s3c240x_lcd_regs[offset];
verboselog(*this, 9, "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(LCD) %08X <- %08X %s\n", 0x14A00000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_lcd_regs[offset]);
switch (offset)
{
@ -383,17 +378,17 @@ WRITE32_MEMBER(gp32_state::s3c240x_lcd_w)
READ32_MEMBER(gp32_state::s3c240x_lcd_palette_r)
{
uint32_t data = m_s3c240x_lcd_palette[offset];
verboselog(*this, 9, "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00400 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(LCD) %08X -> %08X %s\n", 0x14A00400 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_lcd_palette_w)
{
verboselog(*this, 9, "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00400 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(LCD) %08X <- %08X %s\n", 0x14A00400 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_lcd_palette[offset]);
if (mem_mask != 0xffffffff)
{
verboselog(*this, 0, "s3c240x_lcd_palette_w: unknown mask %08x\n", mem_mask);
LOGMASKED(LOG_GENERAL, "s3c240x_lcd_palette_w: unknown mask %08x\n", mem_mask);
}
m_palette->set_pen_color( offset, s3c240x_get_color_5551( data & 0xFFFF));
}
@ -438,13 +433,13 @@ uint32_t gp32_state::s3c240x_get_pclk(int reg)
READ32_MEMBER(gp32_state::s3c240x_clkpow_r)
{
uint32_t data = m_s3c240x_clkpow_regs[offset];
verboselog(*this, 9, "(CLKPOW) %08X -> %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(CLKPOW) %08X -> %08X %s\n", 0x14800000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_clkpow_w)
{
verboselog(*this, 9, "(CLKPOW) %08X <- %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(CLKPOW) %08X <- %08X %s\n", 0x14800000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_clkpow_regs[offset]);
switch (offset)
{
@ -483,7 +478,7 @@ void gp32_state::s3c240x_check_pending_irq()
void gp32_state::s3c240x_request_irq(uint32_t int_type)
{
verboselog(*this, 5, "request irq %d\n", int_type);
LOGMASKED(LOG_MISC, "request irq %d\n", int_type);
if (m_s3c240x_irq_regs[0] == 0)
{
m_s3c240x_irq_regs[0] |= (1 << int_type); // SRCPND
@ -502,14 +497,14 @@ void gp32_state::s3c240x_request_irq(uint32_t int_type)
READ32_MEMBER(gp32_state::s3c240x_irq_r)
{
uint32_t data = m_s3c240x_irq_regs[offset];
verboselog(*this, 9, "(IRQ) %08X -> %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(IRQ) %08X -> %08X %s\n", 0x14400000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_irq_w)
{
uint32_t old_value = m_s3c240x_irq_regs[offset];
verboselog(*this, 9, "(IRQ) %08X <- %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(IRQ) %08X <- %08X %s\n", 0x14400000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_irq_regs[offset]);
switch (offset)
{
@ -559,7 +554,7 @@ static const char *const timer_reg_names[] =
READ32_MEMBER(gp32_state::s3c240x_pwm_r)
{
uint32_t data = m_s3c240x_pwm_regs[offset];
verboselog(*this, 9, "(PWM) %08X -> %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(PWM) %08X -> %08X %s\n", 0x15100000 + (offset << 2), data, machine().describe_context());
return data;
}
@ -572,7 +567,7 @@ void gp32_state::s3c240x_pwm_start(int timer)
const uint32_t *regs = &m_s3c240x_pwm_regs[3+timer*3];
uint32_t prescaler, mux, cnt, cmp, auto_reload;
double freq, hz;
verboselog(*this, 1, "PWM %d start\n", timer);
LOGMASKED(LOG_STARTSTOP, "PWM %d start\n", timer);
prescaler = (m_s3c240x_pwm_regs[0] >> prescaler_shift[timer]) & 0xFF;
mux = (m_s3c240x_pwm_regs[1] >> mux_shift[timer]) & 0x0F;
freq = s3c240x_get_pclk(MPLLCON) / (prescaler + 1) / mux_table[mux];
@ -588,7 +583,7 @@ void gp32_state::s3c240x_pwm_start(int timer)
auto_reload = BIT( m_s3c240x_pwm_regs[2], tcon_shift[timer] + 2);
}
hz = freq / (cnt - cmp + 1);
verboselog(*this, 5, "PWM %d - FCLK=%d HCLK=%d PCLK=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, s3c240x_get_fclk(MPLLCON), s3c240x_get_hclk(MPLLCON), s3c240x_get_pclk(MPLLCON), prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
LOGMASKED(LOG_MISC, "PWM %d - FCLK=%d HCLK=%d PCLK=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, s3c240x_get_fclk(MPLLCON), s3c240x_get_hclk(MPLLCON), s3c240x_get_pclk(MPLLCON), prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
if (auto_reload)
{
m_s3c240x_pwm_timer[timer]->adjust( attotime::from_hz( hz), timer, attotime::from_hz( hz));
@ -601,7 +596,7 @@ void gp32_state::s3c240x_pwm_start(int timer)
void gp32_state::s3c240x_pwm_stop(int timer)
{
verboselog(*this, 1, "PWM %d stop\n", timer);
LOGMASKED(LOG_STARTSTOP, "PWM %d stop\n", timer);
m_s3c240x_pwm_timer[timer]->adjust( attotime::never);
}
@ -621,7 +616,7 @@ void gp32_state::s3c240x_pwm_recalc(int timer)
WRITE32_MEMBER(gp32_state::s3c240x_pwm_w)
{
uint32_t old_value = m_s3c240x_pwm_regs[offset];
verboselog(*this, 9, "(PWM) %08X <- %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(PWM) %08X <- %08X %s\n", 0x15100000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_pwm_regs[offset]);
switch (offset)
{
@ -656,7 +651,7 @@ TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_pwm_timer_exp)
{
int ch = param;
static const int ch_int[] = { INT_TIMER0, INT_TIMER1, INT_TIMER2, INT_TIMER3, INT_TIMER4 };
verboselog(*this, 2, "PWM %d timer callback\n", ch);
LOGMASKED(LOG_TIMER, "PWM %d timer callback\n", ch);
if (BITS( m_s3c240x_pwm_regs[1], 23, 20) == (ch + 1))
{
s3c240x_dma_request_pwm();
@ -685,7 +680,7 @@ void gp32_state::s3c240x_dma_trigger(int dma)
address_space &space = m_maincpu->space( AS_PROGRAM);
int dsz, inc_src, inc_dst, servmode;
static const uint32_t ch_int[] = { INT_DMA0, INT_DMA1, INT_DMA2, INT_DMA3 };
verboselog(*this, 5, "DMA %d trigger\n", dma);
LOGMASKED(LOG_MISC, "DMA %d trigger\n", dma);
curr_tc = BITS( regs[3], 19, 0);
curr_src = BITS( regs[4], 28, 0);
curr_dst = BITS( regs[5], 28, 0);
@ -693,7 +688,7 @@ void gp32_state::s3c240x_dma_trigger(int dma)
servmode = BIT( regs[2], 26);
inc_src = BIT( regs[0], 29);
inc_dst = BIT( regs[1], 29);
verboselog(*this, 5, "DMA %d - curr_src %08X curr_dst %08X curr_tc %d dsz %d\n", dma, curr_src, curr_dst, curr_tc, dsz);
LOGMASKED(LOG_MISC, "DMA %d - curr_src %08X curr_dst %08X curr_tc %d dsz %d\n", dma, curr_src, curr_dst, curr_tc, dsz);
while (curr_tc > 0)
{
curr_tc--;
@ -737,7 +732,7 @@ void gp32_state::s3c240x_dma_trigger(int dma)
void gp32_state::s3c240x_dma_request_iis()
{
uint32_t *regs = &m_s3c240x_dma_regs[2<<3];
verboselog(*this, 5, "s3c240x_dma_request_iis\n");
LOGMASKED(LOG_MISC, "s3c240x_dma_request_iis\n");
if ((BIT( regs[6], 1) != 0) && (BIT( regs[2], 23) != 0) && (BITS( regs[2], 25, 24) == 0))
{
s3c240x_dma_trigger(2);
@ -747,7 +742,7 @@ void gp32_state::s3c240x_dma_request_iis()
void gp32_state::s3c240x_dma_request_pwm()
{
int i;
verboselog(*this, 5, "s3c240x_dma_request_pwm\n");
LOGMASKED(LOG_MISC, "s3c240x_dma_request_pwm\n");
for (i = 0; i < 4; i++)
{
if (i != 1)
@ -767,7 +762,7 @@ void gp32_state::s3c240x_dma_start(int dma)
uint32_t *regs = &m_s3c240x_dma_regs[dma<<3];
uint32_t dsz, tsz, reload;
int inc_src, inc_dst, _int, servmode, swhwsel, hwsrcsel;
verboselog(*this, 1, "DMA %d start\n", dma);
LOGMASKED(LOG_STARTSTOP, "DMA %d start\n", dma);
addr_src = BITS( regs[0], 28, 0);
addr_dst = BITS( regs[1], 28, 0);
tc = BITS( regs[2], 19, 0);
@ -780,8 +775,8 @@ void gp32_state::s3c240x_dma_start(int dma)
swhwsel = BIT( regs[2], 23);
reload = BIT( regs[2], 22);
dsz = BITS( regs[2], 21, 20);
verboselog(*this, 5, "DMA %d - addr_src %08X inc_src %d addr_dst %08X inc_dst %d int %d tsz %d servmode %d hwsrcsel %d swhwsel %d reload %d dsz %d tc %d\n", dma, addr_src, inc_src, addr_dst, inc_dst, _int, tsz, servmode, hwsrcsel, swhwsel, reload, dsz, tc);
verboselog(*this, 5, "DMA %d - copy %08X bytes from %08X (%s) to %08X (%s)\n", dma, tc << dsz, addr_src, inc_src ? "fix" : "inc", addr_dst, inc_dst ? "fix" : "inc");
LOGMASKED(LOG_MISC, "DMA %d - addr_src %08X inc_src %d addr_dst %08X inc_dst %d int %d tsz %d servmode %d hwsrcsel %d swhwsel %d reload %d dsz %d tc %d\n", dma, addr_src, inc_src, addr_dst, inc_dst, _int, tsz, servmode, hwsrcsel, swhwsel, reload, dsz, tc);
LOGMASKED(LOG_MISC, "DMA %d - copy %08X bytes from %08X (%s) to %08X (%s)\n", dma, tc << dsz, addr_src, inc_src ? "fix" : "inc", addr_dst, inc_dst ? "fix" : "inc");
s3c240x_dma_reload(dma);
if (swhwsel == 0)
{
@ -791,7 +786,7 @@ void gp32_state::s3c240x_dma_start(int dma)
void gp32_state::s3c240x_dma_stop(int dma)
{
verboselog(*this, 1, "DMA %d stop\n", dma);
LOGMASKED(LOG_STARTSTOP, "DMA %d stop\n", dma);
}
void gp32_state::s3c240x_dma_recalc(int dma)
@ -809,14 +804,14 @@ void gp32_state::s3c240x_dma_recalc(int dma)
READ32_MEMBER(gp32_state::s3c240x_dma_r)
{
uint32_t data = m_s3c240x_dma_regs[offset];
verboselog(*this, 9, "(DMA) %08X -> %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(DMA) %08X -> %08X %s\n", 0x14600000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_dma_w)
{
uint32_t old_value = m_s3c240x_dma_regs[offset];
verboselog(*this, 9, "(DMA) %08X <- %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(DMA) %08X <- %08X %s\n", 0x14600000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_dma_regs[offset]);
switch (offset)
{
@ -886,14 +881,14 @@ WRITE32_MEMBER(gp32_state::s3c240x_dma_w)
TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_dma_timer_exp)
{
int ch = param;
verboselog(*this, 2, "DMA %d timer callback\n", ch);
LOGMASKED(LOG_TIMER, "DMA %d timer callback\n", ch);
}
// SMARTMEDIA
void gp32_state::smc_reset()
{
verboselog(*this, 5, "smc_reset\n");
LOGMASKED(LOG_MISC, "smc_reset\n");
m_smc.add_latch = 0;
m_smc.chip = 0;
m_smc.cmd_latch = 0;
@ -906,7 +901,7 @@ void gp32_state::smc_reset()
void gp32_state::smc_init()
{
verboselog(*this, 5, "smc_init\n");
LOGMASKED(LOG_MISC, "smc_init\n");
smc_reset();
}
@ -914,28 +909,28 @@ uint8_t gp32_state::smc_read()
{
uint8_t data;
data = m_smartmedia->data_r();
verboselog(*this, 5, "smc_read %08X\n", data);
LOGMASKED(LOG_MISC, "smc_read %08X\n", data);
return data;
}
void gp32_state::smc_write(uint8_t data)
{
verboselog(*this, 5, "smc_write %08X\n", data);
LOGMASKED(LOG_MISC, "smc_write %08X\n", data);
if ((m_smc.chip) && (!m_smc.read))
{
if (m_smc.cmd_latch)
{
verboselog(*this, 5, "smartmedia_command_w %08X\n", data);
LOGMASKED(LOG_MISC, "smartmedia_command_w %08X\n", data);
m_smartmedia->command_w(data);
}
else if (m_smc.add_latch)
{
verboselog(*this, 5, "smartmedia_address_w %08X\n", data);
LOGMASKED(LOG_MISC, "smartmedia_address_w %08X\n", data);
m_smartmedia->address_w(data);
}
else
{
verboselog(*this, 5, "smartmedia_data_w %08X\n", data);
LOGMASKED(LOG_MISC, "smartmedia_data_w %08X\n", data);
m_smartmedia->data_w(data);
}
}
@ -968,7 +963,7 @@ void gp32_state::smc_update()
void gp32_state::i2s_reset()
{
verboselog(*this, 5, "i2s_reset\n");
LOGMASKED(LOG_MISC, "i2s_reset\n");
m_i2s.l3d = 0;
m_i2s.l3m = 0;
m_i2s.l3c = 0;
@ -976,7 +971,7 @@ void gp32_state::i2s_reset()
void gp32_state::i2s_init()
{
verboselog(*this, 5, "i2s_init\n");
LOGMASKED(LOG_MISC, "i2s_init\n");
i2s_reset();
}
@ -988,7 +983,7 @@ void gp32_state::i2s_write(int line, int data)
{
if (data != m_i2s.l3c)
{
verboselog(*this, 5, "I2S L3C %d\n", data);
LOGMASKED(LOG_MISC, "I2S L3C %d\n", data);
m_i2s.l3c = data;
}
}
@ -997,7 +992,7 @@ void gp32_state::i2s_write(int line, int data)
{
if (data != m_i2s.l3m)
{
verboselog(*this, 5, "I2S L3M %d\n", data);
LOGMASKED(LOG_MISC, "I2S L3M %d\n", data);
m_i2s.l3m = data;
}
}
@ -1006,7 +1001,7 @@ void gp32_state::i2s_write(int line, int data)
{
if (data != m_i2s.l3d)
{
verboselog(*this, 5, "I2S L3D %d\n", data);
LOGMASKED(LOG_MISC, "I2S L3D %d\n", data);
m_i2s.l3d = data;
}
}
@ -1064,14 +1059,14 @@ READ32_MEMBER(gp32_state::s3c240x_gpio_r)
}
break;
}
verboselog(*this, 9, "(GPIO) %08X -> %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(GPIO) %08X -> %08X %s\n", 0x15600000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_gpio_w)
{
COMBINE_DATA(&m_s3c240x_gpio[offset]);
verboselog(*this, 9, "(GPIO) %08X <- %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(GPIO) %08X <- %08X %s\n", 0x15600000 + (offset << 2), data, machine().describe_context());
switch (offset)
{
// PBCON
@ -1131,13 +1126,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_gpio_w)
READ32_MEMBER(gp32_state::s3c240x_memcon_r)
{
uint32_t data = m_s3c240x_memcon_regs[offset];
verboselog(*this, 9, "(MEMCON) %08X -> %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(MEMCON) %08X -> %08X %s\n", 0x14000000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_memcon_w)
{
verboselog(*this, 9, "(MEMCON) %08X <- %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(MEMCON) %08X <- %08X %s\n", 0x14000000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_memcon_regs[offset]);
}
@ -1147,13 +1142,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_memcon_w)
READ32_MEMBER(gp32_state::s3c240x_usb_host_r)
{
uint32_t data = m_s3c240x_usb_host_regs[offset];
verboselog(*this, 9, "(USB H) %08X -> %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(USB H) %08X -> %08X %s\n", 0x14200000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_usb_host_w)
{
verboselog(*this, 9, "(USB H) %08X <- %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(USB H) %08X <- %08X %s\n", 0x14200000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_usb_host_regs[offset]);
}
@ -1172,13 +1167,13 @@ READ32_MEMBER(gp32_state::s3c240x_uart_0_r)
}
break;
}
verboselog(*this, 9, "(UART 0) %08X -> %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(UART 0) %08X -> %08X %s\n", 0x15000000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_uart_0_w)
{
verboselog(*this, 9, "(UART 0) %08X <- %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(UART 0) %08X <- %08X %s\n", 0x15000000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_uart_0_regs[offset]);
}
@ -1197,13 +1192,13 @@ READ32_MEMBER(gp32_state::s3c240x_uart_1_r)
}
break;
}
verboselog(*this, 9, "(UART 1) %08X -> %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(UART 1) %08X -> %08X %s\n", 0x15004000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_uart_1_w)
{
verboselog(*this, 9, "(UART 1) %08X <- %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(UART 1) %08X <- %08X %s\n", 0x15004000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_uart_1_regs[offset]);
}
@ -1213,13 +1208,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_uart_1_w)
READ32_MEMBER(gp32_state::s3c240x_usb_device_r)
{
uint32_t data = m_s3c240x_usb_device_regs[offset];
verboselog(*this, 9, "(USB D) %08X -> %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(USB D) %08X -> %08X %s\n", 0x15200140 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_usb_device_w)
{
verboselog(*this, 9, "(USB D) %08X <- %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(USB D) %08X <- %08X %s\n", 0x15200140 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_usb_device_regs[offset]);
}
@ -1229,13 +1224,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_usb_device_w)
READ32_MEMBER(gp32_state::s3c240x_watchdog_r)
{
uint32_t data = m_s3c240x_watchdog_regs[offset];
verboselog(*this, 9, "(WDOG) %08X -> %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(WDOG) %08X -> %08X %s\n", 0x15300000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_watchdog_w)
{
verboselog(*this, 9, "(WDOG) %08X <- %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(WDOG) %08X <- %08X %s\n", 0x15300000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_watchdog_regs[offset]);
}
@ -1245,13 +1240,13 @@ uint8_t gp32_state::eeprom_read(uint16_t address)
{
uint8_t data;
data = m_eeprom_data[address];
verboselog(*this, 5, "EEPROM %04X -> %02X\n", address, data);
LOGMASKED(LOG_MISC, "EEPROM %04X -> %02X\n", address, data);
return data;
}
void gp32_state::eeprom_write(uint16_t address, uint8_t data)
{
verboselog(*this, 5, "EEPROM %04X <- %02X\n", address, data);
LOGMASKED(LOG_MISC, "EEPROM %04X <- %02X\n", address, data);
m_eeprom_data[address] = data;
}
@ -1315,20 +1310,20 @@ void gp32_state::i2cmem_stop( )
void gp32_state::iic_start()
{
verboselog(*this, 1, "IIC start\n");
LOGMASKED(LOG_STARTSTOP, "IIC start\n");
m_s3c240x_iic.data_index = 0;
m_s3c240x_iic_timer->adjust( attotime::from_msec( 1));
}
void gp32_state::iic_stop()
{
verboselog(*this, 1, "IIC stop\n");
LOGMASKED(LOG_STARTSTOP, "IIC stop\n");
m_s3c240x_iic_timer->adjust( attotime::never);
}
void gp32_state::iic_resume()
{
verboselog(*this, 1, "IIC resume\n");
LOGMASKED(LOG_STARTSTOP, "IIC resume\n");
m_s3c240x_iic_timer->adjust( attotime::from_msec( 1));
}
@ -1344,13 +1339,13 @@ READ32_MEMBER(gp32_state::s3c240x_iic_r)
}
break;
}
verboselog(*this, 9, "(IIC) %08X -> %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(IIC) %08X -> %08X %s\n", 0x15400000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_iic_w)
{
verboselog(*this, 9, "(IIC) %08X <- %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(IIC) %08X <- %08X %s\n", 0x15400000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_iic_regs[offset]);
switch (offset)
{
@ -1400,7 +1395,7 @@ WRITE32_MEMBER(gp32_state::s3c240x_iic_w)
TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_iic_timer_exp)
{
int enable_interrupt, mode_selection;
verboselog(*this, 2, "IIC timer callback\n");
LOGMASKED(LOG_TIMER, "IIC timer callback\n");
mode_selection = BITS( m_s3c240x_iic_regs[1], 7, 6);
switch (mode_selection)
{
@ -1410,12 +1405,12 @@ TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_iic_timer_exp)
if (m_s3c240x_iic.data_index == 0)
{
uint8_t data_shift = m_s3c240x_iic_regs[3] & 0xFF;
verboselog(*this, 5, "IIC write %02X\n", data_shift);
LOGMASKED(LOG_MISC, "IIC write %02X\n", data_shift);
}
else
{
uint8_t data_shift = eeprom_read(m_s3c240x_iic.address);
verboselog(*this, 5, "IIC read %02X\n", data_shift);
LOGMASKED(LOG_MISC, "IIC read %02X\n", data_shift);
m_s3c240x_iic_regs[3] = (m_s3c240x_iic_regs[3] & ~0xFF) | data_shift;
}
m_s3c240x_iic.data_index++;
@ -1425,7 +1420,7 @@ TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_iic_timer_exp)
case 3 :
{
uint8_t data_shift = m_s3c240x_iic_regs[3] & 0xFF;
verboselog(*this, 5, "IIC write %02X\n", data_shift);
LOGMASKED(LOG_MISC, "IIC write %02X\n", data_shift);
m_s3c240x_iic.data[m_s3c240x_iic.data_index++] = data_shift;
if (m_s3c240x_iic.data_index == 3)
{
@ -1452,19 +1447,19 @@ void gp32_state::s3c240x_iis_start()
static const uint32_t codeclk_table[] = { 256, 384 };
double freq;
int prescaler_enable, prescaler_control_a, prescaler_control_b, codeclk;
verboselog(*this, 1, "IIS start\n");
LOGMASKED(LOG_STARTSTOP, "IIS start\n");
prescaler_enable = BIT( m_s3c240x_iis_regs[0], 1);
prescaler_control_a = BITS( m_s3c240x_iis_regs[2], 9, 5);
prescaler_control_b = BITS( m_s3c240x_iis_regs[2], 4, 0);
codeclk = BIT( m_s3c240x_iis_regs[1], 2);
freq = (double)(s3c240x_get_pclk(MPLLCON) / (prescaler_control_a + 1) / codeclk_table[codeclk]) * 2; // why do I have to multiply by two?
verboselog(*this, 5, "IIS - pclk %d psc_enable %d psc_a %d psc_b %d codeclk %d freq %f\n", s3c240x_get_pclk(MPLLCON), prescaler_enable, prescaler_control_a, prescaler_control_b, codeclk_table[codeclk], freq);
LOGMASKED(LOG_MISC, "IIS - pclk %d psc_enable %d psc_a %d psc_b %d codeclk %d freq %f\n", s3c240x_get_pclk(MPLLCON), prescaler_enable, prescaler_control_a, prescaler_control_b, codeclk_table[codeclk], freq);
m_s3c240x_iis_timer->adjust( attotime::from_hz( freq), 0, attotime::from_hz( freq));
}
void gp32_state::s3c240x_iis_stop()
{
verboselog(*this, 1, "IIS stop\n");
LOGMASKED(LOG_STARTSTOP, "IIS stop\n");
m_s3c240x_iis_timer->adjust( attotime::never);
}
@ -1494,14 +1489,14 @@ READ32_MEMBER(gp32_state::s3c240x_iis_r)
break;
}
#endif
verboselog(*this, 9, "(IIS) %08X -> %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(IIS) %08X -> %08X %s\n", 0x15508000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_iis_w)
{
uint32_t old_value = m_s3c240x_iis_regs[offset];
verboselog(*this, 9, "(IIS) %08X <- %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(IIS) %08X <- %08X %s\n", 0x15508000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_iis_regs[offset]);
switch (offset)
{
@ -1535,7 +1530,7 @@ WRITE32_MEMBER(gp32_state::s3c240x_iis_w)
TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_iis_timer_exp)
{
verboselog(*this, 2, "IIS timer callback\n");
LOGMASKED(LOG_TIMER, "IIS timer callback\n");
s3c240x_dma_request_iis();
}
@ -1545,13 +1540,13 @@ TIMER_CALLBACK_MEMBER(gp32_state::s3c240x_iis_timer_exp)
READ32_MEMBER(gp32_state::s3c240x_rtc_r)
{
uint32_t data = m_s3c240x_rtc_regs[offset];
verboselog(*this, 9, "(RTC) %08X -> %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(RTC) %08X -> %08X %s\n", 0x15700040 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_rtc_w)
{
verboselog(*this, 9, "(RTC) %08X <- %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(RTC) %08X <- %08X %s\n", 0x15700040 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_rtc_regs[offset]);
}
@ -1561,13 +1556,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_rtc_w)
READ32_MEMBER(gp32_state::s3c240x_adc_r)
{
uint32_t data = m_s3c240x_adc_regs[offset];
verboselog(*this, 9, "(ADC) %08X -> %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(ADC) %08X -> %08X %s\n", 0x15800000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_adc_w)
{
verboselog(*this, 9, "(ADC) %08X <- %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(ADC) %08X <- %08X %s\n", 0x15800000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_adc_regs[offset]);
}
@ -1577,13 +1572,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_adc_w)
READ32_MEMBER(gp32_state::s3c240x_spi_r)
{
uint32_t data = m_s3c240x_spi_regs[offset];
verboselog(*this, 9, "(SPI) %08X -> %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(SPI) %08X -> %08X %s\n", 0x15900000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_spi_w)
{
verboselog(*this, 9, "(SPI) %08X <- %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(SPI) %08X <- %08X %s\n", 0x15900000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_spi_regs[offset]);
}
@ -1593,13 +1588,13 @@ WRITE32_MEMBER(gp32_state::s3c240x_spi_w)
READ32_MEMBER(gp32_state::s3c240x_mmc_r)
{
uint32_t data = m_s3c240x_mmc_regs[offset];
verboselog(*this, 9, "(MMC) %08X -> %08X (PC %08X)\n", 0x15A00000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(MMC) %08X -> %08X %s\n", 0x15A00000 + (offset << 2), data, machine().describe_context());
return data;
}
WRITE32_MEMBER(gp32_state::s3c240x_mmc_w)
{
verboselog(*this, 9, "(MMC) %08X <- %08X (PC %08X)\n", 0x15A00000 + (offset << 2), data, space.device().safe_pc( ));
LOGMASKED(LOG_TRACE, "(MMC) %08X <- %08X %s\n", 0x15A00000 + (offset << 2), data, machine().describe_context());
COMBINE_DATA(&m_s3c240x_mmc_regs[offset]);
}

2
src/mame/machine/315-5838_317-0229_comp.cpp
View File

@ -346,7 +346,7 @@ READ32_MEMBER(sega_315_5838_comp_device::doa_prot_r)
else
{
printf("doa_prot_read %08x %08x %08x\n", offset*4, retval, mem_mask);
logerror("Unhandled Protection READ @ %x mask %x (PC=%x)\n", offset, mem_mask, space.device().safe_pc());
logerror("Unhandled Protection READ @ %x mask %x %s\n", offset, mem_mask, machine().describe_context());
}
return retval;

12
src/mame/machine/kaneko_hit.cpp
View File

@ -194,7 +194,7 @@ READ16_MEMBER(kaneko_hit_device::kaneko_hit_type0_r)
return (machine().rand() & 0xffff);
default:
logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x\n",space.device().safe_pc(),offset<<1);
logerror("%s warning - read unmapped calc address %06x\n", machine().describe_context(), offset<<1);
}
return 0;
@ -220,7 +220,7 @@ WRITE16_MEMBER(kaneko_hit_device::kaneko_hit_type0_w)
case 0x12/2: hit.mult_b = data; break;
default:
logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x\n",space.device().safe_pc(),offset<<1);
logerror("%s warning - write unmapped hit address %06x\n", machine().describe_context(), offset<<1);
}
}
@ -287,7 +287,7 @@ READ16_MEMBER(kaneko_hit_device::kaneko_hit_type1_r)
case 0x32/2: return hit.y2s;
default:
logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x\n",space.device().safe_pc(),offset<<1);
logerror("%s warning - read unmapped calc address %06x\n", machine().describe_context(), offset<<1);
}
return 0;
@ -316,7 +316,7 @@ WRITE16_MEMBER(kaneko_hit_device::kaneko_hit_type1_w)
case 0x38/2: break;
default:
logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x\n",space.device().safe_pc(),offset<<1);
logerror("%s warning - write unmapped hit address %06x\n", machine().describe_context(), offset<<1);
}
}
@ -426,7 +426,7 @@ WRITE16_MEMBER(kaneko_hit_device::kaneko_hit_type2_w)
hit3.mode=data;break;
default:
logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x [ %06x] = %06x\n",space.device().safe_pc(),offset<<1, idx, data);
logerror("%s warning - write unmapped hit address %06x [ %06x] = %06x\n",machine().describe_context(),offset<<1, idx, data);
}
type2_recalc_collisions(hit3);
@ -478,7 +478,7 @@ READ16_MEMBER(kaneko_hit_device::kaneko_hit_type2_r)
case 0x88: return hit3.z1toz2;
default:
logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x [ %06x]\n",space.device().safe_pc(),offset<<1, idx);
logerror("%s warning - read unmapped calc address %06x [ %06x]\n",machine().describe_context(),offset<<1, idx);
}
return 0;

4
src/mame/machine/mega32x.cpp
View File

@ -459,10 +459,10 @@ READ16_MEMBER( sega_32x_device::_32x_dreq_common_r )
// printf("reading FIFO!\n");
if (m_current_fifo_readblock == m_fifo_block_a && !m_fifo_block_a_full)
printf("Fifo block a isn't filled!\n");
logerror("Fifo block a isn't filled!\n");
if (m_current_fifo_readblock == m_fifo_block_b && !m_fifo_block_b_full)
printf("%08x Fifo block b isn't filled!\n",space.device().safe_pc());
logerror("%s Fifo block b isn't filled!\n", machine().describe_context());
if (m_current_fifo_read_pos==4)

20
src/mame/machine/midwayic.cpp
View File

@ -700,11 +700,11 @@ void midway_ioasic_device::device_start()
if (m_has_dcs)
{
m_dcs_cpu = m_dcs->subdevice("dcs2");
m_dcs_cpu = m_dcs->subdevice<cpu_device>("dcs2");
if (m_dcs_cpu == nullptr)
m_dcs_cpu = m_dcs->subdevice("dsio");
m_dcs_cpu = m_dcs->subdevice<cpu_device>("dsio");
if (m_dcs_cpu == nullptr)
m_dcs_cpu = m_dcs->subdevice("denver");
m_dcs_cpu = m_dcs->subdevice<cpu_device>("denver");
}
m_shuffle_map = &shuffle_maps[m_shuffle_type][0];
@ -842,7 +842,7 @@ READ16_MEMBER(midway_ioasic_device::fifo_r)
/* main CPU is handling the I/O ASIC interrupt */
if (m_fifo_bytes == 0 && m_has_dcs)
{
m_fifo_force_buffer_empty_pc = m_dcs_cpu->safe_pc();
m_fifo_force_buffer_empty_pc = m_dcs_cpu->pc();
if (LOG_FIFO)
logerror("fifo_r(%04X): FIFO empty, PC = %04X\n", result, m_fifo_force_buffer_empty_pc);
}
@ -872,7 +872,7 @@ READ16_MEMBER(midway_ioasic_device::fifo_status_r)
/* sure the FIFO clear bit is set */
if (m_fifo_force_buffer_empty_pc && &space.device() == m_dcs_cpu)
{
offs_t currpc = m_dcs_cpu->safe_pc();
offs_t currpc = m_dcs_cpu->pc();
if (currpc >= m_fifo_force_buffer_empty_pc && currpc < m_fifo_force_buffer_empty_pc + 0x10)
{
m_fifo_force_buffer_empty_pc = 0;
@ -987,7 +987,7 @@ READ32_MEMBER( midway_ioasic_device::read )
case IOASIC_UARTIN:
m_reg[offset] &= ~0x1000;
if (result & 0x1000)
logerror("%06X:ioasic_r(%d) = %08X\n", machine().device("maincpu")->safe_pc(), offset, result);
logerror("%06X:ioasic_r(%d) = %08X\n", machine().device<cpu_device>("maincpu")->pc(), offset, result);
// Add lf
if ((result & 0xff)==0x0d)
m_reg[offset] = 0x300a;
@ -1037,7 +1037,7 @@ READ32_MEMBER( midway_ioasic_device::read )
}
if (LOG_IOASIC && offset != IOASIC_SOUNDSTAT && offset != IOASIC_SOUNDIN)
logerror("%08X:ioasic_r(%d) = %08X\n", space.device().safe_pc(), offset, result);
logerror("%s:ioasic_r(%d) = %08X\n", machine().describe_context(), offset, result);
return result;
}
@ -1081,7 +1081,7 @@ WRITE32_MEMBER( midway_ioasic_device::write )
newreg = m_reg[offset];
if (LOG_IOASIC && offset != IOASIC_SOUNDOUT)
logerror("%06X:ioasic_w(%d) = %08X\n", space.device().safe_pc(), offset, data);
logerror("%s ioasic_w(%d) = %08X\n", machine().describe_context(), offset, data);
switch (offset)
{
@ -1104,7 +1104,7 @@ WRITE32_MEMBER( midway_ioasic_device::write )
break;
case IOASIC_UARTCONTROL:
logerror("%08X IOASIC uart control = %04X INTCTRL=%04x\n", machine().device("maincpu")->safe_pc(), data, m_reg[IOASIC_INTCTL]);
logerror("%08X IOASIC uart control = %04X INTCTRL=%04x\n", machine().device<cpu_device>("maincpu")->pc(), data, m_reg[IOASIC_INTCTL]);
break;
case IOASIC_UARTOUT:
@ -1128,7 +1128,7 @@ WRITE32_MEMBER( midway_ioasic_device::write )
case IOASIC_SOUNDCTL:
if (LOG_IOASIC)
logerror("%08X write IOASIC_SOUNDCTL=%04x\n", machine().device("maincpu")->safe_pc(), data);
logerror("%08X write IOASIC_SOUNDCTL=%04x\n", machine().device<cpu_device>("maincpu")->pc(), data);
/* sound reset? */
if (m_has_dcs)
{

2
src/mame/machine/midwayic.h
View File

@ -198,7 +198,7 @@ private:
uint32_t m_reg[16];
uint8_t m_has_dcs;
uint8_t m_has_cage;
device_t *m_dcs_cpu;
cpu_device *m_dcs_cpu;
uint8_t m_shuffle_type;
uint8_t m_shuffle_default;
uint8_t m_shuffle_active;

34
src/mame/machine/nextkbd.cpp
View File

@ -162,31 +162,31 @@ bool nextkbd_device::fifo_empty() const
READ8_MEMBER( nextkbd_device::status_snd_r )
{
logerror("%s: status_snd_r %02x (%08x)\n", tag(), ctrl_snd, (unsigned int)space.device().safe_pc());
logerror("status_snd_r %02x %s\n", ctrl_snd, machine().describe_context());
return ctrl_snd;
}
READ8_MEMBER( nextkbd_device::status_kms_r )
{
logerror("%s: status_kms_r %02x (%08x)\n", tag(), ctrl_kms, (unsigned int)space.device().safe_pc());
logerror("status_kms_r %02x %s\n", ctrl_kms, machine().describe_context());
return ctrl_kms;
}
READ8_MEMBER( nextkbd_device::status_dma_r )
{
logerror("%s: status_dma_r %02x (%08x)\n", tag(), ctrl_dma, (unsigned int)space.device().safe_pc());
logerror("status_dma_r %02x %s\n", ctrl_dma, machine().describe_context());
return ctrl_dma;
}
READ8_MEMBER( nextkbd_device::status_cmd_r )
{
logerror("%s: status_cmd_r %02x (%08x)\n", tag(), ctrl_cmd, (unsigned int)space.device().safe_pc());
logerror("status_cmd_r %02x %s\n", ctrl_cmd, machine().describe_context());
return ctrl_cmd;
}
READ32_MEMBER( nextkbd_device::cdata_r )
{
logerror("%s: cdata_r %08x @ %08x (%08x)\n", tag(), cdata, mem_mask, (unsigned int)space.device().safe_pc());
logerror("cdata_r %08x @ %08x %s\n", cdata, mem_mask, machine().describe_context());
return cdata;
}
@ -196,7 +196,7 @@ READ32_MEMBER( nextkbd_device::kmdata_r )
ctrl_kms &= ~(C_KBD_INTERRUPT|C_KBD_DATA);
if(old & C_KBD_INTERRUPT)
int_change_cb(false);
logerror("%s: kmdata_r %08x @ %08x (%08x)\n", tag(), kmdata, mem_mask, (unsigned int)space.device().safe_pc());
logerror("kmdata_r %08x @ %08x %s\n", kmdata, mem_mask, machine().describe_context());
return kmdata;
}
@ -206,7 +206,7 @@ WRITE8_MEMBER( nextkbd_device::ctrl_snd_w )
ctrl_snd = (ctrl_snd & ~C_SOUND_WMASK) | (data & C_SOUND_WMASK);
uint8_t diff = old ^ ctrl_snd;
logerror("%s: ctrl_snd_w %02x | %02x (%08x)\n", tag(), ctrl_snd, diff, (unsigned int)space.device().safe_pc());
logerror("ctrl_snd_w %02x | %02x %s\n", ctrl_snd, diff, machine().describe_context());
}
WRITE8_MEMBER( nextkbd_device::ctrl_kms_w )
@ -215,7 +215,7 @@ WRITE8_MEMBER( nextkbd_device::ctrl_kms_w )
ctrl_kms = (ctrl_kms & ~C_KMS_WMASK) | (data & C_KMS_WMASK);
uint8_t diff = old ^ ctrl_kms;
logerror("%s: ctrl_kms_w %02x | %02x (%08x)\n", tag(), ctrl_kms, diff, (unsigned int)space.device().safe_pc());
logerror("ctrl_kms_w %02x | %02x %s\n", ctrl_kms, diff, machine().describe_context());
}
WRITE8_MEMBER( nextkbd_device::ctrl_dma_w )
@ -224,25 +224,25 @@ WRITE8_MEMBER( nextkbd_device::ctrl_dma_w )
ctrl_dma = (ctrl_dma & ~C_WMASK) | (data & C_WMASK);
uint8_t diff = old ^ ctrl_dma;
logerror("%s: ctrl_dma_w %02x | %02x (%08x)\n", tag(), ctrl_dma, diff, (unsigned int)space.device().safe_pc());
logerror("ctrl_dma_w %02x | %02x %s\n", ctrl_dma, diff, machine().describe_context());
}
WRITE8_MEMBER( nextkbd_device::ctrl_cmd_w )
{
ctrl_cmd = data;
logerror("%s: ctrl_cmd_w %02x (%08x)\n", tag(), ctrl_cmd, (unsigned int)space.device().safe_pc());
logerror("ctrl_cmd_w %02x %s\n", ctrl_cmd, machine().describe_context());
}
WRITE32_MEMBER( nextkbd_device::cdata_w )
{
COMBINE_DATA(&cdata);
logerror("%s: cdata_w %08x @ %08x (%08x)\n", tag(), data, mem_mask, (unsigned int)space.device().safe_pc());
logerror("cdata_w %08x @ %08x %s\n", data, mem_mask, machine().describe_context());
handle_command();
}
WRITE32_MEMBER( nextkbd_device::kmdata_w )
{
logerror("%s: kmdata_w %08x @ %08x (%08x)\n", tag(), data, mem_mask, (unsigned int)space.device().safe_pc());
logerror("kmdata_w %08x @ %08x %s\n", data, mem_mask, machine().describe_context());
}
INPUT_CHANGED_MEMBER( nextkbd_device::update )
@ -290,7 +290,7 @@ INPUT_CHANGED_MEMBER( nextkbd_device::update )
void nextkbd_device::handle_fifo_command()
{
logerror("%s: Fifo command %08x?\n", tag(), cdata);
logerror("Fifo command %08x?\n", cdata);
fifo_ir = 0;
fifo_iw = 0;
fifo_size = 0;
@ -304,18 +304,18 @@ void nextkbd_device::handle_kbd_command()
{
switch(cdata >> 24) {
case 0x00:
logerror("%s: Keyboard LED control %06x?\n", tag(), cdata & 0xffffff);
logerror("Keyboard LED control %06x?\n", cdata & 0xffffff);
ctrl_kms |= C_KBD_DATA; // Hmmmm. The rom wants it, but I'm not sure if data is actually expected
break;
case 0xef:
logerror("%s: Set keyboard/mouse address to %d\n", tag(), (cdata >> 17) & 7);
logerror("Set keyboard/mouse address to %d\n", (cdata >> 17) & 7);
km_address = ((cdata >> 17) & 7) << 25;
ctrl_kms |= C_KBD_DATA; // Hmmmm. The rom wants it, but I'm not sure if data is actually expected
break;
default:
logerror("%s: Unhandled keyboard command %02x.%06x\n", tag(), cdata >> 24, cdata & 0xffffff);
logerror("Unhandled keyboard command %02x.%06x\n", cdata >> 24, cdata & 0xffffff);
break;
}
}
@ -332,7 +332,7 @@ void nextkbd_device::handle_command()
break;
default:
logerror("%s: Unhandled command %02x.%08x\n", tag(), ctrl_cmd, cdata);
logerror("Unhandled command %02x.%08x\n", ctrl_cmd, cdata);
break;
}
}

36
src/mame/machine/nextmo.cpp
View File

@ -38,7 +38,7 @@ void nextmo_device::device_reset()
READ8_MEMBER(nextmo_device::r4_r)
{
logerror("nextmo: r4_r %02x (%08x)\n", r4, space.device().safe_pc());
logerror("nextmo: r4_r %02x %s\n", r4, machine().describe_context());
return r4;
}
@ -47,43 +47,43 @@ WRITE8_MEMBER(nextmo_device::r4_w)
if(r4 & 1)
device_reset();
r4 = (r4 & (~data & 0xfc)) | (data & 3);
logerror("nextmo: r4_w %02x (%08x)\n", r4, space.device().safe_pc());
logerror("nextmo: r4_w %02x %s\n", r4, machine().describe_context());
}
READ8_MEMBER(nextmo_device::r5_r)
{
logerror("nextmo: r5_r %02x (%08x)\n", r5, space.device().safe_pc());
logerror("nextmo: r5_r %02x %s\n", r5, machine().describe_context());
return r5;
}
WRITE8_MEMBER(nextmo_device::r5_w)
{
r5 = data;
logerror("nextmo: r5_w %02x (%08x)\n", r5, space.device().safe_pc());
logerror("nextmo: r5_w %02x %s\n", r5, machine().describe_context());
}
READ8_MEMBER(nextmo_device::r6_r)
{
logerror("nextmo: r6_r %02x (%08x)\n", r6, space.device().safe_pc());
logerror("nextmo: r6_r %02x %s\n", r6, machine().describe_context());
return r6;
}
WRITE8_MEMBER(nextmo_device::r6_w)
{
r6 = data;
logerror("nextmo: r6_w %02x (%08x)\n", r6, space.device().safe_pc());
logerror("nextmo: r6_w %02x %s\n", r6, machine().describe_context());
}
READ8_MEMBER(nextmo_device::r7_r)
{
logerror("nextmo: r7_r %02x (%08x)\n", r7, space.device().safe_pc());
logerror("nextmo: r7_r %02x %s\n", r7, machine().describe_context());
return r7;
}
WRITE8_MEMBER(nextmo_device::r7_w)
{
r7 = data;
logerror("nextmo: r7_w %02x (%08x)\n", r7, space.device().safe_pc());
logerror("nextmo: r7_w %02x %s\n", r7, machine().describe_context());
if(r7 & 0xc0) {
logerror("nextmo: start dma %02x %02x\n", r6, r7);
sector_pos = 0;
@ -131,57 +131,57 @@ void nextmo_device::check_dma_end()
READ8_MEMBER(nextmo_device::r8_r)
{
logerror("nextmo: r8_r (%08x)\n", space.device().safe_pc());
logerror("nextmo: r8_r %s\n", machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(nextmo_device::r8_w)
{
logerror("nextmo: r8_w %02x (%08x)\n", data, space.device().safe_pc());
logerror("nextmo: r8_w %02x %s\n", data, machine().describe_context());
}
READ8_MEMBER(nextmo_device::r9_r)
{
logerror("nextmo: r9_r (%08x)\n", space.device().safe_pc());
logerror("nextmo: r9_r %s\n", machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(nextmo_device::r9_w)
{
logerror("nextmo: r9_w %02x (%08x)\n", data, space.device().safe_pc());
logerror("nextmo: r9_w %02x %s\n", data, machine().describe_context());
}
READ8_MEMBER(nextmo_device::ra_r)
{
logerror("nextmo: ra_r (%08x)\n", space.device().safe_pc());
logerror("nextmo: ra_r %s\n", machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(nextmo_device::ra_w)
{
logerror("nextmo: ra_w %02x (%08x)\n", data, space.device().safe_pc());
logerror("nextmo: ra_w %02x %s\n", data, machine().describe_context());
}
READ8_MEMBER(nextmo_device::rb_r)
{
logerror("nextmo: rb_r (%08x)\n", space.device().safe_pc());
logerror("nextmo: rb_r %s\n", machine().describe_context());
return 0x24;
}
WRITE8_MEMBER(nextmo_device::rb_w)
{
logerror("nextmo: rb_w %02x (%08x)\n", data, space.device().safe_pc());
logerror("nextmo: rb_w %02x %s\n", data, machine().describe_context());
}
READ8_MEMBER(nextmo_device::r10_r)
{
logerror("nextmo: r10_r %d (%08x)\n", offset, space.device().safe_pc());
logerror("nextmo: r10_r %d %s\n", offset, machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(nextmo_device::r10_w)
{
logerror("nextmo: r10_w %d, %02x (%08x)\n", offset, data, space.device().safe_pc());
logerror("nextmo: r10_w %d, %02x %s\n", offset, data, machine().describe_context());
}
void nextmo_device::check_ecc()

4
src/mame/machine/pce_cd.cpp
View File

@ -1072,7 +1072,7 @@ TIMER_CALLBACK_MEMBER(pce_cd_device::adpcm_fadein_callback)
WRITE8_MEMBER(pce_cd_device::intf_w)
{
logerror("%04X: write to CD interface offset %02X, data %02X\n", space.device().safe_pc(), offset, data);
logerror("%s write to CD interface offset %02X, data %02X\n", machine().describe_context(), offset, data);
switch (offset & 0xf)
{
@ -1307,7 +1307,7 @@ READ8_MEMBER(pce_cd_device::intf_r)
{
uint8_t data = m_regs[offset & 0x0F];
logerror("%04X: read from CD interface offset %02X\n", space.device().safe_pc(), offset );
logerror("%s: read from CD interface offset %02X\n", machine().describe_context(), offset );
switch (offset & 0xf)
{

8
src/mame/machine/wpc_pic.cpp
View File

@ -38,7 +38,7 @@ READ8_MEMBER(wpc_pic_device::read)
data = swarray[curcmd - 0x16]->read();
else
logerror("%s: cmd=%02x (%04x)\n", tag(), curcmd, space.device().safe_pc());
logerror("cmd=%02x %s\n", tag(), curcmd, machine().describe_context());
return data;
}
@ -50,7 +50,7 @@ void wpc_pic_device::check_game_id()
uint32_t v = (i >> 8) * 0x3133 + (i & 0xff) * 0x3231;
v = v & 0xffffff;
if(v == cmp)
logerror("%s: Detected game id %03d\n", tag(), i);
logerror("Detected game id %03d\n", i);
}
}
@ -60,7 +60,7 @@ WRITE8_MEMBER(wpc_pic_device::write)
cmpchk[3-chk_count] = data;
if(data != cmpchk[3-chk_count]) {
logerror("%s: WARNING: validation error, checksum[%d] got %02x, expected %02x\n", tag(), 3-chk_count, data, chk[3-chk_count]);
logerror("WARNING: validation error, checksum[%d] got %02x, expected %02x\n", 3-chk_count, data, chk[3-chk_count]);
if(chk_count == 1)
check_game_id();
}
@ -79,7 +79,7 @@ WRITE8_MEMBER(wpc_pic_device::write)
else if(data == 0x20)
chk_count = 3;
else if((data < 0x16 || data >= 0x1e) && ((data & 0xf0) != 0x70))
logerror("%s: write %02x (%04x)\n", tag(), data, space.device().safe_pc());
logerror("write %02x (%04x)\n", data, machine().describe_context());
curcmd = data;
}

8
src/mame/video/k001005.cpp
View File

@ -1313,7 +1313,7 @@ READ32_MEMBER( k001005_device::read )
}
default:
//osd_printf_debug("m_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
//osd_printf_debug("m_r: %08X, %08X at %s\n", offset, mem_mask, machine().describe_context());
break;
}
return 0;
@ -1327,7 +1327,7 @@ WRITE32_MEMBER( k001005_device::write )
{
case 0x000: // FIFO write
{
//osd_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space.device().safe_pc());
//osd_printf_debug("K001005 FIFO write: %08X at %s\n", data, machine().describe_context());
if (m_status != 1 && m_status != 2)
{
if (m_fifo_write_ptr < 0x400)
@ -1344,7 +1344,7 @@ WRITE32_MEMBER( k001005_device::write )
dsp->set_flag_input(1, ASSERT_LINE);
}
// osd_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space.device().safe_pc());
// osd_printf_debug("K001005 FIFO write: %08X at %s\n", data, machine().describe_context());
m_fifo[m_fifo_write_ptr] = data;
m_fifo_write_ptr++;
m_fifo_write_ptr &= 0x7ff;
@ -1451,7 +1451,7 @@ WRITE32_MEMBER( k001005_device::write )
break;
default:
//osd_printf_debug("m_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
//osd_printf_debug("m_w: %08X, %08X, %08X at %s\n", data, offset, mem_mask, machine().describe_context());
break;
}

6
src/mame/video/k054156_k054157_k056832.cpp
View File

@ -648,7 +648,7 @@ READ16_MEMBER( k056832_device::k_5bpp_rom_word_r )
else if (mem_mask == 0x00ff)
return rom_read_b(offset * 2 + 1, 4, 5, 0)<<16;
else
LOG("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask);
LOG("%s Non-byte read of tilemap ROM (mask=%x)\n", machine().describe_context(), mem_mask);
return 0;
}
@ -663,7 +663,7 @@ READ32_MEMBER( k056832_device::k_5bpp_rom_long_r )
else if (mem_mask == 0x000000ff)
return rom_read_b(offset * 4 + 3, 4, 5, 1);
else
LOG("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask);
LOG("%s Non-byte read of tilemap ROM (mask=%x)\n", machine().describe_context(), mem_mask);
return 0;
}
@ -678,7 +678,7 @@ READ32_MEMBER( k056832_device::k_6bpp_rom_long_r )
else if (mem_mask == 0x000000ff)
return rom_read_b(offset * 4 + 3, 4, 6, 0);
else
LOG("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask);
LOG("%s Non-byte read of tilemap ROM (mask=%x)\n", machine().describe_context(), mem_mask);
return 0;
}

4
src/mame/video/powervr2.cpp
View File

@ -3527,7 +3527,7 @@ READ32_MEMBER( powervr2_device::elan_regs_r )
case 0x78/4: // IRQ MASK
return 0;
default:
printf("%08x %08x\n",space.device().safe_pc(),offset*4);
logerror("%s %08x\n", machine().describe_context(),offset*4);
break;
}
@ -3539,7 +3539,7 @@ WRITE32_MEMBER( powervr2_device::elan_regs_w )
switch(offset)
{
default:
printf("%08x %08x %08x W\n",space.device().safe_pc(),offset*4,data);
logerror("%s %08x %08x W\n", machine().describe_context(),offset*4,data);
break;
}
}