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RC2014 (#9759)

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------------------
RC2014 Mini with CP/M Upgrade [Miodrag Milanovic]


-rc2014: added RTC, IDE, FDC and Sound module, fix memory and i/o mapping, proper flash mapping
This commit is contained in:
Miodrag Milanović 2022-05-15 18:58:59 +02:00 committed by GitHub
parent 3c27e36d3b
commit 36204d73da
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
25 changed files with 1568 additions and 220 deletions
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10
scripts/src/bus.lua
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@ -2106,6 +2106,16 @@ if (BUSES["RC2014"]~=null) then
MAME_DIR .. "src/devices/bus/rc2014/serial.h",
MAME_DIR .. "src/devices/bus/rc2014/cf.cpp",
MAME_DIR .. "src/devices/bus/rc2014/cf.h",
MAME_DIR .. "src/devices/bus/rc2014/rtc.cpp",
MAME_DIR .. "src/devices/bus/rc2014/rtc.h",
MAME_DIR .. "src/devices/bus/rc2014/sound.cpp",
MAME_DIR .. "src/devices/bus/rc2014/sound.h",
MAME_DIR .. "src/devices/bus/rc2014/ide.cpp",
MAME_DIR .. "src/devices/bus/rc2014/ide.h",
MAME_DIR .. "src/devices/bus/rc2014/fdc.cpp",
MAME_DIR .. "src/devices/bus/rc2014/fdc.h",
MAME_DIR .. "src/devices/bus/rc2014/micro.cpp",
MAME_DIR .. "src/devices/bus/rc2014/micro.h",
}
end

7
src/devices/bus/rc2014/cf.cpp
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@ -28,7 +28,6 @@ protected:
virtual void device_start() override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_WRITE_LINE_MEMBER( irq_w ) { m_bus->int_w(state); }
DECLARE_WRITE_LINE_MEMBER( tx_w ) { m_bus->tx_w(state); }
uint8_t ide_cs0_r(offs_t offset) { return m_ata->cs0_r(offset); }
@ -46,13 +45,13 @@ compact_flash_device::compact_flash_device(const machine_config &mconfig, const
void compact_flash_device::device_start()
{
// A7 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x10, 0x17, 0, 0x80, 0, read8sm_delegate(*this, FUNC(compact_flash_device::ide_cs0_r)), write8sm_delegate(*this, FUNC(compact_flash_device::ide_cs0_w)));
// A15-A8 and A7 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x10, 0x17, 0, 0xff80, 0, read8sm_delegate(*this, FUNC(compact_flash_device::ide_cs0_r)), write8sm_delegate(*this, FUNC(compact_flash_device::ide_cs0_w)));
}
void compact_flash_device::device_add_mconfig(machine_config &config)
{
ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false);
ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, true);
}
}

6
src/devices/bus/rc2014/clock.cpp
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@ -93,7 +93,7 @@ void dual_clock_base::device_start()
}
static constexpr u32 clock_mapping[] =
{
{
7'372'800/1,
7'372'800/2,
7'372'800/3,
@ -102,8 +102,8 @@ static constexpr u32 clock_mapping[] =
7'372'800/12,
7'372'800/24,
10'000,
0,
0
0, // TODO: Support manual clocking (not possible for now)
0 // TODO: Support external clocking
};
void dual_clock_base::device_reset()

239
src/devices/bus/rc2014/fdc.cpp Normal file
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@ -0,0 +1,239 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
RC2014 FDC
****************************************************************************/
#include "emu.h"
#include "fdc.h"
#include "imagedev/floppy.h"
#include "formats/imd_dsk.h"
#include "formats/pc_dsk.h"
#include "machine/upd765.h"
namespace {
//**************************************************************************
// RC2014 Floppy Disk Controller FDC9266
// Module author: Dr. Scott M. Baker
//**************************************************************************
class rc2014_fdc9266_device : public device_t, public device_rc2014_card_interface
{
public:
// construction/destruction
rc2014_fdc9266_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
private:
void control_w(offs_t offset, uint8_t data);
required_ioport m_addr;
required_ioport_array<4> m_jp;
required_device<upd765a_device> m_fdc;
required_device_array<floppy_connector, 2> m_floppy;
};
rc2014_fdc9266_device::rc2014_fdc9266_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, RC2014_FDC9266, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_addr(*this, "SV1")
, m_jp(*this, "JP%u", 1U)
, m_fdc(*this, "fdc")
, m_floppy(*this, "fdc:%u", 0U)
{
}
void rc2014_fdc9266_device::device_start()
{
}
void rc2014_fdc9266_device::device_reset()
{
uint8_t base = m_addr->read() << 5; // SV1
// A15-A8 and A1 not connected
m_bus->installer(AS_IO)->install_read_handler(base+0x10, base+0x10, 0, 0xff02, 0, read8smo_delegate(m_fdc, FUNC(upd765a_device::msr_r)));
m_bus->installer(AS_IO)->install_readwrite_handler(base+0x11, base+0x11, 0, 0xff02, 0, read8smo_delegate(m_fdc, FUNC(upd765a_device::fifo_r)), write8smo_delegate(m_fdc, FUNC(upd765a_device::fifo_w)));
m_bus->installer(AS_IO)->install_write_handler(base+0x18, base+0x18, 0, 0xff02, 0, write8sm_delegate(*this, FUNC(rc2014_fdc9266_device::control_w)));
// TODO: Use jumpers
}
void rc2014_fdc9266_device::control_w(offs_t, uint8_t data)
{
// D0 - TC
// D1 - MOTEA
// D2 - MOTEB
// D3 - P2
// D4 - P1
// D5 - P0
// D6 - DENSEL
// D7 - FDC_RST (trough inverter)
m_fdc->tc_w(BIT(data,0)? true : false);
if (m_floppy[0]->get_device())
m_floppy[0]->get_device()->mon_w(!BIT(data,1));
if (m_floppy[1]->get_device())
m_floppy[1]->get_device()->mon_w(!BIT(data,2));
m_fdc->set_rate(BIT(data,6) ? 500000 : 250000);
m_fdc->reset_w(!BIT(data,7) ? ASSERT_LINE : CLEAR_LINE);
}
static void rc2014_floppies(device_slot_interface &device)
{
device.option_add("35hd", FLOPPY_35_HD);
}
static void rc2014_floppy_formats(format_registration &fr)
{
fr.add_mfm_containers();
fr.add(FLOPPY_IMD_FORMAT);
fr.add(FLOPPY_PC_FORMAT);
}
void rc2014_fdc9266_device::device_add_mconfig(machine_config &config)
{
// FDC9266
UPD765A(config, m_fdc, XTAL(8'000'000), true, true);
// floppy drives
FLOPPY_CONNECTOR(config, m_floppy[0], rc2014_floppies, "35hd", rc2014_floppy_formats);
FLOPPY_CONNECTOR(config, m_floppy[1], rc2014_floppies, "35hd", rc2014_floppy_formats);
}
static INPUT_PORTS_START( rc2014_fdc9266_jumpers )
PORT_START("SV1")
PORT_CONFNAME( 0x7, 0x2, "Base Address" )
PORT_CONFSETTING( 0x0, "0x00" )
PORT_CONFSETTING( 0x1, "0x20" )
PORT_CONFSETTING( 0x2, "0x40" )
PORT_CONFSETTING( 0x3, "0x60" )
PORT_CONFSETTING( 0x4, "0x80" )
PORT_CONFSETTING( 0x5, "0xa0" )
PORT_CONFSETTING( 0x6, "0xc0" )
PORT_CONFSETTING( 0x7, "0xe0" )
PORT_START("JP1")
PORT_CONFNAME( 0x1, 0x1, "Two Side" )
PORT_CONFSETTING( 0x0, "GND" )
PORT_CONFSETTING( 0x1, "None" )
PORT_START("JP2")
PORT_CONFNAME( 0x1, 0x0, "/FAULT" )
PORT_CONFSETTING( 0x0, "None" )
PORT_CONFSETTING( 0x1, "+5V" )
PORT_START("JP3")
PORT_CONFNAME( 0x1, 0x1, "MINI" )
PORT_CONFSETTING( 0x0, "GND" )
PORT_CONFSETTING( 0x1, "+5V" )
PORT_START("JP4")
PORT_CONFNAME( 0x1, 0x4, "RDY" )
PORT_CONFSETTING( 0x0, "GND" )
PORT_CONFSETTING( 0x4, "DC/RDY" )
INPUT_PORTS_END
ioport_constructor rc2014_fdc9266_device::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_fdc9266_jumpers );
}
//**************************************************************************
// RC2014 Floppy Disk Controller WD37C65
// Module author: Dr. Scott M. Baker
//**************************************************************************
class rc2014_wd37c65_device : public device_t, public device_rc2014_card_interface
{
public:
// construction/destruction
rc2014_wd37c65_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
// DACK confirmation is same as pulsing TC
uint8_t dack_r() { m_fdc->tc_w(true); m_fdc->tc_w(false); return 0xff;}
private:
required_ioport m_addr;
required_ioport_array<2> m_jp;
required_device<wd37c65c_device> m_fdc;
required_device_array<floppy_connector, 2> m_floppy;
};
rc2014_wd37c65_device::rc2014_wd37c65_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, RC2014_WD37C65, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_addr(*this, "SV1")
, m_jp(*this, "JP%u", 1U)
, m_fdc(*this, "fdc")
, m_floppy(*this, "fdc:%u", 0U)
{
}
void rc2014_wd37c65_device::device_start()
{
}
void rc2014_wd37c65_device::device_reset()
{
uint8_t base = m_addr->read() << 5; // SV1
// A15-A8 and A1 not connected
m_bus->installer(AS_IO)->install_read_handler(base+0x10, base+0x10, 0, 0xff02, 0, read8smo_delegate(m_fdc, FUNC(wd37c65c_device::msr_r)));
m_bus->installer(AS_IO)->install_readwrite_handler(base+0x11, base+0x11, 0, 0xff02, 0, read8smo_delegate(m_fdc, FUNC(wd37c65c_device::fifo_r)), write8smo_delegate(m_fdc, FUNC(wd37c65c_device::fifo_w)));
// A15-A8 and A0 and A1 not connected
m_bus->installer(AS_IO)->install_write_handler(base+0x08, base+0x08, 0, 0xff06, 0, write8smo_delegate(m_fdc, FUNC(wd37c65c_device::ccr_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(base+0x18, base+0x18, 0, 0xff06, 0, read8smo_delegate(*this, FUNC(rc2014_wd37c65_device::dack_r)), write8smo_delegate(m_fdc, FUNC(wd37c65c_device::dor_w)));
// TODO: Use jumpers
}
void rc2014_wd37c65_device::device_add_mconfig(machine_config &config)
{
WD37C65C(config, m_fdc, 16_MHz_XTAL);
// floppy drives
FLOPPY_CONNECTOR(config, m_floppy[0], rc2014_floppies, "35hd", rc2014_floppy_formats);
FLOPPY_CONNECTOR(config, m_floppy[1], rc2014_floppies, "35hd", rc2014_floppy_formats);
}
static INPUT_PORTS_START( rc2014_wd37c65_jumpers )
PORT_START("SV1")
PORT_CONFNAME( 0x7, 0x2, "Base Address" )
PORT_CONFSETTING( 0x0, "0x00" )
PORT_CONFSETTING( 0x1, "0x20" )
PORT_CONFSETTING( 0x2, "0x40" )
PORT_CONFSETTING( 0x3, "0x60" )
PORT_CONFSETTING( 0x4, "0x80" )
PORT_CONFSETTING( 0x5, "0xa0" )
PORT_CONFSETTING( 0x6, "0xc0" )
PORT_CONFSETTING( 0x7, "0xe0" )
PORT_START("JP1")
PORT_CONFNAME( 0x1, 0x1, "DACK" )
PORT_CONFSETTING( 0x0, "Share with DOR" )
PORT_CONFSETTING( 0x1, "Use offset 0" )
PORT_START("JP2")
PORT_CONFNAME( 0x1, 0x0, "TC" )
PORT_CONFSETTING( 0x0, "Port offset 4" )
PORT_CONFSETTING( 0x1, "+5V" )
INPUT_PORTS_END
ioport_constructor rc2014_wd37c65_device::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_wd37c65_jumpers );
}
}
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_FDC9266, device_rc2014_card_interface, rc2014_fdc9266_device, "rc2014_fdc9266", "RC2014 Floppy Disk Controller FDC9266")
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_WD37C65, device_rc2014_card_interface, rc2014_wd37c65_device, "rc2014_wd37c65", "RC2014 Floppy Disk Controller WD37C65")

19
src/devices/bus/rc2014/fdc.h Normal file
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@ -0,0 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/**********************************************************************
RC2014 FDC
**********************************************************************/
#ifndef MAME_BUS_RC2014_FDC_H
#define MAME_BUS_RC2014_FDC_H
#pragma once
#include "bus/rc2014/rc2014.h"
DECLARE_DEVICE_TYPE(RC2014_FDC9266, device_rc2014_card_interface)
DECLARE_DEVICE_TYPE(RC2014_WD37C65, device_rc2014_card_interface)
#endif // MAME_BUS_RC2014_FDC_H

295
src/devices/bus/rc2014/ide.cpp Normal file
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@ -0,0 +1,295 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
RC2014 IDE
****************************************************************************/
#include "emu.h"
#include "ide.h"
#include "machine/i8255.h"
#include "bus/ata/ataintf.h"
namespace {
//**************************************************************************
// rc2014_ide_base
//**************************************************************************
class rc2014_ide_base : public device_t, public device_rc2014_card_interface
{
protected:
// construction/destruction
rc2014_ide_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
virtual void device_start() override;
virtual void device_add_mconfig(machine_config &config) override;
uint8_t ppi_pa_r() { return m_data.b.l; }
uint8_t ppi_pb_r() { return m_data.b.h; }
void ppi_pa_w(uint8_t data) { m_data.b.l = data; }
void ppi_pb_w(uint8_t data) { m_data.b.h = data; }
virtual void ppi_pc_w(uint8_t data) = 0;
// base-class members
required_device<ata_interface_device> m_ata;
required_device<i8255_device> m_ppi;
PAIR16 m_data;
uint8_t m_prev;
};
rc2014_ide_base::rc2014_ide_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, type, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_ata(*this, "ata")
, m_ppi(*this, "82c55")
, m_prev(0)
{
}
void rc2014_ide_base::device_start()
{
}
void rc2014_ide_base::device_add_mconfig(machine_config &config)
{
I8255(config, m_ppi, 0);
m_ppi->in_pa_callback().set(FUNC(rc2014_ide_base::ppi_pa_r));
m_ppi->in_pb_callback().set(FUNC(rc2014_ide_base::ppi_pb_r));
m_ppi->out_pa_callback().set(FUNC(rc2014_ide_base::ppi_pa_w));
m_ppi->out_pb_callback().set(FUNC(rc2014_ide_base::ppi_pb_w));
m_ppi->out_pc_callback().set(FUNC(rc2014_ide_base::ppi_pc_w));
ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", "hdd", false);
}
//**************************************************************************
// RC2014 82C55 IDE Interface
// Module author: Ed Brindley
//**************************************************************************
class rc2014_82c55_ide_device : public rc2014_ide_base
{
public:
// construction/destruction
rc2014_82c55_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_reset() override;
virtual ioport_constructor device_input_ports() const override;
void ppi_pc_w(uint8_t data) override;
private:
required_ioport m_sw;
required_ioport_array<4> m_jp;
uint8_t m_da0;
uint8_t m_da1;
uint8_t m_dcs1;
uint8_t m_dior;
};
rc2014_82c55_ide_device::rc2014_82c55_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: rc2014_ide_base(mconfig, RC2014_82C55_IDE, tag, owner, clock)
, m_sw(*this, "SW1")
, m_jp(*this, "JP%u", 1U)
{
}
void rc2014_82c55_ide_device::device_reset()
{
m_da0 = (m_jp[0]->read() == 1) ? 4 : 0;
m_dcs1 = (m_jp[1]->read() == 1) ? 0 : 4;
m_da1 = (m_jp[2]->read() == 1) ? 6 : 1;
m_dior = (m_jp[3]->read() == 1) ? 1 : 6;
uint8_t base = m_sw->read(); // SW1
// A15-A8 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(base, base+0x03, 0, 0xff00, 0, read8sm_delegate(m_ppi, FUNC(i8255_device::read)), write8sm_delegate(m_ppi, FUNC(i8255_device::write)));
}
void rc2014_82c55_ide_device::ppi_pc_w(uint8_t data)
{
// On IDE connector DIOW and DIOR are inverted
// write is on falling and read on rising edge
uint8_t offset = BIT(data,2) << 2 | BIT(data,m_da1) << 1 | BIT(data,m_da0);
if (BIT(data,3)) // DCS0
{
if (BIT(data,5)==0 && BIT(m_prev,5)==1) // DIOW
{
m_ata->cs0_w(offset, m_data.w);
}
if (BIT(data,m_dior)==1 && BIT(m_prev,m_dior)==0) // DIOR
{
m_data.w = m_ata->cs0_r(offset);
}
}
if (BIT(data,m_dcs1)) // DCS1
{
if (BIT(data,5)==0 && BIT(m_prev,5)==1) // DIOW
{
m_ata->cs1_w(offset, m_data.w);
}
if (BIT(data,m_dior)==1 && BIT(m_prev,m_dior)==0) // DIOR
{
m_data.w = m_ata->cs1_r(offset);
}
}
if (BIT(data,7)) // DRESET
{
// RESET IDE Disk
m_ata->reset();
}
m_prev = data;
}
static INPUT_PORTS_START( rc2014_82c55_ide_jumpers )
PORT_START("SW1")
PORT_DIPNAME(0x04, 0x00, "0x04") PORT_DIPLOCATION("Base Address:1")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x04, DEF_STR( On ) )
PORT_DIPNAME(0x08, 0x00, "0x08") PORT_DIPLOCATION("Base Address:2")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x08, DEF_STR( On ) )
PORT_DIPNAME(0x10, 0x00, "0x10") PORT_DIPLOCATION("Base Address:3")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x10, DEF_STR( On ) )
PORT_DIPNAME(0x20, 0x20, "0x20") PORT_DIPLOCATION("Base Address:4")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x20, DEF_STR( On ) )
PORT_DIPNAME(0x40, 0x00, "0x40") PORT_DIPLOCATION("Base Address:5")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x40, DEF_STR( On ) )
PORT_DIPNAME(0x80, 0x00, "0x80") PORT_DIPLOCATION("Base Address:6")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x80, DEF_STR( On ) )
PORT_START("JP1")
PORT_CONFNAME( 0x1, 0x0, "DA0" )
PORT_CONFSETTING( 0x0, "PC0" )
PORT_CONFSETTING( 0x1, "PC4" )
PORT_START("JP2")
PORT_CONFNAME( 0x1, 0x0, "DCS1" )
PORT_CONFSETTING( 0x0, "PC4" )
PORT_CONFSETTING( 0x1, "PC0" )
PORT_START("JP3")
PORT_CONFNAME( 0x1, 0x0, "DA1" )
PORT_CONFSETTING( 0x0, "PC1" )
PORT_CONFSETTING( 0x1, "PC6" )
PORT_START("JP4")
PORT_CONFNAME( 0x1, 0x0, "DIOR" )
PORT_CONFSETTING( 0x0, "PC6" )
PORT_CONFSETTING( 0x1, "PC1" )
PORT_START("JP5")
PORT_CONFNAME( 0x1, 0x0, "Power" )
PORT_CONFSETTING( 0x0, "Bus" )
PORT_CONFSETTING( 0x1, "External" )
INPUT_PORTS_END
ioport_constructor rc2014_82c55_ide_device::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_82c55_ide_jumpers );
}
//**************************************************************************
// RC2014 IDE Hard Drive Module
// Module author: Spencer Owen
// Based on design from Ed Brindley, but simplified
//**************************************************************************
class rc2014_ide_hdd_device : public rc2014_ide_base
{
public:
// construction/destruction
rc2014_ide_hdd_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_reset() override;
virtual ioport_constructor device_input_ports() const override;
void ppi_pc_w(uint8_t data) override;
private:
required_ioport m_jp;
};
rc2014_ide_hdd_device::rc2014_ide_hdd_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: rc2014_ide_base(mconfig, RC2014_IDE_HDD, tag, owner, clock)
, m_jp(*this, "J1")
{
}
void rc2014_ide_hdd_device::device_reset()
{
uint8_t base = m_jp->read() << 3;
// A15-A8 are not connected, A7,A6 and A2 must be 0
m_bus->installer(AS_IO)->install_readwrite_handler(base, base+0x03, 0, 0xff00, 0, read8sm_delegate(m_ppi, FUNC(i8255_device::read)), write8sm_delegate(m_ppi, FUNC(i8255_device::write)));
}
void rc2014_ide_hdd_device::ppi_pc_w(uint8_t data)
{
uint8_t offset = data & 7;
if (BIT(data,3)) // DCS0
{
if (BIT(data,5)==0 && BIT(m_prev,5)==1) // DIOW
{
m_ata->cs0_w(offset, m_data.w);
}
if (BIT(data,6)==1 && BIT(m_prev,6)==0) // DIOR
{
m_data.w = m_ata->cs0_r(offset);
}
}
if (BIT(data,4)) // DCS1
{
if (BIT(data,5)==0 && BIT(m_prev,5)==1) // DIOW
{
m_ata->cs1_w(offset, m_data.w);
}
if (BIT(data,6)==1 && BIT(m_prev,6)==0) // DIOR
{
m_data.w = m_ata->cs1_r(offset);
}
}
if (BIT(data,7)) // DRESET
{
// RESET IDE Disk
m_ata->reset();
}
m_prev = data;
}
static INPUT_PORTS_START( rc2014_ide_hdd_jumpers )
PORT_START("J1")
PORT_CONFNAME( 0x7, 0x4, "Base Address" )
PORT_CONFSETTING( 0x1, "0x08" )
PORT_CONFSETTING( 0x2, "0x10" )
PORT_CONFSETTING( 0x3, "0x18" )
PORT_CONFSETTING( 0x4, "0x20" )
PORT_CONFSETTING( 0x5, "0x28" )
PORT_CONFSETTING( 0x6, "0x30" )
PORT_CONFSETTING( 0x7, "0x38" )
PORT_START("JP1")
PORT_CONFNAME( 0x1, 0x0, "Power" )
PORT_CONFSETTING( 0x0, "Bus" )
PORT_CONFSETTING( 0x1, "External" )
INPUT_PORTS_END
ioport_constructor rc2014_ide_hdd_device::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_ide_hdd_jumpers );
}
}
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_82C55_IDE, device_rc2014_card_interface, rc2014_82c55_ide_device, "rc2014_82c55_ide", "RC2014 82C55 IDE Interface")
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_IDE_HDD, device_rc2014_card_interface, rc2014_ide_hdd_device, "rc2014_ide_hdd", "RC2014 IDE Hard Drive Module")

19
src/devices/bus/rc2014/ide.h Normal file
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@ -0,0 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/**********************************************************************
RC2014 IDE
**********************************************************************/
#ifndef MAME_BUS_RC2014_IDE_H
#define MAME_BUS_RC2014_IDE_H
#pragma once
#include "bus/rc2014/rc2014.h"
DECLARE_DEVICE_TYPE(RC2014_82C55_IDE, device_rc2014_card_interface)
DECLARE_DEVICE_TYPE(RC2014_IDE_HDD, device_rc2014_card_interface)
#endif // MAME_BUS_RC2014_IDE_H

292
src/devices/bus/rc2014/micro.cpp Normal file
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@ -0,0 +1,292 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
RC2014 Micro Module
****************************************************************************/
#include "emu.h"
#include "micro.h"
#include "modules.h"
#include "cpu/z80/z80.h"
#include "machine/6850acia.h"
#include "machine/clock.h"
#include "bus/ata/ataintf.h"
#include "bus/rs232/rs232.h"
namespace {
//**************************************************************************
// RC2014 Micro module
// Module author: Spencer Owen
//**************************************************************************
class rc2014_micro : public device_t, public device_rc2014_card_interface
{
public:
// construction/destruction
rc2014_micro(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
private:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_resolve_objects() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
virtual const tiny_rom_entry *device_rom_region() const override;
DECLARE_WRITE_LINE_MEMBER( clk_w ) { m_bus->clk_w(state); }
DECLARE_WRITE_LINE_MEMBER( tx_w ) { m_bus->tx_w(state); }
void addrmap_mem(address_map &map) { map.unmap_value_high(); }
void addrmap_io(address_map &map) { map.unmap_value_high(); }
required_device<z80_device> m_maincpu;
required_device<acia6850_device> m_acia;
required_memory_region m_rom;
required_ioport m_rom_selector;
required_ioport m_rom_present;
std::unique_ptr<u8[]> m_ram;
static constexpr XTAL MAIN_CLOCK = XTAL(7'372'800);
};
rc2014_micro::rc2014_micro(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, RC2014_MICRO, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_maincpu(*this, "maincpu")
, m_acia(*this, "acia")
, m_rom(*this, "rom")
, m_rom_selector(*this, "JP2-JP4")
, m_rom_present(*this, "ROM")
, m_ram(nullptr)
{
}
void rc2014_micro::device_start()
{
// Setup CPU
m_bus->set_bus_clock(MAIN_CLOCK);
m_maincpu->set_daisy_config(m_bus->get_daisy_chain());
// Setup RAM
m_ram = std::make_unique<u8[]>(0x8000);
std::fill_n(m_ram.get(), 0x8000, 0xff);
save_pointer(NAME(m_ram), 0x8000);
m_bus->installer(AS_PROGRAM)->install_ram(0x8000, 0xffff, m_ram.get());
// Setup ACIA
// A15-A8 and A5-A1 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x81, 0, 0xff3e, 0, read8sm_delegate(*m_acia, FUNC(acia6850_device::read)), write8sm_delegate(*m_acia, FUNC(acia6850_device::write)));
}
void rc2014_micro::device_reset()
{
// Setup ROM
if (m_rom_present->read())
m_bus->installer(AS_PROGRAM)->install_rom(0x0000, 0x1fff, 0x0000, m_rom->base() + (m_rom_selector->read() & 7) * 0x2000);
}
void rc2014_micro::device_resolve_objects()
{
// Setup CPU
m_bus->assign_installer(AS_PROGRAM, &m_maincpu->space(AS_PROGRAM));
m_bus->assign_installer(AS_IO, &m_maincpu->space(AS_IO));
m_bus->int_callback().append_inputline(m_maincpu, INPUT_LINE_IRQ0);
// Setup ACIA
m_bus->rx_callback().append(m_acia, FUNC(acia6850_device::write_rxd));
}
static DEVICE_INPUT_DEFAULTS_START( terminal )
DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_115200 )
DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_115200 )
DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 )
DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_NONE )
DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 )
DEVICE_INPUT_DEFAULTS_END
void rc2014_micro::device_add_mconfig(machine_config &config)
{
Z80(config, m_maincpu, MAIN_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &rc2014_micro::addrmap_mem);
m_maincpu->set_addrmap(AS_IO, &rc2014_micro::addrmap_io);
clock_device &clock(CLOCK(config, "clock", MAIN_CLOCK));
clock.signal_handler().append(FUNC(rc2014_micro::clk_w));
clock.signal_handler().append(m_acia, FUNC(acia6850_device::write_txc));
clock.signal_handler().append(m_acia, FUNC(acia6850_device::write_rxc));
ACIA6850(config, m_acia, 0);
m_acia->txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
m_acia->txd_handler().append(FUNC(rc2014_micro::tx_w));
m_acia->rts_handler().set("rs232", FUNC(rs232_port_device::write_rts));
m_acia->irq_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
rs232.rxd_handler().set(m_acia, FUNC(acia6850_device::write_rxd));
rs232.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal));
}
static INPUT_PORTS_START( rc2014_micro_jumpers )
// JP1 is used to enable power from USB-to-Serial cable
PORT_START("JP2-JP4")
PORT_CONFNAME( 0x7, 0x0, "ROM Bank (A13-A15)" )
PORT_CONFSETTING( 0x0, "BASIC" )
PORT_CONFSETTING( 0x1, "EMPTY1" )
PORT_CONFSETTING( 0x2, "EMPTY2" )
PORT_CONFSETTING( 0x3, "EMPTY3" )
PORT_CONFSETTING( 0x4, "EMPTY4" )
PORT_CONFSETTING( 0x5, "EMPTY5" )
PORT_CONFSETTING( 0x6, "EMPTY6" )
PORT_CONFSETTING( 0x7, "SCM" )
PORT_START("ROM")
PORT_CONFNAME( 0x1, 0x1, "ROM Socket" )
PORT_CONFSETTING( 0x0, "Empty" )
PORT_CONFSETTING( 0x1, "Populated" )
INPUT_PORTS_END
ioport_constructor rc2014_micro::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_micro_jumpers );
}
ROM_START(rc2014_rom)
ROM_REGION( 0x10000, "rom",0 )
ROM_LOAD( "r0000009.bin", 0x0000, 0x10000, CRC(3fb1ced7) SHA1(40a030b931ebe6cca654ce056c228297f245b057) )
ROM_END
const tiny_rom_entry *rc2014_micro::device_rom_region() const
{
return ROM_NAME( rc2014_rom );
}
//**************************************************************************
// RC2014 Mini CP/M Upgrade module
// Module author: Spencer Owen
//**************************************************************************
class rc2014_mini_cpm : public device_t, public device_rc2014_card_interface
{
public:
// construction/destruction
rc2014_mini_cpm(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_post_load() override { update_banks(); }
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
virtual const tiny_rom_entry *device_rom_region() const override;
DECLARE_WRITE_LINE_MEMBER( tx_w ) { m_bus->tx_w(state); }
uint8_t ide_cs0_r(offs_t offset) { return m_ata->cs0_r(offset); }
void ide_cs0_w(offs_t offset, uint8_t data) { m_ata->cs0_w(offset, data); }
void reset_bank_w(offs_t, uint8_t) { m_bank = 0; update_banks(); }
void toggle_bank_w(offs_t, uint8_t) { m_bank = m_bank ? 0 : 1; update_banks(); }
void ram_w(offs_t offset, uint8_t data) { m_ram[offset] = data; }
private:
void update_banks();
// base-class members
uint8_t m_bank;
uint8_t m_selected_bank;
std::unique_ptr<u8[]> m_ram;
required_device<ata_interface_device> m_ata;
required_device<rc2014_bus_device> m_rc2014_bus;
required_memory_region m_rom;
required_ioport m_jp1;
};
rc2014_mini_cpm::rc2014_mini_cpm(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, RC2014_MINI_CPM, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_ata(*this, "ata")
, m_rc2014_bus(*this, ":bus")
, m_rom(*this, "rom")
, m_jp1(*this, "JP1-JP2")
{
}
void rc2014_mini_cpm::device_start()
{
// Additional 32K RAM
m_ram = std::make_unique<u8[]>(0x8000);
std::fill_n(m_ram.get(), 0x8000, 0xff);
save_pointer(NAME(m_ram), 0x8000);
save_item(NAME(m_bank));
// A15-A8, A7 and A2-A0 not connected, A6 must be 0
m_bus->installer(AS_IO)->install_write_handler(0x30, 0x30, 0, 0xff87, 0, write8sm_delegate(*this, FUNC(rc2014_mini_cpm::reset_bank_w)));
m_bus->installer(AS_IO)->install_write_handler(0x38, 0x38, 0, 0xff87, 0, write8sm_delegate(*this, FUNC(rc2014_mini_cpm::toggle_bank_w)));
// A15-A8 and A7 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x10, 0x17, 0, 0xff80, 0, read8sm_delegate(*this, FUNC(rc2014_mini_cpm::ide_cs0_r)), write8sm_delegate(*this, FUNC(rc2014_mini_cpm::ide_cs0_w)));
}
void rc2014_mini_cpm::device_reset()
{
m_bank = 0;
m_selected_bank = m_jp1->read();
update_banks();
}
void rc2014_mini_cpm::update_banks()
{
if (m_bank == 0)
{
m_bus->installer(AS_PROGRAM)->install_write_handler(0x0000, 0x7fff, write8sm_delegate(*this, FUNC(rc2014_mini_cpm::ram_w)));
m_bus->installer(AS_PROGRAM)->install_rom(0x0000, 0x3fff, 0x0000, m_rom->base() + (m_selected_bank * 0x4000));
}
else
{
m_bus->installer(AS_PROGRAM)->install_ram(0x0000, 0x7fff, m_ram.get());
}
}
void rc2014_mini_cpm::device_add_mconfig(machine_config &config)
{
ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, true);
RC2014_SLOT(config, "1", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "2", m_rc2014_bus, rc2014_bus_modules, nullptr);
}
static INPUT_PORTS_START( rc2014_mini_cpm_jumpers )
PORT_START("JP1-JP2")
PORT_CONFNAME( 0x3, 0x1, "Bank" )
PORT_CONFSETTING( 0x0, "0" )
PORT_CONFSETTING( 0x1, "1" )
PORT_CONFSETTING( 0x2, "2" )
PORT_CONFSETTING( 0x3, "3" )
INPUT_PORTS_END
ioport_constructor rc2014_mini_cpm::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_mini_cpm_jumpers );
}
ROM_START(rc2014_mini_cpm)
ROM_REGION( 0x10000, "rom",0 )
ROM_LOAD( "r0881099.bin", 0x00000, 0x10000, CRC(5619f399) SHA1(c96e9ebd6ce019c264aaea156532fcf807d4c74c) )
ROM_END
const tiny_rom_entry *rc2014_mini_cpm::device_rom_region() const
{
return ROM_NAME( rc2014_mini_cpm );
}
}
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_MICRO, device_rc2014_card_interface, rc2014_micro, "rc2014_micro", "RC2014 Micro module")
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_MINI_CPM, device_rc2014_card_interface, rc2014_mini_cpm, "rc2014_mini_cpm", "Mini CP/M Upgrade module")

19
src/devices/bus/rc2014/micro.h Normal file
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@ -0,0 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/**********************************************************************
RC2014 Micro Module
**********************************************************************/
#ifndef MAME_BUS_RC2014_MICRO_H
#define MAME_BUS_RC2014_MICRO_H
#pragma once
#include "bus/rc2014/rc2014.h"
DECLARE_DEVICE_TYPE(RC2014_MICRO, device_rc2014_card_interface)
DECLARE_DEVICE_TYPE(RC2014_MINI_CPM, device_rc2014_card_interface)
#endif // MAME_BUS_RC2014_MICRO_H

21
src/devices/bus/rc2014/modules.cpp
View File

@ -16,6 +16,11 @@
#include "bus/rc2014/romram.h"
#include "bus/rc2014/serial.h"
#include "bus/rc2014/cf.h"
#include "bus/rc2014/rtc.h"
#include "bus/rc2014/sound.h"
#include "bus/rc2014/ide.h"
#include "bus/rc2014/fdc.h"
#include "bus/rc2014/micro.h"
void rc2014_bus_modules(device_slot_interface &device)
{
@ -31,6 +36,22 @@ void rc2014_bus_modules(device_slot_interface &device)
device.option_add("sio_40p", RC2014_DUAL_SERIAL_40P);
device.option_add("cf", RC2014_COMPACT_FLASH);
device.option_add("rom_ram", RC2014_ROM_RAM_512);
device.option_add("rtc", RC2014_DS1302_RTC);
device.option_add("ym_sound", RC2014_YM2149_SOUND);
device.option_add("ay_sound", RC2014_AY8190_SOUND);
device.option_add("82c55_ide", RC2014_82C55_IDE);
device.option_add("ide_hdd", RC2014_IDE_HDD);
device.option_add("fdc_smc", RC2014_FDC9266);
device.option_add("fdc_wdc", RC2014_WD37C65);
device.option_add("micro", RC2014_MICRO);
}
// Mini mezzanine boards
void rc2014_mini_bus_modules(device_slot_interface &device)
{
rc2014_bus_modules(device);
device.option_add("mini", RC2014_MICRO);
device.option_add("mini_cpm", RC2014_MINI_CPM);
}
void rc2014_ext_bus_modules(device_slot_interface &device)

1
src/devices/bus/rc2014/modules.h
View File

@ -13,6 +13,7 @@
// supported devices
void rc2014_bus_modules(device_slot_interface &device);
void rc2014_mini_bus_modules(device_slot_interface &device);
void rc2014_ext_bus_modules(device_slot_interface &device);
void rc2014_rc80_bus_modules(device_slot_interface &device);

7
src/devices/bus/rc2014/ram.cpp
View File

@ -164,11 +164,10 @@ void ram_64k_device::update_banks()
{
if (m_paged->read() == 0) return; // If not paged skip
if (m_bank == 0) {
if (m_bank == 0)
m_bus->installer(AS_PROGRAM)->install_write_handler(0x0000, 0x7fff, write8sm_delegate(*this, FUNC(ram_64k_device::ram_w)));
} else {
else
m_bus->installer(AS_PROGRAM)->install_ram(0x0000, 0x7fff, m_ram.get());
}
}
//**************************************************************************
@ -204,7 +203,7 @@ void ram_64k_device_40pin::device_reset()
m_bus->installer(AS_PROGRAM)->install_ram(0x8000, 0xffff, m_ram.get() + 0x8000);
m_bus->installer(AS_PROGRAM)->install_write_handler(0x0000, 0x7fff, write8sm_delegate(*this, FUNC(ram_64k_device_40pin::ram_w)));
}
else
else
{
m_bus->installer(AS_PROGRAM)->install_ram(m_start_addr->read() * 0x1000, 0xffff, m_ram.get() + m_start_addr->read() * 0x1000);
}

20
src/devices/bus/rc2014/rc2014.cpp
View File

@ -14,7 +14,7 @@
//**************************************************************************
//-------------------------------------------------
// rc2014_bus_device
// rc2014_bus_device
//-------------------------------------------------
rc2014_bus_device::rc2014_bus_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
@ -40,14 +40,12 @@ rc2014_bus_device::rc2014_bus_device(const machine_config &mconfig, const char *
rc2014_bus_device::~rc2014_bus_device()
{
for(size_t i = 0; i < m_daisy.size(); i++)
delete [] m_daisy_chain[i];
delete [] m_daisy_chain[i];
delete [] m_daisy_chain;
}
void rc2014_bus_device::device_start()
{
if (m_installer[AS_PROGRAM] == nullptr)
throw emu_fatalerror("Main address installer missing on RC2014 bus !!!");
// resolve callbacks
m_clk.resolve_safe();
m_int.resolve_safe();
@ -74,7 +72,9 @@ void rc2014_bus_device::assign_installer(int index, address_space_installer *ins
address_space_installer *rc2014_bus_device::installer(int index) const
{
assert(index >= 0 && index < 4 && m_installer[index]);
assert(index >= 0 && index < 4);
if (m_installer[index] == nullptr )
throw emu_fatalerror("Address installer not set on RC2014 bus !!! Add CPU module.");
return m_installer[index];
}
@ -91,7 +91,7 @@ const z80_daisy_config* rc2014_bus_device::get_daisy_chain()
}
//-------------------------------------------------
// device_rc2014_card_interface
// device_rc2014_card_interface
//-------------------------------------------------
device_rc2014_card_interface::device_rc2014_card_interface(const machine_config &mconfig, device_t &device)
@ -138,7 +138,7 @@ void rc2014_slot_device::device_resolve_objects()
//**************************************************************************
//-------------------------------------------------
// rc2014_ext_bus_device
// rc2014_ext_bus_device
//-------------------------------------------------
rc2014_ext_bus_device::rc2014_ext_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@ -175,7 +175,7 @@ void rc2014_ext_bus_device::device_start()
}
//-------------------------------------------------
// device_rc2014_ext_card_interface
// device_rc2014_ext_card_interface
//-------------------------------------------------
device_rc2014_ext_card_interface::device_rc2014_ext_card_interface(const machine_config &mconfig, device_t &device)
@ -221,7 +221,7 @@ void rc2014_ext_slot_device::device_resolve_objects()
//**************************************************************************
//-------------------------------------------------
// rc2014_rc80_bus_device
// rc2014_rc80_bus_device
//-------------------------------------------------
rc2014_rc80_bus_device::rc2014_rc80_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@ -241,7 +241,7 @@ void rc2014_rc80_bus_device::device_start()
}
//-------------------------------------------------
// device_rc2014_rc80_card_interface
// device_rc2014_rc80_card_interface
//-------------------------------------------------
device_rc2014_rc80_card_interface::device_rc2014_rc80_card_interface(const machine_config &mconfig, device_t &device)

90
src/devices/bus/rc2014/rc2014.h
View File

@ -5,49 +5,49 @@
RC2014 Bus Device
===========================================================================
Standard Bus| Extended Bus | RC80 RC2014 Bus
Standard Bus| Extended Bus | RC80 RC2014 Bus
=============|============================|================================
Pin Signal |Pin Signal Pin Signal |Pin # Signal Pin Signal
Pin Signal |Pin Signal Pin Signal |Pin # Signal Pin Signal
=============|============================|================================
1 A15 |1 Not used 1 A15 |41 #41 (custom) 1 A15
2 A14 |2 Not used 2 A14 |42 #42 (custom) 2 A14
3 A13 |3 Not used 3 A13 |43 #43 (custom) 3 A13
4 A12 |4 Not used 4 A12 |44 #44 (custom) 4 A12
5 A11 |5 Not used 5 A11 |45 #45 (custom) 5 A11
6 A10 |6 Not used 6 A10 |46 #46 (custom) 6 A10
7 A9 |7 Not used 7 A9 |47 #47 (custom) 7 A9
8 A8 |8 Not used 8 A8 |48 #48 (custom) 8 A8
9 A7 |9 Not used 9 A7 |49 A23 9 A7
10 A6 |10 Not used 10 A6 |50 A22 10 A6
11 A5 |11 Not used 11 A5 |51 A21 11 A5
12 A4 |12 Not used 12 A4 |52 A20 12 A4
13 A3 |13 Not used 13 A3 |53 A19 13 A3
14 A2 |14 Not used 14 A2 |54 A18 14 A2
15 A1 |15 Not used 15 A1 |55 A17 15 A1
16 A0 |16 Not used 16 A0 |56 A16 16 A0
17 GND |17 GND 17 GND |57 GND 17 GND
18 5V |18 5V 18 5V |58 5V 18 5V
19 /M1 |19 /RFSH 19 /M1 |59 /RFSH 19 /M1
20 /RESET |20 PAGE(/RESET2)20 /RESET |60 PAGE 20 /RESET
21 CLK |21 CLK2 21 CLK |61 CLK2 21 CLK
22 /INT |22 /BUSAK 22 /INT |62 /BUSAK 22 /INT
23 /MREQ |23 /HALT 23 /MREQ |63 /HALT 23 /MREQ
24 /WR |24 /BUSRQ 24 /WR |64 /BUSRQ 24 /WR
25 /RD |25 /WAIT 25 /RD |65 /WAIT 25 /RD
26 /IORQ |26 /NMI 26 /IORQ |66 /NMI 26 /IORQ
27 D0 |27 D8 27 D0 |67 #67 (custom) 27 D0
28 D1 |28 D9 28 D1 |68 #68 (custom) 28 D1
29 D2 |29 D10 29 D2 |69 #69 (custom) 29 D2
30 D3 |30 D11 30 D3 |70 #70 (custom) 30 D3
31 D4 |31 D12 31 D4 |71 #71 (custom) 31 D4
32 D5 |32 D13 32 D5 |72 #72 (custom) 32 D5
33 D6 |33 D14 33 D6 |73 #73 (custom) 33 D6
34 D7 |34 D15 34 D7 |74 #74 (custom) 34 D7
35 TX |35 TX2 35 TX |75 TX2 35 TX
36 RX |36 RX2 36 RX |76 RX2 36 RX
37 USER1 |37 USER5 37 USER1 |77 USER5 37 USER1
38 USER2 |38 USER6 38 USER2 |78 USER6 38 USER2
39 USER3 |39 USER7 39 USER3 |79 USER7 39 USER3
1 A15 |1 Not used 1 A15 |41 #41 (custom) 1 A15
2 A14 |2 Not used 2 A14 |42 #42 (custom) 2 A14
3 A13 |3 Not used 3 A13 |43 #43 (custom) 3 A13
4 A12 |4 Not used 4 A12 |44 #44 (custom) 4 A12
5 A11 |5 Not used 5 A11 |45 #45 (custom) 5 A11
6 A10 |6 Not used 6 A10 |46 #46 (custom) 6 A10
7 A9 |7 Not used 7 A9 |47 #47 (custom) 7 A9
8 A8 |8 Not used 8 A8 |48 #48 (custom) 8 A8
9 A7 |9 Not used 9 A7 |49 A23 9 A7
10 A6 |10 Not used 10 A6 |50 A22 10 A6
11 A5 |11 Not used 11 A5 |51 A21 11 A5
12 A4 |12 Not used 12 A4 |52 A20 12 A4
13 A3 |13 Not used 13 A3 |53 A19 13 A3
14 A2 |14 Not used 14 A2 |54 A18 14 A2
15 A1 |15 Not used 15 A1 |55 A17 15 A1
16 A0 |16 Not used 16 A0 |56 A16 16 A0
17 GND |17 GND 17 GND |57 GND 17 GND
18 5V |18 5V 18 5V |58 5V 18 5V
19 /M1 |19 /RFSH 19 /M1 |59 /RFSH 19 /M1
20 /RESET |20 PAGE(/RESET2)20 /RESET |60 PAGE 20 /RESET
21 CLK |21 CLK2 21 CLK |61 CLK2 21 CLK
22 /INT |22 /BUSAK 22 /INT |62 /BUSAK 22 /INT
23 /MREQ |23 /HALT 23 /MREQ |63 /HALT 23 /MREQ
24 /WR |24 /BUSRQ 24 /WR |64 /BUSRQ 24 /WR
25 /RD |25 /WAIT 25 /RD |65 /WAIT 25 /RD
26 /IORQ |26 /NMI 26 /IORQ |66 /NMI 26 /IORQ
27 D0 |27 D8 27 D0 |67 #67 (custom) 27 D0
28 D1 |28 D9 28 D1 |68 #68 (custom) 28 D1
29 D2 |29 D10 29 D2 |69 #69 (custom) 29 D2
30 D3 |30 D11 30 D3 |70 #70 (custom) 30 D3
31 D4 |31 D12 31 D4 |71 #71 (custom) 31 D4
32 D5 |32 D13 32 D5 |72 #72 (custom) 32 D5
33 D6 |33 D14 33 D6 |73 #73 (custom) 33 D6
34 D7 |34 D15 34 D7 |74 #74 (custom) 34 D7
35 TX |35 TX2 35 TX |75 TX2 35 TX
36 RX |36 RX2 36 RX |76 RX2 36 RX
37 USER1 |37 USER5 37 USER1 |77 USER5 37 USER1
38 USER2 |38 USER6 38 USER2 |78 USER6 38 USER2
39 USER3 |39 USER7 39 USER3 |79 USER7 39 USER3
40 USER4 |40 USER8 40 USER4 |80 USER8(IEI) 40 USER4(IEO)
===========================================================================
@ -146,14 +146,14 @@ public:
rc2014_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
template <typename T, typename U>
rc2014_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&bus_tag, U &&slot_options, char const *default_option)
rc2014_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&bus_tag, U &&slot_options, char const *default_option, bool fixed = false)
: rc2014_slot_device(mconfig, tag, owner, DERIVED_CLOCK(1,1))
{
m_bus.set_tag(std::forward<T>(bus_tag));
option_reset();
slot_options(*this);
set_default_option(default_option);
set_fixed(false);
set_fixed(fixed);
}
protected:
@ -239,14 +239,14 @@ public:
rc2014_ext_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
template <typename T, typename U>
rc2014_ext_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&bus_tag, U &&slot_options, char const *default_option)
rc2014_ext_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&bus_tag, U &&slot_options, char const *default_option, bool fixed = false)
: rc2014_ext_slot_device(mconfig, tag, owner, DERIVED_CLOCK(1,1))
{
m_bus.set_tag(std::forward<T>(bus_tag));
option_reset();
slot_options(*this);
set_default_option(default_option);
set_fixed(false);
set_fixed(fixed);
}
protected:

5
src/devices/bus/rc2014/rom.cpp
View File

@ -124,8 +124,9 @@ void pagable_rom_device::device_start()
{
save_item(NAME(m_bank));
m_bus->installer(AS_IO)->install_write_handler(0x30, 0x30, write8sm_delegate(*this, FUNC(pagable_rom_device::reset_bank_w)));
m_bus->installer(AS_IO)->install_write_handler(0x38, 0x38, write8sm_delegate(*this, FUNC(pagable_rom_device::toggle_bank_w)));
// A15-A8, A7 and A2-A0 not connected, A6 must be 0
m_bus->installer(AS_IO)->install_write_handler(0x30, 0x30, 0, 0xff87, 0, write8sm_delegate(*this, FUNC(pagable_rom_device::reset_bank_w)));
m_bus->installer(AS_IO)->install_write_handler(0x38, 0x38, 0, 0xff87, 0, write8sm_delegate(*this, FUNC(pagable_rom_device::toggle_bank_w)));
}
void pagable_rom_device::device_reset()

139
src/devices/bus/rc2014/romram.cpp
View File

@ -8,6 +8,7 @@
#include "emu.h"
#include "romram.h"
#include "machine/intelfsh.h"
namespace {
@ -25,19 +26,30 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_post_load() override { update_banks(); }
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual const tiny_rom_entry *device_rom_region() const override;
void page_w(offs_t offset, uint8_t data) { m_page_reg[offset & 3] = data & 0x3f; update_banks(); }
void page_en_w(offs_t, uint8_t data) { m_page_en = data & 1; update_banks(); }
void page_w(offs_t offset, uint8_t data) { m_page_reg[offset & 3] = data & 0x3f; }
void page_en_w(offs_t, uint8_t data) { m_page_en = data & 1; }
void update_banks();
void mem0_w(offs_t offset, uint8_t data) { mem_w(offset, data, 0); }
void mem1_w(offs_t offset, uint8_t data) { mem_w(offset, data, 1); }
void mem2_w(offs_t offset, uint8_t data) { mem_w(offset, data, 2); }
void mem3_w(offs_t offset, uint8_t data) { mem_w(offset, data, 3); }
uint8_t mem0_r(offs_t offset) { return mem_r(offset, 0); }
uint8_t mem1_r(offs_t offset) { return mem_r(offset, 1); }
uint8_t mem2_r(offs_t offset) { return mem_r(offset, 2); }
uint8_t mem3_r(offs_t offset) { return mem_r(offset, 3); }
private:
void mem_w(offs_t offset, uint8_t data, uint8_t bank);
uint8_t mem_r(offs_t offset, uint8_t bank);
uint8_t m_page_reg[4];
uint8_t m_page_en;
std::unique_ptr<u8[]> m_ram;
required_memory_region m_romram;
memory_bank_array_creator<4> m_bank;
required_device<sst_39sf040_device> m_flash;
};
rom_ram_512k_device::rom_ram_512k_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
@ -46,8 +58,7 @@ rom_ram_512k_device::rom_ram_512k_device(const machine_config &mconfig, const ch
, m_page_reg{0,0,0,0}
, m_page_en(0)
, m_ram(nullptr)
, m_romram(*this, "romram")
, m_bank(*this, "bank%u", 0U)
, m_flash(*this, "flash")
{
}
@ -59,64 +70,90 @@ void rom_ram_512k_device::device_start()
save_item(NAME(m_page_en));
save_item(NAME(m_page_reg));
// A3 not connected
m_bus->installer(AS_IO)->install_write_handler(0x70, 0x73, 0, 0x08, 0, write8sm_delegate(*this, FUNC(rom_ram_512k_device::page_w)));
// A3, A1 and A0 not connected
m_bus->installer(AS_IO)->install_write_handler(0x74, 0x74, 0, 0x0b, 0, write8sm_delegate(*this, FUNC(rom_ram_512k_device::page_en_w)));
// A15-A8 and A3 not connected
m_bus->installer(AS_IO)->install_write_handler(0x70, 0x73, 0, 0xff08, 0, write8sm_delegate(*this, FUNC(rom_ram_512k_device::page_w)));
// A15-A8, A3, A1 and A0 not connected
m_bus->installer(AS_IO)->install_write_handler(0x74, 0x74, 0, 0xff0b, 0, write8sm_delegate(*this, FUNC(rom_ram_512k_device::page_en_w)));
m_bus->installer(AS_PROGRAM)->install_read_bank(0x0000, 0x3fff, m_bank[0]);
m_bus->installer(AS_PROGRAM)->install_read_bank(0x4000, 0x7fff, m_bank[1]);
m_bus->installer(AS_PROGRAM)->install_read_bank(0x8000, 0xbfff, m_bank[2]);
m_bus->installer(AS_PROGRAM)->install_read_bank(0xc000, 0xffff, m_bank[3]);
update_banks();
m_bus->installer(AS_PROGRAM)->install_readwrite_handler(0x0000, 0x3fff, 0, 0, 0, read8sm_delegate(*this, FUNC(rom_ram_512k_device::mem0_r)), write8sm_delegate(*this, FUNC(rom_ram_512k_device::mem0_w)));
m_bus->installer(AS_PROGRAM)->install_readwrite_handler(0x4000, 0x7fff, 0, 0, 0, read8sm_delegate(*this, FUNC(rom_ram_512k_device::mem1_r)), write8sm_delegate(*this, FUNC(rom_ram_512k_device::mem1_w)));
m_bus->installer(AS_PROGRAM)->install_readwrite_handler(0x8000, 0xbfff, 0, 0, 0, read8sm_delegate(*this, FUNC(rom_ram_512k_device::mem2_r)), write8sm_delegate(*this, FUNC(rom_ram_512k_device::mem2_w)));
m_bus->installer(AS_PROGRAM)->install_readwrite_handler(0xc000, 0xffff, 0, 0, 0, read8sm_delegate(*this, FUNC(rom_ram_512k_device::mem3_r)), write8sm_delegate(*this, FUNC(rom_ram_512k_device::mem3_w)));
}
void rom_ram_512k_device::update_banks()
void rom_ram_512k_device::device_reset()
{
m_page_en = 0;
m_page_reg[0] = 0;
m_page_reg[1] = 0;
m_page_reg[2] = 0;
m_page_reg[3] = 0;
}
void rom_ram_512k_device::device_add_mconfig(machine_config &config)
{
SST_39SF040(config, m_flash);
}
void rom_ram_512k_device::mem_w(offs_t offset, uint8_t data, uint8_t bank)
{
if (m_page_en)
{
if (m_page_reg[0] & 0x20) {
m_bank[0]->set_base(m_ram.get() + ((m_page_reg[0] & 0x1f) << 14));
m_bus->installer(AS_PROGRAM)->install_write_bank(0x0000, 0x3fff, m_bank[0]);
if (m_page_reg[bank] & 0x20) {
m_ram[offset + ((m_page_reg[bank] & 0x1f) << 14)] = data;
} else {
m_bank[0]->set_base(m_romram->base() + (m_page_reg[0] << 14));
m_bus->installer(AS_PROGRAM)->unmap_write(0x0000, 0x3fff);
}
if (m_page_reg[1] & 0x20) {
m_bank[1]->set_base(m_ram.get() + ((m_page_reg[1] & 0x1f) << 14));
m_bus->installer(AS_PROGRAM)->install_write_bank(0x4000, 0x7fff, m_bank[1]);
} else {
m_bank[1]->set_base(m_romram->base() + (m_page_reg[1] << 14));
m_bus->installer(AS_PROGRAM)->unmap_write(0x4000, 0x7fff);
}
if (m_page_reg[2] & 0x20) {
m_bank[2]->set_base(m_ram.get() + ((m_page_reg[2] & 0x1f) << 14));
m_bus->installer(AS_PROGRAM)->install_write_bank(0x8000, 0xbfff, m_bank[2]);
} else {
m_bank[2]->set_base(m_romram->base() + (m_page_reg[2] << 14));
m_bus->installer(AS_PROGRAM)->unmap_write(0x8000, 0xbfff);
}
if (m_page_reg[3] & 0x20) {
m_bank[3]->set_base(m_ram.get() + ((m_page_reg[3] & 0x1f) << 14));
m_bus->installer(AS_PROGRAM)->install_write_bank(0xc000, 0xffff, m_bank[3]);
} else {
m_bank[3]->set_base(m_romram->base() + (m_page_reg[3] << 14));
m_bus->installer(AS_PROGRAM)->unmap_write(0xc000, 0xffff);
m_flash->write(offset + (m_page_reg[bank] << 14), data);
}
}
else
{
m_bank[0]->set_base(m_romram->base() + 0x0000);
m_bank[1]->set_base(m_romram->base() + 0x4000);
m_bank[2]->set_base(m_romram->base() + 0x8000);
m_bank[3]->set_base(m_romram->base() + 0xc000);
m_flash->write(offset + (bank << 14), data);
}
}
uint8_t rom_ram_512k_device::mem_r(offs_t offset, uint8_t bank)
{
if (m_page_en)
{
if ((offset>>14 == 0) && (m_page_reg[bank] & 0x20)) {
return m_ram[offset + ((m_page_reg[bank] & 0x1f) << 14)];
} else {
return m_flash->read(offset + (m_page_reg[bank] << 14));
}
}
return m_flash->read(offset + (bank << 14));
}
ROM_START(rc2014_rom_ram_512k)
ROM_REGION( 0x80000, "romram", 0)
ROM_LOAD( "rc_2.512k.rom", 0x00000, 0x80000, CRC(c3aefb4e) SHA1(34541851dc781033b00cdfbe445e1d91811da5c2) )
ROM_REGION( 0x80000, "flash", 0)
ROM_DEFAULT_BIOS("3.0.1")
// Official ROMs distributed with kit
ROM_SYSTEM_BIOS(0, "1.512k", "RomWBW RC_Std.ROM 2.9.1-pre5")
ROMX_LOAD( "rc_1.512k.rom", 0x00000, 0x80000, CRC(f360d908) SHA1(e9c0c79f873eecff9184836025c13915630274c5), ROM_BIOS(0))
ROM_SYSTEM_BIOS(1, "2.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With PPIDE")
ROMX_LOAD( "rc_2.512k.rom", 0x00000, 0x80000, CRC(c3aefb4e) SHA1(34541851dc781033b00cdfbe445e1d91811da5c2), ROM_BIOS(1))
ROM_SYSTEM_BIOS(2, "3.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With RTC")
ROMX_LOAD( "rc_3.512k.rom", 0x00000, 0x80000, CRC(749f7973) SHA1(2b78bb5ad0595b63c95dc58d48c5144320237362), ROM_BIOS(2))
ROM_SYSTEM_BIOS(3, "4.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With PPIDE and RTC")
ROMX_LOAD( "rc_4.512k.rom", 0x00000, 0x80000, CRC(fbe44292) SHA1(ae0407f0a605e9b1262ce00acf393c30fd87d1e4), ROM_BIOS(3))
ROM_SYSTEM_BIOS(4, "5.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With WDC Floppy")
ROMX_LOAD( "rc_5.512k.rom", 0x00000, 0x80000, CRC(4e1d00dd) SHA1(57b21ce416a0a23e034c2efdb54f669f4b110878), ROM_BIOS(4))
ROM_SYSTEM_BIOS(5, "6.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With WDC Floppy and PPIDE")
ROMX_LOAD( "rc_6.512k.rom", 0x00000, 0x80000, CRC(f2f1535e) SHA1(9121ca4246c520169cca47fda07143de8e903b3e), ROM_BIOS(5))
ROM_SYSTEM_BIOS(6, "7.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With WDC Floppy and RTC")
ROMX_LOAD( "rc_7.512k.rom", 0x00000, 0x80000, CRC(57efe210) SHA1(b9ee93215d69c185d5af511a1105ee06e6474ff2), ROM_BIOS(6))
ROM_SYSTEM_BIOS(7, "8.512k", "RomWBW RC_Std.ROM 2.9.1-pre5 With WDC Floppy, PPIDE and RTC")
ROMX_LOAD( "rc_8.512k.rom", 0x00000, 0x80000, CRC(38cc2dfc) SHA1(6e740224276b9d0ae32bb28095c8a8ccb47c38b5), ROM_BIOS(7))
// Official distribution of ROMWBW
// Taken from https://github.com/wwarthen/RomWBW/releases
ROM_SYSTEM_BIOS(8, "2.9.0", "Official RomWBW 2.9.0")
ROMX_LOAD( "rc_std_2_9_0.rom", 0x00000, 0x80000, CRC(2045d238) SHA1(dd37c945fd531192b368d80b20b0154e6b2d2a75), ROM_BIOS(8))
ROM_SYSTEM_BIOS(9, "2.9.1", "Official RomWBW 2.9.1")
ROMX_LOAD( "rcz80_std_2_9_1.rom", 0x00000, 0x80000, CRC(f7c52c5f) SHA1(86a0dbbecfea118cf66f9f35a21f138ce64ae788), ROM_BIOS(9))
ROM_SYSTEM_BIOS(10, "3.0.0", "Official RomWBW 3.0.0")
ROMX_LOAD( "rcz80_std_3_0_0.rom", 0x00000, 0x80000, CRC(15b802f8) SHA1(0941c6b00ccdca460d64d16fb374c0380dd431ad), ROM_BIOS(10))
ROM_SYSTEM_BIOS(11, "3.0.1", "Official RomWBW 3.0.1")
ROMX_LOAD( "rcz80_std_3_0_1.rom", 0x00000, 0x80000, CRC(6d6b60c5) SHA1(5c642cb3113bc0a51562dc92c8b46bde414adb6c), ROM_BIOS(11))
ROM_END
const tiny_rom_entry *rom_ram_512k_device::device_rom_region() const

107
src/devices/bus/rc2014/rtc.cpp Normal file
View File

@ -0,0 +1,107 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
RC2014 Real Time Clock
****************************************************************************/
#include "emu.h"
#include "rtc.h"
#include "machine/ds1302.h"
namespace {
//**************************************************************************
// RC2014 Real Time Clock DS1302 module
// Module author: Ed Brindley
//**************************************************************************
class rc2014_ds1302_device : public device_t, public device_rc2014_card_interface
{
public:
// construction/destruction
rc2014_ds1302_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
uint8_t rtc_r(offs_t offset);
void rtc_w(offs_t offset, uint8_t data);
private:
required_device<ds1302_device> m_rtc;
required_ioport m_addr;
};
rc2014_ds1302_device::rc2014_ds1302_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, RC2014_DS1302_RTC, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_rtc(*this, "rtc")
, m_addr(*this, "SW1")
{
}
void rc2014_ds1302_device::device_start()
{
}
void rc2014_ds1302_device::device_reset()
{
// A15-A8, A1 and A0 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(m_addr->read(), m_addr->read(), 0, 0xff03, 0, read8sm_delegate(*this, FUNC(rc2014_ds1302_device::rtc_r)), write8sm_delegate(*this, FUNC(rc2014_ds1302_device::rtc_w)));
}
void rc2014_ds1302_device::device_add_mconfig(machine_config &config)
{
DS1302(config, m_rtc, 32.768_kHz_XTAL);
}
uint8_t rc2014_ds1302_device::rtc_r(offs_t offset)
{
return m_rtc->io_r() ? 0x01 : 0x00;
}
void rc2014_ds1302_device::rtc_w(offs_t, uint8_t data)
{
m_rtc->ce_w(BIT(data,4));
if (BIT(data,5)==0) m_rtc->io_w(BIT(data,7));
m_rtc->sclk_w(BIT(data,6));
}
static INPUT_PORTS_START( rc2014_ds1302_jumpers )
PORT_START("SW1")
PORT_DIPNAME(0x04, 0x00, "0x04") PORT_DIPLOCATION("Base Address:1")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x04, DEF_STR( On ) )
PORT_DIPNAME(0x08, 0x00, "0x08") PORT_DIPLOCATION("Base Address:2")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x08, DEF_STR( On ) )
PORT_DIPNAME(0x10, 0x00, "0x10") PORT_DIPLOCATION("Base Address:3")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x10, DEF_STR( On ) )
PORT_DIPNAME(0x20, 0x00, "0x20") PORT_DIPLOCATION("Base Address:4")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x20, DEF_STR( On ) )
PORT_DIPNAME(0x40, 0x40, "0x40") PORT_DIPLOCATION("Base Address:5")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x40, DEF_STR( On ) )
PORT_DIPNAME(0x80, 0x80, "0x80") PORT_DIPLOCATION("Base Address:6")
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
PORT_DIPSETTING(0x80, DEF_STR( On ) )
INPUT_PORTS_END
ioport_constructor rc2014_ds1302_device::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_ds1302_jumpers );
}
}
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_DS1302_RTC, device_rc2014_card_interface, rc2014_ds1302_device, "rc2014_ds1302", "RC2014 Real Time Clock DS1302 module")

18
src/devices/bus/rc2014/rtc.h Normal file
View File

@ -0,0 +1,18 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/**********************************************************************
RC2014 Real Time Clock
**********************************************************************/
#ifndef MAME_BUS_RC2014_RTC_H
#define MAME_BUS_RC2014_RTC_H
#pragma once
#include "bus/rc2014/rc2014.h"
DECLARE_DEVICE_TYPE(RC2014_DS1302_RTC, device_rc2014_card_interface)
#endif // MAME_BUS_RC2014_RTC_H

31
src/devices/bus/rc2014/serial.cpp
View File

@ -46,8 +46,8 @@ serial_io_device::serial_io_device(const machine_config &mconfig, const char *ta
void serial_io_device::device_start()
{
// A5, A4, A3, A2 and A1 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x81, 0, 0x3e, 0, read8sm_delegate(*m_acia, FUNC(acia6850_device::read)), write8sm_delegate(*m_acia, FUNC(acia6850_device::write)));
// A15-A8 and A5-A1 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x81, 0, 0xff3e, 0, read8sm_delegate(*m_acia, FUNC(acia6850_device::read)), write8sm_delegate(*m_acia, FUNC(acia6850_device::write)));
}
void serial_io_device::device_resolve_objects()
@ -58,6 +58,8 @@ void serial_io_device::device_resolve_objects()
m_bus->rx_callback().append(m_acia, FUNC(acia6850_device::write_rxd));
}
// JP1 is used to enable power from USB-to-Serial cable
static DEVICE_INPUT_DEFAULTS_START( terminal )
DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_115200 )
DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_115200 )
@ -115,7 +117,7 @@ protected:
dual_serial_base::dual_serial_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, type, tag, owner, clock)
, m_clk_portb(0)
, m_portb(*this, "PORTB")
, m_portb(*this, "JP1")
, m_sio(*this, "sio")
{
}
@ -149,10 +151,11 @@ void dual_serial_base::device_add_mconfig(machine_config &config)
}
static INPUT_PORTS_START( dual_serial_jumpers )
PORT_START("PORTB")
PORT_START("JP1")
PORT_CONFNAME( 0x1, 0x0, "Port B" )
PORT_CONFSETTING( 0x0, "CLK2 (Open)" )
PORT_CONFSETTING( 0x1, "CLK1 (Closed)" )
// JP2 and JP3 are used to enable power from USB-to-Serial cable
INPUT_PORTS_END
ioport_constructor dual_serial_base::device_input_ports() const
@ -189,11 +192,11 @@ dual_serial_device::dual_serial_device(const machine_config &mconfig, const char
void dual_serial_device::device_start()
{
// A2 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x80, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::ca_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::ca_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x81, 0x81, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::da_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::da_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x82, 0x82, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::cb_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::cb_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x83, 0x83, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::db_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::db_w)));
// A15-A8 and A2 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x80, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::ca_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::ca_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x81, 0x81, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::da_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::da_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x82, 0x82, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::cb_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::cb_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x83, 0x83, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::db_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::db_w)));
}
void dual_serial_device::device_resolve_objects()
@ -238,11 +241,11 @@ dual_serial_device_40pin::dual_serial_device_40pin(const machine_config &mconfig
void dual_serial_device_40pin::device_start()
{
// A2 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x80, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::ca_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::ca_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x81, 0x81, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::da_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::da_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x82, 0x82, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::cb_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::cb_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x83, 0x83, 0, 0x04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::db_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::db_w)));
// A15-A8 and A2 not connected
m_bus->installer(AS_IO)->install_readwrite_handler(0x80, 0x80, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::ca_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::ca_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x81, 0x81, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::da_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::da_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x82, 0x82, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::cb_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::cb_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(0x83, 0x83, 0, 0xff04, 0, read8smo_delegate(*m_sio, FUNC(z80sio_device::db_r)), write8smo_delegate(*m_sio, FUNC(z80sio_device::db_w)));
}
void dual_serial_device_40pin::device_resolve_objects()

209
src/devices/bus/rc2014/sound.cpp Normal file
View File

@ -0,0 +1,209 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
RC2014 Sound
****************************************************************************/
#include "emu.h"
#include "sound.h"
#include "sound/ay8910.h"
#include "speaker.h"
namespace {
//**************************************************************************
// RC2014 YM2149F/AY-3-8190 Sound card
// Module author: Ed Brindley
//**************************************************************************
class rc2014_ym_ay_device : public device_t, public device_rc2014_card_interface
{
protected:
// construction/destruction
rc2014_ym_ay_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual ioport_constructor device_input_ports() const override;
// base class members
required_device<ay8910_device> m_psg;
required_ioport_array<6> m_jp;
};
rc2014_ym_ay_device::rc2014_ym_ay_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, type, tag, owner, clock)
, device_rc2014_card_interface(mconfig, *this)
, m_psg(*this, "psg")
, m_jp(*this, "JP%u", 1U)
{
}
void rc2014_ym_ay_device::device_start()
{
}
void rc2014_ym_ay_device::device_reset()
{
uint16_t base;
uint16_t reg;
// A13-A8 and A0 not connected
uint16_t mask = 0x3f01;
// JP2 - Addressing mode
if (m_jp[1]->read())
{
base = 0x8000; // A15 for Spectrum mode
mask |= 0x0F00; // A7-A4 are not connected
}
else
{
base = m_jp[3]->read() << 4; // JP4
base |= m_jp[0]->read() ? 0x10 : 0x00; // JP1
mask |= 0x8000; // A15 not connected
}
// JP3 - Register mode
switch(m_jp[2]->read())
{
case 0 : // A14 (Spectrum)
reg = 0x4000; // A14
mask |= 0x000c; // A2 and A3 not connected
break;
case 1 : // A3 (Base + 8)
reg = 0x0008; // A3
mask |= 0x4004; // A14 and A2 not connected
break;
default : // A2 (Base + 4)
reg = 0x0004; // A2
mask |= 0x4008; // A14 and A3 not connected
break;
}
m_bus->installer(AS_IO)->install_write_handler(base, base, 0, mask, 0, write8smo_delegate(m_psg, FUNC(ay8910_device::data_w)));
m_bus->installer(AS_IO)->install_readwrite_handler(base + reg, base + reg, 0, mask, 0, read8smo_delegate(m_psg, FUNC(ay8910_device::data_r)), write8smo_delegate(m_psg, FUNC(ay8910_device::address_w)));
// JP5 - Clock divider
m_psg->set_clock(clock() / m_jp[4]->read());
}
static INPUT_PORTS_START( rc2014_ym_ay_jumpers )
PORT_START("JP1") // JP1 and JP7
PORT_CONFNAME( 0x1, 0x1, "A4 Chip Enable" )
PORT_CONFSETTING( 0x0, "Low" )
PORT_CONFSETTING( 0x1, "High" )
PORT_START("JP2")
PORT_CONFNAME( 0x1, 0x0, "Addressing mode" )
PORT_CONFSETTING( 0x0, "Default" )
PORT_CONFSETTING( 0x1, "Spectrum 128" )
PORT_START("JP3")
PORT_CONFNAME( 0x3, 0x1, "Register mode" )
PORT_CONFSETTING( 0x0, "A14 (Spectrum)" )
PORT_CONFSETTING( 0x1, "A3 (Base + 8)" )
PORT_CONFSETTING( 0x2, "A2 (Base + 4)" )
PORT_START("JP4")
PORT_CONFNAME( 0xf, 0xc, "Base Address" )
PORT_CONFSETTING( 0x0, "0x00 / 0x10" )
PORT_CONFSETTING( 0x8, "0x80 / 0x90" )
PORT_CONFSETTING( 0x4, "0x40 / 0x50" )
PORT_CONFSETTING( 0xc, "0xC0 / 0xD0" )
PORT_CONFSETTING( 0x2, "0x20 / 0x30" )
PORT_CONFSETTING( 0xa, "0xA0 / 0xB0" )
PORT_CONFSETTING( 0x6, "0x60 / 0x70" )
PORT_CONFSETTING( 0xe, "0xE0 / 0xF0" )
PORT_START("JP5")
PORT_CONFNAME( 0x7, 0x4, "Divide by" )
PORT_CONFSETTING( 0x2, "2" )
PORT_CONFSETTING( 0x4, "4" )
PORT_START("JP6")
PORT_CONFNAME( 0x1, 0x0, "YM2149 half clock" )
PORT_CONFSETTING( 0x0, DEF_STR( No ) )
PORT_CONFSETTING( 0x1, DEF_STR( Yes ) )
INPUT_PORTS_END
ioport_constructor rc2014_ym_ay_device::device_input_ports() const
{
return INPUT_PORTS_NAME( rc2014_ym_ay_jumpers );
}
//**************************************************************************
// With YM2149F chip
//**************************************************************************
class rc2014_ym2149_device : public rc2014_ym_ay_device
{
public:
// construction/destruction
rc2014_ym2149_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
};
rc2014_ym2149_device::rc2014_ym2149_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: rc2014_ym_ay_device(mconfig, RC2014_YM2149_SOUND, tag, owner, clock)
{
}
void rc2014_ym2149_device::device_reset()
{
rc2014_ym_ay_device::device_reset();
// JP6 - YM2149 half clock
if (m_jp[5]->read())
{
m_psg->set_pin26_low_w();
}
}
void rc2014_ym2149_device::device_add_mconfig(machine_config &config)
{
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
YM2149(config, m_psg, 0);
m_psg->add_route(0, "rspeaker", 0.25);
m_psg->add_route(2, "rspeaker", 0.25);
m_psg->add_route(1, "lspeaker", 0.25);
m_psg->add_route(2, "lspeaker", 0.25);
}
//**************************************************************************
// With AY-3-8190 chip
//**************************************************************************
class rc2014_ay8190_device : public rc2014_ym_ay_device
{
public:
// construction/destruction
rc2014_ay8190_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_add_mconfig(machine_config &config) override;
};
rc2014_ay8190_device::rc2014_ay8190_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: rc2014_ym_ay_device(mconfig, RC2014_AY8190_SOUND, tag, owner, clock)
{
}
void rc2014_ay8190_device::device_add_mconfig(machine_config &config)
{
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
AY8910(config, m_psg, 0);
m_psg->add_route(0, "rspeaker", 0.25);
m_psg->add_route(2, "rspeaker", 0.25);
m_psg->add_route(1, "lspeaker", 0.25);
m_psg->add_route(2, "lspeaker", 0.25);
}
}
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_YM2149_SOUND, device_rc2014_card_interface, rc2014_ym2149_device, "rc2014_ym2149", "RC2014 YM2149F Sound card")
DEFINE_DEVICE_TYPE_PRIVATE(RC2014_AY8190_SOUND, device_rc2014_card_interface, rc2014_ay8190_device, "rc2014_ay8190", "RC2014 AY-3-8190 Sound card")

19
src/devices/bus/rc2014/sound.h Normal file
View File

@ -0,0 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/**********************************************************************
RC2014 Sound
**********************************************************************/
#ifndef MAME_BUS_RC2014_SOUND_H
#define MAME_BUS_RC2014_SOUND_H
#pragma once
#include "bus/rc2014/rc2014.h"
DECLARE_DEVICE_TYPE(RC2014_YM2149_SOUND, device_rc2014_card_interface)
DECLARE_DEVICE_TYPE(RC2014_AY8190_SOUND, device_rc2014_card_interface)
#endif // MAME_BUS_RC2014_SOUND_H

15
src/devices/bus/rc2014/z80cpu.cpp
View File

@ -27,8 +27,8 @@ protected:
virtual void device_start() override;
virtual void device_add_mconfig(machine_config &config) override;
void addrmap_mem(address_map &map);
void addrmap_io(address_map &map);
void addrmap_mem(address_map &map) { map.unmap_value_high(); }
void addrmap_io(address_map &map) { map.unmap_value_high(); }
// object finders
required_device<z80_device> m_maincpu;
@ -44,17 +44,6 @@ void z80cpu_base::device_start()
{
}
void z80cpu_base::addrmap_mem(address_map &map)
{
map.unmap_value_high();
}
void z80cpu_base::addrmap_io(address_map &map)
{
map.unmap_value_high();
map.global_mask(0xff);
}
void z80cpu_base::device_add_mconfig(machine_config &config)
{
Z80(config, m_maincpu, DERIVED_CLOCK(1,1));

64
src/mame/drivers/gsz80.cpp
View File

@ -4,9 +4,6 @@
// MAME Reference driver for Grant Searle's Simple Z80 Computer
// http://www.searle.wales/
// RC2014 Mini added by Chris Swan
// https://rc2014.co.uk/full-kits/rc2014-mini/
// All the common emulator stuff is here
#include "emu.h"
@ -44,29 +41,6 @@ protected:
required_device<acia6850_device> m_acia;
};
class rc2014mini_state : public gsz80_state
{
public:
rc2014mini_state(const machine_config &mconfig, device_type type, const char *tag)
: gsz80_state(mconfig, type, tag)
, m_rombank(*this, "rombank")
, m_jump_rom(*this, "A13-15")
{ }
// Different machine config due to different RAM
void rc2014mini(machine_config &config);
protected:
// RC2014 Mini only has 32K RAM, so memory map is different
void rc2014mini_mem(address_map &map);
virtual void machine_start() override;
virtual void machine_reset() override;
required_memory_bank m_rombank;
required_ioport m_jump_rom;
};
// Trivial memory map for program memory
void gsz80_state::gsz80_mem(address_map &map)
{
@ -74,24 +48,6 @@ void gsz80_state::gsz80_mem(address_map &map)
map(0x2000, 0xffff).ram();
}
void rc2014mini_state::machine_start()
{
m_rombank->configure_entries(0, 8, memregion("maincpu")->base(), 0x2000);
}
// Set ROM bank from machine CONF at Reset
void rc2014mini_state::machine_reset()
{
m_rombank->set_entry(m_jump_rom->read() & 7);
}
// RC2014 Mini only has 32K RAM
void rc2014mini_state::rc2014mini_mem(address_map &map)
{
map(0x0000, 0x1fff).bankr("rombank");
map(0x8000, 0xffff).ram();
}
void gsz80_state::gsz80_io(address_map &map)
{
map.global_mask(0xff); // use 8-bit ports
@ -136,25 +92,6 @@ void gsz80_state::gsz80(machine_config &config)
rs232.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal)); // must be below the DEVICE_INPUT_DEFAULTS_START block
}
void rc2014mini_state::rc2014mini(machine_config &config)
{
gsz80(config);
m_maincpu->set_addrmap(AS_PROGRAM, &rc2014mini_state::rc2014mini_mem);
}
static INPUT_PORTS_START( rc2014mini )
PORT_START("A13-15") /* jumpers to select ROM region */
PORT_CONFNAME( 0x7, 0x0, "ROM Bank" )
PORT_CONFSETTING( 0x0, "BASIC" )
PORT_CONFSETTING( 0x1, "EMPTY1" )
PORT_CONFSETTING( 0x2, "EMPTY2" )
PORT_CONFSETTING( 0x3, "EMPTY3" )
PORT_CONFSETTING( 0x4, "EMPTY4" )
PORT_CONFSETTING( 0x5, "EMPTY5" )
PORT_CONFSETTING( 0x6, "EMPTY6" )
PORT_CONFSETTING( 0x7, "SCM" )
INPUT_PORTS_END
// ROM mapping is trivial, this binary was created from the HEX file on Grant's website
ROM_START(gsz80)
ROM_REGION(0x2000, "maincpu",0)
@ -172,4 +109,3 @@ ROM_END
// This ties everything together
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
COMP( 2007, gsz80, 0, 0, gsz80, 0, gsz80_state, empty_init, "Grant Searle", "Simple Z-80 Machine", MACHINE_NO_SOUND_HW )
COMP( 2016, rc2014mini, gsz80, 0, rc2014mini, rc2014mini, rc2014mini_state, empty_init, "RFC2795 Ltd", "RC2014 Mini", MACHINE_NO_SOUND_HW )

130
src/mame/drivers/rc2014.cpp
View File

@ -41,6 +41,19 @@ public:
RC2014_SLOT(config, "bus:5", m_rc2014_bus, rc2014_bus_modules, "serial");
}
//
// Backplane-5 - 5 x 40pin slots
//
void rc2014bp5(machine_config &config)
{
RC2014_BUS(config, m_rc2014_bus, 0);
RC2014_SLOT(config, "bus:1", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:2", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:3", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:4", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:5", m_rc2014_bus, rc2014_bus_modules, nullptr);
}
//
// RC2014 Classic II
//
@ -79,7 +92,7 @@ public:
// Backplane 8 - 8 x 40pin slots
//
// Some modules are extended bus modules in standard slots
//
//
void rc2014zed(machine_config &config)
{
RC2014_BUS(config, m_rc2014_bus, 0);
@ -93,17 +106,41 @@ public:
RC2014_SLOT(config, "bus:8", m_rc2014_bus, rc2014_bus_modules, nullptr);
}
//
// Backplane 8 - 8 x 40pin slots
//
void rc2014bp8(machine_config &config)
{
RC2014_BUS(config, m_rc2014_bus, 0);
RC2014_SLOT(config, "bus:1", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:2", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:3", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:4", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:5", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:6", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:7", m_rc2014_bus, rc2014_bus_modules, nullptr);
RC2014_SLOT(config, "bus:8", m_rc2014_bus, rc2014_bus_modules, nullptr);
}
private:
required_device<rc2014_bus_device> m_rc2014_bus;
};
ROM_START(rc2014)
ROM_END
ROM_START(rc2014bp5)
ROM_END
ROM_START(rc2014cl2)
ROM_END
ROM_START(rc2014zed)
ROM_END
ROM_START(rc2014bp8)
ROM_END
class rc2014pro_state : public driver_device
{
public:
@ -123,7 +160,7 @@ public:
// Compact Flash storage
//
// Backplane Pro - 12 x extended slots
//
//
void rc2014pro(machine_config &config)
{
RC2014_EXT_BUS(config, m_rc2014_bus, 0);
@ -140,7 +177,7 @@ public:
RC2014_EXT_SLOT(config, "bus:11", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:12", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
}
//
// RC2014 Zed
//
@ -167,6 +204,26 @@ public:
RC2014_EXT_SLOT(config, "bus:11", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:12", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
}
//
// Backplane Pro - 12 x extended slots
//
void rc2014bppro(machine_config &config)
{
RC2014_EXT_BUS(config, m_rc2014_bus, 0);
RC2014_EXT_SLOT(config, "bus:1", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:2", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:3", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:4", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:5", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:6", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:7", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:8", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:9", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:10", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:11", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
RC2014_EXT_SLOT(config, "bus:12", m_rc2014_bus, rc2014_ext_bus_modules, nullptr);
}
private:
required_device<rc2014_ext_bus_device> m_rc2014_bus;
};
@ -177,12 +234,67 @@ ROM_END
ROM_START(rc2014zedp)
ROM_END
ROM_START(rc2014bppro)
ROM_END
static DEVICE_INPUT_DEFAULTS_START(mini_cpm)
DEVICE_INPUT_DEFAULTS("ROM", 0x1, 0x0)
DEVICE_INPUT_DEFAULTS_END
class rc2014mini_state : public driver_device
{
public:
rc2014mini_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_rc2014_bus(*this, "bus")
{ }
//
// RC2014 Mini
//
// Added by Chris Swan
// https://rc2014.co.uk/full-kits/rc2014-mini/
//
void rc2014mini(machine_config &config)
{
RC2014_BUS(config, m_rc2014_bus, 0);
RC2014_SLOT(config, "board", m_rc2014_bus, rc2014_mini_bus_modules, "mini", true);
RC2014_SLOT(config, "bus:1", m_rc2014_bus, rc2014_mini_bus_modules, nullptr);
}
//
// RC2014 Mini with CP/M Upgrade
//
void rc2014minicpm(machine_config &config)
{
RC2014_BUS(config, m_rc2014_bus, 0);
RC2014_SLOT(config, "board", m_rc2014_bus, rc2014_mini_bus_modules, "mini", true).set_option_device_input_defaults("mini", DEVICE_INPUT_DEFAULTS_NAME(mini_cpm));
RC2014_SLOT(config, "bus:1", m_rc2014_bus, rc2014_mini_bus_modules, "mini_cpm", true);
}
private:
required_device<rc2014_bus_device> m_rc2014_bus;
};
ROM_START(rc2014mini)
ROM_END
ROM_START(rc2014minicpm)
ROM_END
} // anonymous namespace
// This ties everything together
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
COMP( 2016, rc2014, 0, 0, rc2014, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Classic", MACHINE_SUPPORTS_SAVE )
COMP( 2017, rc2014pro, rc2014, 0, rc2014pro, 0, rc2014pro_state, empty_init, "RFC2795 Ltd", "RC2014 Pro", MACHINE_SUPPORTS_SAVE )
COMP( 2020, rc2014cl2, rc2014, 0, rc2014cl2, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Classic II", MACHINE_SUPPORTS_SAVE )
COMP( 2018, rc2014zed , rc2014, 0, rc2014zed ,0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Zed", MACHINE_SUPPORTS_SAVE )
COMP( 2018, rc2014zedp, rc2014, 0, rc2014zedp,0, rc2014pro_state, empty_init, "RFC2795 Ltd", "RC2014 Zed Pro", MACHINE_SUPPORTS_SAVE )
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
COMP( 2016, rc2014, 0, 0, rc2014, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Classic", MACHINE_SUPPORTS_SAVE )
COMP( 2017, rc2014pro, rc2014, 0, rc2014pro, 0, rc2014pro_state, empty_init, "RFC2795 Ltd", "RC2014 Pro", MACHINE_SUPPORTS_SAVE )
COMP( 2020, rc2014cl2, rc2014, 0, rc2014cl2, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Classic II", MACHINE_SUPPORTS_SAVE )
COMP( 2018, rc2014zed, rc2014, 0, rc2014zed, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Zed", MACHINE_SUPPORTS_SAVE )
COMP( 2018, rc2014zedp, rc2014, 0, rc2014zedp, 0, rc2014pro_state, empty_init, "RFC2795 Ltd", "RC2014 Zed Pro", MACHINE_SUPPORTS_SAVE )
COMP( 2016, rc2014mini, rc2014, 0, rc2014mini, 0, rc2014mini_state, empty_init, "RFC2795 Ltd", "RC2014 Mini", MACHINE_SUPPORTS_SAVE )
COMP( 2016, rc2014minicpm,rc2014, 0, rc2014minicpm, 0, rc2014mini_state, empty_init, "RFC2795 Ltd", "RC2014 Mini with CP/M Upgrade", MACHINE_SUPPORTS_SAVE )
// Backplanes
COMP( 2016, rc2014bp5, rc2014, 0, rc2014bp5, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Backplane-5", MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND_HW )
COMP( 2016, rc2014bp8, rc2014, 0, rc2014bp8, 0, rc2014_state, empty_init, "RFC2795 Ltd", "RC2014 Backplane-8", MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND_HW )
COMP( 2017, rc2014bppro, rc2014, 0, rc2014bppro, 0, rc2014pro_state, empty_init, "RFC2795 Ltd", "RC2014 Backplane Pro", MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND_HW )

6
src/mame/mame.lst
View File

@ -44547,7 +44547,6 @@ simpr8210 // Pioneer PR-8210
@source:gsz80.cpp
gsz80 // Grant Searle's Simple Z-80 Machine
rc2014mini // RC2014 Mini
@source:gscpm.cpp
gscpm // Grant Searle's Simple CP/M Machine
@ -44563,7 +44562,12 @@ ultim809
@source:rc2014.cpp
rc2014 // RC2014 Classic
rc2014bp5 // RC2014 Backplane-5
rc2014bp8 // RC2014 Backplane-8
rc2014pro // RC2014 Pro
rc2014bppro // RC2014 Backplane Pro
rc2014cl2 // RC2014 Classic II
rc2014zed // RC2014 Zed
rc2014zedp // RC2014 Zed Pro
rc2014mini // RC2014 Mini
rc2014minicpm // RC2014 Mini with CP/M upgrade