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(MESS) better fix for the pmac registers in SVP. thanks Arbee for noticing this veeeeeery
old out-of-bound access. I guess we originally had a single set of 12 registers... nw.
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@ -83,7 +83,11 @@ UINT32 md_rom_svp_device::pm_io(int reg, int write, UINT32 d)
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{
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if (m_emu_status & SSP_PMC_SET)
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{
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m_pmac_read[write ? reg + 6 : reg] = m_pmc.d;
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if (write)
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m_pmac_write[reg] = m_pmc.d;
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else
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m_pmac_read[reg] = m_pmc.d;
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m_emu_status &= ~SSP_PMC_SET;
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return 0;
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}
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@ -155,7 +159,10 @@ UINT32 md_rom_svp_device::pm_io(int reg, int write, UINT32 d)
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}
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// PMC value corresponds to last PMR accessed (not sure).
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m_pmc.d = m_pmac_read[write ? reg + 6 : reg];
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if (write)
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m_pmc.d = m_pmac_write[reg];
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else
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m_pmc.d = m_pmac_read[reg];
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return d;
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}
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@ -56,7 +56,7 @@ public:
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UINT8 *m_iram; // IRAM (0-0x7ff)
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UINT8 *m_dram; // [0x20000];
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UINT32 m_pmac_read[12]; // read modes/addrs for PM0-PM5
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UINT32 m_pmac_read[6]; // read modes/addrs for PM0-PM5
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UINT32 m_pmac_write[6]; // write ...
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PAIR m_pmc;
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UINT32 m_emu_status;
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