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https://github.com/holub/mame
synced 2025-05-16 02:42:05 +03:00
Hooked up bare bones for Flash ROM recognition, now trips cache error at BIOS area
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@ -1,5 +1,5 @@
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// dgPIX 'VRender 2 Beta Rev4' hardware
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// funkball CPU + 3dFX VooDoo chipset
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// MEDIAGX CPU + 3dFX VooDoo chipset
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/***************************************************************************
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@ -105,6 +105,9 @@ public:
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UINT8 m_funkball_config_reg_sel;
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UINT8 m_funkball_config_regs[256];
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UINT32 m_cx5510_regs[256/4];
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UINT16 m_flash_addr;
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UINT32 *m_unk_ram;
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UINT8 m_flash_cmd;
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// devices
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required_device<cpu_device> m_maincpu;
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@ -115,6 +118,8 @@ public:
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required_device<pic8259_device> m_pic8259_2;
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DECLARE_READ8_MEMBER( get_slave_ack );
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DECLARE_READ8_MEMBER( flash_r );
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DECLARE_WRITE8_MEMBER( flash_w );
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};
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static UINT32 cx5510_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
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@ -352,14 +357,49 @@ static WRITE8_DEVICE_HANDLER( io20_w )
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}
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}
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WRITE8_MEMBER( funkball_state::flash_w )
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{
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if(!(offset & 0x2))
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{
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m_flash_addr = (offset & 1) ? ((m_flash_addr & 0xff) | (data << 8)) : ((m_flash_addr & 0xff00) | (data));
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//printf("%08x ADDR\n",m_flash_addr << 16);
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}
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else if(offset == 2)
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{
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/* 0x83: read from u29/u30
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0x03: read from u3
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0x81: init device
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*/
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m_flash_cmd = data;
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//printf("%02x CMD\n",data);
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}
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else
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printf("%02x %02x\n",offset,data);
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}
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READ8_MEMBER( funkball_state::flash_r )
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{
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printf("%02x %08x %02x\n",offset,m_flash_addr << 16,m_flash_cmd);
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if(offset == 0)
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return 0x89;
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if(offset == 2)
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return (m_flash_cmd & 0x80) ? 0x15 : 0x14; // recognize
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return 0;
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}
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static ADDRESS_MAP_START(funkball_map, AS_PROGRAM, 32, funkball_state)
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AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
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AM_RANGE(0x000a0000, 0x000bffff) AM_RAM
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// AM_RANGE(0x000c0000, 0x000c7fff) AM_ROM AM_REGION("video_bios", 0) /* System BIOS */
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AM_RANGE(0x000a0000, 0x000affff) AM_RAM
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AM_RANGE(0x000b0000, 0x000b0003) AM_READ8(flash_r,0xffffffff)
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AM_RANGE(0x000c0000, 0x000cffff) AM_RAM
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AM_RANGE(0x000d0000, 0x000dffff) AM_RAM
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AM_RANGE(0x000e0000, 0x000effff) AM_RAM
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AM_RANGE(0x000f0000, 0x000fffff) AM_ROM AM_REGION("bios", 0) AM_WRITENOP /* System BIOS */
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AM_RANGE(0x00100000, 0x01ffffff) AM_RAM
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AM_RANGE(0x40010e00, 0x40010eff) AM_RAM
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AM_RANGE(0x40010e00, 0x40010eff) AM_RAM AM_BASE(m_unk_ram)
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AM_RANGE(0xffff0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
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ADDRESS_MAP_END
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@ -375,9 +415,10 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
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AM_RANGE(0x00e8, 0x00ef) AM_NOP
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AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)
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// AM_RANGE(0x0350, 0x035f) AM_NOP
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AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w)
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AM_RANGE(0x0360, 0x0363) AM_WRITE8(flash_w,0xffffffff)
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AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
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ADDRESS_MAP_END
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@ -480,6 +521,10 @@ static MACHINE_START( funkball )
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device_set_irq_callback(state->m_maincpu, irq_callback);
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kbdc8042_init(machine, &at8042);
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/* defaults, so it won't boot */
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state->m_unk_ram[0x010/4] = 0x2f8d85ff;
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state->m_unk_ram[0x018/4] = 0x000018c5;
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}
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static MACHINE_RESET( funkball )
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