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https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
xavix - rad_mtrk sprite improvements (#3202)
* xavix - rad_mtrk sprite improvements * alt addressing mode for taitons1 xavix logo, not sure how this gets enabled yet (nw) * there's a 2nd tilemap (nw) * various stubs for notekeeping (nw)
This commit is contained in:
David Haywood
R. Belmont
parent
80c9f0496f
commit
37223350a9
@ -46,18 +46,20 @@ public:
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m_mainram(*this, "mainram"),
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m_spr_attr0(*this, "spr_attr0"),
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m_spr_attr1(*this, "spr_attr1"),
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m_spr_ypos(*this, "spr_attr2"),
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m_spr_xpos(*this, "spr_attr3"),
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m_spr_attr5(*this, "spr_attr5"),
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m_spr_attr6(*this, "spr_attr6"),
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m_spr_attr7(*this, "spr_attr7"),
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m_spr_ypos(*this, "spr_ypos"),
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m_spr_xpos(*this, "spr_xpos"),
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m_spr_addr_lo(*this, "spr_addr_lo"),
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m_spr_addr_md(*this, "spr_addr_md"),
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m_spr_addr_hi(*this, "spr_addr_hi"),
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m_palram1(*this, "palram1"),
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m_palram2(*this, "palram2"),
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m_spr_attra(*this, "spr_attra"),
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m_palette(*this, "palette"),
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m_in0(*this, "IN0"),
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m_in1(*this, "IN1"),
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m_gfxdecode(*this, "gfxdecode")
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m_gfxdecode(*this, "gfxdecode"),
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m_alt_addressing(0),
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m_tilemap_enabled(1)
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{ }
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// devices
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@ -94,14 +96,48 @@ public:
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DECLARE_WRITE8_MEMBER(irq_vector1_lo_w);
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DECLARE_WRITE8_MEMBER(irq_vector1_hi_w);
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DECLARE_READ8_MEMBER(xavix_6ff0_r);
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DECLARE_WRITE8_MEMBER(xavix_6ff0_w);
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DECLARE_READ8_MEMBER(xavix_6ff8_r);
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DECLARE_WRITE8_MEMBER(xavix_6ff8_w);
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DECLARE_READ8_MEMBER(xavix_75f0_r);
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DECLARE_WRITE8_MEMBER(xavix_75f0_w);
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DECLARE_READ8_MEMBER(xavix_75f1_r);
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DECLARE_WRITE8_MEMBER(xavix_75f1_w);
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DECLARE_READ8_MEMBER(xavix_75f4_r);
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DECLARE_READ8_MEMBER(xavix_75f5_r);
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DECLARE_READ8_MEMBER(xavix_75f6_r);
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DECLARE_WRITE8_MEMBER(xavix_75f6_w);
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DECLARE_WRITE8_MEMBER(xavix_75f7_w);
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DECLARE_READ8_MEMBER(xavix_75f8_r);
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DECLARE_WRITE8_MEMBER(xavix_75f8_w);
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DECLARE_WRITE8_MEMBER(xavix_75f9_w);
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DECLARE_WRITE8_MEMBER(xavix_75ff_w);
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DECLARE_READ8_MEMBER(xavix_75f9_r);
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DECLARE_WRITE8_MEMBER(xavix_75f9_w);
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DECLARE_READ8_MEMBER(xavix_75fa_r);
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DECLARE_WRITE8_MEMBER(xavix_75fa_w);
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DECLARE_READ8_MEMBER(xavix_75fb_r);
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DECLARE_WRITE8_MEMBER(xavix_75fb_w);
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DECLARE_READ8_MEMBER(xavix_75fc_r);
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DECLARE_WRITE8_MEMBER(xavix_75fc_w);
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DECLARE_READ8_MEMBER(xavix_75fd_r);
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DECLARE_WRITE8_MEMBER(xavix_75fd_w);
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DECLARE_WRITE8_MEMBER(xavix_75fe_w);
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DECLARE_WRITE8_MEMBER(xavix_75ff_w);
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DECLARE_WRITE8_MEMBER(xavix_6fc0_w);
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DECLARE_WRITE8_MEMBER(xavix_6fc8_w);
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DECLARE_WRITE8_MEMBER(xavix_6fd8_w);
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DECLARE_WRITE8_MEMBER(xavix_6fd7_w);
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DECLARE_READ8_MEMBER(xavix_6fd7_r);
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DECLARE_READ8_MEMBER(pal_ntsc_r);
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@ -112,6 +148,7 @@ public:
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TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb);
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DECLARE_DRIVER_INIT(xavix);
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DECLARE_DRIVER_INIT(taitons1);
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void xavix_map(address_map &map);
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protected:
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@ -144,6 +181,21 @@ private:
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uint8_t m_vid_dma_param1[2];
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uint8_t m_vid_dma_param2[2];
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uint8_t m_6fc8_regs[8];
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uint8_t m_6ff0;
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uint8_t m_6ff8;
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uint8_t m_75f0;
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uint8_t m_75f1;
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uint8_t m_75f6;
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uint8_t m_75f8;
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uint8_t m_75fa;
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uint8_t m_75fb;
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uint8_t m_75fc;
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uint8_t m_75fd;
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uint8_t get_vectors(int which, int half);
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required_shared_ptr<uint8_t> m_mainram;
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@ -153,9 +205,9 @@ private:
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required_shared_ptr<uint8_t> m_spr_ypos;
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required_shared_ptr<uint8_t> m_spr_xpos;
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required_shared_ptr<uint8_t> m_spr_attr5;
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required_shared_ptr<uint8_t> m_spr_attr6;
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required_shared_ptr<uint8_t> m_spr_attr7;
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required_shared_ptr<uint8_t> m_spr_addr_lo;
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required_shared_ptr<uint8_t> m_spr_addr_md;
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required_shared_ptr<uint8_t> m_spr_addr_hi;
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required_shared_ptr<uint8_t> m_palram1;
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required_shared_ptr<uint8_t> m_palram2;
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@ -174,8 +226,42 @@ private:
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int m_rgnlen;
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uint8_t* m_rgn;
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// variables used by rendering
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int m_tmp_dataaddress;
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int m_tmp_databit;
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void set_data_address(int address, int bit);
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uint8_t get_next_bit();
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int m_alt_addressing;
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int m_tilemap_enabled;
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};
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void xavix_state::set_data_address(int address, int bit)
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{
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m_tmp_dataaddress = address;
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m_tmp_databit = bit;
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}
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uint8_t xavix_state::get_next_bit()
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{
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uint8_t bit = m_rgn[m_tmp_dataaddress & (m_rgnlen - 1)];
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bit = bit >> m_tmp_databit;
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bit &= 1;
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m_tmp_databit++;
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if (m_tmp_databit == 8)
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{
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m_tmp_databit = 0;
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m_tmp_dataaddress++;
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}
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return bit;
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}
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void xavix_state::video_start()
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{
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}
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@ -207,13 +293,13 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
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int h_raw = (dat & 0x001f) >> 0;
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//if (h_raw > 24)
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// printf("hraw >24 (%02x)\n", h_raw);
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// logerror("hraw >24 (%02x)\n", h_raw);
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//if (l_raw > 17)
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// printf("lraw >17 (%02x)\n", l_raw);
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// logerror("lraw >17 (%02x)\n", l_raw);
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//if (sl_raw > 7)
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// printf("sl_raw >5 (%02x)\n", sl_raw);
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// logerror("sl_raw >5 (%02x)\n", sl_raw);
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double l = (double)l_raw / 17.0f;
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double s = (double)sl_raw / 7.0f;
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@ -242,54 +328,192 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
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}
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uint32_t xavix_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
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uint32_t xavix_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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handle_palette(screen, bitmap, cliprect);
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// why are the first two logos in Monster Truck stored as tilemaps in main ram?
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// test mode isn't? is the code meant to process them instead? - there are no sprites in the sprite list at the time (and only one in test mode)
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gfx_element *gfx = m_gfxdecode->gfx(1);
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int count = 0;
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for (int y = 0; y < 16; y++)
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bitmap.fill(0, cliprect);
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if (m_tilemap_enabled)
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{
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for (int x = 0; x < 16; x++)
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// why are the first two logos in Monster Truck stored as tilemaps in main ram?
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// test mode isn't? is the code meant to process them instead? - there are no sprites in the sprite list at the time (and only one in test mode)
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gfx_element *gfx;
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int count;
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count = 0;
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gfx = m_gfxdecode->gfx(1);
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for (int y = 0; y < 16; y++)
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{
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int tile = m_mainram[count++];
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int gfxbase = (m_spr_attra[1] << 8) | (m_spr_attra[0]);
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// upper bit is often set, maybe just because it relies on mirroring, maybe other purpose
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for (int x = 0; x < 16; x++)
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{
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int tile = m_mainram[count];
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tile |= (m_mainram[count+0x100]<<8);
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count++;
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tile += (gfxbase<<1);
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int gfxbase = (m_spr_attra[1] << 8) | (m_spr_attra[0]);
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// upper bit is often set, maybe just because it relies on mirroring, maybe other purpose
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gfx->opaque(bitmap,cliprect,tile,0,0,0,x*16,y*16);
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tile += (gfxbase << 1);
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gfx->opaque(bitmap, cliprect, tile, 0, 0, 0, x * 16, y * 16);
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}
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}
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// there is a 2nd layer in monster truck too, there must be more to the gfxbase tho, because the lower layer can't be using the same gfxbase..
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count = 0x200;
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gfx = m_gfxdecode->gfx(0);
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for (int y = 0; y < 32; y++)
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{
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for (int x = 0; x < 32; x++)
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{
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int tile = m_mainram[count];
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tile |= (m_mainram[count+0x400]<<8);
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count++;
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int gfxbase = (m_spr_attra[1] << 8) | (m_spr_attra[0]);
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// upper bit is often set, maybe just because it relies on mirroring, maybe other purpose
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// even the transpen makes no sense here, it's 0 on the used elements, 15 on the unused ones.. are 00 tiles just ignored?
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if (tile)
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{
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tile += (gfxbase << 3);
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gfx->transpen(bitmap, cliprect, tile, 0, 0, 0, x * 8, (y * 8) - 16, 0);
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}
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}
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}
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}
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//printf("frame\n");
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for (int i = 0; i < 0x100; i++)
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//logerror("frame\n");
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// priority doesn't seem to be based on list order, there are bad sprite-sprite priorities with either forward or reverse
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for (int i = 0xff; i >= 0; i--)
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{
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/* attribute 0 bits
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pppp bbb- p = palette, b = bpp
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attribute 1 bits
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---- ss-f s = size, f = flipx
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*/
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int ypos = m_spr_ypos[i];
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int xpos = m_spr_xpos[i];
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int tile = m_spr_attr6[i];
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tile += 0x4b00;
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int tile = (m_spr_addr_hi[i] << 16) | (m_spr_addr_md[i] << 8) | m_spr_addr_lo[i];
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int attr0 = m_spr_attr0[i];
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int attr1 = m_spr_attr1[i];
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int pal = (attr0 & 0xf0) >> 4;
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int flipx = (attr1 & 0x01);
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int drawheight = 16;
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int drawwidth = 16;
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tile &= (m_rgnlen - 1);
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// taito nostalgia 1 also seems to use a different addressing, is it selectable or is the chip different?
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// taito nost attr1 is 84 / 80 / 88 / 8c for the various elements of the xavix logo. monster truck uses ec / fc / dc / 4c / 5c / 6c (final 6 sprites ingame are 00 00 f0 f0 f0 f0, radar?)
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if ((attr1 & 0x0c) == 0x0c)
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{
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drawheight = 16;
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drawwidth = 16;
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if (m_alt_addressing)
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tile = tile * 128;
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}
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else if ((attr1 & 0x0c) == 0x08)
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{
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drawheight = 16;
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drawwidth = 8;
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xpos += 4;
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if (m_alt_addressing)
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tile = tile * 64;
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}
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else if ((attr1 & 0x0c) == 0x04)
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{
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drawheight = 8;
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drawwidth = 16;
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ypos -= 4;
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if (m_alt_addressing)
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tile = tile * 64;
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}
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else if ((attr1 & 0x0c) == 0x00)
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{
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drawheight = 8;
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drawwidth = 8;
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xpos += 4;
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ypos -= 4;
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if (m_alt_addressing)
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tile = tile * 32;
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}
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if (m_alt_addressing)
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tile += 0xd8000;
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ypos = 0xff - ypos;
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xpos -= 136;
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ypos -= 192;
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ypos -= 152;
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xpos &= 0xff;
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ypos &= 0xff;
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xpos &=0xff;
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ypos &=0xff;
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if (ypos >=192)
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ypos -= 256;
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int bpp = 1;
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bpp = (attr0 & 0x0e) >> 1;
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bpp += 1;
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// set the address here so we can increment in bits in the draw function
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set_data_address(tile, 0);
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for (int y = 0; y < drawheight; y++)
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{
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int row = ypos + y;
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for (int x = 0; x < drawwidth; x++)
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{
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int col;
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if (flipx)
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{
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col = xpos - x;
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}
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else
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{
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col = xpos + x;
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}
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uint8_t dat = 0;
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for (int i = 0; i < bpp; i++)
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{
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dat |= (get_next_bit() << i);
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}
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if ((row >= cliprect.min_x && row < cliprect.max_x) && (col >= cliprect.min_y && col < cliprect.max_y))
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{
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uint16_t* rowptr;
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rowptr = &bitmap.pix16(row);
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if (dat)
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rowptr[col] = (dat + (pal << 4)) & 0xff;
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}
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}
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}
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//if (!(ypos & 1))
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gfx->transpen(bitmap,cliprect,tile,10,0,0,xpos,ypos,0);
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/*
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if ((m_spr_ypos[i] != 0x81) && (m_spr_ypos[i] != 0x80) && (m_spr_ypos[i] != 0x00))
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{
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printf("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", m_spr_ypos[i], m_spr_attr0[i], m_spr_attr1[i], m_spr_xpos[i], m_spr_attr5[i], m_spr_attr6[i], m_spr_attr7[i] );
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logerror("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", m_spr_ypos[i], m_spr_attr0[i], m_spr_attr1[i], m_spr_xpos[i], m_spr_addr_lo[i], m_spr_addr_md[i], m_spr_addr_hi[i] );
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}
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*/
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}
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@ -427,25 +651,153 @@ TIMER_DEVICE_CALLBACK_MEMBER(xavix_state::scanline_cb)
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INTERRUPT_GEN_MEMBER(xavix_state::interrupt)
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{
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// if (m_irq_enable_data != 0)
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// m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
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// if (m_irq_enable_data != 0)
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// m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
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if (m_irq_enable_data != 0)
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m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
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{
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m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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}
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READ8_MEMBER(xavix_state::xavix_6ff0_r)
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{
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//logerror("%s: xavix_6ff0_r\n", machine().describe_context());
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return m_6ff0;
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}
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WRITE8_MEMBER(xavix_state::xavix_6ff0_w)
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{
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// expected to return data written
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m_6ff0 = data;
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//logerror("%s: xavix_6ff0_w %02x\n", machine().describe_context(), data);
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}
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READ8_MEMBER(xavix_state::xavix_6ff8_r)
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{
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//logerror("%s: xavix_6ff8_r\n", machine().describe_context());
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return m_6ff8;
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}
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WRITE8_MEMBER(xavix_state::xavix_6ff8_w)
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{
|
||||
// I think this is something to do with IRQ ack / enable
|
||||
m_6ff8 = data;
|
||||
logerror("%s: xavix_6ff8_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f0_r)
|
||||
{
|
||||
logerror("%s: xavix_75f0_r\n", machine().describe_context());
|
||||
return m_75f0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f0_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75f0 = data;
|
||||
logerror("%s: xavix_75f0_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f1_r)
|
||||
{
|
||||
logerror("%s: xavix_75f1_r\n", machine().describe_context());
|
||||
return m_75f1;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f1_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75f1 = data;
|
||||
logerror("%s: xavix_75f1_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f6_r)
|
||||
{
|
||||
logerror("%s: xavix_75f6_w\n", machine().describe_context());
|
||||
return m_75f6;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f6_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75f6 = data;
|
||||
logerror("%s: xavix_75f6_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fa_r)
|
||||
{
|
||||
logerror("%s: xavix_75fa_w\n", machine().describe_context());
|
||||
return m_75fa;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fa_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fa = data;
|
||||
logerror("%s: xavix_75fa_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fb_r)
|
||||
{
|
||||
logerror("%s: xavix_75fb_w\n", machine().describe_context());
|
||||
return m_75fb;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fb_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fb = data;
|
||||
logerror("%s: xavix_75fb_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fc_r)
|
||||
{
|
||||
logerror("%s: xavix_75fc_w\n", machine().describe_context());
|
||||
return m_75fc;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fc_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fc = data;
|
||||
logerror("%s: xavix_75fc_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fd_r)
|
||||
{
|
||||
logerror("%s: xavix_75fd_w\n", machine().describe_context());
|
||||
return m_75fd;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fd_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fd = data;
|
||||
logerror("%s: xavix_75fd_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f7_w)
|
||||
{
|
||||
logerror("%s: xavix_75f7_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f8_r)
|
||||
{
|
||||
logerror("%s: xavix_75f8_r\n", machine().describe_context());
|
||||
return m_75f8;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f8_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75f8 = data;
|
||||
logerror("%s: xavix_75f8_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
@ -454,6 +806,11 @@ WRITE8_MEMBER(xavix_state::xavix_75f9_w)
|
||||
logerror("%s: xavix_75f9_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fe_w)
|
||||
{
|
||||
logerror("%s: xavix_75fe_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75ff_w)
|
||||
{
|
||||
logerror("%s: xavix_75ff_w %02x\n", machine().describe_context(), data);
|
||||
@ -615,9 +972,44 @@ READ8_MEMBER(xavix_state::pal_ntsc_r)
|
||||
{
|
||||
// only seen 0x10 checked in code
|
||||
// in monster truck the tile base address gets set based on this, there are 2 copies of the test screen in rom, one for pal, one for ntsc, see 1854c
|
||||
return 0x10;
|
||||
return 0x00; // NTSC
|
||||
//return 0x10; // PAL
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fc0_w)
|
||||
{
|
||||
//logerror("%s: xavix_6fc0_w data %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fc8_w)
|
||||
{
|
||||
// 0x4 and 0x5 appear to be bg tilemap scroll
|
||||
|
||||
if ((offset != 0x4) && (offset != 0x5))
|
||||
{
|
||||
logerror("%s: xavix_6fc8_w offset %02x data %02x\n", machine().describe_context(), offset, data);
|
||||
}
|
||||
|
||||
COMBINE_DATA(&m_6fc8_regs[offset]);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fd8_w)
|
||||
{
|
||||
logerror("%s: xavix_6fd8_w data %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fd7_w)
|
||||
{
|
||||
logerror("%s: xavix_6fd7_w data %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_6fd7_r)
|
||||
{
|
||||
logerror("%s: xavix_6fd7_r\n", machine().describe_context());
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
|
||||
// DATA reads from 0x8000-0xffff are banked by byte 0xff of 'ram' (this is handled in the CPU core)
|
||||
|
||||
ADDRESS_MAP_START(xavix_state::xavix_map)
|
||||
@ -628,31 +1020,24 @@ ADDRESS_MAP_START(xavix_state::xavix_map)
|
||||
// appears to be 256 sprites (shares will be renamed once their purpose is known)
|
||||
AM_RANGE(0x006000, 0x0060ff) AM_RAM AM_SHARE("spr_attr0")
|
||||
AM_RANGE(0x006100, 0x0061ff) AM_RAM AM_SHARE("spr_attr1")
|
||||
AM_RANGE(0x006200, 0x0062ff) AM_RAM AM_SHARE("spr_attr2") // cleared to 0x8f0 by both games, maybe enable registers?
|
||||
AM_RANGE(0x006300, 0x0063ff) AM_RAM AM_SHARE("spr_attr3")
|
||||
AM_RANGE(0x006200, 0x0062ff) AM_RAM AM_SHARE("spr_ypos") // cleared to 0x8f0 by both games, maybe enable registers?
|
||||
AM_RANGE(0x006300, 0x0063ff) AM_RAM AM_SHARE("spr_xpos")
|
||||
AM_RANGE(0x006400, 0x0064ff) AM_RAM // 6400 range unused by code, does it exist?
|
||||
AM_RANGE(0x006500, 0x0065ff) AM_RAM AM_SHARE("spr_attr5")
|
||||
AM_RANGE(0x006600, 0x0066ff) AM_RAM AM_SHARE("spr_attr6")
|
||||
AM_RANGE(0x006700, 0x0067ff) AM_RAM AM_SHARE("spr_attr7")
|
||||
AM_RANGE(0x006500, 0x0065ff) AM_RAM AM_SHARE("spr_addr_lo")
|
||||
AM_RANGE(0x006600, 0x0066ff) AM_RAM AM_SHARE("spr_addr_md")
|
||||
AM_RANGE(0x006700, 0x0067ff) AM_RAM AM_SHARE("spr_addr_hi")
|
||||
AM_RANGE(0x006800, 0x0068ff) AM_RAM AM_SHARE("palram1") // written with 6900
|
||||
AM_RANGE(0x006900, 0x0069ff) AM_RAM AM_SHARE("palram2") // startup (taitons1)
|
||||
AM_RANGE(0x006a00, 0x006a1f) AM_RAM AM_SHARE("spr_attra") // test mode, pass flag 0x20
|
||||
|
||||
/*
|
||||
AM_RANGE(0x006fc0, 0x006fc0) AM_WRITENOP // startup
|
||||
|
||||
AM_RANGE(0x006fc0, 0x006fc0) AM_WRITE(xavix_6fc0_w) // startup
|
||||
|
||||
AM_RANGE(0x006fc8, 0x006fc8) AM_WRITENOP
|
||||
AM_RANGE(0x006fc9, 0x006fc9) AM_WRITENOP
|
||||
AM_RANGE(0x006fca, 0x006fca) AM_WRITENOP
|
||||
AM_RANGE(0x006fcb, 0x006fcb) AM_WRITENOP
|
||||
AM_RANGE(0x006fcc, 0x006fcc) AM_WRITENOP
|
||||
AM_RANGE(0x006fcd, 0x006fcd) AM_WRITENOP
|
||||
AM_RANGE(0x006fce, 0x006fce) AM_WRITENOP
|
||||
AM_RANGE(0x006fcf, 0x006fcf) AM_WRITENOP
|
||||
AM_RANGE(0x006fc8, 0x006fcf) AM_WRITE(xavix_6fc8_w) // video registers
|
||||
|
||||
//AM_RANGE(0x006fd7, 0x006fd7) AM_READNOP AM_WRITENOP
|
||||
AM_RANGE(0x006fd8, 0x006fd8) AM_WRITENOP // startup (taitons1)
|
||||
*/
|
||||
AM_RANGE(0x006fd7, 0x006fd7) AM_READWRITE(xavix_6fd7_r, xavix_6fd7_w)
|
||||
AM_RANGE(0x006fd8, 0x006fd8) AM_WRITE(xavix_6fd8_w) // startup (taitons1)
|
||||
|
||||
AM_RANGE(0x006fe0, 0x006fe0) AM_READWRITE(vid_dma_trigger_r, vid_dma_trigger_w) // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40 (see function call at c273) write values are hardcoded, similar code at 18401
|
||||
AM_RANGE(0x006fe1, 0x006fe2) AM_WRITE(vid_dma_params_1_w)
|
||||
AM_RANGE(0x006fe5, 0x006fe6) AM_WRITE(vid_dma_params_2_w)
|
||||
@ -660,38 +1045,38 @@ ADDRESS_MAP_START(xavix_state::xavix_map)
|
||||
// function in rad_mtrk at 0184b7 uses this
|
||||
AM_RANGE(0x006fe8, 0x006fe8) AM_RAM // r/w tested
|
||||
AM_RANGE(0x006fe9, 0x006fe9) AM_RAM // r/w tested
|
||||
AM_RANGE(0x006fea, 0x006fea) AM_WRITENOP
|
||||
//AM_RANGE(0x006fea, 0x006fea) AM_WRITENOP
|
||||
|
||||
AM_RANGE(0x006ff0, 0x006ff0) AM_RAM // r/w tested
|
||||
AM_RANGE(0x006ff1, 0x006ff1) AM_WRITENOP // startup - cleared in interrupt 0
|
||||
AM_RANGE(0x006ff2, 0x006ff2) AM_WRITENOP // set to 07 after clearing above things in interrupt 0
|
||||
AM_RANGE(0x006ff0, 0x006ff0) AM_READWRITE(xavix_6ff0_r, xavix_6ff0_w) // r/w tested
|
||||
//AM_RANGE(0x006ff1, 0x006ff1) AM_WRITENOP // startup - cleared in interrupt 0
|
||||
//AM_RANGE(0x006ff2, 0x006ff2) AM_WRITENOP // set to 07 after clearing above things in interrupt 0
|
||||
|
||||
AM_RANGE(0x006ff8, 0x006ff8) AM_RAM // always seems to be a read/store or read/modify/store
|
||||
AM_RANGE(0x006ff8, 0x006ff8) AM_READWRITE(xavix_6ff8_r, xavix_6ff8_w) // always seems to be a read/store or read/modify/store
|
||||
AM_RANGE(0x006ff9, 0x006ff9) AM_READ(pal_ntsc_r)
|
||||
|
||||
// 7xxx ranges system controller?
|
||||
|
||||
AM_RANGE(0x0075f0, 0x0075f0) AM_RAM // r/w tested read/written 8 times in a row
|
||||
AM_RANGE(0x0075f1, 0x0075f1) AM_RAM // r/w tested read/written 8 times in a row
|
||||
AM_RANGE(0x0075f0, 0x0075f0) AM_READWRITE(xavix_75f0_r, xavix_75f0_w) // r/w tested read/written 8 times in a row
|
||||
AM_RANGE(0x0075f1, 0x0075f1) AM_READWRITE(xavix_75f1_r, xavix_75f1_w) // r/w tested read/written 8 times in a row
|
||||
AM_RANGE(0x0075f3, 0x0075f3) AM_RAM
|
||||
AM_RANGE(0x0075f4, 0x0075f4) AM_READ(xavix_75f4_r) // related to 75f0 (read after writing there - rad_mtrk)
|
||||
AM_RANGE(0x0075f5, 0x0075f5) AM_READ(xavix_75f5_r) // related to 75f1 (read after writing there - rad_mtrk)
|
||||
|
||||
// taitons1 after 75f7/75f8
|
||||
AM_RANGE(0x0075f6, 0x0075f6) AM_RAM // r/w tested AM_WRITE(xavix_75f6_w)
|
||||
AM_RANGE(0x0075f6, 0x0075f6) AM_READWRITE(xavix_75f6_r, xavix_75f6_w) // r/w tested
|
||||
// taitons1 written as a pair
|
||||
//AM_RANGE(0x0075f7, 0x0075f7) AM_WRITE(xavix_75f7_w)
|
||||
AM_RANGE(0x0075f8, 0x0075f8) AM_RAM // r/w tested AM_WRITE(xavix_75f8_w)
|
||||
AM_RANGE(0x0075f7, 0x0075f7) AM_WRITE(xavix_75f7_w)
|
||||
AM_RANGE(0x0075f8, 0x0075f8) AM_READWRITE(xavix_75f8_r, xavix_75f8_w) // r/w tested
|
||||
// taitons1 written after 75f6, then read
|
||||
//AM_RANGE(0x0075f9, 0x0075f9) AM_READWRITE(xavix_75f9_r, xavix_75f9_w)
|
||||
AM_RANGE(0x0075f9, 0x0075f9) AM_READWRITE(xavix_75f9_r, xavix_75f9_w)
|
||||
// at another time
|
||||
AM_RANGE(0x0075fa, 0x0075fa) AM_RAM // r/w tested
|
||||
AM_RANGE(0x0075fb, 0x0075fb) AM_RAM // r/w tested
|
||||
AM_RANGE(0x0075fc, 0x0075fc) AM_RAM // r/w tested
|
||||
|
||||
AM_RANGE(0x0075fd, 0x0075fd) AM_RAM // r/w tested
|
||||
//AM_RANGE(0x0075fe, 0x0075fe) AM_WRITENOP
|
||||
AM_RANGE(0x0075fa, 0x0075fa) AM_READWRITE(xavix_75fa_r, xavix_75fa_w) // r/w tested
|
||||
AM_RANGE(0x0075fb, 0x0075fb) AM_READWRITE(xavix_75fb_r, xavix_75fb_w) // r/w tested
|
||||
AM_RANGE(0x0075fc, 0x0075fc) AM_READWRITE(xavix_75fc_r, xavix_75fc_w) // r/w tested
|
||||
AM_RANGE(0x0075fd, 0x0075fd) AM_READWRITE(xavix_75fd_r, xavix_75fd_w) // r/w tested
|
||||
AM_RANGE(0x0075fe, 0x0075fe) AM_WRITE(xavix_75fe_w)
|
||||
// taitons1 written other 75xx operations
|
||||
//AM_RANGE(0x0075ff, 0x0075ff) AM_WRITE(xavix_75ff_w)
|
||||
AM_RANGE(0x0075ff, 0x0075ff) AM_WRITE(xavix_75ff_w)
|
||||
|
||||
//AM_RANGE(0x007810, 0x007810) AM_WRITENOP // startup
|
||||
|
||||
@ -720,7 +1105,7 @@ ADDRESS_MAP_START(xavix_state::xavix_map)
|
||||
//AM_RANGE(0x007a80, 0x007a80) AM_WRITENOP
|
||||
|
||||
//AM_RANGE(0x007b80, 0x007b80) AM_READNOP
|
||||
//AM_RANGE(0x007b81, 0x007b81) AM_WRITENOP
|
||||
//AM_RANGE(0x007b81, 0x007b81) AM_WRITENOP // every frame?
|
||||
//AM_RANGE(0x007b82, 0x007b82) AM_WRITENOP
|
||||
|
||||
//AM_RANGE(0x007c01, 0x007c01) AM_RAM // r/w tested
|
||||
@ -901,6 +1286,34 @@ void xavix_state::machine_reset()
|
||||
m_irq_vector0_hi_data = 0;
|
||||
m_irq_vector1_lo_data = 0;
|
||||
m_irq_vector1_hi_data = 0;
|
||||
|
||||
m_6ff0 = 0;
|
||||
m_6ff8 = 0;
|
||||
|
||||
m_75f0 = 0;
|
||||
m_75f1 = 0;
|
||||
|
||||
m_75f6 = 0;
|
||||
m_75f8 = 0;
|
||||
m_75fa = 0;
|
||||
m_75fb = 0;
|
||||
m_75fc = 0;
|
||||
m_75fd = 0;
|
||||
|
||||
for (int i = 0; i < 3; i++)
|
||||
m_multparams[i] = 0;
|
||||
|
||||
for (int i = 0; i < 2; i++)
|
||||
m_multresults[i] = 0;
|
||||
|
||||
for (int i = 0; i < 2; i++)
|
||||
{
|
||||
m_vid_dma_param1[i] = 0;
|
||||
m_vid_dma_param2[i] = 0;
|
||||
}
|
||||
|
||||
for (int i = 0; i < 8; i++)
|
||||
m_6fc8_regs[i] = 0;
|
||||
}
|
||||
|
||||
typedef device_delegate<uint8_t (int which, int half)> xavix_interrupt_vector_delegate;
|
||||
@ -964,6 +1377,14 @@ DRIVER_INIT_MEMBER(xavix_state,xavix)
|
||||
space.install_rom(0x8000, m_rgnlen, ((~(m_rgnlen-1))<<1)&0xffffff, m_rgn+0x8000);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(xavix_state, taitons1)
|
||||
{
|
||||
DRIVER_INIT_CALL(xavix);
|
||||
m_alt_addressing = 1;
|
||||
m_tilemap_enabled = 0;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
Game driver(s)
|
||||
@ -1007,7 +1428,7 @@ ROM_END
|
||||
|
||||
/* Standalone TV Games */
|
||||
|
||||
CONS( 2006, taitons1, 0, 0, xavix, xavix, xavix_state, xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON )
|
||||
CONS( 2006, taitons1, 0, 0, xavix, xavix, xavix_state, taitons1, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON )
|
||||
|
||||
CONS( 2000, rad_ping, 0, 0, xavix, xavix, xavix_state, xavix, "Radica / SSD Company LTD / Simmer Technology", "Play TV Ping Pong", MACHINE_IS_SKELETON ) // "Simmer Technology" is also known as "Hummer Technology Co., Ltd"
|
||||
CONS( 2003, rad_mtrk, 0, 0, xavix, rad_mtrk, xavix_state, xavix, "Radica / SSD Company LTD", "Play TV Monster Truck", MACHINE_IS_SKELETON )
|
||||
|
||||
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Reference in New Issue
Block a user