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fix MR and pattern offsets

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This commit is contained in:
hap 2015-03-07 22:42:07 +01:00
parent a36a9bef31
commit 379aa241ed
3 changed files with 22 additions and 12 deletions
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4
src/emu/cpu/hmcs40/hmcs40.c
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@ -67,12 +67,12 @@ const device_type HD44828 = &device_creator<hd44828_device>; // CMOS version, lo
// internal memory maps // internal memory maps
static ADDRESS_MAP_START(program_1k, AS_PROGRAM, 16, hmcs40_cpu_device) static ADDRESS_MAP_START(program_1k, AS_PROGRAM, 16, hmcs40_cpu_device)
AM_RANGE(0x0000, 0x03ff) AM_ROM AM_RANGE(0x0000, 0x03ff) AM_ROM
AM_RANGE(0x0400, 0x043f) AM_ROM AM_RANGE(0x0780, 0x07bf) AM_ROM // patterns on page 30
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START(program_2k, AS_PROGRAM, 16, hmcs40_cpu_device) static ADDRESS_MAP_START(program_2k, AS_PROGRAM, 16, hmcs40_cpu_device)
AM_RANGE(0x0000, 0x07ff) AM_ROM AM_RANGE(0x0000, 0x07ff) AM_ROM
AM_RANGE(0x0800, 0x087f) AM_ROM AM_RANGE(0x0f40, 0x0fbf) AM_ROM // patterns on page 61,62
ADDRESS_MAP_END ADDRESS_MAP_END

18
src/emu/cpu/hmcs40/hmcs40op.inc
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@ -4,13 +4,13 @@
inline UINT8 hmcs40_cpu_device::ram_r() inline UINT8 hmcs40_cpu_device::ram_r()
{ {
UINT16 address = (m_x << 4 | m_y) & m_datamask; UINT8 address = (m_x << 4 | m_y) & m_datamask;
return m_data->read_byte(address) & 0xf; return m_data->read_byte(address) & 0xf;
} }
inline void hmcs40_cpu_device::ram_w(UINT8 data) inline void hmcs40_cpu_device::ram_w(UINT8 data)
{ {
UINT16 address = (m_x << 4 | m_y) & m_datamask; UINT8 address = (m_x << 4 | m_y) & m_datamask;
m_data->write_byte(address, data & 0xf); m_data->write_byte(address, data & 0xf);
} }
@ -75,10 +75,18 @@ void hmcs40_cpu_device::op_xamr()
// XAMR m: Exchange A and MR(m) // XAMR m: Exchange A and MR(m)
// determine MR(Memory Register) location // determine MR(Memory Register) location
UINT8 y = m_op & 0xf; UINT8 address = m_op & 0xf;
UINT8 x = (y > 3) ? 0xf : (y + 12);
UINT16 address = (x << 4 | y) & m_datamask;
// HMCS42: MR0 on file 0, MR4-MR15 on file 4 (there is no file 1-3)
// HMCS43: MR0-MR3 on file 0-3, MR4-MR15 on file 4
if (m_family == FAMILY_HMCS42 || m_family == FAMILY_HMCS43)
address |= (address < 4) ? (address << 4) : 0x40;
// HMCS44/45/46/47: all on last file
else
address |= 0xf0;
address &= m_datamask;
UINT8 old_a = m_a; UINT8 old_a = m_a;
m_a = m_data->read_byte(address) & 0xf; m_a = m_data->read_byte(address) & 0xf;
m_data->write_byte(address, old_a & 0xf); m_data->write_byte(address, old_a & 0xf);

12
src/mess/drivers/hh_hmcs40.c
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@ -208,7 +208,7 @@ WRITE8_MEMBER(hh_hmcs40_state::alnattck_plate_w)
READ16_MEMBER(hh_hmcs40_state::alnattck_d_r) READ16_MEMBER(hh_hmcs40_state::alnattck_d_r)
{ {
// D5: inputs // D5: inputs
return (offset == 5) ? (read_inputs(7) << 5 & 0x20) : 0; return (read_inputs(7) & 1) << 5;
} }
WRITE16_MEMBER(hh_hmcs40_state::alnattck_d_w) WRITE16_MEMBER(hh_hmcs40_state::alnattck_d_w)
@ -321,14 +321,16 @@ MACHINE_CONFIG_END
***************************************************************************/ ***************************************************************************/
ROM_START( alnattck ) ROM_START( alnattck )
ROM_REGION( 0x1100, "maincpu", 0 ) ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD( "hd38800a25", 0x0000, 0x1100, CRC(18b50869) SHA1(11e9d5f7b4ae818b077b0ee14a3b43190e20bff3) ) ROM_LOAD( "hd38800a25", 0x0000, 0x1000, CRC(18b50869) SHA1(11e9d5f7b4ae818b077b0ee14a3b43190e20bff3) )
ROM_CONTINUE( 0x1e80, 0x0100 )
ROM_END ROM_END
ROM_START( tmtron ) ROM_START( tmtron )
ROM_REGION( 0x1100, "maincpu", 0 ) ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD( "hd38800a88", 0x0000, 0x1100, CRC(33db9670) SHA1(d6f747a59356526698784047bcfdbb59e79b9a23) ) ROM_LOAD( "hd38800a88", 0x0000, 0x1000, CRC(33db9670) SHA1(d6f747a59356526698784047bcfdbb59e79b9a23) )
ROM_CONTINUE( 0x1e80, 0x0100 )
ROM_END ROM_END