mirror of
https://github.com/holub/mame
synced 2025-04-25 17:56:43 +03:00
Mike Naberezny
commit
381cae4f3a
@ -329,7 +329,7 @@ Then for each sector:
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- FM-encoded sector data followed by two bytes of crc
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- A number of FM-encoded 0xff (usually 48, very variable)
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The the track is finished with a stream of '1' cells.
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The track is finished with a stream of '1' cells.
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The 125KHz pulse trains are used to lock the PLL to the signal
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correctly. The specific 16-cells streams allow to distinguish between
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@ -3,7 +3,7 @@
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<softwarelist name="coco_flop" description="Tandy Radio Shack Color Computer disk images">
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<!-- coco3 only requires 512Kb, audio is a farty, run best with a a 6309? - coco3h driver) -->
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<!-- coco3 only requires 512Kb, audio is a farty, run best with a 6309? - coco3h driver) -->
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<!-- RUN"DONKEY" -->
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<software name="dkong" supported ="partial">
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<description>Donkey Kong (Sock Master's Donkey Kong Emulator for CoCo 3) (512Kb)</description>
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@ -76,8 +76,8 @@
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#define ALTO2_DISPLAY_HEIGHT 808 //!< number of visible scanlines per frame; 808 really, but there are some empty lines?
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#define ALTO2_DISPLAY_WIDTH 606 //!< visible width of the display; 38 x 16 bit words - 2 pixels
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#define ALTO2_DISPLAY_VISIBLE_WORDS ((ALTO2_DISPLAY_WIDTH+15)/16) //!< visible words per scanline
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#define ALTO2_DISPLAY_BITCLOCK 20160000ll //!< display bit clock in in Hertz (20.16MHz)
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#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK) //!< display bit time in in pico seconds (~= 49.6031ns)
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#define ALTO2_DISPLAY_BITCLOCK 20160000ll //!< display bit clock in Hertz (20.16MHz)
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#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK) //!< display bit time in pico seconds (~= 49.6031ns)
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#define ALTO2_DISPLAY_SCANLINE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_TOTAL_WIDTH)//!< time for a scanline in pico seconds (768 * 49.6031ns ~= 38095.1808ns)
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#define ALTO2_DISPLAY_VISIBLE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_WIDTH) //!< time of the visible part of a scanline in pico seconds (606 * 49.6031ns ~= 30059.4786ns)
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#define ALTO2_DISPLAY_WORD_TIME ALTO2_DISPLAY_BITTIME(16) //!< time for a word in pico seconds (16 pixels * 49.6031ns ~= 793.6496ns)
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@ -416,7 +416,7 @@ void alto2_cpu_device::eth_wakeup()
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* polynomials listed in Tabel I by applying the appropriate logic levels
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* to the select pins S0, S1 and S2.
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*
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* Teh 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
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* The 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
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* associated control circuitry as shown in the block diagram. The
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* polynomial control code presented at inputs S0, S1 and S2 is decoded
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* by the ROM, selecting the desired polynomial by establishing shift
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@ -184,7 +184,7 @@
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#define SET_INPUT_FULL() (m_latch_control &= ~LCTRL_INPUT_EMPTY)
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/* These are the some of the control register, we dont use them all */
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/* These are some of the control registers. We don't use them all */
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enum
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{
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IDMA_CONTROL_REG = 0, /* 3fe0 */
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@ -1030,7 +1030,7 @@ void gottlieb_sound_r2_device::device_timer(emu_timer &timer, device_timer_id id
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m_nmi_state = 1;
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nmi_state_update();
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// set a timer to turn it off again on hte next SOUND_CLOCK/16
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// set a timer to turn it off again on the next SOUND_CLOCK/16
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timer_set(attotime::from_hz(SOUND2_CLOCK/16), TID_NMI_CLEAR);
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// adjust the NMI timer for the next time
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@ -28,7 +28,7 @@ Game number : A30
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Vintage : 1984
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Game serial/model number : M4300006B ?
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I dont have the wiring harness for this board, so dont know if it works.
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I don't have the wiring harness for this board, so don't know if it works.
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One GFX ROM is bad though.
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See A30-26.u23\A30-26.txt for details about the bad ROM.
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To summarise:
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@ -584,7 +584,7 @@ UINT16 sc4_state::bfm_sc4_68307_portb_r(address_space &space, bool dedicated, UI
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else
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{
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// generating certain interrupts expects the bit 0x8000 to be set here
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// but it's set ot dedicated i/o, not general purpose, source?
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// but it's set to dedicated i/o, not general purpose, source?
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return 0x8040;
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}
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}
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@ -367,7 +367,7 @@ ROM_START( bottom9 )
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ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
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ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
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ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
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ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
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ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
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ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
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ROM_LOAD32_BYTE( "891e05e", 0x00002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
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@ -424,7 +424,7 @@ ROM_START( bottom9n )
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ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
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ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
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ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
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ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
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ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
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ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
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ROM_LOAD32_BYTE( "891e05e", 0x80002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
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@ -320,7 +320,7 @@ static ADDRESS_MAP_START( exctsccr_main_map, AS_PROGRAM, 8, champbas_state )
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AM_RANGE(0xa002, 0xa002) AM_WRITE(champbas_gfxbank_w)
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AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
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AM_RANGE(0xa006, 0xa006) AM_WRITE(champbas_mcu_halt_w)
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AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but i dont need it */
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AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but I don't need it */
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AM_RANGE(0xa040, 0xa06f) AM_WRITEONLY AM_SHARE("spriteram") /* Sprite pos */
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AM_RANGE(0xa080, 0xa080) AM_WRITE(soundlatch_byte_w)
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@ -548,7 +548,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, cps_state )
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AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
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/* Forgotten Worlds has dial controls on B-board mapped at 800040-80005f. See DRIVER_INIT */
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AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_SHARE("cps_a_regs") /* CPS-A custom */
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/* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it a a different
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/* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it at a different
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address, see DRIVER_INIT */
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AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_SHARE("cps_b_regs")
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AM_RANGE(0x800180, 0x800187) AM_WRITE(cps1_soundlatch_w) /* Sound command */
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@ -1054,7 +1054,7 @@ DRIVER_INIT_MEMBER(crystal_state,evosocc)
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The PIC uses a software UART bit banged on a single output pin of the main CPU:
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the data port is bit 0x20000000 on the PIO register, the same register where the EEPROM control lines are. The serial data is transmitted at 8 data bits, even parity, 1 stop bit. It's probably
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tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
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tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
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also it seems that bit 0x40000000 is the PIC reset.
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*/
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@ -142,7 +142,7 @@ static INPUT_PORTS_START( dietgo )
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PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) // Demo_Sounds ) )
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PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) // Players dont move in attract mode if on!?
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PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) // Players don't move in attract mode if on!?
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
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@ -1694,7 +1694,7 @@ GAME( 19??, ec_fltr, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, eco
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GAME( 19??, ec_rdht7, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Red Hot 7 (MAB PCB?) (Concept Games Ltd) (?)" , GAME_FLAGS)
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GAME( 19??, ec_unkt, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "unknown 'T' (MAB PCB?) (Concept Games Ltd) (?)" , GAME_FLAGS)
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//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they dont seem to be on the base hardware
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//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they don't seem to be on the base hardware
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GAME( 19??, ec_gold7, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Golden 7 (Concept Games Ltd) (?)" , GAME_FLAGS)
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GAME( 19??, ec_mgbel, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Megabell (Concept Games Ltd) (?)" , GAME_FLAGS)
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GAME( 19??, ec_jackb, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Jackpot Bars (MAB PCB?) (Concept Games Ltd) (?)" , GAME_FLAGS)
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@ -523,7 +523,7 @@ WRITE16_MEMBER(gaelco3d_state::tms_comm_w)
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*
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*************************************/
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/* These are the some of the control register, we dont use them all */
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/* These are some of the control registers. We don't use them all */
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enum
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{
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S1_AUTOBUF_REG = 15,
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@ -663,7 +663,7 @@ WRITE32_MEMBER(gaelco3d_state::adsp_tx_callback)
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/* get the base value, since we need to keep it around for wrapping */
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source -= m_adsp_incs;
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/* make it go back one so we dont lose the first sample */
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/* make it go back one so we don't lose the first sample */
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m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source);
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/* save it as it is now */
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@ -12,12 +12,12 @@ a IGS game use IGS036 chip
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IGS036 could be a upgraded version of IGS027A
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but with GFX processor integrated
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I dont know the CPU core (should ARM based due to fail test)
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the chip has internal rom build-in
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the the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
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if the external rom decrypted then we can
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I don't know the CPU core (should be ARM based due to fail test)
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the chip has internal rom built-in
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the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
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if the external rom is decrypted then we can
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try to trojan the internal rom
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here we offer several revision a same game to see
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here we offer several revisions of the same game to see
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if anyone could find any clue, these 4 revision can
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be programmed and running on a same PCB.
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===================================================
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@ -1,6 +1,6 @@
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/* The following sets are known to exist based on official documentation, but have not been dumped. */
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/* no other official sets are known to exist apart from these and hte ones in multfish.c */
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/* no other official sets are known to exist apart from these and the ones in multfish.c */
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#if 0
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ROM_START( mfish ) // 021120
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@ -930,7 +930,7 @@ ROM_END
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/******************************************************************************
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Gfx ROMs in pkunwar have an unusual layout, where a high address bit
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(which is no the top bit) separates parts of the same tile.
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(which is not the top bit) separates parts of the same tile.
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This all originates from Nova2001 apparently, which uses 0x2000 bytes ROMs for
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the graphics. When the number of tiles was increased, the same 0x2000 blocks
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@ -45,8 +45,8 @@
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How to play...
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This Roulette allow up to 6 players. To start the machine, turn the Operator Key
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(the the Operator Key light will turn green). Whilest this key is turned ON, you
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This Roulette allows up to 6 players. To start the machine, turn the Operator Key
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(the Operator Key light will turn green). Whilst this key is turned ON, you
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can insert credits, play, and payout. Once the key is turned OFF (red light), you
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can play, but credits can't be entered/taken.
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@ -35,7 +35,7 @@
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- Tetris
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- E-Swat
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These appear to be a variation no the encrypted / protected bootlegs, but without the encryption
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These appear to be a variation on the encrypted / protected bootlegs, but without the encryption
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or protection
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- Golden Axe (set 2)
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@ -566,7 +566,7 @@ WRITE16_MEMBER(segas1x_bootleg_state::s16bl_bgscrollx_w)
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int scroll = data & 0x1ff;
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scroll+= 0x200;
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scroll+= 1; // so that the background fo the select screen is properly aligned
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scroll+= 1; // so that the background of the select screen is properly aligned
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m_bg_scrollx = -scroll;
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}
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@ -364,7 +364,7 @@ static INPUT_PORTS_START( vsnes_dual )
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* bit 1 of dsw goes here */
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - dont change */
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - don't change */
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/* Right Side Controls */
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PORT_START("IN2")
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@ -395,7 +395,7 @@ static INPUT_PORTS_START( vsnes_dual )
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* bit 1 of dsw goes here */
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(1)
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(1)
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - dont change */
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - don't change */
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/* Both sides also have a DSW (#0 & #1) which are defined per game, below */
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INPUT_PORTS_END
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@ -62,7 +62,7 @@ and encoded in a different way from the original machine. Even if
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sometimes it seems colors are not entirely correct, this is only due
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to the crappy artwork of the person that did the bootleg.
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Dip switches are not complete and they dont seem to differ from
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Dip switches are not complete and they don't seem to differ from
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the original machine.
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Last but not least, the set of ROMs i have for Euro League seem to have
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@ -27,7 +27,7 @@ public:
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optional_shared_ptr<UINT8> m_sharedram;
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int m_coin_count; /* coin count increments on startup ? , so dont count it */
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int m_coin_count; /* coin count increments on startup ? , so don't count it */
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int m_intenable;
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/* Demon world */
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@ -498,8 +498,8 @@ void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region_theglad(int is_sv
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temp16[(base) /2] = 0xff1e; base += 2;
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temp16[(base) /2] = 0xe12f; base += 2;
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// the non-EO area starts in the middle of a function that seems similar to those at 000037E4 / 000037D4 in killbldp.. by setting this up we allow the intro to run
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// it sets '0x10000038' to a value ot 1
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// the non-EO area starts in the middle of a function that seems similar to those at 000037E4 / 000037D4 in killbldp. by setting this up we allow the intro to run
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// it sets '0x10000038' to a value of 1
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base = 0x184;
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temp16[(base) /2] = 0x105c; base += 2;
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temp16[(base) /2] = 0xE59F; base += 2;
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@ -248,7 +248,7 @@ void bosco_state::draw_stars(bitmap_ind16 &bitmap, const rectangle &cliprect, in
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x = (m_star_seed_tab[star_cntr].x + m_stars_scrollx) % 256;
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y = (m_star_seed_tab[star_cntr].y + m_stars_scrolly) % 256;
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/* dont draw the stars that are off the screen */
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/* don't draw the stars that are off the screen */
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if ( x < 224 )
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{
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if (flip) x += 64;
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@ -194,7 +194,7 @@ void tankbust_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
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color = 0;
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//0x02 - dont know (most of the time this bit is set in tank sprite and others but not all and not always)
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//0x02 - don't know (most of the time this bit is set in tank sprite and others but not all and not always)
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//0x04 - not used
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//0x08 - not used
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//0x10 - not used
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@ -20,7 +20,7 @@
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it is perfectly possible to generate other sounds with different rom code and data.
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Most upd17XXX devices are typically 4bit NEC MCUs, however based on information
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||||
in in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152)
|
||||
in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152)
|
||||
the upd1770/1771 is not one of these 4-bit ones.
|
||||
|
||||
The uPD1770/uPD1771 SSM is a 16-bit-wide rom/ram mcu with 8kb (4kw) of rom code,
|
||||
@ -138,7 +138,7 @@
|
||||
pin 6 is tied to the PC3 pin of the upD7801 CPU
|
||||
pin 26 is tied to the INT1 pin of the upD7801 (CPU pin 12),
|
||||
|
||||
1,2,3,28,27 dont generate any digital signals
|
||||
1,2,3,28,27 don't generate any digital signals
|
||||
6 seems to be lowered 2.5 ms before an audio write
|
||||
7 is always low.
|
||||
12 is always high
|
||||
@ -404,7 +404,7 @@ WRITE8_MEMBER( upd1771c_device::write )
|
||||
m_t_timbre = (m_packet[1] & 0xe0) >> 5;
|
||||
m_t_offset = (m_packet[1] & 0x1f);
|
||||
m_t_period = m_packet[2];
|
||||
//smaller periods dont all equal to 0x20
|
||||
//smaller periods don't all equal to 0x20
|
||||
if (m_t_period < 0x20)
|
||||
m_t_period = 0x20;
|
||||
|
||||
|
||||
@ -673,7 +673,7 @@ static imgtoolerr_t os9_diskimage_open(imgtool_image *image, imgtool_stream *str
|
||||
return IMGTOOLERR_OUTOFMEMORY;
|
||||
memset(info->allocation_bitmap, 0, info->allocation_bitmap_bytes);
|
||||
|
||||
/* sectors per track and track size dont jive? */
|
||||
/* sectors per track and track size don't jive? */
|
||||
if (info->sectors_per_track != track_size_in_sectors)
|
||||
return IMGTOOLERR_CORRUPTIMAGE;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user