Merge pull request #65 from ZoeB/master

Tidy comments

docs/floppy.txt

@@ -329,7 +329,7 @@ Then for each sector:
 - FM-encoded sector data followed by two bytes of crc
 - A number of FM-encoded 0xff (usually 48, very variable)
 
-The the track is finished with a stream of '1' cells.
+The track is finished with a stream of '1' cells.
 
 The 125KHz pulse trains are used to lock the PLL to the signal
 correctly.  The specific 16-cells streams allow to distinguish between

hash/coco_flop.xml

@@ -3,7 +3,7 @@
 
 <softwarelist name="coco_flop" description="Tandy Radio Shack Color Computer disk images">
 
-	<!-- coco3 only requires 512Kb, audio is a farty, run best with a a 6309? - coco3h driver) -->
+	<!-- coco3 only requires 512Kb, audio is a farty, run best with a 6309? - coco3h driver) -->
 	<!-- RUN"DONKEY" -->
 	<software name="dkong" supported ="partial">
 		<description>Donkey Kong (Sock Master's Donkey Kong Emulator for CoCo 3) (512Kb)</description>

src/emu/cpu/alto2/a2disp.h

@@ -76,8 +76,8 @@
 #define ALTO2_DISPLAY_HEIGHT 808                                                    //!< number of visible scanlines per frame; 808 really, but there are some empty lines?
 #define ALTO2_DISPLAY_WIDTH 606                                                     //!< visible width of the display; 38 x 16 bit words - 2 pixels
 #define ALTO2_DISPLAY_VISIBLE_WORDS ((ALTO2_DISPLAY_WIDTH+15)/16)                   //!< visible words per scanline
-#define ALTO2_DISPLAY_BITCLOCK 20160000ll                                           //!< display bit clock in in Hertz (20.16MHz)
+#define ALTO2_DISPLAY_BITCLOCK 20160000ll                                           //!< display bit clock in Hertz (20.16MHz)
-#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK)    //!< display bit time in in pico seconds (~= 49.6031ns)
+#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK)    //!< display bit time in pico seconds (~= 49.6031ns)
 #define ALTO2_DISPLAY_SCANLINE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_TOTAL_WIDTH)//!< time for a scanline in pico seconds (768 * 49.6031ns ~= 38095.1808ns)
 #define ALTO2_DISPLAY_VISIBLE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_WIDTH)       //!< time of the visible part of a scanline in pico seconds (606 * 49.6031ns ~= 30059.4786ns)
 #define ALTO2_DISPLAY_WORD_TIME ALTO2_DISPLAY_BITTIME(16)                           //!< time for a word in pico seconds (16 pixels * 49.6031ns ~= 793.6496ns)

src/emu/cpu/alto2/a2ether.c

@@ -416,7 +416,7 @@ void alto2_cpu_device::eth_wakeup()
  * polynomials listed in Tabel I by applying the appropriate logic levels
  * to the select pins S0, S1 and S2.
  *
- * Teh 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
+ * The 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
  * associated control circuitry as shown in the block diagram. The
  * polynomial control code presented at inputs S0, S1 and S2 is decoded
  * by the ROM, selecting the desired polynomial by establishing shift

src/mame/audio/dcs.c

@@ -184,7 +184,7 @@
 #define SET_INPUT_FULL()            (m_latch_control &= ~LCTRL_INPUT_EMPTY)
 
 
-/* These are the some of the control register, we dont use them all */
+/* These are some of the control registers. We don't use them all */
 enum
 {
 	IDMA_CONTROL_REG = 0,   /* 3fe0 */

src/mame/audio/gottlieb.c

@@ -1030,7 +1030,7 @@ void gottlieb_sound_r2_device::device_timer(emu_timer &timer, device_timer_id id
 			m_nmi_state = 1;
 			nmi_state_update();
 
-			// set a timer to turn it off again on hte next SOUND_CLOCK/16
+			// set a timer to turn it off again on the next SOUND_CLOCK/16
 			timer_set(attotime::from_hz(SOUND2_CLOCK/16), TID_NMI_CLEAR);
 
 			// adjust the NMI timer for the next time

src/mame/drivers/40love.c

@@ -28,7 +28,7 @@ Game number              : A30
 Vintage                  : 1984
 Game serial/model number : M4300006B ?
 
-I dont have the wiring harness for this board, so dont know if it works.
+I don't have the wiring harness for this board, so don't know if it works.
 One GFX ROM is bad though.
 See A30-26.u23\A30-26.txt for details about the bad ROM.
 To summarise:

src/mame/drivers/bfm_sc4h.c

@@ -584,7 +584,7 @@ UINT16 sc4_state::bfm_sc4_68307_portb_r(address_space &space, bool dedicated, UI
 	else
 	{
 		// generating certain interrupts expects the bit 0x8000 to be set here
-		// but it's set ot dedicated i/o, not general purpose, source?
+		// but it's set to dedicated i/o, not general purpose, source?
 		return 0x8040;
 	}
 }

src/mame/drivers/bottom9.c

@@ -367,7 +367,7 @@ ROM_START( bottom9 )
 	ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
 	ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
 
-	ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
+	ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
 	ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) )    /* sprites */
 	ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
 	ROM_LOAD32_BYTE( "891e05e", 0x00002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
@@ -424,7 +424,7 @@ ROM_START( bottom9n )
 	ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
 	ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
 
-	ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
+	ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
 	ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) )    /* sprites */
 	ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
 	ROM_LOAD32_BYTE( "891e05e", 0x80002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )

src/mame/drivers/champbas.c

@@ -320,7 +320,7 @@ static ADDRESS_MAP_START( exctsccr_main_map, AS_PROGRAM, 8, champbas_state )
 	AM_RANGE(0xa002, 0xa002) AM_WRITE(champbas_gfxbank_w)
 	AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
 	AM_RANGE(0xa006, 0xa006) AM_WRITE(champbas_mcu_halt_w)
-	AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but i dont need it */
+	AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but I don't need it */
 
 	AM_RANGE(0xa040, 0xa06f) AM_WRITEONLY AM_SHARE("spriteram") /* Sprite pos */
 	AM_RANGE(0xa080, 0xa080) AM_WRITE(soundlatch_byte_w)

src/mame/drivers/cps1.c

@@ -548,7 +548,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, cps_state )
 	AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
 	/* Forgotten Worlds has dial controls on B-board mapped at 800040-80005f. See DRIVER_INIT */
 	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_SHARE("cps_a_regs")  /* CPS-A custom */
-	/* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it a a different
+	/* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it at a different
 	   address, see DRIVER_INIT */
 	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_SHARE("cps_b_regs")
 	AM_RANGE(0x800180, 0x800187) AM_WRITE(cps1_soundlatch_w)    /* Sound command */

src/mame/drivers/crystal.c

@@ -1054,7 +1054,7 @@ DRIVER_INIT_MEMBER(crystal_state,evosocc)
 
 The PIC uses a software UART bit banged on a single output pin of the main CPU:
 the data port is bit 0x20000000 on the PIO register, the same register where the EEPROM control lines are. The serial data is transmitted at 8 data bits, even parity, 1 stop bit. It's probably
-tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
+tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
 also it seems that bit 0x40000000 is the PIC reset.
 
 */

src/mame/drivers/dietgo.c

@@ -142,7 +142,7 @@ static INPUT_PORTS_START( dietgo )
 	PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
 	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) // Demo_Sounds ) )
-	PORT_DIPSETTING(      0x4000, DEF_STR( Off ) ) // Players dont move in attract mode if on!?
+	PORT_DIPSETTING(      0x4000, DEF_STR( Off ) ) // Players don't move in attract mode if on!?
 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
 	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
 	PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )

src/mame/drivers/ecoinfr.c

@@ -1694,7 +1694,7 @@ GAME( 19??, ec_fltr,    0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   eco
 GAME( 19??, ec_rdht7,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Red Hot 7 (MAB PCB?) (Concept Games Ltd) (?)"      , GAME_FLAGS)
 GAME( 19??, ec_unkt,    0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "unknown 'T' (MAB PCB?) (Concept Games Ltd) (?)"        , GAME_FLAGS)
 
-//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they dont seem to be on the base hardware
+//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they don't seem to be on the base hardware
 GAME( 19??, ec_gold7,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Golden 7 (Concept Games Ltd) (?)"      , GAME_FLAGS)
 GAME( 19??, ec_mgbel,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Megabell (Concept Games Ltd) (?)"      , GAME_FLAGS)
 GAME( 19??, ec_jackb,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Jackpot Bars (MAB PCB?) (Concept Games Ltd) (?)"       , GAME_FLAGS)

src/mame/drivers/gaelco3d.c

@@ -523,7 +523,7 @@ WRITE16_MEMBER(gaelco3d_state::tms_comm_w)
  *
  *************************************/
 
-/* These are the some of the control register, we dont use them all */
+/* These are some of the control registers. We don't use them all */
 enum
 {
 	S1_AUTOBUF_REG = 15,
@@ -663,7 +663,7 @@ WRITE32_MEMBER(gaelco3d_state::adsp_tx_callback)
 			/* get the base value, since we need to keep it around for wrapping */
 			source -= m_adsp_incs;
 
-			/* make it go back one so we dont lose the first sample */
+			/* make it go back one so we don't lose the first sample */
 			m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source);
 
 			/* save it as it is now */

src/mame/drivers/igs_m036.c

@@ -12,12 +12,12 @@ a IGS game use IGS036 chip
 IGS036 could be a upgraded version of IGS027A
 but with GFX processor integrated
 
-I dont know the CPU core (should ARM based due to fail test)
+I don't know the CPU core (should be ARM based due to fail test)
-the chip has internal rom build-in
+the chip has internal rom built-in
-the the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
+the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
-if the external rom decrypted then we can
+if the external rom is decrypted then we can
 try to trojan the internal rom
-here we offer several revision a same game to see
+here we offer several revisions of the same game to see
 if anyone could find any clue, these 4 revision can
 be programmed and running on a same PCB.
 ===================================================

src/mame/drivers/multfish_ref.c

@@ -1,6 +1,6 @@
 
 /* The following sets are known to exist based on official documentation, but have not been dumped. */
-/* no other official sets are known to exist apart from these and hte ones in multfish.c */
+/* no other official sets are known to exist apart from these and the ones in multfish.c */
 
 #if 0
 ROM_START( mfish ) // 021120

src/mame/drivers/nova2001.c

@@ -930,7 +930,7 @@ ROM_END
 /******************************************************************************
 
 Gfx ROMs in pkunwar have an unusual layout, where a high address bit
-(which is no the top bit) separates parts of the same tile.
+(which is not the top bit) separates parts of the same tile.
 
 This all originates from Nova2001 apparently, which uses 0x2000 bytes ROMs for
 the graphics. When the number of tiles was increased, the same 0x2000 blocks

src/mame/drivers/re900.c

@@ -45,8 +45,8 @@
 
     How to play...
 
-    This Roulette allow up to 6 players. To start the machine, turn the Operator Key
+    This Roulette allows up to 6 players. To start the machine, turn the Operator Key
-    (the the Operator Key light will turn green). Whilest this key is turned ON, you
+    (the Operator Key light will turn green). Whilst this key is turned ON, you
     can insert credits, play, and payout. Once the key is turned OFF (red light), you
     can play, but credits can't be entered/taken.
 

src/mame/drivers/system16.c

@@ -35,7 +35,7 @@
      - Tetris
      - E-Swat
 
-    These appear to be a variation no the encrypted / protected bootlegs, but without the encryption
+    These appear to be a variation on the encrypted / protected bootlegs, but without the encryption
     or protection
 
     - Golden Axe (set 2)
@@ -566,7 +566,7 @@ WRITE16_MEMBER(segas1x_bootleg_state::s16bl_bgscrollx_w)
 	int scroll = data & 0x1ff;
 
 	scroll+= 0x200;
-	scroll+= 1; // so that the background fo the select screen is properly aligned
+	scroll+= 1; // so that the background of the select screen is properly aligned
 	m_bg_scrollx = -scroll;
 }
 

src/mame/drivers/vsnes.c

@@ -364,7 +364,7 @@ static INPUT_PORTS_START( vsnes_dual )
 	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )            /* bit 1 of dsw goes here */
 	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
 	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
-	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - dont change */
+	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - don't change */
 
 	/* Right Side Controls */
 	PORT_START("IN2")
@@ -395,7 +395,7 @@ static INPUT_PORTS_START( vsnes_dual )
 	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )            /* bit 1 of dsw goes here */
 	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(1)
 	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(1)
-	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - dont change */
+	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - don't change */
 
 	/* Both sides also have a DSW (#0 & #1) which are defined per game, below */
 INPUT_PORTS_END

src/mame/drivers/wc90b.c

@@ -62,7 +62,7 @@ and encoded in a different way from the original machine. Even if
 sometimes it seems colors are not entirely correct, this is only due
 to the crappy artwork of the person that did the bootleg.
 
-Dip switches are not complete and they dont seem to differ from
+Dip switches are not complete and they don't seem to differ from
 the original machine.
 
 Last but not least, the set of ROMs i have for Euro League seem to have

src/mame/includes/toaplan1.h

@@ -27,7 +27,7 @@ public:
 
 	optional_shared_ptr<UINT8> m_sharedram;
 
-	int m_coin_count; /* coin count increments on startup ? , so dont count it */
+	int m_coin_count; /* coin count increments on startup ? , so don't count it */
 	int m_intenable;
 
 	/* Demon world */

src/mame/machine/pgmprot_igs027a_type3.c

@@ -498,8 +498,8 @@ void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region_theglad(int is_sv
 	temp16[(base) /2] = 0xff1e; base += 2;
 	temp16[(base) /2] = 0xe12f; base += 2;
 
-	// the non-EO area starts in the middle of a function that seems similar to those  at 000037E4 / 000037D4 in killbldp.. by setting this up we allow the intro to run
+	// the non-EO area starts in the middle of a function that seems similar to those at 000037E4 / 000037D4 in killbldp. by setting this up we allow the intro to run
-	// it sets '0x10000038' to a value ot 1
+	// it sets '0x10000038' to a value of 1
 	base = 0x184;
 	temp16[(base) /2] = 0x105c; base += 2;
 	temp16[(base) /2] = 0xE59F; base += 2;

src/mame/video/bosco.c

@@ -248,7 +248,7 @@ void bosco_state::draw_stars(bitmap_ind16 &bitmap, const rectangle &cliprect, in
 				x = (m_star_seed_tab[star_cntr].x + m_stars_scrollx) % 256;
 				y = (m_star_seed_tab[star_cntr].y + m_stars_scrolly) % 256;
 
-				/* dont draw the stars that are off the screen */
+				/* don't draw the stars that are off the screen */
 				if ( x < 224 )
 				{
 					if (flip) x += 64;

src/mame/video/tankbust.c

@@ -194,7 +194,7 @@ void tankbust_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
 
 		color = 0;
 
-		//0x02 - dont know (most of the time this bit is set in tank sprite and others but not all and not always)
+		//0x02 - don't know (most of the time this bit is set in tank sprite and others but not all and not always)
 		//0x04 - not used
 		//0x08 - not used
 		//0x10 - not used

src/mess/audio/upd1771.c

@@ -20,7 +20,7 @@
     it is perfectly possible to generate other sounds with different rom code and data.
 
     Most upd17XXX devices are typically 4bit NEC MCUs, however based on information
-    in in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152)
+    in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152)
     the upd1770/1771 is not one of these 4-bit ones.
 
     The uPD1770/uPD1771 SSM is a 16-bit-wide rom/ram mcu with 8kb (4kw) of rom code,
@@ -138,7 +138,7 @@
     pin  6 is tied to the   PC3 pin of the upD7801 CPU
     pin 26 is tied to the  INT1 pin of the upD7801 (CPU pin 12),
 
-    1,2,3,28,27 dont generate any digital signals
+    1,2,3,28,27 don't generate any digital signals
     6 seems to be lowered 2.5 ms before an audio write
     7  is always low.
     12 is always high
@@ -404,7 +404,7 @@ WRITE8_MEMBER( upd1771c_device::write )
 				m_t_timbre = (m_packet[1] & 0xe0) >> 5;
 				m_t_offset = (m_packet[1] & 0x1f);
 				m_t_period = m_packet[2];
-				//smaller periods dont all equal to 0x20
+				//smaller periods don't all equal to 0x20
 				if (m_t_period < 0x20)
 					m_t_period = 0x20;
 

src/mess/tools/imgtool/modules/os9.c

@@ -673,7 +673,7 @@ static imgtoolerr_t os9_diskimage_open(imgtool_image *image, imgtool_stream *str
 		return IMGTOOLERR_OUTOFMEMORY;
 	memset(info->allocation_bitmap, 0, info->allocation_bitmap_bytes);
 
-	/* sectors per track and track size dont jive? */
+	/* sectors per track and track size don't jive? */
 	if (info->sectors_per_track != track_size_in_sectors)
 		return IMGTOOLERR_CORRUPTIMAGE;