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https://github.com/holub/mame
synced 2025-05-20 20:58:51 +03:00
plygonet.c: hooked up 53936 roz layer
This adds a beautiful gradient sky bg that's rotated the wrong way. Ideas welcome.
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50f6cfc475
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@ -92,6 +92,8 @@ VIDEO_UPDATE( polygonet );
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READ32_HANDLER( polygonet_ttl_ram_r );
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WRITE32_HANDLER( polygonet_ttl_ram_w );
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READ32_HANDLER( polygonet_roz_ram_r );
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WRITE32_HANDLER( polygonet_roz_ram_w );
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static int init_eeprom_count;
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@ -236,7 +238,7 @@ static READ32_HANDLER( dsp_host_interface_r )
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if (mem_mask == 0x0000ff00) { value <<= 8; }
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if (mem_mask == 0xff000000) { value <<= 24; }
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logerror("Dsp HI Read (host-side) %08x (HI %04x) = %08x (@%x)\n", mem_mask, hi_addr, value, cpu_get_pc(space->cpu));
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// logerror("Dsp HI Read (host-side) %08x (HI %04x) = %08x (@%x)\n", mem_mask, hi_addr, value, cpu_get_pc(space->cpu));
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return value;
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}
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@ -245,12 +247,7 @@ static WRITE32_HANDLER( shared_ram_write )
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{
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COMBINE_DATA(&shared_ram[offset]) ;
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logerror("68k WRITING %04x & %04x to shared ram %x & %x [%08x] (@%x)\n", (shared_ram[offset] & 0xffff0000) >> 16,
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(shared_ram[offset] & 0x0000ffff),
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0xc000 + (offset<<1),
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0xc000 +((offset<<1)+1),
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mem_mask,
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cpu_get_pc(space->cpu));
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// logerror("68k WRITING %04x & %04x to shared ram %x & %x [%08x] (@%x)\n", (shared_ram[offset] & 0xffff0000) >> 16,
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/* write to the current dsp56k word */
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if (mem_mask | (0xffff0000))
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@ -272,12 +269,12 @@ static WRITE32_HANDLER( dsp_w_lines )
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/* 0x01000000 is the reset line - 0 is high, 1 is low */
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if ((data >> 24) & 0x01)
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{
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logerror("RESET CLEARED\n");
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// logerror("RESET CLEARED\n");
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cputag_set_input_line(space->machine, "dsp", DSP56K_IRQ_RESET, CLEAR_LINE);
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}
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else
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{
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logerror("RESET ASSERTED\n");
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// logerror("RESET ASSERTED\n");
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cputag_set_input_line(space->machine, "dsp", DSP56K_IRQ_RESET, ASSERT_LINE);
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/* A little hacky - I can't seem to set these lines anywhere else where reset is asserted, so i do it here */
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@ -299,7 +296,7 @@ static WRITE32_HANDLER( dsp_host_interface_w )
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if (mem_mask == 0x0000ff00) { hi_data = (data & 0x0000ff00) >> 8; }
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if (mem_mask == 0xff000000) { hi_data = (data & 0xff000000) >> 24; }
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logerror("write (host-side) %08x %08x %08x (HI %04x)\n", offset, mem_mask, data, hi_addr);
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// logerror("write (host-side) %08x %08x %08x (HI %04x)\n", offset, mem_mask, data, hi_addr);
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dsp56k_host_interface_write(cputag_get_cpu(space->machine, "dsp"), hi_addr, hi_data);
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}
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@ -525,7 +522,8 @@ static WRITE16_HANDLER( dsp56k_ram_bank04_write )
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static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x000000, 0x1fffff) AM_ROM
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AM_RANGE(0x200000, 0x21ffff) AM_RAM_WRITE(plygonet_palette_w) AM_BASE(&paletteram32)
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AM_RANGE(0x440000, 0x440fff) AM_RAM /* PSVR: PSAC2 VRAM? */
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AM_RANGE(0x400000, 0x40001f) AM_RAM AM_BASE((UINT32**)&K053936_0_ctrl)
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AM_RANGE(0x440000, 0x440fff) AM_READWRITE(polygonet_roz_ram_r, polygonet_roz_ram_w)
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AM_RANGE(0x480000, 0x4bffff) AM_READ(polygonet_eeprom_r)
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AM_RANGE(0x4C0000, 0x4fffff) AM_WRITE(polygonet_eeprom_w)
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AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(shared_ram_write) AM_BASE(&shared_ram)
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@ -603,11 +601,10 @@ static const k054539_interface k054539_config =
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};
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/**********************************************************************************/
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static const gfx_layout bglayout =
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{
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16,16,
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RGN_FRAC(1,1),
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1024,
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4,
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{ 0, 1, 2, 3 },
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{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, 8*4,
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@ -13,8 +13,8 @@
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/* TTL text plane stuff */
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static int ttl_gfx_index;
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static tilemap *ttl_tilemap;
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static UINT16 ttl_vram[0x800];
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static tilemap *ttl_tilemap, *roz_tilemap;
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static UINT16 ttl_vram[0x800], roz_vram[0x800];
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/* TTL text plane */
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@ -29,6 +29,16 @@ static TILE_GET_INFO( ttl_get_tile_info )
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SET_TILE_INFO(ttl_gfx_index, code, attr, 0);
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}
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static TILE_GET_INFO( roz_get_tile_info )
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{
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int attr, code;
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attr = (roz_vram[tile_index] >> 12) + 16; // roz base palette is palette 16
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code = roz_vram[tile_index] & 0x3ff;
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SET_TILE_INFO(0, code, attr, 0);
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}
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READ32_HANDLER( polygonet_ttl_ram_r )
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{
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UINT32 *vram = (UINT32 *)ttl_vram;
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@ -46,6 +56,23 @@ WRITE32_HANDLER( polygonet_ttl_ram_w )
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tilemap_mark_tile_dirty(ttl_tilemap, offset*2+1);
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}
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READ32_HANDLER( polygonet_roz_ram_r )
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{
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UINT32 *vram = (UINT32 *)roz_vram;
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return(vram[offset]);
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}
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WRITE32_HANDLER( polygonet_roz_ram_w )
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{
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UINT32 *vram = (UINT32 *)roz_vram;
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COMBINE_DATA(&vram[offset]);
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tilemap_mark_tile_dirty(roz_tilemap, offset*2);
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tilemap_mark_tile_dirty(roz_tilemap, offset*2+1);
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}
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static TILEMAP_MAPPER( plygonet_scan )
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{
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return row * num_cols + (col^1);
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@ -80,6 +107,10 @@ VIDEO_START( polygonet )
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tilemap_set_transparent_pen(ttl_tilemap, 0);
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state_save_register_global_array(machine, ttl_vram);
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// set up the roz t-map too
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roz_tilemap = tilemap_create(machine, roz_get_tile_info, plygonet_scan, 16, 16, 64, 32);
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tilemap_set_transparent_pen(roz_tilemap, 0);
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}
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VIDEO_UPDATE( polygonet )
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@ -87,6 +118,8 @@ VIDEO_UPDATE( polygonet )
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bitmap_fill(screen->machine->priority_bitmap, NULL, 0);
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bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
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K053936_0_zoom_draw(bitmap, cliprect, roz_tilemap, 0, 0, 0);
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tilemap_draw(bitmap, cliprect, ttl_tilemap, 0, 1<<0);
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return 0;
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}
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