From 387f1f461da2be079a0773fc5c7bb3090c47adde Mon Sep 17 00:00:00 2001 From: cracyc Date: Wed, 28 Jul 2021 16:29:54 -0500 Subject: [PATCH] pc9801: disable code causing egc issues and add color compare support --- src/mame/drivers/pc9801.cpp | 34 +++++++------------------------- src/mame/includes/pc9801.h | 1 + src/mame/video/pc9801.cpp | 39 +++++++++++++++++++++++++++++++++---- 3 files changed, 43 insertions(+), 31 deletions(-) diff --git a/src/mame/drivers/pc9801.cpp b/src/mame/drivers/pc9801.cpp index d551daa213c..23794710e94 100644 --- a/src/mame/drivers/pc9801.cpp +++ b/src/mame/drivers/pc9801.cpp @@ -332,8 +332,6 @@ Keyboard TX commands: #include "includes/pc9801.h" #include "machine/input_merger.h" - - void pc9801_state::rtc_w(uint8_t data) { m_rtc->c0_w((data & 0x01) >> 0); @@ -788,30 +786,6 @@ void pc9801_state::egc_w(offs_t offset, uint16_t data, uint16_t mem_mask) COMBINE_DATA(&m_egc.regs[offset]); switch(offset) { - case 1: - case 3: - case 5: - { - uint8_t color = 0; - switch((m_egc.regs[1] >> 13) & 3) - { - case 1: - //back color - color = m_egc.regs[5]; - break; - case 2: - //fore color - color = m_egc.regs[3]; - break; - default: - return; - } - m_egc.pat[0] = (color & 1) ? 0xffff : 0; - m_egc.pat[1] = (color & 2) ? 0xffff : 0; - m_egc.pat[2] = (color & 4) ? 0xffff : 0; - m_egc.pat[3] = (color & 8) ? 0xffff : 0; - break; - } case 6: case 7: m_egc.count = (m_egc.regs[7] & 0xfff) + 1; @@ -2074,7 +2048,13 @@ MACHINE_START_MEMBER(pc9801_state,pc9801_common) save_item(NAME(m_sasi_data)); save_item(NAME(m_sasi_data_enable)); save_item(NAME(m_sasi_ctrl)); - save_pointer(NAME(m_egc.regs), 8); + save_item(NAME(m_egc.regs)); + save_item(NAME(m_egc.pat)); + save_item(NAME(m_egc.src)); + save_item(NAME(m_egc.count)); + save_item(NAME(m_egc.leftover)); + save_item(NAME(m_egc.first)); + save_item(NAME(m_egc.init)); } MACHINE_START_MEMBER(pc9801_state,pc9801f) diff --git a/src/mame/includes/pc9801.h b/src/mame/includes/pc9801.h index 661724c243a..6211e697b9b 100644 --- a/src/mame/includes/pc9801.h +++ b/src/mame/includes/pc9801.h @@ -446,6 +446,7 @@ private: void m_sdip_write(uint16_t port, uint8_t sdip_offset,uint8_t data); uint16_t egc_do_partial_op(int plane, uint16_t src, uint16_t pat, uint16_t dst) const; uint16_t egc_shift(int plane, uint16_t val); + uint16_t egc_color_pat(int plane) const; }; #endif // MAME_INCLUDES_PC9801_H diff --git a/src/mame/video/pc9801.cpp b/src/mame/video/pc9801.cpp index 007929063c8..6ab925aa31b 100644 --- a/src/mame/video/pc9801.cpp +++ b/src/mame/video/pc9801.cpp @@ -557,6 +557,25 @@ void pc9801_state::upd7220_grcg_w(offs_t offset, uint16_t data, uint16_t mem_mas * ************************************************/ +uint16_t pc9801_state::egc_color_pat(int plane) const +{ + uint8_t color = 0; + switch((m_egc.regs[1] >> 13) & 3) + { + case 1: + //back color + color = m_egc.regs[5]; + break; + case 2: + //fore color + color = m_egc.regs[3]; + break; + default: + return m_egc.pat[plane]; + } + return BIT(color, plane) ? 0xffff : 0; +} + uint16_t pc9801_state::egc_shift(int plane, uint16_t val) { int src_off = m_egc.regs[6] & 0xf, dst_off = (m_egc.regs[6] >> 4) & 0xf; @@ -632,6 +651,7 @@ void pc9801_state::egc_blit_w(uint32_t offset, uint16_t data, uint16_t mem_mask) mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (16 - dst_off)) - 1); if(BIT(m_egc.regs[2], 10) && !m_egc.init) m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; + m_egc.init = true; } // mask off the bits past the end of the blit @@ -653,7 +673,7 @@ void pc9801_state::egc_blit_w(uint32_t offset, uint16_t data, uint16_t mem_mask) { if(!BIT(m_egc.regs[0], i)) { - uint16_t src = m_egc.src[i], pat = m_egc.pat[i]; + uint16_t src = m_egc.src[i], pat = egc_color_pat(i); if(BIT(m_egc.regs[2], 10)) src = egc_shift(i, data); @@ -715,17 +735,28 @@ uint16_t pc9801_state::egc_blit_r(uint32_t offset, uint16_t mem_mask) m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)]; m_egc.pat[3] = m_video_ram_2[plane_off]; } - if(m_egc.first && !m_egc.init) + //TODO: this needs another look + /*if(m_egc.first && !m_egc.init) { m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; if(((m_egc.regs[6] >> 4) & 0xf) >= (m_egc.regs[6] & 0xf)) // check if we have enough bits m_egc.init = true; - } + }*/ + m_egc.init = true; for(int i = 0; i < 4; i++) m_egc.src[i] = egc_shift(i, m_video_ram_2[plane_off + (((i + 1) & 3) * 0x4000)]); if(BIT(m_egc.regs[2], 13)) - return m_video_ram_2[offset]; + { + uint16_t ret; + // docs say vram is compared to the foreground color register but 4a2 13-14 must be 2 + // guess that the other values probably work too + ret = ~(egc_color_pat(0) ^ m_video_ram_2[plane_off + 0x4000]); + ret &= ~(egc_color_pat(1) ^ m_video_ram_2[plane_off + (0x4000 * 2)]); + ret &= ~(egc_color_pat(2) ^ m_video_ram_2[plane_off + (0x4000 * 3)]); + ret &= ~(egc_color_pat(3) ^ m_video_ram_2[plane_off]); + return ret; + } else return m_egc.src[(m_egc.regs[1] >> 8) & 3]; }