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mvme162.cpp: NEW not working driver for the MVME162 series of VME boa… (#4967)
* mvme162.cpp: NEW not working driver for the MVME162 series of VME boards, boots to prompt but that's it for now * mvme162.cpp: minor corrections
This commit is contained in:
Joakim Larsson Edström
R. Belmont
parent
fe84db192b
commit
38b9b996a5
332
src/mame/drivers/mvme162.cpp
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332
src/mame/drivers/mvme162.cpp
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@ -0,0 +1,332 @@
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// license:BSD-3-Clause
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// copyright-holders:Joakim Larsson Edstrom
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/***************************************************************************
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*
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* Motorola MVME series of CPU boards: MVME-162
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*
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* 16/05/2016, rebased 2019
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*
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*
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* ||
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* || || MVME-162
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* ||||--||_____________________________________________________________
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* ||||--|| |
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* || || _ |__
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* C| | | |
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* || | | |
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* C| | | |
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* || | | |
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* C| | | |
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* || | | |
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* C| | |VME|
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* || | | |
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* || | |P1 |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || |_| |
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* || |___|
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |___
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* || _| |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | |VME|
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* || | | |
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* || | |P2 |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || |_| |
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* || |___|
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* || || +
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* ||||--|| |
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* ||||--||--------------------------------------------------------------+
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* ||
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*
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* History of Motorola VME division (https://en.wikipedia.org/wiki/VMEbus)
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*---------------------------------
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* See mvme147.cpp
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*
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* Misc links about this board:
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* ----------------------------
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* http://bitsavers.informatik.uni-stuttgart.de/pdf/motorola/VME/MVME162/
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* http://www.m88k.com/mvme162.html
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*
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* Description(s)
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* -------------
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* MVME-162 has the following feature set
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* - 25/33MHz MHzMC68040 or MC68LC040 Microprocessor
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* - 1 or 4 MB of DRAM with parity protection on a mezzanine module, or 16 MB ECC DRAM on a mezzanine board
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* - 128 KB of SRAM with battery backup, or 2 MB SRAM on a mezzanine board with battery backup
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* - Four JEDEC standard 32-pin DIP PROM sockets
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* - One Intel 28F008SA 1M x 8 Flash memory device with write protection.
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* - Status LEDs for FAIL, RUN, SCON, and FUSES
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* - 8K by 8 Non-Volatile RAM (NVRAM) and time of day (TOD) clock with battery backup
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* - RESET and ABORT switches
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* - Four 32-bit Tick Timers and Watchdog Timer (in the MCchip ASIC) for periodic interrupts
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* - Two 32-bit Tick Timers and Watchdog Timer (in the VMEchip2 ASIC) for periodic interrupts
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* - Eight software interrupts (for MVME162LX versions that have the VMEchip2)
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* - Optional SCSI Bus interface with DMA
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* - Four serial ports with EIA-232-D interface (serial port controllers are the Z85230s
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* - Optional Ethernet transceiver interface with DMA Two IndustryPack interfaces
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* VMEbus interface
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* - VMEbus system controller functions
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* - VMEbus interface to local bus (A24/A32,
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* - D8/D16/D32 (D8/D16/D32/D64 BLT) (BLT = Block Transfer)
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* - Local bus to VMEbus interface (A16/A24/A32, D8/D16/D32)
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* - VMEbus interrupter
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* - VMEbus interrupt handler
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* - Global CSR for interprocessor communications
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* - DMA for fast local memory - VMEbus transfers (A16/A24/A32, D16/D32 (D16/D32/D64 BLT)
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*
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* Address Map
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* --------------------------------------------------------------------------
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* Decscription
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* --------------------------------------------------------------------------
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* 00000000-001FFFFF Boot ROM until ROM0 bit is cleared
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* Programmable DRAM on Parity Mezzanine D32 1-4MB
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* Programmable DRAM on ECC Mezzanine D32 16MB
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* Programmable On-board SRAM D32 128KB
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* Programmable SRAM on Mezzanine D32 2MB
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* Programmable VMEbus A32/A24 D32/D16
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* Programmable IP_a Memory D32-D8 64KB-8MB
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* Programmable IP_b Memory D32-D8 64KB-8MB
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* FF800000-FF9FFFFF Flash/EPROM D32 2Mb
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* FFA00000-FFBFFFFF EPROM/Flash D32 2Mb
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* FFC00000-FFDFFFFF Not decoded
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* FFE00000-FFE1FFFF On-board SRAM D32 128Kb
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* FFE80000-FFEFFFFF Not decoded
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* ------------------------ Local I/O devices D8/D16/D32
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* FFF00000-FFF3FFFF Reserved 256KB
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* FFF40000-FFF400FF VMEchip2 (LCSR) D32 256B
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* FFF40100-FFF401FF VMEchip2 (GCSR) D32-D8 256B
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* FFF40200-FFF40FFF Reserved 3.5KB
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* FFF41000-FFF41FFF Reserved 4KB
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* FFF42000-FFF41FFF MCchip D32-D8 4KB
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* FFF43000-FFF430FF MCECC #1 D8 256B
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* FFF43100-FFF431FF MCECC #2 D8 256B
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* FFF43200-FFF43FFF MCECC:s mirrored
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* FFF44000-FFF44FFF Reserved
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* FFF45000-FFF45800 SCC #1 (Z85230) D8 2Kb
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* FFF45801-FFF45FFF SCC #2 (Z85230) D8 2Kb
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* FFF46000-FFF46FFF LAN (82596CA) D32 4Kb
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* FFF47000-FFF47FFF SCSI (53C710) D32-D8 4Kb
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* FFF48000-FFF57FFF Reserved
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* FFF58000-FFF587FF IPIC IP_* D32-D16
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* FFF58800-FFF58FFF Reserved
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* FFFBC000-FFFBC01F IPIC Registers D32-D8
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* FFFBC800-FFFBFFFF Reserved
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* FFFC0000-FFFC7FFF MK48T08 (BBRAM, TOD Clock) D32-D8 32Kb
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* FFFC8000-FFFCBFFF MK48T08 & Disable Flash writes D32-D8 16Kb
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* FFFC8000-FFFCBFFF MK48T08 & Enable Flash writes D32-D8 16Kb
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* FFFD0000-FFFEFFFF Reserved
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* FFFF0000-FFFFFFFF VMEbux short I/O D16
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* --------------------------------------------------------------------------
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*
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* TODO: (at a high level)
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* - Add all SCC
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* - Pass 162bug bootup tests
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* - Add more divices as required by each board configuration (at least 30+ variants)
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* - Write and add ASIC devices
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* - Add local bus(es)
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* - Add VME bus
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* - Boot pSOS and VxWorks
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* - Add variants of boards, preferably as runtime configurations
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*
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****************************************************************************/
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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#include "machine/z80scc.h"
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#include "bus/rs232/rs232.h"
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#include "machine/clock.h"
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#include "machine/timekpr.h"
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#define LOG_SETUP (1U << 1)
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//#define VERBOSE (LOG_GENERAL | LOG_SETUP)
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//#define LOG_OUTPUT_STREAM std::cout
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#include "logmacro.h"
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#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#ifdef _MSC_VER
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#define FUNCNAME __func__
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#else
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#define FUNCNAME __PRETTY_FUNCTION__
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#endif
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/*Serial Communications Interface
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The MVME162LX uses two Zilog Z85230 serial port controllers to implement the four serial communications
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interfaces. Each interface supports CTS, DCD, RTS, and DTR control signals; as well as the TXD and RXD
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transmit/receive data signals. Because the serial clocks are omitted in the MVME162LX implementation,
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serial communications are strictly asynchronous. The MVME162LX hardware supports serial baud rates of
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110b/s to 38.4Kb/s. The Z85230 supplies an interrupt vector during interrupt acknowledge cycles.
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The vector is modified based upon the interrupt source within the Z85230. Interrupt request levels are
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programmed via the MCchip. The Z85230s are interfaced as DTE (data terminal equipment) with EIA-232-D
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signal levels. The four serial ports are routed to four RJ45 telephone connectors on the MVME162LX front panel.*/
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/* This gives prompt at the RS232 terminal device (9600) */
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#define BAUDGEN_CLOCK 10_MHz_XTAL // Not verified nor seen on the PCB:s
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#define SCC_CLOCK (BAUDGEN_CLOCK)
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class mvme162_state : public driver_device
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{
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public:
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mvme162_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device (mconfig, type, tag),
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m_maincpu (*this, "maincpu")
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,m_sccterm(*this, "scc")
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{
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}
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void mvme162(machine_config &confg);
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private:
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DECLARE_READ32_MEMBER (bootvect_r);
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DECLARE_WRITE32_MEMBER (bootvect_w);
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virtual void machine_start () override;
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virtual void machine_reset () override;
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void mvme162_mem(address_map &map);
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required_device<cpu_device> m_maincpu;
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required_device<scc85230_device> m_sccterm;
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//required_device<scc85230_device> m_sccterm2;
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// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
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uint32_t *m_sysrom;
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uint32_t m_sysram[2];
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// PCC registers
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uint8_t m_genpurp_stat;
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// VME chip registers
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uint8_t m_vc_cntl_conf;
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};
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void mvme162_state::mvme162_mem(address_map &map)
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{
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map.unmap_value_high();
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map(0x00000000, 0x00000007).ram().w(FUNC(mvme162_state::bootvect_w)); /* After first write we act as RAM */
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map(0x00000000, 0x00000007).rom().r(FUNC(mvme162_state::bootvect_r)); /* ROM mirror just during reset */
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map(0x00000008, 0x003fffff).ram(); /* 4 Mb RAM */
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map(0xff800000, 0xff9fffff).rom().region("roms", 0x800000); /* ROM/EEPROM bank 1 - 162bug/firmware */
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map(0xffa00000, 0xffbfffff).rom().region("roms", 0xa00000); /* ROM/EEPROM bank 2 - unpopulated/VxWorks/etc */
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map(0xffe00000, 0xffe1ffff).ram(); /* 128KB on board SRAM */
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/* SGS-Thompson M48T18 RAM and clock chip, only 4088 bytes used, and 8 bytes for the RTC, out of 8Kb though */
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map(0xfffc0000, 0xfffc7fff).rw("m48t18", FUNC(timekeeper_device::read), FUNC(timekeeper_device::write));
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map(0xfff45000, 0xfff457ff).rw(m_sccterm, FUNC(scc85230_device::ba_cd_r), FUNC(scc85230_device::ba_cd_w)); /* Port 1&2 - Dual serial port Z80-SCC */
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}
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/* Input ports */
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static INPUT_PORTS_START (mvme162)
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INPUT_PORTS_END
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/* Start it up */
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void mvme162_state::machine_start ()
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{
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LOG("--->%s\n", FUNCNAME);
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/* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
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m_sysrom = (uint32_t*)(memregion ("roms")->base () + 0x800000);
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m_genpurp_stat = 0x02; /* Indicate power up reset */
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m_vc_cntl_conf = 0x01; /* We are the system controller */
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}
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void mvme162_state::machine_reset ()
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{
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LOG("--->%s\n", FUNCNAME);
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/* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */
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if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */
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m_sysrom = (uint32_t*)(memregion ("roms")->base () + 0x800000);
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m_genpurp_stat &= 0xfe; /* Clear parity error bit - not used by MAME at this point so just for the record */
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}
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/*
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Boot vector handler. Devices mapped at $FFF80000-$FFF9FFFF also appear at $00000000-$001FFFFF when the ROM0 bit
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in the MCchip EPROM control register is high (ROM0=1). ROM0 is set to 1 after each reset. The ROM0 bit must be
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cleared before other resources (DRAM or SRAM) can be mapped in this range ($00000000 - $001FFFFF).
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*/
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READ32_MEMBER (mvme162_state::bootvect_r){
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return m_sysrom[offset];
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}
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WRITE32_MEMBER (mvme162_state::bootvect_w){
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m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
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m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
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m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
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}
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/*
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* Machine configuration
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*/
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void mvme162_state::mvme162(machine_config &config)
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{
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M68040(config, m_maincpu, 25_MHz_XTAL);
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m_maincpu->set_addrmap(AS_PROGRAM, &mvme162_state::mvme162_mem);
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M48T02(config, "m48t18", 0); /* t08 differs only in accepted voltage levels compared to t18 */
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/* Terminal Port config */
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SCC85230(config, m_sccterm, SCC_CLOCK);
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m_sccterm->out_txda_callback().set("rs232trm", FUNC(rs232_port_device::write_txd));
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m_sccterm->out_dtra_callback().set("rs232trm", FUNC(rs232_port_device::write_dtr));
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m_sccterm->out_rtsa_callback().set("rs232trm", FUNC(rs232_port_device::write_rts));
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rs232_port_device &rs232trm(RS232_PORT(config, "rs232trm", default_rs232_devices, "terminal"));
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rs232trm.rxd_handler().set(m_sccterm, FUNC(scc85230_device::rxa_w));
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rs232trm.cts_handler().set(m_sccterm, FUNC(scc85230_device::ctsa_w));
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}
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/* ROM definitions */
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ROM_START (mvme162)
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ROM_REGION32_BE(0xf00000, "roms", 0)
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ROM_DEFAULT_BIOS("162bug-v4.0")
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ROM_SYSTEM_BIOS(0, "162bug-v2.3", "MVME162 162bug v2.3")
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ROMX_LOAD("162bug_2.3.bin", 0x800000, 0x80000, CRC (301f52a8) SHA1 (ffc77561dce26a70020452baef76f4eb9dc14543), ROM_BIOS(0))
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ROM_SYSTEM_BIOS(1, "162bug-v4.0", "MVME162 162bug v4.0")
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ROMX_LOAD("162bug_4.0.bin", 0x800000, 0x80000, CRC (56728e5b) SHA1 (0b8b6725c21d8a9048d24857d6acd2b68a7f3ba0), ROM_BIOS(1))
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ROM_SYSTEM_BIOS(2, "probe", "MVME162 pSOS pROBE+ boot loader")
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ROMX_LOAD("162probe+_3.1.0.bin", 0x800000, 0x80000, CRC (1d050793) SHA1 (d060fbbf548b2559c0d251fae5a2eb87b0132f0b), ROM_BIOS(2))
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ROM_SYSTEM_BIOS(3, "vxworks", "MVME162 WindRiver VxWorks boot loader")
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ROMX_LOAD("162bug_2.3.bin", 0x800000, 0x80000, CRC (301f52a8) SHA1 (ffc77561dce26a70020452baef76f4eb9dc14543), ROM_BIOS(3))
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ROMX_LOAD("vxworks_5.1.1_162lx-223.bin", 0xa00000, 0x20000, CRC (b40b39ac) SHA1 (fbc7f7e05ff276fe4570daeadcc5c08fc11f1a2b), ROM_BIOS(3))
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ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP (1993, mvme162, 0, 0, mvme162, mvme162, mvme162_state, empty_init, "Motorola", "MVME-162", MACHINE_NOT_WORKING)
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@ -29065,6 +29065,9 @@ mustachei // (c) 1987 IG SPA
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@source:mvme147.cpp
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mvme147 // (c) 1989 Motorola
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@source:mvme162.cpp
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mvme162 // (c) 1993 Motorola
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@source:mw18w.cpp
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18w // 653 (c) 1979 Midway
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18w2 // 653 (c) 1979 Midway
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