mirror of
https://github.com/holub/mame
synced 2025-10-06 17:08:28 +03:00
Converted PIT8253 to DEVCB2 [smf]
This commit is contained in:
parent
ed701f13e7
commit
38d827e993
@ -241,7 +241,6 @@ void kbdc8042_device::device_start()
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m_input_buffer_full_func.resolve(m_input_buffer_full_cb, *this);
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m_input_buffer_full_func.resolve(m_input_buffer_full_cb, *this);
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m_output_buffer_empty_func.resolve(m_output_buffer_empty_cb, *this);
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m_output_buffer_empty_func.resolve(m_output_buffer_empty_cb, *this);
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m_speaker_func.resolve(m_speaker_cb, *this);
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m_speaker_func.resolve(m_speaker_cb, *this);
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m_getout2_func.resolve(m_getout2_cb, *this);
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machine().scheduler().timer_pulse(attotime::from_hz(60), timer_expired_delegate(FUNC(kbdc8042_device::kbdc8042_time),this));
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machine().scheduler().timer_pulse(attotime::from_hz(60), timer_expired_delegate(FUNC(kbdc8042_device::kbdc8042_time),this));
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at_keyboard_init(machine(), AT_KEYBOARD_TYPE_AT);
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at_keyboard_init(machine(), AT_KEYBOARD_TYPE_AT);
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at_keyboard_set_scan_code_set(1);
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at_keyboard_set_scan_code_set(1);
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@ -399,7 +398,7 @@ READ8_MEMBER(kbdc8042_device::data_r)
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break;
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break;
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case 2:
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case 2:
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if (m_getout2_func(0))
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if (m_out2)
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data |= 0x20;
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data |= 0x20;
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else
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else
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data &= ~0x20;
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data &= ~0x20;
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@ -622,3 +621,8 @@ WRITE8_MEMBER(kbdc8042_device::data_w)
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break;
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break;
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}
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}
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}
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}
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WRITE_LINE_MEMBER(kbdc8042_device::write_out2)
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{
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m_out2 = state;
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}
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@ -42,7 +42,6 @@ struct kbdc8042_interface
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devcb_write_line m_output_buffer_empty_cb;
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devcb_write_line m_output_buffer_empty_cb;
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devcb_write8 m_speaker_cb;
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devcb_write8 m_speaker_cb;
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devcb_read8 m_getout2_cb;
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};
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};
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// ======================> kbdc8042_device
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// ======================> kbdc8042_device
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@ -57,12 +56,15 @@ public:
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DECLARE_READ8_MEMBER( data_r );
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DECLARE_READ8_MEMBER( data_r );
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DECLARE_WRITE8_MEMBER( data_w );
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DECLARE_WRITE8_MEMBER( data_w );
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DECLARE_WRITE_LINE_MEMBER( write_out2 );
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void at_8042_set_outport(UINT8 data, int initial);
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void at_8042_set_outport(UINT8 data, int initial);
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TIMER_CALLBACK_MEMBER( kbdc8042_time );
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TIMER_CALLBACK_MEMBER( kbdc8042_time );
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TIMER_CALLBACK_MEMBER( kbdc8042_clr_int );
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TIMER_CALLBACK_MEMBER( kbdc8042_clr_int );
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void at_8042_receive(UINT8 data);
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void at_8042_receive(UINT8 data);
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void at_8042_check_keyboard();
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void at_8042_check_keyboard();
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void at_8042_clear_keyboard_received();
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void at_8042_clear_keyboard_received();
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protected:
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protected:
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// device-level overrides
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// device-level overrides
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virtual void device_start();
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virtual void device_start();
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@ -88,6 +90,7 @@ protected:
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int m_status_read_mode;
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int m_status_read_mode;
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int m_speaker;
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int m_speaker;
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int m_out2;
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/* temporary hack */
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/* temporary hack */
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int m_offset1;
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int m_offset1;
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@ -100,7 +103,6 @@ protected:
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devcb_resolved_write_line m_output_buffer_empty_func;
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devcb_resolved_write_line m_output_buffer_empty_func;
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devcb_resolved_write8 m_speaker_func;
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devcb_resolved_write8 m_speaker_func;
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devcb_resolved_read8 m_getout2_func;
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};
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};
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// device type definition
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// device type definition
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@ -96,27 +96,20 @@ const rom_entry *i80130_device::device_rom_region() const
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}
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}
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//-------------------------------------------------
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// pit8253_interface pit_intf
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//-------------------------------------------------
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static const struct pit8253_interface pit_intf =
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{
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{
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{ 0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, i80130_device, systick_w) },
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{ 0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, i80130_device, delay_w) },
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{ 0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, i80130_device, baud_w) }
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}
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};
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//-------------------------------------------------
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//-------------------------------------------------
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// MACHINE_CONFIG_FRAGMENT( i80130 )
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// MACHINE_CONFIG_FRAGMENT( i80130 )
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//-------------------------------------------------
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//-------------------------------------------------
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static MACHINE_CONFIG_FRAGMENT( i80130 )
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static MACHINE_CONFIG_FRAGMENT( i80130 )
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MCFG_PIC8259_ADD("pic", DEVWRITELINE(DEVICE_SELF, i80130_device, irq_w), VCC, NULL)
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MCFG_PIC8259_ADD("pic", DEVWRITELINE(DEVICE_SELF, i80130_device, irq_w), VCC, NULL)
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MCFG_PIT8254_ADD("pit", pit_intf)
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MCFG_DEVICE_ADD("pit", PIT8254, 0)
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MCFG_PIT8253_CLK0(0)
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MCFG_PIT8253_OUT0_HANDLER(WRITELINE(i80130_device, systick_w))
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MCFG_PIT8253_CLK1(0)
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MCFG_PIT8253_OUT1_HANDLER(WRITELINE(i80130_device, delay_w))
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MCFG_PIT8253_CLK2(0)
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MCFG_PIT8253_OUT2_HANDLER(WRITELINE(i80130_device, baud_w))
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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@ -22,6 +22,13 @@
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#include "machine/pit8253.h"
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#include "machine/pit8253.h"
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/* device types */
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enum
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{
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TYPE_PIT8253 = 0,
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TYPE_PIT8254
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};
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/***************************************************************************
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/***************************************************************************
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@ -38,61 +45,62 @@
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const device_type PIT8253 = &device_creator<pit8253_device>;
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const device_type PIT8253 = &device_creator<pit8253_device>;
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pit8253_device::pit8253_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, PIT8253, "Intel PIT8253", tag, owner, clock, "pit8253", __FILE__),
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m_out0_handler(*this),
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m_out1_handler(*this),
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m_out2_handler(*this)
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{
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m_timers[0].gate = 1;
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m_timers[1].gate = 1;
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m_timers[2].gate = 1;
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}
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pit8253_device::pit8253_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
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device_t(mconfig, type, name, tag, owner, clock, shortname, source),
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m_out0_handler(*this),
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m_out1_handler(*this),
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m_out2_handler(*this)
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{
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m_timers[0].gate = 1;
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m_timers[1].gate = 1;
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m_timers[2].gate = 1;
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}
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const device_type PIT8254 = &device_creator<pit8254_device>;
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const device_type PIT8254 = &device_creator<pit8254_device>;
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pit8253_device::pit8253_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: device_t(mconfig, PIT8253, "Intel PIT8253", tag, owner, clock, "pit8253", __FILE__)
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{
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}
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pit8253_device::pit8253_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
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: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
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{
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}
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pit8254_device::pit8254_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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pit8254_device::pit8254_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pit8253_device(mconfig, PIT8254, "Intel PIT8254", tag, owner, clock, "pit8254", __FILE__)
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: pit8253_device(mconfig, PIT8254, "Intel PIT8254", tag, owner, clock, "pit8254", __FILE__)
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{
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{
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}
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}
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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// complete
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//-------------------------------------------------
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void pit8253_device::device_config_complete()
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{
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// inherit a copy of the static data
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const pit8253_interface *intf = reinterpret_cast<const pit8253_interface *>(static_config());
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if (intf != NULL)
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*static_cast<pit8253_interface *>(this) = *intf;
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}
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//-------------------------------------------------
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//-------------------------------------------------
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// device_start - device-specific startup
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// device_start - device-specific startup
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//-------------------------------------------------
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//-------------------------------------------------
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void pit8253_device::common_start( int device_type )
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void pit8253_device::device_start()
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{
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{
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m_device_type = device_type;
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m_timers[0].clockin = m_clk0;
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m_timers[1].clockin = m_clk1;
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m_timers[2].clockin = m_clk2;
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m_out0_handler.resolve();
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m_out1_handler.resolve();
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m_out2_handler.resolve();
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/* register for state saving */
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/* register for state saving */
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for (int timerno = 0; timerno < PIT8253_MAX_TIMER; timerno++)
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for (int timerno = 0; timerno < PIT8253_MAX_TIMER; timerno++)
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{
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{
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pit8253_timer *timer = get_timer(timerno);
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pit8253_timer *timer = &m_timers[timerno];
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/* initialize timer */
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/* initialize timer */
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timer->clockin = m_intf_timer[timerno].clockin;
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timer->updatetimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pit8253_device::update_timer_cb),this));
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timer->updatetimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pit8253_device::update_timer_cb),this));
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timer->updatetimer->adjust(attotime::never, timerno);
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timer->updatetimer->adjust(attotime::never, timerno);
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/* resolve callbacks */
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timer->in_gate_func.resolve(m_intf_timer[timerno].in_gate_func, *this);
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timer->out_out_func.resolve(m_intf_timer[timerno].out_out_func, *this);
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/* set up state save values */
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/* set up state save values */
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save_item(NAME(timer->clockin), timerno);
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save_item(NAME(timer->clockin), timerno);
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save_item(NAME(timer->control), timerno);
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save_item(NAME(timer->control), timerno);
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@ -116,17 +124,6 @@ void pit8253_device::common_start( int device_type )
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}
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}
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void pit8253_device::device_start()
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{
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common_start(TYPE_PIT8253);
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}
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void pit8254_device::device_start()
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{
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common_start(TYPE_PIT8254);
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}
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//-------------------------------------------------
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//-------------------------------------------------
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// device_reset - device-specific reset
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// device_reset - device-specific reset
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//-------------------------------------------------
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//-------------------------------------------------
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@ -135,7 +132,7 @@ void pit8253_device::device_reset()
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{
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{
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for (int i = 0; i < PIT8253_MAX_TIMER; i++)
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for (int i = 0; i < PIT8253_MAX_TIMER; i++)
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{
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{
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pit8253_timer *timer = get_timer(i);
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pit8253_timer *timer = &m_timers[i];
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/* According to Intel's 8254 docs, the state of a timer is undefined
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/* According to Intel's 8254 docs, the state of a timer is undefined
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until the first mode control word is written. Here we define this
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until the first mode control word is written. Here we define this
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undefined behaviour */
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undefined behaviour */
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@ -145,11 +142,6 @@ void pit8253_device::device_reset()
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timer->count = timer->value = timer->latch = 0;
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timer->count = timer->value = timer->latch = 0;
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timer->lowcount = 0;
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timer->lowcount = 0;
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if (!timer->in_gate_func.isnull())
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timer->gate = timer->in_gate_func();
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else
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timer->gate = 1;
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timer->output = 2; /* output is undetermined */
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timer->output = 2; /* output is undetermined */
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timer->latched_count = 0;
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timer->latched_count = 0;
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timer->latched_status = 0;
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timer->latched_status = 0;
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@ -186,9 +178,6 @@ pit8253_timer *pit8253_device::get_timer(int which)
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int pit8253_device::pit8253_gate(pit8253_timer *timer)
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int pit8253_device::pit8253_gate(pit8253_timer *timer)
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{
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{
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if (!timer->in_gate_func.isnull())
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return timer->in_gate_func();
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else
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return timer->gate;
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return timer->gate;
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}
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}
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@ -294,7 +283,21 @@ void pit8253_device::set_output(pit8253_timer *timer, int output)
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if (output != timer->output)
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if (output != timer->output)
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{
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{
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timer->output = output;
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timer->output = output;
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timer->out_out_func(timer->output);
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switch (timer->index)
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{
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case 0:
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m_out0_handler(output);
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break;
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case 1:
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m_out1_handler(output);
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break;
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case 2:
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m_out2_handler(output);
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break;
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}
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}
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}
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}
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}
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@ -743,7 +746,8 @@ void pit8253_device::update(pit8253_timer *timer)
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TIMER_CALLBACK_MEMBER( pit8253_device::update_timer_cb )
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TIMER_CALLBACK_MEMBER( pit8253_device::update_timer_cb )
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{
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{
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pit8253_timer *timer = get_timer(param);
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pit8253_timer *timer = &m_timers[param];
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LOG2(("pit8253: output_changed(): timer %d\n", param));
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LOG2(("pit8253: output_changed(): timer %d\n", param));
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update(timer);
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update(timer);
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@ -921,10 +925,30 @@ void pit8253_device::readback(pit8253_timer *timer, int command)
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}
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}
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void pit8253_device::readback_command(UINT8 data)
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{
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/* Readback command. Illegal on 8253 */
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/* Todo: find out what (if anything) the 8253 hardware actually does here. */
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}
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void pit8254_device::readback_command(UINT8 data)
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{
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LOG1(("pit8253: write(): readback %02x\n", data & 0x3f));
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/* Bit 0 of data must be 0. Todo: find out what the hardware does if it isn't. */
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int read_command = (data >> 4) & 3;
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if ((data & 2) != 0)
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readback(get_timer(0), read_command);
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if ((data & 4) != 0)
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readback(get_timer(1), read_command);
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if ((data & 8) != 0)
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readback(get_timer(2), read_command);
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}
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WRITE8_MEMBER( pit8253_device::write )
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WRITE8_MEMBER( pit8253_device::write )
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{
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{
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pit8253_timer *timer = get_timer(offset);
|
pit8253_timer *timer = get_timer(offset);
|
||||||
int read_command;
|
|
||||||
|
|
||||||
LOG2(("pit8253: write(): offset=%d data=0x%02x\n", offset, data));
|
LOG2(("pit8253: write(): offset=%d data=0x%02x\n", offset, data));
|
||||||
|
|
||||||
@ -934,21 +958,7 @@ WRITE8_MEMBER( pit8253_device::write )
|
|||||||
timer = get_timer((data >> 6) & 3);
|
timer = get_timer((data >> 6) & 3);
|
||||||
if (timer == NULL)
|
if (timer == NULL)
|
||||||
{
|
{
|
||||||
/* Readback command. Illegal on 8253 */
|
readback_command(data);
|
||||||
/* Todo: find out what (if anything) the 8253 hardware actually does here. */
|
|
||||||
if (m_device_type == TYPE_PIT8254)
|
|
||||||
{
|
|
||||||
LOG1(("pit8253: write(): readback %02x\n", data & 0x3f));
|
|
||||||
|
|
||||||
/* Bit 0 of data must be 0. Todo: find out what the hardware does if it isn't. */
|
|
||||||
read_command = (data >> 4) & 3;
|
|
||||||
if ((data & 2) != 0)
|
|
||||||
readback(get_timer(0), read_command);
|
|
||||||
if ((data & 4) != 0)
|
|
||||||
readback(get_timer(1), read_command);
|
|
||||||
if ((data & 8) != 0)
|
|
||||||
readback(get_timer(2), read_command);
|
|
||||||
}
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1053,12 +1063,6 @@ void pit8253_device::gate_w(int gate, int state)
|
|||||||
if (timer == NULL)
|
if (timer == NULL)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (!timer->in_gate_func.isnull())
|
|
||||||
{
|
|
||||||
logerror("pit8253_gate_w: write has no effect because a read handler is already defined!\n");
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if (state != timer->gate)
|
if (state != timer->gate)
|
||||||
{
|
{
|
||||||
int mode = CTRL_MODE(timer->control);
|
int mode = CTRL_MODE(timer->control);
|
||||||
@ -1072,28 +1076,25 @@ void pit8253_device::gate_w(int gate, int state)
|
|||||||
update(timer);
|
update(timer);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER( pit8253_device::write_gate0 )
|
||||||
|
{
|
||||||
|
gate_w(0, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( pit8253_device::gate0_w ) { gate_w(0, state); }
|
WRITE_LINE_MEMBER( pit8253_device::write_gate1 )
|
||||||
WRITE_LINE_MEMBER( pit8253_device::gate1_w ) { gate_w(1, state); }
|
{
|
||||||
WRITE_LINE_MEMBER( pit8253_device::gate2_w ) { gate_w(2, state); }
|
gate_w(1, state);
|
||||||
|
}
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER( pit8253_device::write_gate2 )
|
||||||
|
{
|
||||||
|
gate_w(2, state);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
/* ----------------------------------------------------------------------- */
|
/* ----------------------------------------------------------------------- */
|
||||||
|
|
||||||
int pit8253_device::get_output(int timerno)
|
|
||||||
{
|
|
||||||
pit8253_timer *timer = get_timer(timerno);
|
|
||||||
int result;
|
|
||||||
|
|
||||||
update(timer);
|
|
||||||
result = timer->output;
|
|
||||||
LOG2(("pit8253_get_output(): PIT timer=%d result=%d\n", timerno, result));
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void pit8253_device::set_clockin(int timerno, double new_clockin)
|
void pit8253_device::set_clockin(int timerno, double new_clockin)
|
||||||
{
|
{
|
||||||
pit8253_timer *timer = get_timer(timerno);
|
pit8253_timer *timer = get_timer(timerno);
|
||||||
@ -1121,6 +1122,17 @@ void pit8253_device::set_clock_signal(int timerno, int state)
|
|||||||
timer->clock = state;
|
timer->clock = state;
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( pit8253_device::clk0_w ) { set_clock_signal(0, state); }
|
WRITE_LINE_MEMBER( pit8253_device::write_clk0 )
|
||||||
WRITE_LINE_MEMBER( pit8253_device::clk1_w ) { set_clock_signal(1, state); }
|
{
|
||||||
WRITE_LINE_MEMBER( pit8253_device::clk2_w ) { set_clock_signal(2, state); }
|
set_clock_signal(0, state);
|
||||||
|
}
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER( pit8253_device::write_clk1 )
|
||||||
|
{
|
||||||
|
set_clock_signal(1, state);
|
||||||
|
}
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER( pit8253_device::write_clk2 )
|
||||||
|
{
|
||||||
|
set_clock_signal(2, state);
|
||||||
|
}
|
||||||
|
@ -23,27 +23,27 @@
|
|||||||
#ifndef __PIT8253_H__
|
#ifndef __PIT8253_H__
|
||||||
#define __PIT8253_H__
|
#define __PIT8253_H__
|
||||||
|
|
||||||
|
/***************************************************************************
|
||||||
|
DEVICE CONFIGURATION MACROS
|
||||||
|
***************************************************************************/
|
||||||
|
|
||||||
#define PIT8253_MAX_TIMER 3
|
#define MCFG_PIT8253_CLK0(_clk) \
|
||||||
|
pit8253_device::set_clk0(*device, _clk);
|
||||||
|
|
||||||
|
#define MCFG_PIT8253_CLK1(_clk) \
|
||||||
|
pit8253_device::set_clk1(*device, _clk);
|
||||||
|
|
||||||
/* device types */
|
#define MCFG_PIT8253_CLK2(_clk) \
|
||||||
enum
|
pit8253_device::set_clk2(*device, _clk);
|
||||||
{
|
|
||||||
TYPE_PIT8253 = 0,
|
|
||||||
TYPE_PIT8254
|
|
||||||
};
|
|
||||||
|
|
||||||
struct pit8253_interface
|
#define MCFG_PIT8253_OUT0_HANDLER(_devcb) \
|
||||||
{
|
devcb = &pit8253_device::set_out0_handler(*device, DEVCB2_##_devcb);
|
||||||
struct
|
|
||||||
{
|
|
||||||
double clockin; /* timer clock */
|
|
||||||
devcb_read_line in_gate_func; /* gate signal */
|
|
||||||
devcb_write_line out_out_func; /* out signal */
|
|
||||||
} m_intf_timer[3];
|
|
||||||
};
|
|
||||||
|
|
||||||
|
#define MCFG_PIT8253_OUT1_HANDLER(_devcb) \
|
||||||
|
devcb = &pit8253_device::set_out1_handler(*device, DEVCB2_##_devcb);
|
||||||
|
|
||||||
|
#define MCFG_PIT8253_OUT2_HANDLER(_devcb) \
|
||||||
|
devcb = &pit8253_device::set_out2_handler(*device, DEVCB2_##_devcb);
|
||||||
|
|
||||||
|
|
||||||
struct pit8253_timer
|
struct pit8253_timer
|
||||||
@ -78,26 +78,27 @@ struct pit8253_timer
|
|||||||
UINT32 cycles_to_output; /* cycles until output callback called */
|
UINT32 cycles_to_output; /* cycles until output callback called */
|
||||||
};
|
};
|
||||||
|
|
||||||
class pit8253_device : public device_t,
|
class pit8253_device : public device_t
|
||||||
public pit8253_interface
|
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
pit8253_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
pit8253_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||||
pit8253_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
pit8253_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||||
~pit8253_device() {}
|
~pit8253_device() {}
|
||||||
|
|
||||||
|
// static configuration helpers
|
||||||
|
static void set_clk0(device_t &device, double clk0) { downcast<pit8253_device &>(device).m_clk0 = clk0; }
|
||||||
|
static void set_clk1(device_t &device, double clk1) { downcast<pit8253_device &>(device).m_clk1 = clk1; }
|
||||||
|
static void set_clk2(device_t &device, double clk2) { downcast<pit8253_device &>(device).m_clk2 = clk2; }
|
||||||
|
template<class _Object> static devcb2_base &set_out0_handler(device_t &device, _Object object) { return downcast<pit8253_device &>(device).m_out0_handler.set_callback(object); }
|
||||||
|
template<class _Object> static devcb2_base &set_out1_handler(device_t &device, _Object object) { return downcast<pit8253_device &>(device).m_out1_handler.set_callback(object); }
|
||||||
|
template<class _Object> static devcb2_base &set_out2_handler(device_t &device, _Object object) { return downcast<pit8253_device &>(device).m_out2_handler.set_callback(object); }
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(read);
|
DECLARE_READ8_MEMBER(read);
|
||||||
DECLARE_WRITE8_MEMBER(write);
|
DECLARE_WRITE8_MEMBER(write);
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(clk0_w);
|
WRITE_LINE_MEMBER(write_gate0);
|
||||||
WRITE_LINE_MEMBER(clk1_w);
|
WRITE_LINE_MEMBER(write_gate1);
|
||||||
WRITE_LINE_MEMBER(clk2_w);
|
WRITE_LINE_MEMBER(write_gate2);
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(gate0_w);
|
|
||||||
WRITE_LINE_MEMBER(gate1_w);
|
|
||||||
WRITE_LINE_MEMBER(gate2_w);
|
|
||||||
|
|
||||||
|
|
||||||
/* In the 8253/8254 the CLKx input lines can be attached to a regular clock
|
/* In the 8253/8254 the CLKx input lines can be attached to a regular clock
|
||||||
signal. Another option is to use the output from one timer as the input
|
signal. Another option is to use the output from one timer as the input
|
||||||
@ -109,20 +110,23 @@ public:
|
|||||||
to 0 with pit8253_set_clockin and call pit8253_clkX_w to change
|
to 0 with pit8253_set_clockin and call pit8253_clkX_w to change
|
||||||
the state of the input CLKx signal.
|
the state of the input CLKx signal.
|
||||||
*/
|
*/
|
||||||
int get_output(int timer);
|
WRITE_LINE_MEMBER(write_clk0);
|
||||||
void set_clockin(int timer, double new_clockin);
|
WRITE_LINE_MEMBER(write_clk1);
|
||||||
|
WRITE_LINE_MEMBER(write_clk2);
|
||||||
|
|
||||||
|
void set_clockin(int timer, double new_clockin);
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// device-level overrides
|
// device-level overrides
|
||||||
virtual void device_config_complete();
|
|
||||||
virtual void device_start();
|
virtual void device_start();
|
||||||
virtual void device_reset();
|
virtual void device_reset();
|
||||||
|
|
||||||
|
|
||||||
// internal state
|
// internal state
|
||||||
void common_start(int device_type);
|
void readback(pit8253_timer *timer, int command);
|
||||||
|
virtual void readback_command(UINT8 data);
|
||||||
pit8253_timer *get_timer(int which);
|
pit8253_timer *get_timer(int which);
|
||||||
|
|
||||||
|
private:
|
||||||
int pit8253_gate(pit8253_timer *timer);
|
int pit8253_gate(pit8253_timer *timer);
|
||||||
void decrease_counter_value(pit8253_timer *timer, UINT64 cycles);
|
void decrease_counter_value(pit8253_timer *timer, UINT64 cycles);
|
||||||
void load_counter_value(pit8253_timer *timer);
|
void load_counter_value(pit8253_timer *timer);
|
||||||
@ -132,17 +136,27 @@ protected:
|
|||||||
void update(pit8253_timer *timer);
|
void update(pit8253_timer *timer);
|
||||||
UINT16 masked_value(pit8253_timer *timer);
|
UINT16 masked_value(pit8253_timer *timer);
|
||||||
void load_count(pit8253_timer *timer, UINT16 newcount);
|
void load_count(pit8253_timer *timer, UINT16 newcount);
|
||||||
void readback(pit8253_timer *timer, int command);
|
|
||||||
void gate_w(int gate, int state);
|
void gate_w(int gate, int state);
|
||||||
void set_clock_signal(int timerno, int state);
|
void set_clock_signal(int timerno, int state);
|
||||||
|
|
||||||
TIMER_CALLBACK_MEMBER(update_timer_cb);
|
TIMER_CALLBACK_MEMBER(update_timer_cb);
|
||||||
|
|
||||||
int m_device_type;
|
enum
|
||||||
|
{
|
||||||
pit8253_timer m_timers[PIT8253_MAX_TIMER];
|
PIT8253_MAX_TIMER = 3
|
||||||
};
|
};
|
||||||
|
|
||||||
|
pit8253_timer m_timers[PIT8253_MAX_TIMER];
|
||||||
|
|
||||||
|
double m_clk0;
|
||||||
|
double m_clk1;
|
||||||
|
double m_clk2;
|
||||||
|
devcb2_write_line m_out0_handler;
|
||||||
|
devcb2_write_line m_out1_handler;
|
||||||
|
devcb2_write_line m_out2_handler;
|
||||||
|
};
|
||||||
|
|
||||||
|
extern const device_type PIT8253;
|
||||||
|
|
||||||
|
|
||||||
class pit8254_device : public pit8253_device
|
class pit8254_device : public pit8253_device
|
||||||
@ -151,28 +165,9 @@ public:
|
|||||||
pit8254_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
pit8254_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// device-level overrides
|
virtual void readback_command(UINT8 data);
|
||||||
virtual void device_start();
|
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
extern const device_type PIT8253;
|
|
||||||
extern const device_type PIT8254;
|
extern const device_type PIT8254;
|
||||||
|
|
||||||
|
|
||||||
/***************************************************************************
|
|
||||||
DEVICE CONFIGURATION MACROS
|
|
||||||
***************************************************************************/
|
|
||||||
|
|
||||||
#define MCFG_PIT8253_ADD(_tag, _intrf) \
|
|
||||||
MCFG_DEVICE_ADD(_tag, PIT8253, 0) \
|
|
||||||
MCFG_DEVICE_CONFIG(_intrf)
|
|
||||||
|
|
||||||
|
|
||||||
#define MCFG_PIT8254_ADD(_tag, _intrf) \
|
|
||||||
MCFG_DEVICE_ADD(_tag, PIT8254, 0) \
|
|
||||||
MCFG_DEVICE_CONFIG(_intrf)
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* __PIT8253_H__ */
|
#endif /* __PIT8253_H__ */
|
||||||
|
@ -96,26 +96,32 @@ WRITE_LINE_MEMBER(leland_80186_sound_device::pit0_2_w)
|
|||||||
{
|
{
|
||||||
set_clock_line(2, state);
|
set_clock_line(2, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(leland_80186_sound_device::pit1_0_w)
|
WRITE_LINE_MEMBER(leland_80186_sound_device::pit1_0_w)
|
||||||
{
|
{
|
||||||
set_clock_line(3, state);
|
set_clock_line(3, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(leland_80186_sound_device::pit1_1_w)
|
WRITE_LINE_MEMBER(leland_80186_sound_device::pit1_1_w)
|
||||||
{
|
{
|
||||||
set_clock_line(4, state);
|
set_clock_line(4, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(leland_80186_sound_device::pit1_2_w)
|
WRITE_LINE_MEMBER(leland_80186_sound_device::pit1_2_w)
|
||||||
{
|
{
|
||||||
set_clock_line(5, state);
|
set_clock_line(5, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(leland_80186_sound_device::pit2_0_w)
|
WRITE_LINE_MEMBER(leland_80186_sound_device::pit2_0_w)
|
||||||
{
|
{
|
||||||
set_clock_line(5, state);
|
set_clock_line(5, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(leland_80186_sound_device::i80186_tmr0_w)
|
WRITE_LINE_MEMBER(leland_80186_sound_device::i80186_tmr0_w)
|
||||||
{
|
{
|
||||||
set_clock_line(6, state);
|
set_clock_line(6, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(leland_80186_sound_device::i80186_tmr1_w)
|
WRITE_LINE_MEMBER(leland_80186_sound_device::i80186_tmr1_w)
|
||||||
{
|
{
|
||||||
if(state)
|
if(state)
|
||||||
@ -128,108 +134,27 @@ WRITE_LINE_MEMBER(leland_80186_sound_device::i80186_tmr1_w)
|
|||||||
}
|
}
|
||||||
set_clock_line(7, state);
|
set_clock_line(7, state);
|
||||||
}
|
}
|
||||||
const struct pit8253_interface leland_pit0_interface =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(":audiocpu", i80186_cpu_device, drq0_w)
|
|
||||||
}, {
|
|
||||||
4000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(":audiocpu", i80186_cpu_device, drq1_w)
|
|
||||||
}, {
|
|
||||||
4000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit0_2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
const struct pit8253_interface leland_pit1_interface =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit1_0_w)
|
|
||||||
}, {
|
|
||||||
4000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit1_1_w)
|
|
||||||
}, {
|
|
||||||
4000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit1_2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
const struct pit8253_interface redline_pit0_interface =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(":audiocpu", i80186_cpu_device, drq0_w)
|
|
||||||
}, {
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(":audiocpu", i80186_cpu_device, drq1_w)
|
|
||||||
}, {
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit0_2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
const struct pit8253_interface redline_pit1_interface =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit1_0_w)
|
|
||||||
}, {
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit1_1_w)
|
|
||||||
}, {
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
const struct pit8253_interface redline_pit2_interface =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, leland_80186_sound_device, pit2_0_w)
|
|
||||||
}, {
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
7000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( leland_80186_sound )
|
static MACHINE_CONFIG_FRAGMENT( leland_80186_sound )
|
||||||
MCFG_SPEAKER_STANDARD_MONO("speaker")
|
MCFG_SPEAKER_STANDARD_MONO("speaker")
|
||||||
MCFG_SOUND_ADD("dac", DAC, 0)
|
MCFG_SOUND_ADD("dac", DAC, 0)
|
||||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.00)
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.00)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD("pit0", leland_pit0_interface)
|
MCFG_DEVICE_ADD("pit0", PIT8254, 0)
|
||||||
MCFG_PIT8254_ADD("pit1", leland_pit1_interface)
|
MCFG_PIT8253_CLK0(4000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq1_w))
|
||||||
|
MCFG_PIT8253_CLK2(4000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(leland_80186_sound_device, pit0_2_w))
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit1", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(leland_80186_sound_device, pit1_0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(leland_80186_sound_device, pit1_1_w))
|
||||||
|
MCFG_PIT8253_CLK2(4000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(leland_80186_sound_device, pit1_2_w))
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( redline_80186_sound )
|
static MACHINE_CONFIG_FRAGMENT( redline_80186_sound )
|
||||||
@ -237,9 +162,23 @@ static MACHINE_CONFIG_FRAGMENT( redline_80186_sound )
|
|||||||
MCFG_SOUND_ADD("dac", DAC, 0)
|
MCFG_SOUND_ADD("dac", DAC, 0)
|
||||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.00)
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.00)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD("pit0", redline_pit0_interface)
|
MCFG_DEVICE_ADD("pit0", PIT8254, 0)
|
||||||
MCFG_PIT8254_ADD("pit1", redline_pit1_interface)
|
MCFG_PIT8253_CLK0(7000000)
|
||||||
MCFG_PIT8254_ADD("pit2", redline_pit2_interface)
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq0_w))
|
||||||
|
MCFG_PIT8253_CLK1(7000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq1_w))
|
||||||
|
MCFG_PIT8253_CLK2(7000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(leland_80186_sound_device, pit0_2_w))
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit1", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(7000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(leland_80186_sound_device, pit1_0_w))
|
||||||
|
MCFG_PIT8253_CLK1(7000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(leland_80186_sound_device, pit1_1_w))
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit2", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(7000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(leland_80186_sound_device, pit1_2_w))
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( ataxx_80186_sound )
|
static MACHINE_CONFIG_FRAGMENT( ataxx_80186_sound )
|
||||||
@ -247,7 +186,13 @@ static MACHINE_CONFIG_FRAGMENT( ataxx_80186_sound )
|
|||||||
MCFG_SOUND_ADD("dac", DAC, 0)
|
MCFG_SOUND_ADD("dac", DAC, 0)
|
||||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.00)
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.00)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD("pit0", leland_pit0_interface)
|
MCFG_DEVICE_ADD("pit0", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq1_w))
|
||||||
|
MCFG_PIT8253_CLK2(4000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(leland_80186_sound_device, pit0_2_w))
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( wsf_80186_sound )
|
static MACHINE_CONFIG_FRAGMENT( wsf_80186_sound )
|
||||||
@ -260,7 +205,13 @@ static MACHINE_CONFIG_FRAGMENT( wsf_80186_sound )
|
|||||||
MCFG_SOUND_ROUTE(0, "speaker", 0.40)
|
MCFG_SOUND_ROUTE(0, "speaker", 0.40)
|
||||||
MCFG_SOUND_ROUTE(1, "speaker", 0.40)
|
MCFG_SOUND_ROUTE(1, "speaker", 0.40)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD("pit0", leland_pit0_interface)
|
MCFG_DEVICE_ADD("pit0", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("audiocpu", i80186_cpu_device, drq1_w))
|
||||||
|
MCFG_PIT8253_CLK2(4000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(leland_80186_sound_device, pit0_2_w))
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
machine_config_constructor leland_80186_sound_device::device_mconfig_additions() const
|
machine_config_constructor leland_80186_sound_device::device_mconfig_additions() const
|
||||||
|
@ -3689,25 +3689,6 @@ WRITE_LINE_MEMBER(chihiro_state::chihiro_pit8254_out2_changed)
|
|||||||
//chihiro_speaker_set_input( state ? 1 : 0 );
|
//chihiro_speaker_set_input( state ? 1 : 0 );
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface chihiro_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
1125000, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(chihiro_state, chihiro_pit8254_out0_changed)
|
|
||||||
}, {
|
|
||||||
1125000, /* (unused) dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
1125000, /* (unused) pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(chihiro_state, chihiro_pit8254_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SMbus devices
|
* SMbus devices
|
||||||
*/
|
*/
|
||||||
@ -3970,7 +3951,14 @@ static MACHINE_CONFIG_START( chihiro_base, chihiro_state )
|
|||||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w)
|
MCFG_PCI_BUS_LEGACY_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w)
|
||||||
MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(chihiro_state, chihiro_pic8259_1_set_int_line), VCC, READ8(chihiro_state,get_slave_ack) )
|
MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(chihiro_state, chihiro_pic8259_1_set_int_line), VCC, READ8(chihiro_state,get_slave_ack) )
|
||||||
MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
|
MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
|
||||||
MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config )
|
|
||||||
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(1125000) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(chihiro_state, chihiro_pit8254_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(1125000) /* (unused) dram refresh */
|
||||||
|
MCFG_PIT8253_CLK2(1125000) /* (unused) pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(chihiro_state, chihiro_pit8254_out2_changed))
|
||||||
|
|
||||||
MCFG_BUS_MASTER_IDE_CONTROLLER_ADD( "ide", ide_baseboard, NULL, "bb", true)
|
MCFG_BUS_MASTER_IDE_CONTROLLER_ADD( "ide", ide_baseboard, NULL, "bb", true)
|
||||||
MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
|
MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
|
||||||
MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE("maincpu", AS_PROGRAM)
|
MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE("maincpu", AS_PROGRAM)
|
||||||
|
@ -302,49 +302,6 @@ static MC6845_INTERFACE( mc6845_intf )
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
/* TODO: clocks aren't known */
|
|
||||||
static const struct pit8253_interface laserbas_pit8253_intf_0 =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct pit8253_interface laserbas_pit8253_intf_1 =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( laserbas, laserbas_state )
|
static MACHINE_CONFIG_START( laserbas, laserbas_state )
|
||||||
|
|
||||||
MCFG_CPU_ADD("maincpu", Z80, 4000000)
|
MCFG_CPU_ADD("maincpu", Z80, 4000000)
|
||||||
@ -353,9 +310,16 @@ static MACHINE_CONFIG_START( laserbas, laserbas_state )
|
|||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", laserbas_state, irq0_line_hold)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", laserbas_state, irq0_line_hold)
|
||||||
// MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi", laserbas_state, nmi_line_pulse, attotime::from_hz(60))
|
// MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi", laserbas_state, nmi_line_pulse, attotime::from_hz(60))
|
||||||
|
|
||||||
MCFG_PIT8253_ADD("pit0", laserbas_pit8253_intf_0)
|
/* TODO: clocks aren't known */
|
||||||
MCFG_PIT8253_ADD("pit1", laserbas_pit8253_intf_1)
|
MCFG_DEVICE_ADD("pit0", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(31250)
|
||||||
|
MCFG_PIT8253_CLK1(31250)
|
||||||
|
MCFG_PIT8253_CLK2(31250)
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit1", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(31250)
|
||||||
|
MCFG_PIT8253_CLK1(31250)
|
||||||
|
MCFG_PIT8253_CLK2(31250)
|
||||||
|
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_REFRESH_RATE(60)
|
MCFG_SCREEN_REFRESH_RATE(60)
|
||||||
|
@ -92,7 +92,7 @@ public:
|
|||||||
int m_dma_channel;
|
int m_dma_channel;
|
||||||
UINT8 m_dma_offset[2][4];
|
UINT8 m_dma_offset[2][4];
|
||||||
UINT8 m_at_pages[0x10];
|
UINT8 m_at_pages[0x10];
|
||||||
UINT8 m_pc_spkrdata, m_pc_input;
|
UINT8 m_pc_spkrdata, m_pit_out2;
|
||||||
|
|
||||||
required_device<pit8253_device> m_pit8253;
|
required_device<pit8253_device> m_pit8253;
|
||||||
required_device<pic8259_device> m_pic8259_1;
|
required_device<pic8259_device> m_pic8259_1;
|
||||||
@ -129,7 +129,6 @@ public:
|
|||||||
IRQ_CALLBACK_MEMBER(irq_callback);
|
IRQ_CALLBACK_MEMBER(irq_callback);
|
||||||
UINT8 pcxt_speaker_get_spk();
|
UINT8 pcxt_speaker_get_spk();
|
||||||
void pcxt_speaker_set_spkrdata(UINT8 data);
|
void pcxt_speaker_set_spkrdata(UINT8 data);
|
||||||
void pcxt_speaker_set_input(UINT8 data);
|
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<speaker_sound_device> m_speaker;
|
required_device<speaker_sound_device> m_speaker;
|
||||||
};
|
};
|
||||||
@ -243,7 +242,7 @@ Pit8253
|
|||||||
// pc_speaker_get_spk, pc_speaker_set_spkrdata, and pc_speaker_set_input already exists in MESS, can the implementations be merged?
|
// pc_speaker_get_spk, pc_speaker_set_spkrdata, and pc_speaker_set_input already exists in MESS, can the implementations be merged?
|
||||||
UINT8 pcxt_state::pcxt_speaker_get_spk()
|
UINT8 pcxt_state::pcxt_speaker_get_spk()
|
||||||
{
|
{
|
||||||
return m_pc_spkrdata & m_pc_input;
|
return m_pc_spkrdata & m_pit_out2;
|
||||||
}
|
}
|
||||||
|
|
||||||
void pcxt_state::pcxt_speaker_set_spkrdata(UINT8 data)
|
void pcxt_state::pcxt_speaker_set_spkrdata(UINT8 data)
|
||||||
@ -252,39 +251,14 @@ void pcxt_state::pcxt_speaker_set_spkrdata(UINT8 data)
|
|||||||
m_speaker->level_w(pcxt_speaker_get_spk());
|
m_speaker->level_w(pcxt_speaker_get_spk());
|
||||||
}
|
}
|
||||||
|
|
||||||
void pcxt_state::pcxt_speaker_set_input(UINT8 data)
|
|
||||||
{
|
|
||||||
m_pc_input = data ? 1 : 0;
|
|
||||||
m_speaker->level_w(pcxt_speaker_get_spk());
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(pcxt_state::ibm5150_pit8253_out2_changed)
|
WRITE_LINE_MEMBER(pcxt_state::ibm5150_pit8253_out2_changed)
|
||||||
{
|
{
|
||||||
pcxt_speaker_set_input(state);
|
m_pit_out2 = state ? 1 : 0;
|
||||||
|
m_speaker->level_w(pcxt_speaker_get_spk());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static const struct pit8253_interface pc_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_14_31818MHz/12, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pcxt_state,ibm5150_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
READ8_MEMBER(pcxt_state::port_a_r)
|
READ8_MEMBER(pcxt_state::port_a_r)
|
||||||
{
|
{
|
||||||
if(!(m_port_b_data & 0x80))//???
|
if(!(m_port_b_data & 0x80))//???
|
||||||
@ -314,12 +288,11 @@ READ8_MEMBER(pcxt_state::port_b_r)
|
|||||||
|
|
||||||
READ8_MEMBER(pcxt_state::port_c_r)
|
READ8_MEMBER(pcxt_state::port_c_r)
|
||||||
{
|
{
|
||||||
int timer2_output = m_pit8253->get_output(2);
|
|
||||||
if ( m_port_b_data & 0x01 )
|
if ( m_port_b_data & 0x01 )
|
||||||
{
|
{
|
||||||
m_wss2_data = ( m_wss2_data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
|
m_wss2_data = ( m_wss2_data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
|
||||||
}
|
}
|
||||||
m_wss2_data = ( m_wss2_data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
m_wss2_data = ( m_wss2_data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
|
|
||||||
return m_wss2_data;//TODO
|
return m_wss2_data;//TODO
|
||||||
}
|
}
|
||||||
@ -330,7 +303,7 @@ READ8_MEMBER(pcxt_state::port_c_r)
|
|||||||
WRITE8_MEMBER(pcxt_state::port_b_w)
|
WRITE8_MEMBER(pcxt_state::port_b_w)
|
||||||
{
|
{
|
||||||
/* PPI controller port B*/
|
/* PPI controller port B*/
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pcxt_speaker_set_spkrdata( data & 0x02 );
|
pcxt_speaker_set_spkrdata( data & 0x02 );
|
||||||
m_port_b_data = data;
|
m_port_b_data = data;
|
||||||
// device_t *beep = machine().device<beep_device>("beep");
|
// device_t *beep = machine().device<beep_device>("beep");
|
||||||
@ -691,7 +664,7 @@ void pcxt_state::machine_reset()
|
|||||||
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pcxt_state::irq_callback),this));
|
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pcxt_state::irq_callback),this));
|
||||||
|
|
||||||
m_pc_spkrdata = 0;
|
m_pc_spkrdata = 0;
|
||||||
m_pc_input = 0;
|
m_pit_out2 = 0;
|
||||||
m_wss2_data = 0;
|
m_wss2_data = 0;
|
||||||
m_speaker->level_w(0);
|
m_speaker->level_w(0);
|
||||||
}
|
}
|
||||||
@ -701,8 +674,12 @@ static MACHINE_CONFIG_START( filetto, pcxt_state )
|
|||||||
MCFG_CPU_PROGRAM_MAP(filetto_map)
|
MCFG_CPU_PROGRAM_MAP(filetto_map)
|
||||||
MCFG_CPU_IO_MAP(filetto_io)
|
MCFG_CPU_IO_MAP(filetto_io)
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
MCFG_PIT8253_ADD( "pit8253", pc_pit8253_config )
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259_1", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pcxt_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8255A_ADD( "ppi8255_0", ppi8255_0_intf )
|
MCFG_I8255A_ADD( "ppi8255_0", ppi8255_0_intf )
|
||||||
MCFG_I8255A_ADD( "ppi8255_1", ppi8255_1_intf )
|
MCFG_I8255A_ADD( "ppi8255_1", ppi8255_1_intf )
|
||||||
|
@ -122,7 +122,12 @@ static MACHINE_CONFIG_START( vertigo, vertigo_state )
|
|||||||
|
|
||||||
MCFG_FRAGMENT_ADD(exidy440_audio)
|
MCFG_FRAGMENT_ADD(exidy440_audio)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD( "pit8254", vertigo_pit8254_config )
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(240000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(vertigo_state, v_irq4_w))
|
||||||
|
MCFG_PIT8253_CLK1(240000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(vertigo_state, v_irq3_w))
|
||||||
|
MCFG_PIT8253_CLK2(240000)
|
||||||
|
|
||||||
MCFG_74148_ADD( "74148", vertigo_ttl74148_intf )
|
MCFG_74148_ADD( "74148", vertigo_ttl74148_intf )
|
||||||
|
|
||||||
|
@ -141,5 +141,3 @@ public:
|
|||||||
/*----------- defined in machine/vertigo.c -----------*/
|
/*----------- defined in machine/vertigo.c -----------*/
|
||||||
|
|
||||||
void vertigo_update_irq(device_t *device);
|
void vertigo_update_irq(device_t *device);
|
||||||
|
|
||||||
extern const struct pit8253_interface vertigo_pit8254_config;
|
|
||||||
|
@ -15,7 +15,6 @@
|
|||||||
#include "cpu/i386/i386.h"
|
#include "cpu/i386/i386.h"
|
||||||
#include "machine/pcshare.h"
|
#include "machine/pcshare.h"
|
||||||
#include "machine/pckeybrd.h"
|
#include "machine/pckeybrd.h"
|
||||||
#include "machine/8042kbdc.h"
|
|
||||||
#include "machine/mc146818.h"
|
#include "machine/mc146818.h"
|
||||||
#include "machine/idectrl.h"
|
#include "machine/idectrl.h"
|
||||||
|
|
||||||
@ -157,48 +156,20 @@ IRQ_CALLBACK_MEMBER(pcat_base_state::irq_callback)
|
|||||||
return m_pic8259_1->acknowledge();
|
return m_pic8259_1->acknowledge();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( pcat_base_state::at_pit8254_out0_changed )
|
|
||||||
{
|
|
||||||
m_pic8259_1->ir0_w(state);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( pcat_base_state::at_pit8254_out2_changed )
|
WRITE_LINE_MEMBER( pcat_base_state::at_pit8254_out2_changed )
|
||||||
{
|
{
|
||||||
|
m_pit_out2 = state;
|
||||||
//at_speaker_set_input( state ? 1 : 0 );
|
//at_speaker_set_input( state ? 1 : 0 );
|
||||||
|
m_kbdc->write_out2(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static const struct pit8253_interface at_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4772720/4, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pcat_base_state, at_pit8254_out0_changed)
|
|
||||||
}, {
|
|
||||||
4772720/4, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
4772720/4, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pcat_base_state, at_pit8254_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/*************************************************************
|
/*************************************************************
|
||||||
*
|
*
|
||||||
* Keyboard
|
* Keyboard
|
||||||
*
|
*
|
||||||
*************************************************************/
|
*************************************************************/
|
||||||
|
|
||||||
READ8_MEMBER(pcat_base_state::get_out2)
|
|
||||||
{
|
|
||||||
return m_pit8254->get_output(2);
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct kbdc8042_interface at8042 =
|
static const struct kbdc8042_interface at8042 =
|
||||||
{
|
{
|
||||||
KBDC8042_AT386,
|
KBDC8042_AT386,
|
||||||
@ -207,8 +178,7 @@ static const struct kbdc8042_interface at8042 =
|
|||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w),
|
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w),
|
||||||
DEVCB_NULL,
|
DEVCB_NULL,
|
||||||
|
|
||||||
DEVCB_NULL,
|
DEVCB_NULL
|
||||||
DEVCB_DRIVER_MEMBER(pcat_base_state,get_out2)
|
|
||||||
};
|
};
|
||||||
|
|
||||||
ADDRESS_MAP_START( pcat32_io_common, AS_IO, 32, pcat_base_state )
|
ADDRESS_MAP_START( pcat32_io_common, AS_IO, 32, pcat_base_state )
|
||||||
@ -227,7 +197,14 @@ MACHINE_CONFIG_FRAGMENT(pcat_common)
|
|||||||
MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
|
MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
|
||||||
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
|
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
|
||||||
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
|
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
|
||||||
MCFG_PIT8254_ADD( "pit8254", at_pit8254_config )
|
|
||||||
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259_1", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
|
||||||
|
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pcat_base_state, at_pit8254_out2_changed))
|
||||||
|
|
||||||
MCFG_MC146818_ADD("rtc", XTAL_32_768kHz)
|
MCFG_MC146818_ADD("rtc", XTAL_32_768kHz)
|
||||||
MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir0_w))
|
MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir0_w))
|
||||||
MCFG_MC146818_CENTURY_INDEX(0x32)
|
MCFG_MC146818_CENTURY_INDEX(0x32)
|
||||||
|
@ -2,6 +2,7 @@
|
|||||||
#include "machine/pic8259.h"
|
#include "machine/pic8259.h"
|
||||||
#include "machine/pit8253.h"
|
#include "machine/pit8253.h"
|
||||||
#include "machine/mc146818.h"
|
#include "machine/mc146818.h"
|
||||||
|
#include "machine/8042kbdc.h"
|
||||||
|
|
||||||
class pcat_base_state : public driver_device
|
class pcat_base_state : public driver_device
|
||||||
{
|
{
|
||||||
@ -14,7 +15,10 @@ public:
|
|||||||
m_pic8259_1(*this, "pic8259_1"),
|
m_pic8259_1(*this, "pic8259_1"),
|
||||||
m_pic8259_2(*this, "pic8259_2"),
|
m_pic8259_2(*this, "pic8259_2"),
|
||||||
m_pit8254(*this, "pit8254"),
|
m_pit8254(*this, "pit8254"),
|
||||||
m_mc146818(*this, "rtc") { }
|
m_mc146818(*this, "rtc"),
|
||||||
|
m_kbdc(*this, "kbdc")
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
IRQ_CALLBACK_MEMBER(irq_callback);
|
IRQ_CALLBACK_MEMBER(irq_callback);
|
||||||
|
|
||||||
@ -25,6 +29,7 @@ public:
|
|||||||
required_device<pic8259_device> m_pic8259_2;
|
required_device<pic8259_device> m_pic8259_2;
|
||||||
required_device<pit8254_device> m_pit8254;
|
required_device<pit8254_device> m_pit8254;
|
||||||
required_device<mc146818_device> m_mc146818;
|
required_device<mc146818_device> m_mc146818;
|
||||||
|
required_device<kbdc8042_device> m_kbdc;
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(at_dma8237_2_r);
|
DECLARE_READ8_MEMBER(at_dma8237_2_r);
|
||||||
DECLARE_WRITE8_MEMBER(at_dma8237_2_w);
|
DECLARE_WRITE8_MEMBER(at_dma8237_2_w);
|
||||||
@ -39,12 +44,11 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER( pc_dack2_w );
|
DECLARE_WRITE_LINE_MEMBER( pc_dack2_w );
|
||||||
DECLARE_WRITE_LINE_MEMBER( pc_dack3_w );
|
DECLARE_WRITE_LINE_MEMBER( pc_dack3_w );
|
||||||
DECLARE_READ8_MEMBER( get_slave_ack );
|
DECLARE_READ8_MEMBER( get_slave_ack );
|
||||||
DECLARE_WRITE_LINE_MEMBER( at_pit8254_out0_changed );
|
|
||||||
DECLARE_WRITE_LINE_MEMBER( at_pit8254_out2_changed );
|
DECLARE_WRITE_LINE_MEMBER( at_pit8254_out2_changed );
|
||||||
DECLARE_READ8_MEMBER(get_out2);
|
|
||||||
int m_dma_channel;
|
int m_dma_channel;
|
||||||
UINT8 m_dma_offset[2][4];
|
UINT8 m_dma_offset[2][4];
|
||||||
UINT8 m_at_pages[0x10];
|
UINT8 m_at_pages[0x10];
|
||||||
|
int m_pit_out2;
|
||||||
};
|
};
|
||||||
|
|
||||||
ADDRESS_MAP_EXTERN(pcat32_io_common, 32);
|
ADDRESS_MAP_EXTERN(pcat32_io_common, 32);
|
||||||
|
@ -22,28 +22,6 @@
|
|||||||
|
|
||||||
/* Result of the last ADC channel sampled */
|
/* Result of the last ADC channel sampled */
|
||||||
|
|
||||||
/* 8254 timer config */
|
|
||||||
const struct pit8253_interface vertigo_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
240000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(vertigo_state,v_irq4_w)
|
|
||||||
}, {
|
|
||||||
240000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(vertigo_state,v_irq3_w)
|
|
||||||
}, {
|
|
||||||
240000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
*
|
*
|
||||||
* IRQ handling. The priority encoder
|
* IRQ handling. The priority encoder
|
||||||
|
@ -255,7 +255,13 @@ static MACHINE_CONFIG_START( pc200, amstrad_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(amstrad_pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(amstrad_pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(amstrad_pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(amstrad_pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -359,7 +365,13 @@ static MACHINE_CONFIG_START( ppc512, amstrad_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(amstrad_pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(amstrad_pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(amstrad_pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(amstrad_pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
|
@ -841,24 +841,6 @@ static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, apc_state )
|
|||||||
AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_2")
|
AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_2")
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
static const struct pit8253_interface pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
MAIN_CLOCK, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir3_w)
|
|
||||||
}, {
|
|
||||||
MAIN_CLOCK, /* Memory Refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
MAIN_CLOCK, /* RS-232c */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
/*
|
/*
|
||||||
irq assignment:
|
irq assignment:
|
||||||
(note: documentation shows ODA Printer at ir7 master, but clearly everything is shifted one place due of the
|
(note: documentation shows ODA Printer at ir7 master, but clearly everything is shifted one place due of the
|
||||||
@ -1011,7 +993,12 @@ static MACHINE_CONFIG_START( apc, apc_state )
|
|||||||
MCFG_CPU_PROGRAM_MAP(apc_map)
|
MCFG_CPU_PROGRAM_MAP(apc_map)
|
||||||
MCFG_CPU_IO_MAP(apc_io)
|
MCFG_CPU_IO_MAP(apc_io)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(MAIN_CLOCK) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259_master", pic8259_device, ir3_w))
|
||||||
|
MCFG_PIT8253_CLK1(MAIN_CLOCK) /* Memory Refresh */
|
||||||
|
MCFG_PIT8253_CLK2(MAIN_CLOCK) /* RS-232c */
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(apc_state, apc_master_set_int_line), VCC, READ8(apc_state,get_slave_ack) )
|
MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(apc_state, apc_master_set_int_line), VCC, READ8(apc_state,get_slave_ack) )
|
||||||
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: check ir7_w
|
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: check ir7_w
|
||||||
MCFG_I8237_ADD("i8237", MAIN_CLOCK, dmac_intf)
|
MCFG_I8237_ADD("i8237", MAIN_CLOCK, dmac_intf)
|
||||||
|
@ -178,25 +178,6 @@ WRITE_LINE_MEMBER(apogee_state::pit8253_out2_changed)
|
|||||||
m_speaker->level_w(m_out0+m_out1+m_out2);
|
m_speaker->level_w(m_out0+m_out1+m_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct pit8253_interface apogee_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_16MHz/9,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(apogee_state,pit8253_out0_changed)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/9,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(apogee_state,pit8253_out1_changed)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/9,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(apogee_state,pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/* F4 Character Displayer */
|
/* F4 Character Displayer */
|
||||||
static const gfx_layout apogee_charlayout =
|
static const gfx_layout apogee_charlayout =
|
||||||
@ -224,7 +205,13 @@ static MACHINE_CONFIG_START( apogee, apogee_state )
|
|||||||
MCFG_CPU_PROGRAM_MAP(apogee_mem)
|
MCFG_CPU_PROGRAM_MAP(apogee_mem)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(apogee_state, radio86 )
|
MCFG_MACHINE_RESET_OVERRIDE(apogee_state, radio86 )
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", apogee_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_16MHz/9)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(apogee_state,pit8253_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz/9)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(apogee_state,pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz/9)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(apogee_state,pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi8255_1", radio86_ppi8255_interface_1 )
|
MCFG_I8255_ADD( "ppi8255_1", radio86_ppi8255_interface_1 )
|
||||||
|
|
||||||
|
@ -206,15 +206,6 @@ WRITE_LINE_MEMBER( apricot_state::timer_out2 )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface apricot_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{ XTAL_4MHz / 16, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER("ic31", pic8259_device, ir6_w) },
|
|
||||||
{ XTAL_4MHz / 2, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(apricot_state, timer_out1) },
|
|
||||||
{ XTAL_4MHz / 2, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(apricot_state, timer_out2) }
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static Z80SIO_INTERFACE( apricot_z80sio_intf )
|
static Z80SIO_INTERFACE( apricot_z80sio_intf )
|
||||||
{
|
{
|
||||||
0, 0,
|
0, 0,
|
||||||
@ -417,7 +408,15 @@ static MACHINE_CONFIG_START( apricot, apricot_state )
|
|||||||
// devices
|
// devices
|
||||||
MCFG_I8255A_ADD("ic17", apricot_i8255a_intf)
|
MCFG_I8255A_ADD("ic17", apricot_i8255a_intf)
|
||||||
MCFG_PIC8259_ADD("ic31", INPUTLINE("ic91", 0), VCC, NULL)
|
MCFG_PIC8259_ADD("ic31", INPUTLINE("ic91", 0), VCC, NULL)
|
||||||
MCFG_PIT8253_ADD("ic16", apricot_pit8253_intf)
|
|
||||||
|
MCFG_DEVICE_ADD("ic16", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_4MHz / 16)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("ic31", pic8259_device, ir6_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_4MHz / 2)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(apricot_state, timer_out1))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_4MHz / 2)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(apricot_state, timer_out2))
|
||||||
|
|
||||||
MCFG_Z80SIO0_ADD("ic15", XTAL_15MHz / 6, apricot_z80sio_intf)
|
MCFG_Z80SIO0_ADD("ic15", XTAL_15MHz / 6, apricot_z80sio_intf)
|
||||||
|
|
||||||
// rs232 port
|
// rs232 port
|
||||||
|
@ -436,30 +436,6 @@ static APRICOT_KEYBOARD_INTERFACE( kb_intf )
|
|||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
2000000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
2000000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// I8237_INTERFACE( dmac_intf )
|
// I8237_INTERFACE( dmac_intf )
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -639,7 +615,13 @@ static MACHINE_CONFIG_START( fp, fp_state )
|
|||||||
MCFG_APRICOT_KEYBOARD_ADD(kb_intf)
|
MCFG_APRICOT_KEYBOARD_ADD(kb_intf)
|
||||||
MCFG_I8237_ADD(I8237_TAG, 250000, dmac_intf)
|
MCFG_I8237_ADD(I8237_TAG, 250000, dmac_intf)
|
||||||
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
||||||
MCFG_PIT8253_ADD(I8253A5_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(I8253A5_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(2000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8259A_TAG, pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_CLK2(2000000)
|
||||||
|
|
||||||
MCFG_Z80SIO0_ADD(Z80SIO0_TAG, 2500000, sio_intf)
|
MCFG_Z80SIO0_ADD(Z80SIO0_TAG, 2500000, sio_intf)
|
||||||
MCFG_WD2797x_ADD(WD2797_TAG, 2000000)
|
MCFG_WD2797x_ADD(WD2797_TAG, 2000000)
|
||||||
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG":0", fp_floppies, "35dd", floppy_image_device::default_floppy_formats)
|
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG":0", fp_floppies, "35dd", floppy_image_device::default_floppy_formats)
|
||||||
|
@ -336,7 +336,12 @@ static MACHINE_CONFIG_FRAGMENT( at_motherboard )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(at_state, at )
|
MCFG_MACHINE_START_OVERRIDE(at_state, at )
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(at_state, at )
|
MCFG_MACHINE_RESET_OVERRIDE(at_state, at )
|
||||||
|
|
||||||
MCFG_PIT8254_ADD( "pit8254", at_pit8254_config )
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(at_state, at_pit8254_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
|
||||||
|
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(at_state, at_pit8254_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config )
|
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config )
|
||||||
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config )
|
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config )
|
||||||
|
@ -198,7 +198,13 @@ static MACHINE_CONFIG_START( b2m, b2m_state )
|
|||||||
|
|
||||||
MCFG_PALETTE_LENGTH(4)
|
MCFG_PALETTE_LENGTH(4)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", b2m_pit8253_intf )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(0)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir1_w))
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(b2m_state,bm2_pit_out1))
|
||||||
|
MCFG_PIT8253_CLK2(2000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("pit8253", pit8253_device, write_clk0))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi8255_1", b2m_ppi8255_interface_1 )
|
MCFG_I8255_ADD( "ppi8255_1", b2m_ppi8255_interface_1 )
|
||||||
|
|
||||||
|
@ -155,11 +155,6 @@ WRITE_LINE_MEMBER(bebox_state::bebox_keyboard_interrupt)
|
|||||||
m_pic8259_1->ir1_w(state);
|
m_pic8259_1->ir1_w(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(bebox_state::bebox_get_out2)
|
|
||||||
{
|
|
||||||
return m_pit8254->get_output(2);
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct kbdc8042_interface bebox_8042_interface =
|
static const struct kbdc8042_interface bebox_8042_interface =
|
||||||
{
|
{
|
||||||
KBDC8042_STANDARD,
|
KBDC8042_STANDARD,
|
||||||
@ -168,8 +163,7 @@ static const struct kbdc8042_interface bebox_8042_interface =
|
|||||||
DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_keyboard_interrupt),
|
DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_keyboard_interrupt),
|
||||||
DEVCB_NULL,
|
DEVCB_NULL,
|
||||||
|
|
||||||
DEVCB_NULL,
|
DEVCB_NULL
|
||||||
DEVCB_DRIVER_MEMBER(bebox_state,bebox_get_out2)
|
|
||||||
};
|
};
|
||||||
|
|
||||||
static SLOT_INTERFACE_START( pci_devices )
|
static SLOT_INTERFACE_START( pci_devices )
|
||||||
@ -187,7 +181,12 @@ static MACHINE_CONFIG_START( bebox, bebox_state )
|
|||||||
|
|
||||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||||
|
|
||||||
MCFG_PIT8254_ADD( "pit8254", bebox_pit8254_config )
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(bebox_state, bebox_timer0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
|
||||||
|
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("kbdc", kbdc8042_device, write_out2))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, bebox_dma8237_1_config )
|
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, bebox_dma8237_1_config )
|
||||||
|
|
||||||
|
@ -469,27 +469,6 @@ WRITE_LINE_MEMBER( bw12_state::pit_out2_w )
|
|||||||
m_pit_out2 = state;
|
m_pit_out2 = state;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_1_8432MHz,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(bw12_state, pit_out0_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_1_8432MHz,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(Z80SIO_TAG, z80dart_device, rxtxcb_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_1_8432MHz,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(bw12_state, pit_out2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/* AY-5-3600-PRO-002 Interface */
|
/* AY-5-3600-PRO-002 Interface */
|
||||||
|
|
||||||
READ_LINE_MEMBER( bw12_state::ay3600_shift_r )
|
READ_LINE_MEMBER( bw12_state::ay3600_shift_r )
|
||||||
@ -630,7 +609,15 @@ static MACHINE_CONFIG_START( common, bw12_state )
|
|||||||
MCFG_PIA_IRQB_HANDLER(DEVWRITELINE(Z80_TAG, z80_device, irq_line))
|
MCFG_PIA_IRQB_HANDLER(DEVWRITELINE(Z80_TAG, z80_device, irq_line))
|
||||||
|
|
||||||
MCFG_Z80SIO0_ADD(Z80SIO_TAG, XTAL_16MHz/4, sio_intf)
|
MCFG_Z80SIO0_ADD(Z80SIO_TAG, XTAL_16MHz/4, sio_intf)
|
||||||
MCFG_PIT8253_ADD(PIT8253_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(PIT8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_1_8432MHz)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(bw12_state, pit_out0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_1_8432MHz)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_1_8432MHz)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(bw12_state, pit_out2_w))
|
||||||
|
|
||||||
MCFG_DEVICE_ADD(AY3600PRO002_TAG, AY3600, 0)
|
MCFG_DEVICE_ADD(AY3600PRO002_TAG, AY3600, 0)
|
||||||
MCFG_AY3600_MATRIX_X0(IOPORT("X0"))
|
MCFG_AY3600_MATRIX_X0(IOPORT("X0"))
|
||||||
MCFG_AY3600_MATRIX_X1(IOPORT("X1"))
|
MCFG_AY3600_MATRIX_X1(IOPORT("X1"))
|
||||||
|
@ -528,27 +528,6 @@ WRITE_LINE_MEMBER( bw2_state::mtron_w )
|
|||||||
if (m_floppy) m_floppy->mon_w(m_mtron);
|
if (m_floppy) m_floppy->mon_w(m_mtron);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_16MHz/4, // 8251 USART TXC, RXC
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(bw2_state, pit_out0_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
11000, // LCD controller
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8253_TAG, pit8253_device, clk2_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
0, // Floppy /MTRON
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(bw2_state, mtron_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// floppy_format_type floppy_formats
|
// floppy_format_type floppy_formats
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -639,7 +618,14 @@ static MACHINE_CONFIG_START( bw2, bw2_state )
|
|||||||
MCFG_PALETTE_LENGTH(2)
|
MCFG_PALETTE_LENGTH(2)
|
||||||
|
|
||||||
// devices
|
// devices
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_16MHz/4) // 8251 USART TXC, RXC
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(bw2_state, pit_out0_w))
|
||||||
|
MCFG_PIT8253_CLK1(11000) // LCD controller
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE(I8253_TAG, pit8253_device, write_clk2))
|
||||||
|
MCFG_PIT8253_CLK2(0) // Floppy /MTRON
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(bw2_state, mtron_w))
|
||||||
|
|
||||||
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
|
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
|
||||||
MCFG_MSM6255_ADD(MSM6255_TAG, XTAL_16MHz, 0, SCREEN_TAG, lcdc_map)
|
MCFG_MSM6255_ADD(MSM6255_TAG, XTAL_16MHz, 0, SCREEN_TAG, lcdc_map)
|
||||||
|
|
||||||
|
@ -510,35 +510,12 @@ WRITE_LINE_MEMBER( compis_state::tmr2_w )
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_interface pit_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( compis_state::tmr3_w )
|
|
||||||
{
|
|
||||||
m_mpsc->rxtxcb_w(state);
|
|
||||||
}
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( compis_state::tmr4_w )
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( compis_state::tmr5_w )
|
WRITE_LINE_MEMBER( compis_state::tmr5_w )
|
||||||
{
|
{
|
||||||
m_mpsc->rxca_w(state);
|
m_mpsc->rxca_w(state);
|
||||||
m_mpsc->txca_w(state);
|
m_mpsc->txca_w(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{ XTAL_16MHz/8, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(compis_state, tmr3_w) },
|
|
||||||
{ XTAL_16MHz/8, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(compis_state, tmr4_w) },
|
|
||||||
{ XTAL_16MHz/8, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(compis_state, tmr5_w) }
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// I8255A_INTERFACE( ppi_intf )
|
// I8255A_INTERFACE( ppi_intf )
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -751,7 +728,14 @@ static MACHINE_CONFIG_START( compis, compis_state )
|
|||||||
//MCFG_I80130_SYSTICK_CALLBACK(DEVWRITELINE(I80130_TAG, i80130_device, ir3_w))
|
//MCFG_I80130_SYSTICK_CALLBACK(DEVWRITELINE(I80130_TAG, i80130_device, ir3_w))
|
||||||
MCFG_I80130_DELAY_CALLBACK(DEVWRITELINE(I80130_TAG, i80130_device, ir7_w))
|
MCFG_I80130_DELAY_CALLBACK(DEVWRITELINE(I80130_TAG, i80130_device, ir7_w))
|
||||||
MCFG_I80130_BAUD_CALLBACK(DEVWRITELINE(DEVICE_SELF, compis_state, tmr2_w))
|
MCFG_I80130_BAUD_CALLBACK(DEVWRITELINE(DEVICE_SELF, compis_state, tmr2_w))
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf )
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_16MHz/8)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8274_TAG, i8274_device, rxtxcb_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz/8)
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz/8)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(compis_state, tmr5_w))
|
||||||
|
|
||||||
MCFG_I8255_ADD(I8255_TAG, ppi_intf )
|
MCFG_I8255_ADD(I8255_TAG, ppi_intf )
|
||||||
|
|
||||||
MCFG_DEVICE_ADD(I8251A_TAG, I8251, 0)
|
MCFG_DEVICE_ADD(I8251A_TAG, I8251, 0)
|
||||||
|
@ -202,8 +202,13 @@ static MACHINE_CONFIG_START( dai, dai_state )
|
|||||||
MCFG_CPU_IO_MAP(dai_io)
|
MCFG_CPU_IO_MAP(dai_io)
|
||||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
MCFG_PIT8253_ADD( "pit8253", dai_pit8253_intf )
|
MCFG_PIT8253_CLK0(2000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("custom", dai_sound_device, set_input_ch0))
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("custom", dai_sound_device, set_input_ch1))
|
||||||
|
MCFG_PIT8253_CLK2(2000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("custom", dai_sound_device, set_input_ch2))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi8255", dai_ppi82555_intf )
|
MCFG_I8255_ADD( "ppi8255", dai_ppi82555_intf )
|
||||||
|
|
||||||
|
@ -138,28 +138,6 @@ WRITE8_MEMBER(ec184x_state::memboard_w)
|
|||||||
m_memory.enable[offset] = data;
|
m_memory.enable[offset] = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 0
|
|
||||||
const struct pit8253_interface ec1841_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_4MHz/4, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_4MHz/4, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_pit8253_out1_changed)
|
|
||||||
}, {
|
|
||||||
XTAL_4MHz/4, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER( ec184x_state, ec184x )
|
DRIVER_INIT_MEMBER( ec184x_state, ec184x )
|
||||||
{
|
{
|
||||||
address_space &program = m_maincpu->space(AS_PROGRAM);
|
address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||||
|
@ -263,28 +263,6 @@ WRITE_LINE_MEMBER( fk1_state::fk1_pit_out2 )
|
|||||||
logerror("WRITE_LINE_MEMBER(fk1_pit_out2)\n");
|
logerror("WRITE_LINE_MEMBER(fk1_pit_out2)\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static const struct pit8253_interface fk1_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
50,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(fk1_state, fk1_pit_out0)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
1000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(fk1_state, fk1_pit_out1)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(fk1_state, fk1_pit_out2)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
0 no interrupt allowed,
|
0 no interrupt allowed,
|
||||||
1 allowed INTR-7,
|
1 allowed INTR-7,
|
||||||
@ -471,7 +449,14 @@ static MACHINE_CONFIG_START( fk1, fk1_state )
|
|||||||
MCFG_PALETTE_LENGTH(2)
|
MCFG_PALETTE_LENGTH(2)
|
||||||
MCFG_PALETTE_INIT_OVERRIDE(driver_device, monochrome_green)
|
MCFG_PALETTE_INIT_OVERRIDE(driver_device, monochrome_green)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", fk1_pit8253_intf )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(50)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(fk1_state, fk1_pit_out0))
|
||||||
|
MCFG_PIT8253_CLK1(1000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(fk1_state, fk1_pit_out1))
|
||||||
|
MCFG_PIT8253_CLK2(0)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(fk1_state, fk1_pit_out2))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi8255_1", fk1_ppi8255_interface_1 )
|
MCFG_I8255_ADD( "ppi8255_1", fk1_ppi8255_interface_1 )
|
||||||
MCFG_I8255_ADD( "ppi8255_2", fk1_ppi8255_interface_2 )
|
MCFG_I8255_ADD( "ppi8255_2", fk1_ppi8255_interface_2 )
|
||||||
MCFG_I8255_ADD( "ppi8255_3", fk1_ppi8255_interface_3 )
|
MCFG_I8255_ADD( "ppi8255_3", fk1_ppi8255_interface_3 )
|
||||||
|
@ -759,7 +759,7 @@ WRITE8_MEMBER(towns_state::towns_keyboard_w)
|
|||||||
*/
|
*/
|
||||||
UINT8 towns_state::speaker_get_spk()
|
UINT8 towns_state::speaker_get_spk()
|
||||||
{
|
{
|
||||||
return m_towns_spkrdata & m_towns_speaker_input;
|
return m_towns_spkrdata & m_pit_out2;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -770,19 +770,13 @@ void towns_state::speaker_set_spkrdata(UINT8 data)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void towns_state::speaker_set_input(UINT8 data)
|
|
||||||
{
|
|
||||||
m_towns_speaker_input = data ? 1 : 0;
|
|
||||||
m_speaker->level_w(speaker_get_spk());
|
|
||||||
}
|
|
||||||
|
|
||||||
READ8_MEMBER(towns_state::towns_port60_r)
|
READ8_MEMBER(towns_state::towns_port60_r)
|
||||||
{
|
{
|
||||||
UINT8 val = 0x00;
|
UINT8 val = 0x00;
|
||||||
|
|
||||||
if (m_pit->get_output(0))
|
if (m_pit_out0)
|
||||||
val |= 0x01;
|
val |= 0x01;
|
||||||
if (m_pit->get_output(1))
|
if (m_pit_out1)
|
||||||
val |= 0x02;
|
val |= 0x02;
|
||||||
|
|
||||||
val |= (m_towns_timer_mask & 0x07) << 2;
|
val |= (m_towns_timer_mask & 0x07) << 2;
|
||||||
@ -2097,7 +2091,7 @@ WRITE_LINE_MEMBER(towns_state::towns_pic_irq)
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER(towns_state::towns_pit_out0_changed)
|
WRITE_LINE_MEMBER(towns_state::towns_pit_out0_changed)
|
||||||
{
|
{
|
||||||
pic8259_device* dev = m_pic_master;
|
m_pit_out0 = state;
|
||||||
|
|
||||||
if(m_towns_timer_mask & 0x01)
|
if(m_towns_timer_mask & 0x01)
|
||||||
{
|
{
|
||||||
@ -2107,12 +2101,12 @@ WRITE_LINE_MEMBER(towns_state::towns_pit_out0_changed)
|
|||||||
else
|
else
|
||||||
m_timer0 = 0;
|
m_timer0 = 0;
|
||||||
|
|
||||||
dev->ir0_w(m_timer0 || m_timer1);
|
m_pic_master->ir0_w(m_timer0 || m_timer1);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(towns_state::towns_pit_out1_changed)
|
WRITE_LINE_MEMBER(towns_state::towns_pit_out1_changed)
|
||||||
{
|
{
|
||||||
pic8259_device* dev = m_pic_master;
|
m_pit_out1 = state;
|
||||||
|
|
||||||
if(m_towns_timer_mask & 0x02)
|
if(m_towns_timer_mask & 0x02)
|
||||||
{
|
{
|
||||||
@ -2122,12 +2116,13 @@ WRITE_LINE_MEMBER(towns_state::towns_pit_out1_changed)
|
|||||||
else
|
else
|
||||||
m_timer1 = 0;
|
m_timer1 = 0;
|
||||||
|
|
||||||
dev->ir0_w(m_timer0 || m_timer1);
|
m_pic_master->ir0_w(m_timer0 || m_timer1);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( towns_state::pit_out2_changed )
|
WRITE_LINE_MEMBER( towns_state::pit_out2_changed )
|
||||||
{
|
{
|
||||||
speaker_set_input(state);
|
m_pit_out2 = state ? 1 : 0;
|
||||||
|
m_speaker->level_w(speaker_get_spk());
|
||||||
}
|
}
|
||||||
|
|
||||||
static ADDRESS_MAP_START(towns_mem, AS_PROGRAM, 32, towns_state)
|
static ADDRESS_MAP_START(towns_mem, AS_PROGRAM, 32, towns_state)
|
||||||
@ -2635,48 +2630,6 @@ void towns_state::machine_reset()
|
|||||||
m_towns_freerun_counter->adjust(attotime::zero,0,attotime::from_usec(1));
|
m_towns_freerun_counter->adjust(attotime::zero,0,attotime::from_usec(1));
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface towns_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
307200,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pit_out0_changed)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
307200,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pit_out1_changed)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
307200,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(towns_state,pit_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct pit8253_interface towns_pit8253_config_2 =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
307200,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL // reserved
|
|
||||||
},
|
|
||||||
{
|
|
||||||
307200,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL // RS-232
|
|
||||||
},
|
|
||||||
{
|
|
||||||
307200,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL // reserved
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
READ8_MEMBER(towns_state::get_slave_ack)
|
READ8_MEMBER(towns_state::get_slave_ack)
|
||||||
{
|
{
|
||||||
if (offset==7) { // IRQ = 7
|
if (offset==7) { // IRQ = 7
|
||||||
@ -2796,8 +2749,18 @@ static MACHINE_CONFIG_FRAGMENT( towns_base )
|
|||||||
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND,0)
|
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND,0)
|
||||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD("pit", towns_pit8253_config)
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
MCFG_PIT8253_ADD("pit2", towns_pit8253_config_2)
|
MCFG_PIT8253_CLK0(307200)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(towns_state, towns_pit_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(307200)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(towns_state, towns_pit_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(307200)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(towns_state, pit_out2_changed))
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit2", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(307200) // reserved
|
||||||
|
MCFG_PIT8253_CLK1(307200) // RS-232
|
||||||
|
MCFG_PIT8253_CLK2(307200) // reserved
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(towns_state,towns_pic_irq), VCC, READ8(towns_state,get_slave_ack))
|
MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(towns_state,towns_pic_irq), VCC, READ8(towns_state,get_slave_ack))
|
||||||
|
|
||||||
|
@ -12,7 +12,6 @@
|
|||||||
|
|
||||||
ToDo:
|
ToDo:
|
||||||
- Banking
|
- Banking
|
||||||
- Connect PIT to UART clock.
|
|
||||||
- Dipswitches
|
- Dipswitches
|
||||||
|
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
@ -41,6 +40,8 @@ public:
|
|||||||
DECLARE_READ8_MEMBER(keyin_r);
|
DECLARE_READ8_MEMBER(keyin_r);
|
||||||
DECLARE_READ8_MEMBER(status_r);
|
DECLARE_READ8_MEMBER(status_r);
|
||||||
DECLARE_WRITE8_MEMBER(control_w);
|
DECLARE_WRITE8_MEMBER(control_w);
|
||||||
|
DECLARE_WRITE_LINE_MEMBER(write_uart_clock);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
UINT8 m_term_data;
|
UINT8 m_term_data;
|
||||||
virtual void machine_reset();
|
virtual void machine_reset();
|
||||||
@ -94,30 +95,17 @@ WRITE8_MEMBER( imsai_state::kbd_put )
|
|||||||
m_term_data = data;
|
m_term_data = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER(imsai_state::write_uart_clock)
|
||||||
|
{
|
||||||
|
m_uart->write_txc(state);
|
||||||
|
m_uart->write_rxc(state);
|
||||||
|
}
|
||||||
|
|
||||||
static GENERIC_TERMINAL_INTERFACE( terminal_intf )
|
static GENERIC_TERMINAL_INTERFACE( terminal_intf )
|
||||||
{
|
{
|
||||||
DEVCB_DRIVER_MEMBER(imsai_state, kbd_put)
|
DEVCB_DRIVER_MEMBER(imsai_state, kbd_put)
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_6MHz / 3, /* Timer 0: baud rate gen for 8251 */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_6MHz / 3, /* Timer 1: user */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_6MHz / 3, /* Timer 2: user */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
WRITE8_MEMBER( imsai_state::control_w )
|
WRITE8_MEMBER( imsai_state::control_w )
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
@ -138,7 +126,12 @@ static MACHINE_CONFIG_START( imsai, imsai_state )
|
|||||||
|
|
||||||
/* Devices */
|
/* Devices */
|
||||||
MCFG_DEVICE_ADD("uart", I8251, 0)
|
MCFG_DEVICE_ADD("uart", I8251, 0)
|
||||||
MCFG_PIT8253_ADD( "pit", pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_6MHz / 3) /* Timer 0: baud rate gen for 8251 */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(imsai_state, write_uart_clock))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_6MHz / 3) /* Timer 1: user */
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_6MHz / 3) /* Timer 2: user */
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
/* ROM definition */
|
/* ROM definition */
|
||||||
|
@ -137,7 +137,6 @@ public:
|
|||||||
DECLARE_READ32_MEMBER(hpc3_unkpbus0_r);
|
DECLARE_READ32_MEMBER(hpc3_unkpbus0_r);
|
||||||
DECLARE_WRITE32_MEMBER(hpc3_unkpbus0_w);
|
DECLARE_WRITE32_MEMBER(hpc3_unkpbus0_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(scsi_irq);
|
DECLARE_WRITE_LINE_MEMBER(scsi_irq);
|
||||||
DECLARE_READ8_MEMBER(ip22_get_out2);
|
|
||||||
DECLARE_DRIVER_INIT(ip225015);
|
DECLARE_DRIVER_INIT(ip225015);
|
||||||
virtual void machine_start();
|
virtual void machine_start();
|
||||||
virtual void machine_reset();
|
virtual void machine_reset();
|
||||||
@ -183,26 +182,6 @@ inline void ATTR_PRINTF(3,4) ip22_state::verboselog(int n_level, const char *s_f
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static const struct pit8253_interface ip22_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
1000000, /* Timer 0: 1MHz */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
1000000, /* Timer 1: 1MHz */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
1000000, /* Timer 2: 1MHz */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#define RTC_DAY state->m_RTC.nRAM[0x09]
|
#define RTC_DAY state->m_RTC.nRAM[0x09]
|
||||||
#define RTC_HOUR state->m_RTC.nRAM[0x08]
|
#define RTC_HOUR state->m_RTC.nRAM[0x08]
|
||||||
#define RTC_MINUTE state->m_RTC.nRAM[0x07]
|
#define RTC_MINUTE state->m_RTC.nRAM[0x07]
|
||||||
@ -1504,11 +1483,6 @@ static const struct WD33C93interface wd33c93_intf =
|
|||||||
DEVCB_DRIVER_LINE_MEMBER(ip22_state,scsi_irq) /* command completion IRQ */
|
DEVCB_DRIVER_LINE_MEMBER(ip22_state,scsi_irq) /* command completion IRQ */
|
||||||
};
|
};
|
||||||
|
|
||||||
READ8_MEMBER(ip22_state::ip22_get_out2)
|
|
||||||
{
|
|
||||||
return m_pit->get_output(2);
|
|
||||||
}
|
|
||||||
|
|
||||||
void ip22_state::machine_start()
|
void ip22_state::machine_start()
|
||||||
{
|
{
|
||||||
sgi_mc_init(machine());
|
sgi_mc_init(machine());
|
||||||
@ -1526,8 +1500,7 @@ static const struct kbdc8042_interface at8042 =
|
|||||||
DEVCB_NULL,
|
DEVCB_NULL,
|
||||||
DEVCB_NULL,
|
DEVCB_NULL,
|
||||||
|
|
||||||
DEVCB_NULL,
|
DEVCB_NULL
|
||||||
DEVCB_DRIVER_MEMBER(ip22_state,ip22_get_out2)
|
|
||||||
};
|
};
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(ip22_state,ip225015)
|
DRIVER_INIT_MEMBER(ip22_state,ip225015)
|
||||||
@ -1637,7 +1610,11 @@ static MACHINE_CONFIG_START( ip225015, ip22_state )
|
|||||||
MCFG_NVRAM_ADD_0FILL("nvram")
|
MCFG_NVRAM_ADD_0FILL("nvram")
|
||||||
MCFG_NVRAM_ADD_0FILL("nvram_user")
|
MCFG_NVRAM_ADD_0FILL("nvram_user")
|
||||||
|
|
||||||
MCFG_PIT8254_ADD( "pit8254", ip22_pit8254_config )
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(1000000)
|
||||||
|
MCFG_PIT8253_CLK1(1000000)
|
||||||
|
MCFG_PIT8253_CLK2(1000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("kbdc", kbdc8042_device, write_out2))
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
|
@ -25,13 +25,15 @@
|
|||||||
class irisha_state : public driver_device
|
class irisha_state : public driver_device
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
irisha_state(const machine_config &mconfig, device_type type, const char *tag)
|
irisha_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||||
: driver_device(mconfig, type, tag)
|
driver_device(mconfig, type, tag),
|
||||||
, m_p_videoram(*this, "videoram")
|
m_p_videoram(*this, "videoram"),
|
||||||
, m_maincpu(*this, "maincpu")
|
m_maincpu(*this, "maincpu"),
|
||||||
, m_pit(*this, "pit8253")
|
m_pit(*this, "pit8253"),
|
||||||
, m_speaker(*this, "speaker")
|
m_speaker(*this, "speaker"),
|
||||||
{ }
|
m_uart(*this, "uart")
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(irisha_keyboard_r);
|
DECLARE_READ8_MEMBER(irisha_keyboard_r);
|
||||||
DECLARE_READ8_MEMBER(irisha_8255_portb_r);
|
DECLARE_READ8_MEMBER(irisha_8255_portb_r);
|
||||||
@ -40,10 +42,12 @@ public:
|
|||||||
DECLARE_WRITE8_MEMBER(irisha_8255_portb_w);
|
DECLARE_WRITE8_MEMBER(irisha_8255_portb_w);
|
||||||
DECLARE_WRITE8_MEMBER(irisha_8255_portc_w);
|
DECLARE_WRITE8_MEMBER(irisha_8255_portc_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(speaker_w);
|
DECLARE_WRITE_LINE_MEMBER(speaker_w);
|
||||||
|
DECLARE_WRITE_LINE_MEMBER(write_uart_clock);
|
||||||
TIMER_CALLBACK_MEMBER(irisha_key);
|
TIMER_CALLBACK_MEMBER(irisha_key);
|
||||||
DECLARE_WRITE_LINE_MEMBER(irisha_pic_set_int_line);
|
DECLARE_WRITE_LINE_MEMBER(irisha_pic_set_int_line);
|
||||||
UINT32 screen_update_irisha(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
UINT32 screen_update_irisha(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||||
required_shared_ptr<const UINT8> m_p_videoram;
|
required_shared_ptr<const UINT8> m_p_videoram;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
bool m_sg1_line;
|
bool m_sg1_line;
|
||||||
bool m_keypressed;
|
bool m_keypressed;
|
||||||
@ -57,6 +61,7 @@ private:
|
|||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<pit8253_device> m_pit;
|
required_device<pit8253_device> m_pit;
|
||||||
required_device<speaker_sound_device> m_speaker;
|
required_device<speaker_sound_device> m_speaker;
|
||||||
|
required_device<i8251_device> m_uart;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@ -233,34 +238,6 @@ static GFXDECODE_START( irisha )
|
|||||||
GFXDECODE_END
|
GFXDECODE_END
|
||||||
|
|
||||||
|
|
||||||
/*************************************************
|
|
||||||
|
|
||||||
i8253
|
|
||||||
|
|
||||||
*************************************************/
|
|
||||||
|
|
||||||
static const struct pit8253_interface irisha_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_16MHz / 9,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_16MHz / 9 / 8 / 8,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_NULL // UART transmit/receive clock
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_16MHz / 9,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(irisha_state, speaker_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************************
|
/*************************************************
|
||||||
|
|
||||||
i8255
|
i8255
|
||||||
@ -303,7 +280,7 @@ WRITE8_MEMBER(irisha_state::irisha_8255_portc_w)
|
|||||||
//logerror("irisha_8255_portc_w %02x\n",data);
|
//logerror("irisha_8255_portc_w %02x\n",data);
|
||||||
|
|
||||||
if BIT(data, 6)
|
if BIT(data, 6)
|
||||||
m_pit->gate2_w((BIT(m_ppi_porta, 5) && !BIT(data, 5)) ? 1 : 0);
|
m_pit->write_gate2((BIT(m_ppi_porta, 5) && !BIT(data, 5)) ? 1 : 0);
|
||||||
|
|
||||||
m_ppi_portc = data;
|
m_ppi_portc = data;
|
||||||
|
|
||||||
@ -380,6 +357,12 @@ READ8_MEMBER(irisha_state::irisha_keyboard_r)
|
|||||||
return keycode;
|
return keycode;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER(irisha_state::write_uart_clock)
|
||||||
|
{
|
||||||
|
m_uart->write_txc(state);
|
||||||
|
m_uart->write_rxc(state);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
/*************************************************
|
/*************************************************
|
||||||
|
|
||||||
@ -409,7 +392,6 @@ void irisha_state::machine_reset()
|
|||||||
m_ppi_portc = 0;
|
m_ppi_portc = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* Machine driver */
|
/* Machine driver */
|
||||||
static MACHINE_CONFIG_START( irisha, irisha_state )
|
static MACHINE_CONFIG_START( irisha, irisha_state )
|
||||||
/* basic machine hardware */
|
/* basic machine hardware */
|
||||||
@ -435,7 +417,15 @@ static MACHINE_CONFIG_START( irisha, irisha_state )
|
|||||||
|
|
||||||
/* Devices */
|
/* Devices */
|
||||||
MCFG_DEVICE_ADD("uart", I8251, 0)
|
MCFG_DEVICE_ADD("uart", I8251, 0)
|
||||||
MCFG_PIT8253_ADD( "pit8253", irisha_pit8253_intf )
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_16MHz / 9)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz / 9 / 8 / 8)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(irisha_state, write_uart_clock))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz / 9)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(irisha_state, speaker_w))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi8255", irisha_ppi8255_interface )
|
MCFG_I8255_ADD( "ppi8255", irisha_ppi8255_interface )
|
||||||
MCFG_PIC8259_ADD( "pic8259", WRITELINE(irisha_state,irisha_pic_set_int_line), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", WRITELINE(irisha_state,irisha_pic_set_int_line), VCC, NULL )
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
@ -145,25 +145,6 @@ static DEVICE_INPUT_DEFAULTS_START( isbc286_terminal )
|
|||||||
DEVICE_INPUT_DEFAULTS( "TERM_STOPBITS", 0xff, 0x01 ) // 1
|
DEVICE_INPUT_DEFAULTS( "TERM_STOPBITS", 0xff, 0x01 ) // 1
|
||||||
DEVICE_INPUT_DEFAULTS_END
|
DEVICE_INPUT_DEFAULTS_END
|
||||||
|
|
||||||
static const struct pit8253_interface isbc86_pit_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_22_1184MHz/18,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic_0", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_22_1184MHz/18,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_22_1184MHz/18,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(isbc_state, isbc86_tmr2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( isbc_state::isbc86_tmr2_w )
|
WRITE_LINE_MEMBER( isbc_state::isbc86_tmr2_w )
|
||||||
{
|
{
|
||||||
m_uart8251->write_rxc(state);
|
m_uart8251->write_rxc(state);
|
||||||
@ -188,25 +169,6 @@ READ8_MEMBER( isbc_state::get_slave_ack )
|
|||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface isbc286_pit_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_22_1184MHz/18,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic_0", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_22_1184MHz/18,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("uart8274", z80dart_device, rxtxcb_w)
|
|
||||||
}, {
|
|
||||||
XTAL_22_1184MHz/18,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(isbc_state, isbc286_tmr2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( isbc_state::isbc286_tmr2_w )
|
WRITE_LINE_MEMBER( isbc_state::isbc286_tmr2_w )
|
||||||
{
|
{
|
||||||
m_uart8274->rxca_w(state);
|
m_uart8274->rxca_w(state);
|
||||||
@ -274,7 +236,14 @@ static MACHINE_CONFIG_START( isbc86, isbc_state )
|
|||||||
MCFG_CPU_PROGRAM_MAP(isbc86_mem)
|
MCFG_CPU_PROGRAM_MAP(isbc86_mem)
|
||||||
MCFG_CPU_IO_MAP(isbc_io)
|
MCFG_CPU_IO_MAP(isbc_io)
|
||||||
MCFG_PIC8259_ADD("pic_0", INPUTLINE(":maincpu", 0), VCC, NULL)
|
MCFG_PIC8259_ADD("pic_0", INPUTLINE(":maincpu", 0), VCC, NULL)
|
||||||
MCFG_PIT8253_ADD("pit", isbc86_pit_config)
|
|
||||||
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_22_1184MHz/18)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic_0", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_22_1184MHz/18)
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_22_1184MHz/18)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(isbc_state, isbc86_tmr2_w))
|
||||||
|
|
||||||
MCFG_I8255A_ADD("ppi", isbc86_ppi_interface)
|
MCFG_I8255A_ADD("ppi", isbc86_ppi_interface)
|
||||||
|
|
||||||
MCFG_DEVICE_ADD("uart8251", I8251, 0)
|
MCFG_DEVICE_ADD("uart8251", I8251, 0)
|
||||||
@ -310,7 +279,15 @@ static MACHINE_CONFIG_START( isbc286, isbc_state )
|
|||||||
MCFG_CPU_IO_MAP(isbc286_io)
|
MCFG_CPU_IO_MAP(isbc286_io)
|
||||||
MCFG_PIC8259_ADD("pic_0", INPUTLINE(":maincpu", 0), VCC, READ8(isbc_state, get_slave_ack))
|
MCFG_PIC8259_ADD("pic_0", INPUTLINE(":maincpu", 0), VCC, READ8(isbc_state, get_slave_ack))
|
||||||
MCFG_PIC8259_ADD("pic_1", DEVWRITELINE("pic_0", pic8259_device, ir7_w), GND, NULL)
|
MCFG_PIC8259_ADD("pic_1", DEVWRITELINE("pic_0", pic8259_device, ir7_w), GND, NULL)
|
||||||
MCFG_PIT8254_ADD("pit", isbc286_pit_config)
|
|
||||||
|
MCFG_DEVICE_ADD("pit", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_22_1184MHz/18)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic_0", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_22_1184MHz/18)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("uart8274", z80dart_device, rxtxcb_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_22_1184MHz/18)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(isbc_state, isbc286_tmr2_w))
|
||||||
|
|
||||||
MCFG_I8255A_ADD("ppi", isbc286_ppi_interface)
|
MCFG_I8255A_ADD("ppi", isbc286_ppi_interface)
|
||||||
|
|
||||||
MCFG_CENTRONICS_ADD("centronics", centronics_printers, "image")
|
MCFG_CENTRONICS_ADD("centronics", centronics_printers, "image")
|
||||||
|
@ -901,27 +901,6 @@ static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
|
|||||||
DEVCB_DRIVER_MEMBER(m20_state, kbd_put)
|
DEVCB_DRIVER_MEMBER(m20_state, kbd_put)
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct pit8253_interface pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
1230782,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(m20_state, tty_clock_tick_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
1230782,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(m20_state, kbd_clock_tick_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
1230782,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(m20_state, timer_tick_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static SLOT_INTERFACE_START( m20_floppies )
|
static SLOT_INTERFACE_START( m20_floppies )
|
||||||
SLOT_INTERFACE( "5dd", FLOPPY_525_DD )
|
SLOT_INTERFACE( "5dd", FLOPPY_525_DD )
|
||||||
SLOT_INTERFACE_END
|
SLOT_INTERFACE_END
|
||||||
@ -972,7 +951,14 @@ static MACHINE_CONFIG_START( m20, m20_state )
|
|||||||
|
|
||||||
MCFG_DEVICE_ADD("i8251_2", I8251, 0)
|
MCFG_DEVICE_ADD("i8251_2", I8251, 0)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD("pit8253", pit8253_intf)
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(1230782)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(m20_state, tty_clock_tick_w))
|
||||||
|
MCFG_PIT8253_CLK1(1230782)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(m20_state, kbd_clock_tick_w))
|
||||||
|
MCFG_PIT8253_CLK2(1230782)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(m20_state, timer_tick_w))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD("i8259", WRITELINE(m20_state, pic_irq_line_w), VCC, NULL)
|
MCFG_PIC8259_ADD("i8259", WRITELINE(m20_state, pic_irq_line_w), VCC, NULL)
|
||||||
|
|
||||||
MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
|
MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
|
||||||
|
@ -260,7 +260,14 @@ static MACHINE_CONFIG_START( mbc55x, mbc55x_state )
|
|||||||
MCFG_DEVICE_ADD(I8251A_KB_TAG, I8251, 0)
|
MCFG_DEVICE_ADD(I8251A_KB_TAG, I8251, 0)
|
||||||
MCFG_I8251_RXRDY_HANDLER(DEVWRITELINE(PIC8259_TAG, pic8259_device, ir3_w))
|
MCFG_I8251_RXRDY_HANDLER(DEVWRITELINE(PIC8259_TAG, pic8259_device, ir3_w))
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( PIT8253_TAG, mbc55x_pit8253_config )
|
MCFG_DEVICE_ADD(PIT8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(PIT_C0_CLOCK)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(PIC8259_TAG, pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(PIT_C1_CLOCK)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE(PIC8259_TAG, pic8259_device, ir1_w))
|
||||||
|
MCFG_PIT8253_CLK2(PIT_C2_CLOCK)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mbc55x_state, pit8253_t2))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( PIC8259_TAG, INPUTLINE(MAINCPU_TAG, INPUT_LINE_IRQ0), VCC, NULL )
|
MCFG_PIC8259_ADD( PIC8259_TAG, INPUTLINE(MAINCPU_TAG, INPUT_LINE_IRQ0), VCC, NULL )
|
||||||
MCFG_I8255_ADD( PPI8255_TAG, mbc55x_ppi8255_interface )
|
MCFG_I8255_ADD( PPI8255_TAG, mbc55x_ppi8255_interface )
|
||||||
MCFG_MC6845_ADD(VID_MC6845_NAME, MC6845, SCREEN_TAG, XTAL_14_31818MHz/8, mb55x_mc6845_intf)
|
MCFG_MC6845_ADD(VID_MC6845_NAME, MC6845, SCREEN_TAG, XTAL_14_31818MHz/8, mb55x_mc6845_intf)
|
||||||
|
@ -107,7 +107,7 @@ WRITE8_MEMBER(mc1502_state::mc1502_ppi_portb_w)
|
|||||||
{
|
{
|
||||||
// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
|
// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
|
||||||
m_ppi_portb = data;
|
m_ppi_portb = data;
|
||||||
machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
// mc1502_speaker_set_spkrdata(BIT(data, 1));
|
// mc1502_speaker_set_spkrdata(BIT(data, 1));
|
||||||
m_centronics->write_strobe(BIT(data, 2));
|
m_centronics->write_strobe(BIT(data, 2));
|
||||||
m_centronics->write_autofd(BIT(data, 3));
|
m_centronics->write_autofd(BIT(data, 3));
|
||||||
@ -129,16 +129,15 @@ WRITE8_MEMBER(mc1502_state::mc1502_ppi_portc_w)
|
|||||||
// 0x10 -- SNDOUT
|
// 0x10 -- SNDOUT
|
||||||
READ8_MEMBER(mc1502_state::mc1502_ppi_portc_r)
|
READ8_MEMBER(mc1502_state::mc1502_ppi_portc_r)
|
||||||
{
|
{
|
||||||
int timer2_output = machine().device<pit8253_device>("pit8253")->get_output(2);
|
|
||||||
int data = 0xff;
|
int data = 0xff;
|
||||||
double tap_val = m_cassette->input();
|
double tap_val = m_cassette->input();
|
||||||
|
|
||||||
data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && timer2_output) ? 0x40 : 0x00 );
|
data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && m_pit_out2) ? 0x40 : 0x00 );
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
|
data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && m_pit_out2) ? 0x10 : 0x00 );
|
||||||
|
|
||||||
// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
|
// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
|
||||||
// data, tap_val, timer2_output, machine().describe_context()));
|
// data, tap_val, m_pit_out2, machine().describe_context()));
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -209,35 +208,17 @@ WRITE_LINE_MEMBER(mc1502_state::mc1502_i8251_syndet)
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out1_changed)
|
WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out1_changed)
|
||||||
{
|
{
|
||||||
machine().device<i8251_device>("upd8251")->write_txc(state);
|
m_upd8251->write_txc(state);
|
||||||
machine().device<i8251_device>("upd8251")->write_rxc(state);
|
m_upd8251->write_rxc(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out2_changed)
|
WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out2_changed)
|
||||||
{
|
{
|
||||||
|
m_pit_out2 = state;
|
||||||
// mc1502_speaker_set_input( state );
|
// mc1502_speaker_set_input( state );
|
||||||
m_cassette->output(state ? 1 : -1);
|
m_cassette->output(state ? 1 : -1);
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct pit8253_interface mc1502_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_15MHz/12, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/12, /* serial port */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mc1502_state,mc1502_pit8253_out1_changed)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/12, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mc1502_state,mc1502_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
IRQ_CALLBACK_MEMBER( mc1502_state::mc1502_irq_callback )
|
IRQ_CALLBACK_MEMBER( mc1502_state::mc1502_irq_callback )
|
||||||
{
|
{
|
||||||
return m_pic8259->acknowledge();
|
return m_pic8259->acknowledge();
|
||||||
@ -323,7 +304,13 @@ static MACHINE_CONFIG_START( mc1502, mc1502_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE( mc1502_state, mc1502 )
|
MCFG_MACHINE_START_OVERRIDE( mc1502_state, mc1502 )
|
||||||
MCFG_MACHINE_RESET_OVERRIDE( mc1502_state, mc1502 )
|
MCFG_MACHINE_RESET_OVERRIDE( mc1502_state, mc1502 )
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", mc1502_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_15MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz/12) /* serial port */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(mc1502_state, mc1502_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mc1502_state, mc1502_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
|
||||||
|
|
||||||
|
@ -558,10 +558,6 @@ static I8237_INTERFACE( dmac_intf )
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( mm1_state::itxc_w )
|
WRITE_LINE_MEMBER( mm1_state::itxc_w )
|
||||||
{
|
{
|
||||||
if (!m_intc)
|
if (!m_intc)
|
||||||
@ -584,26 +580,6 @@ WRITE_LINE_MEMBER( mm1_state::auxc_w )
|
|||||||
m_mpsc->rxcb_w(state);
|
m_mpsc->rxcb_w(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_6_144MHz/2/2,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mm1_state, itxc_w)
|
|
||||||
}, {
|
|
||||||
XTAL_6_144MHz/2/2,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mm1_state, irxc_w)
|
|
||||||
}, {
|
|
||||||
XTAL_6_144MHz/2/2,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mm1_state, auxc_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// UPD7201_INTERFACE( mpsc_intf )
|
// UPD7201_INTERFACE( mpsc_intf )
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -749,7 +725,15 @@ static MACHINE_CONFIG_START( mm1, mm1_state )
|
|||||||
// peripheral hardware
|
// peripheral hardware
|
||||||
MCFG_I8212_ADD(I8212_TAG, iop_intf)
|
MCFG_I8212_ADD(I8212_TAG, iop_intf)
|
||||||
MCFG_I8237_ADD(I8237_TAG, XTAL_6_144MHz/2, dmac_intf)
|
MCFG_I8237_ADD(I8237_TAG, XTAL_6_144MHz/2, dmac_intf)
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_6_144MHz/2/2)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(mm1_state, itxc_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_6_144MHz/2/2)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(mm1_state, irxc_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_6_144MHz/2/2)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mm1_state, auxc_w))
|
||||||
|
|
||||||
MCFG_UPD765A_ADD(UPD765_TAG, /* XTAL_16MHz/2/2 */ true, true)
|
MCFG_UPD765A_ADD(UPD765_TAG, /* XTAL_16MHz/2/2 */ true, true)
|
||||||
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_6_144MHz/2, mpsc_intf)
|
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_6_144MHz/2, mpsc_intf)
|
||||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", mm1_floppies, "525qd", mm1_state::floppy_formats)
|
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", mm1_floppies, "525qd", mm1_state::floppy_formats)
|
||||||
|
@ -155,27 +155,6 @@ WRITE_LINE_MEMBER(mikrosha_state::mikrosha_pit_out2)
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface mikrosha_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mikrosha_state, mikrosha_pit_out2)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/* F4 Character Displayer */
|
/* F4 Character Displayer */
|
||||||
static const gfx_layout mikrosha_charlayout =
|
static const gfx_layout mikrosha_charlayout =
|
||||||
{
|
{
|
||||||
@ -208,7 +187,11 @@ static MACHINE_CONFIG_START( mikrosha, mikrosha_state )
|
|||||||
|
|
||||||
MCFG_I8275_ADD ( "i8275", mikrosha_i8275_interface)
|
MCFG_I8275_ADD ( "i8275", mikrosha_i8275_interface)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", mikrosha_pit8253_intf )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(0)
|
||||||
|
MCFG_PIT8253_CLK1(0)
|
||||||
|
MCFG_PIT8253_CLK2(2000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mikrosha_state, mikrosha_pit_out2))
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
|
@ -369,12 +369,12 @@ WRITE8_MEMBER(mz2000_state::mz2000_fdc_w)
|
|||||||
|
|
||||||
WRITE8_MEMBER(mz2000_state::timer_w)
|
WRITE8_MEMBER(mz2000_state::timer_w)
|
||||||
{
|
{
|
||||||
m_pit8253->gate0_w(1);
|
m_pit8253->write_gate0(1);
|
||||||
m_pit8253->gate1_w(1);
|
m_pit8253->write_gate1(1);
|
||||||
m_pit8253->gate0_w(0);
|
m_pit8253->write_gate0(0);
|
||||||
m_pit8253->gate1_w(0);
|
m_pit8253->write_gate1(0);
|
||||||
m_pit8253->gate0_w(1);
|
m_pit8253->write_gate0(1);
|
||||||
m_pit8253->gate1_w(1);
|
m_pit8253->write_gate1(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(mz2000_state::mz2000_tvram_attr_w)
|
WRITE8_MEMBER(mz2000_state::mz2000_tvram_attr_w)
|
||||||
@ -827,31 +827,6 @@ static const floppy_interface mz2000_floppy_interface =
|
|||||||
NULL
|
NULL
|
||||||
};
|
};
|
||||||
|
|
||||||
/* PIT8253 Interface */
|
|
||||||
|
|
||||||
/* TODO: clocks aren't known */
|
|
||||||
static const struct pit8253_interface mz2000_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
31250, /* needed by "Art Magic" to boot */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
static const cassette_interface mz2000_cassette_interface =
|
static const cassette_interface mz2000_cassette_interface =
|
||||||
{
|
{
|
||||||
mz700_cassette_formats,
|
mz700_cassette_formats,
|
||||||
@ -870,7 +845,12 @@ static MACHINE_CONFIG_START( mz2000, mz2000_state )
|
|||||||
|
|
||||||
MCFG_I8255_ADD( "i8255_0", ppi8255_intf )
|
MCFG_I8255_ADD( "i8255_0", ppi8255_intf )
|
||||||
MCFG_Z80PIO_ADD( "z80pio_1", MASTER_CLOCK, mz2000_pio1_intf )
|
MCFG_Z80PIO_ADD( "z80pio_1", MASTER_CLOCK, mz2000_pio1_intf )
|
||||||
MCFG_PIT8253_ADD("pit", mz2000_pit8253_intf)
|
|
||||||
|
/* TODO: clocks aren't known */
|
||||||
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(31250)
|
||||||
|
MCFG_PIT8253_CLK1(31250) /* needed by "Art Magic" to boot */
|
||||||
|
MCFG_PIT8253_CLK2(31250)
|
||||||
|
|
||||||
MCFG_MB8877_ADD("mb8877a",mz2000_mb8877a_interface)
|
MCFG_MB8877_ADD("mb8877a",mz2000_mb8877a_interface)
|
||||||
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(mz2000_floppy_interface)
|
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(mz2000_floppy_interface)
|
||||||
|
@ -1410,12 +1410,12 @@ WRITE8_MEMBER(mz2500_state::mz2500_cg_data_w)
|
|||||||
|
|
||||||
WRITE8_MEMBER(mz2500_state::timer_w)
|
WRITE8_MEMBER(mz2500_state::timer_w)
|
||||||
{
|
{
|
||||||
m_pit->gate0_w(1);
|
m_pit->write_gate0(1);
|
||||||
m_pit->gate1_w(1);
|
m_pit->write_gate1(1);
|
||||||
m_pit->gate0_w(0);
|
m_pit->write_gate0(0);
|
||||||
m_pit->gate1_w(0);
|
m_pit->write_gate1(0);
|
||||||
m_pit->gate0_w(1);
|
m_pit->write_gate0(1);
|
||||||
m_pit->gate1_w(1);
|
m_pit->write_gate1(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -2081,27 +2081,6 @@ WRITE_LINE_MEMBER(mz2500_state::pit8253_clk0_irq)
|
|||||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,m_irq_vector[1]);
|
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,m_irq_vector[1]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface mz2500_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
31250,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mz2500_state, pit8253_clk0_irq)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
16, //CH2, trusted, used by Super MZ demo / The Black Onyx and a bunch of others (TODO: timing of this)
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pit", pit8253_device, clk1_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(mz2500_state::mz2500_rtc_alarm_irq)
|
WRITE_LINE_MEMBER(mz2500_state::mz2500_rtc_alarm_irq)
|
||||||
{
|
{
|
||||||
/* TODO: doesn't work yet */
|
/* TODO: doesn't work yet */
|
||||||
@ -2151,7 +2130,13 @@ static MACHINE_CONFIG_START( mz2500, mz2500_state )
|
|||||||
MCFG_Z80PIO_ADD( "z80pio_1", 6000000, mz2500_pio1_intf )
|
MCFG_Z80PIO_ADD( "z80pio_1", 6000000, mz2500_pio1_intf )
|
||||||
MCFG_Z80SIO0_ADD( "z80sio", 6000000, mz2500_sio_intf )
|
MCFG_Z80SIO0_ADD( "z80sio", 6000000, mz2500_sio_intf )
|
||||||
MCFG_RP5C15_ADD(RP5C15_TAG, XTAL_32_768kHz, rtc_intf)
|
MCFG_RP5C15_ADD(RP5C15_TAG, XTAL_32_768kHz, rtc_intf)
|
||||||
MCFG_PIT8253_ADD("pit", mz2500_pit8253_intf)
|
|
||||||
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(31250)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(mz2500_state, pit8253_clk0_irq))
|
||||||
|
MCFG_PIT8253_CLK1(0)
|
||||||
|
MCFG_PIT8253_CLK2(16) //CH2, trusted, used by Super MZ demo / The Black Onyx and a bunch of others (TODO: timing of this)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("pit", pit8253_device, write_clk1))
|
||||||
|
|
||||||
MCFG_MB8877_ADD("mb8877a",mz2500_mb8877a_interface)
|
MCFG_MB8877_ADD("mb8877a",mz2500_mb8877a_interface)
|
||||||
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(mz2500_floppy_interface)
|
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(mz2500_floppy_interface)
|
||||||
|
@ -354,7 +354,14 @@ static MACHINE_CONFIG_START( mz700, mz_state )
|
|||||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("other", mz_state, ne556_other_callback, attotime::from_hz(34.5))
|
MCFG_TIMER_DRIVER_ADD_PERIODIC("other", mz_state, ne556_other_callback, attotime::from_hz(34.5))
|
||||||
|
|
||||||
/* devices */
|
/* devices */
|
||||||
MCFG_PIT8253_ADD("pit8253", mz700_pit8253_config)
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_17_73447MHz/20)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(mz_state, pit_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(15611.0)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pit8253", pit8253_device, write_clk2))
|
||||||
|
MCFG_PIT8253_CLK2(0)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mz_state, pit_irq_2))
|
||||||
|
|
||||||
MCFG_I8255_ADD("ppi8255", mz700_ppi8255_interface)
|
MCFG_I8255_ADD("ppi8255", mz700_ppi8255_interface)
|
||||||
MCFG_TTL74145_ADD("ls145", default_ttl74145)
|
MCFG_TTL74145_ADD("ls145", default_ttl74145)
|
||||||
|
|
||||||
@ -388,8 +395,9 @@ static MACHINE_CONFIG_DERIVED( mz800, mz700 )
|
|||||||
MCFG_SOFTWARE_LIST_ADD("cass_list","mz800_cass")
|
MCFG_SOFTWARE_LIST_ADD("cass_list","mz800_cass")
|
||||||
|
|
||||||
/* devices */
|
/* devices */
|
||||||
MCFG_DEVICE_REMOVE("pit8253")
|
MCFG_DEVICE_MODIFY("pit8253")
|
||||||
MCFG_PIT8253_ADD("pit8253", mz800_pit8253_config)
|
MCFG_PIT8253_CLK0(XTAL_17_73447MHz/16)
|
||||||
|
|
||||||
MCFG_Z80PIO_ADD("z80pio", XTAL_17_73447MHz/5, mz800_z80pio_config)
|
MCFG_Z80PIO_ADD("z80pio", XTAL_17_73447MHz/5, mz800_z80pio_config)
|
||||||
|
|
||||||
MCFG_CENTRONICS_ADD("centronics", centronics_printers, "image")
|
MCFG_CENTRONICS_ADD("centronics", centronics_printers, "image")
|
||||||
|
@ -302,7 +302,15 @@ static MACHINE_CONFIG_START( mz80k, mz80_state )
|
|||||||
|
|
||||||
/* Devices */
|
/* Devices */
|
||||||
MCFG_I8255_ADD( "ppi8255", mz80k_8255_int )
|
MCFG_I8255_ADD( "ppi8255", mz80k_8255_int )
|
||||||
MCFG_PIT8253_ADD( "pit8253", mz80k_pit8253_config )
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_8MHz/4)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(mz80_state, pit_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_8MHz/256)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pit8253", pit8253_device, write_clk2))
|
||||||
|
MCFG_PIT8253_CLK2(0)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mz80_state, pit_out2_changed))
|
||||||
|
|
||||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("tempo", mz80_state, ne555_tempo_callback, attotime::from_hz(34))
|
MCFG_TIMER_DRIVER_ADD_PERIODIC("tempo", mz80_state, ne555_tempo_callback, attotime::from_hz(34))
|
||||||
MCFG_CASSETTE_ADD( "cassette", mz80k_cassette_interface )
|
MCFG_CASSETTE_ADD( "cassette", mz80k_cassette_interface )
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
@ -171,14 +171,14 @@ static const ptm6840_interface ptm_intf =
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER( ob68k1a_state::rx_tx_0_w )
|
WRITE_LINE_MEMBER( ob68k1a_state::rx_tx_0_w )
|
||||||
{
|
{
|
||||||
m_acia0->write_rxc(state);
|
|
||||||
m_acia0->write_txc(state);
|
m_acia0->write_txc(state);
|
||||||
|
m_acia0->write_rxc(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( ob68k1a_state::rx_tx_1_w )
|
WRITE_LINE_MEMBER( ob68k1a_state::rx_tx_1_w )
|
||||||
{
|
{
|
||||||
m_acia1->write_rxc(state);
|
|
||||||
m_acia1->write_txc(state);
|
m_acia1->write_txc(state);
|
||||||
|
m_acia1->write_rxc(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -212,7 +212,7 @@ protected:
|
|||||||
bool m_cur_eop;
|
bool m_cur_eop;
|
||||||
UINT8 m_dma_offset[4];
|
UINT8 m_dma_offset[4];
|
||||||
UINT8 m_pc_spkrdata;
|
UINT8 m_pc_spkrdata;
|
||||||
UINT8 m_pc_input;
|
UINT8 m_pit_out2;
|
||||||
|
|
||||||
int m_ppi_portc_switch_high;
|
int m_ppi_portc_switch_high;
|
||||||
int m_ppi_speaker;
|
int m_ppi_speaker;
|
||||||
@ -683,7 +683,7 @@ void pasogo_state::machine_reset()
|
|||||||
m_u73_q2 = 0;
|
m_u73_q2 = 0;
|
||||||
m_out1 = 2; // initial state of pit output is undefined
|
m_out1 = 2; // initial state of pit output is undefined
|
||||||
m_pc_spkrdata = 0;
|
m_pc_spkrdata = 0;
|
||||||
m_pc_input = 0;
|
m_pit_out2 = 0;
|
||||||
m_dma_channel = -1;
|
m_dma_channel = -1;
|
||||||
m_cur_eop = false;
|
m_cur_eop = false;
|
||||||
}
|
}
|
||||||
@ -692,7 +692,7 @@ void pasogo_state::machine_reset()
|
|||||||
WRITE_LINE_MEMBER(pasogo_state::speaker_set_spkrdata)
|
WRITE_LINE_MEMBER(pasogo_state::speaker_set_spkrdata)
|
||||||
{
|
{
|
||||||
m_pc_spkrdata = state ? 1 : 0;
|
m_pc_spkrdata = state ? 1 : 0;
|
||||||
m_speaker->level_w(m_pc_spkrdata & m_pc_input);
|
m_speaker->level_w(m_pc_spkrdata & m_pit_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -710,31 +710,11 @@ WRITE_LINE_MEMBER( pasogo_state::pit8253_out1_changed )
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER( pasogo_state::pit8253_out2_changed )
|
WRITE_LINE_MEMBER( pasogo_state::pit8253_out2_changed )
|
||||||
{
|
{
|
||||||
m_pc_input = state ? 1 : 0;
|
m_pit_out2 = state ? 1 : 0;
|
||||||
m_speaker->level_w(m_pc_spkrdata & m_pc_input);
|
m_speaker->level_w(m_pc_spkrdata & m_pit_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static const pit8253_interface pc_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4772720/4, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
4772720/4, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pasogo_state, pit8253_out1_changed)
|
|
||||||
}, {
|
|
||||||
4772720/4, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pasogo_state, pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
READ8_MEMBER( pasogo_state::page_r )
|
READ8_MEMBER( pasogo_state::page_r )
|
||||||
{
|
{
|
||||||
return 0xFF;
|
return 0xFF;
|
||||||
@ -906,7 +886,6 @@ READ8_MEMBER (pasogo_state::ppi_porta_r)
|
|||||||
|
|
||||||
READ8_MEMBER ( pasogo_state::ppi_portc_r )
|
READ8_MEMBER ( pasogo_state::ppi_portc_r )
|
||||||
{
|
{
|
||||||
int timer2_output = m_pit8253->get_output(2);
|
|
||||||
int data=0xff;
|
int data=0xff;
|
||||||
|
|
||||||
data&=~0x80; // no parity error
|
data&=~0x80; // no parity error
|
||||||
@ -925,9 +904,9 @@ READ8_MEMBER ( pasogo_state::ppi_portc_r )
|
|||||||
|
|
||||||
if ( m_ppi_portb & 0x01 )
|
if ( m_ppi_portb & 0x01 )
|
||||||
{
|
{
|
||||||
data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
|
data = ( data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
|
||||||
}
|
}
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
@ -940,7 +919,7 @@ WRITE8_MEMBER( pasogo_state::ppi_portb_w )
|
|||||||
m_ppi_portc_switch_high = data & 0x08;
|
m_ppi_portc_switch_high = data & 0x08;
|
||||||
m_ppi_keyboard_clear = data & 0x80;
|
m_ppi_keyboard_clear = data & 0x80;
|
||||||
m_ppi_keyb_clock = data & 0x40;
|
m_ppi_keyb_clock = data & 0x40;
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
speaker_set_spkrdata( data & 0x02 );
|
speaker_set_spkrdata( data & 0x02 );
|
||||||
|
|
||||||
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
|
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
|
||||||
@ -980,7 +959,13 @@ static MACHINE_CONFIG_START( pasogo, pasogo_state )
|
|||||||
MCFG_CPU_IO_MAP( pasogo_io)
|
MCFG_CPU_IO_MAP( pasogo_io)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", pasogo_state, pasogo_interrupt)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", pasogo_state, pasogo_interrupt)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD( "pit8254", pc_pit8254_config )
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pasogo_state, pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pasogo_state, pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259", WRITELINE(pasogo_state, pasogo_pic8259_set_int_line), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", WRITELINE(pasogo_state, pasogo_pic8259_set_int_line), VCC, NULL )
|
||||||
|
|
||||||
|
@ -805,7 +805,13 @@ static MACHINE_CONFIG_START( pccga, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -920,7 +926,13 @@ static MACHINE_CONFIG_START( europc, europc_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(europc_pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(europc_pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(europc_pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(europc_pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1000,7 +1012,13 @@ static MACHINE_CONFIG_START( t1000hx, tandy_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(tandy_pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(tandy_pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1069,7 +1087,13 @@ static MACHINE_CONFIG_START( t1000_16, tandy_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(tandy_pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(tandy_pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(tandy_pc_state,tandy1000rl)
|
MCFG_MACHINE_RESET_OVERRIDE(tandy_pc_state,tandy1000rl)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1139,7 +1163,13 @@ static MACHINE_CONFIG_START( t1000_286, tandy_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1224,7 +1254,17 @@ static MACHINE_CONFIG_START( ibmpcjr, tandy_pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pcjr)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pcjr)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pcjr)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pcjr)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config )
|
/*
|
||||||
|
On the PC Jr the input for clock 1 seems to be selectable
|
||||||
|
based on bit 4(/5?) written to output port A0h. This is not
|
||||||
|
supported yet.
|
||||||
|
*/
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12)
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259", WRITELINE(pc_state,pcjr_pic8259_set_int_line), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", WRITELINE(pc_state,pcjr_pic8259_set_int_line), VCC, NULL )
|
||||||
|
|
||||||
@ -1314,7 +1354,17 @@ static MACHINE_CONFIG_START( asst128, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config )
|
/*
|
||||||
|
On the PC Jr the input for clock 1 seems to be selectable
|
||||||
|
based on bit 4(/5?) written to output port A0h. This is not
|
||||||
|
supported yet.
|
||||||
|
*/
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12)
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
|
||||||
|
|
||||||
@ -1375,7 +1425,13 @@ static MACHINE_CONFIG_START( iskr3104, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1438,7 +1494,13 @@ static MACHINE_CONFIG_START( poisk2, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1501,7 +1563,13 @@ static MACHINE_CONFIG_START( zenith, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1564,7 +1632,13 @@ static MACHINE_CONFIG_START( olivetti, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
@ -1627,7 +1701,13 @@ static MACHINE_CONFIG_START( ibm5550, pc_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc_state, ibm5150_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
|
||||||
|
|
||||||
|
@ -194,7 +194,7 @@ WRITE8_MEMBER( pc1512_state::system_w )
|
|||||||
|
|
||||||
m_port61 = data;
|
m_port61 = data;
|
||||||
|
|
||||||
m_pit->gate2_w(BIT(data, 0));
|
m_pit->write_gate2(BIT(data, 0));
|
||||||
|
|
||||||
m_speaker_drive = BIT(data, 1);
|
m_speaker_drive = BIT(data, 1);
|
||||||
update_speaker();
|
update_speaker();
|
||||||
@ -1007,26 +1007,6 @@ WRITE_LINE_MEMBER( pc1512_state::pit2_w )
|
|||||||
update_speaker();
|
update_speaker();
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_28_63636MHz/24,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8259A2_TAG, pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_28_63636MHz/24,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pc1512_state, pit1_w)
|
|
||||||
}, {
|
|
||||||
XTAL_28_63636MHz/24,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pc1512_state, pit2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// upd765_interface fdc_intf
|
// upd765_interface fdc_intf
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -1311,7 +1291,15 @@ static MACHINE_CONFIG_START( pc1512, pc1512_state )
|
|||||||
MCFG_PC1512_KEYBOARD_ADD(WRITELINE(pc1512_state, kbclk_w), WRITELINE(pc1512_state, kbdata_w))
|
MCFG_PC1512_KEYBOARD_ADD(WRITELINE(pc1512_state, kbclk_w), WRITELINE(pc1512_state, kbdata_w))
|
||||||
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
|
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
|
||||||
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_28_63636MHz/24)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_28_63636MHz/24)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc1512_state, pit1_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_28_63636MHz/24)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc1512_state, pit2_w))
|
||||||
|
|
||||||
MCFG_MC146818_ADD(MC146818_TAG, XTAL_32_768kHz)
|
MCFG_MC146818_ADD(MC146818_TAG, XTAL_32_768kHz)
|
||||||
MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
|
MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
|
||||||
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
|
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
|
||||||
@ -1389,7 +1377,15 @@ static MACHINE_CONFIG_START( pc1640, pc1640_state )
|
|||||||
MCFG_PC1512_KEYBOARD_ADD(WRITELINE(pc1512_state, kbclk_w), WRITELINE(pc1512_state, kbdata_w))
|
MCFG_PC1512_KEYBOARD_ADD(WRITELINE(pc1512_state, kbclk_w), WRITELINE(pc1512_state, kbdata_w))
|
||||||
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
|
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
|
||||||
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_28_63636MHz/24)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_28_63636MHz/24)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pc1512_state, pit1_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_28_63636MHz/24)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc1512_state, pit2_w))
|
||||||
|
|
||||||
MCFG_MC146818_ADD(MC146818_TAG, XTAL_32_768kHz)
|
MCFG_MC146818_ADD(MC146818_TAG, XTAL_32_768kHz)
|
||||||
MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
|
MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
|
||||||
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
|
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
|
||||||
|
@ -1747,31 +1747,6 @@ WRITE_LINE_MEMBER(pc88va_state::pc88va_pit_out0_changed)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pc88va_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
/* general purpose timer 1 */
|
|
||||||
8000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pc88va_state, pc88va_pit_out0_changed)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
/* BEEP frequency setting */
|
|
||||||
8000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
/* RS232C baud rate setting */
|
|
||||||
8000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
void pc88va_state::fdc_drq(bool state)
|
void pc88va_state::fdc_drq(bool state)
|
||||||
{
|
{
|
||||||
printf("%02x DRQ\n",state);
|
printf("%02x DRQ\n",state);
|
||||||
@ -1895,7 +1870,11 @@ static MACHINE_CONFIG_START( pc88va, pc88va_state )
|
|||||||
MCFG_FLOPPY_DRIVE_ADD("upd765:1", pc88va_floppies, "525hd", pc88va_state::floppy_formats)
|
MCFG_FLOPPY_DRIVE_ADD("upd765:1", pc88va_floppies, "525hd", pc88va_state::floppy_formats)
|
||||||
MCFG_SOFTWARE_LIST_ADD("disk_list","pc88va")
|
MCFG_SOFTWARE_LIST_ADD("disk_list","pc88va")
|
||||||
|
|
||||||
MCFG_PIT8253_ADD("pit8253",pc88va_pit8253_config)
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(8000000) /* general purpose timer 1 */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(pc88va_state, pc88va_pit_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(8000000) /* BEEP frequency setting */
|
||||||
|
MCFG_PIT8253_CLK2(8000000) /* RS232C baud rate setting */
|
||||||
|
|
||||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||||
MCFG_SOUND_ADD("ym", YM2203, 3993600) //unknown clock / divider
|
MCFG_SOUND_ADD("ym", YM2203, 3993600) //unknown clock / divider
|
||||||
|
@ -431,10 +431,11 @@ Keyboard TX commands:
|
|||||||
class pc9801_state : public driver_device
|
class pc9801_state : public driver_device
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
pc9801_state(const machine_config &mconfig, device_type type, const char *tag)
|
pc9801_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||||
: driver_device(mconfig, type, tag),
|
driver_device(mconfig, type, tag),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_dmac(*this, "i8237"),
|
m_dmac(*this, "i8237"),
|
||||||
|
m_pit8253(*this, "pit8253"),
|
||||||
m_pic1(*this, "pic8259_master"),
|
m_pic1(*this, "pic8259_master"),
|
||||||
m_pic2(*this, "pic8259_slave"),
|
m_pic2(*this, "pic8259_slave"),
|
||||||
m_fdc_2hd(*this, "upd765_2hd"),
|
m_fdc_2hd(*this, "upd765_2hd"),
|
||||||
@ -450,10 +451,13 @@ public:
|
|||||||
m_video_ram_2(*this, "video_ram_2"),
|
m_video_ram_2(*this, "video_ram_2"),
|
||||||
m_beeper(*this, "beeper"),
|
m_beeper(*this, "beeper"),
|
||||||
m_ram(*this, RAM_TAG),
|
m_ram(*this, RAM_TAG),
|
||||||
m_gfxdecode(*this, "gfxdecode") { }
|
m_gfxdecode(*this, "gfxdecode")
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<am9517a_device> m_dmac;
|
required_device<am9517a_device> m_dmac;
|
||||||
|
required_device<pit8253_device> m_pit8253;
|
||||||
required_device<pic8259_device> m_pic1;
|
required_device<pic8259_device> m_pic1;
|
||||||
required_device<pic8259_device> m_pic2;
|
required_device<pic8259_device> m_pic2;
|
||||||
required_device<upd765a_device> m_fdc_2hd;
|
required_device<upd765a_device> m_fdc_2hd;
|
||||||
@ -537,6 +541,7 @@ public:
|
|||||||
UINT8 m_sys_type;
|
UINT8 m_sys_type;
|
||||||
|
|
||||||
DECLARE_WRITE_LINE_MEMBER( keyboard_irq );
|
DECLARE_WRITE_LINE_MEMBER( keyboard_irq );
|
||||||
|
DECLARE_WRITE_LINE_MEMBER( write_uart_clock );
|
||||||
DECLARE_READ8_MEMBER(pc9801_xx_r);
|
DECLARE_READ8_MEMBER(pc9801_xx_r);
|
||||||
DECLARE_WRITE8_MEMBER(pc9801_xx_w);
|
DECLARE_WRITE8_MEMBER(pc9801_xx_w);
|
||||||
DECLARE_READ8_MEMBER(pc9801_00_r);
|
DECLARE_READ8_MEMBER(pc9801_00_r);
|
||||||
@ -1331,7 +1336,7 @@ READ8_MEMBER(pc9801_state::pc9801_70_r)
|
|||||||
if(offset & 0x08)
|
if(offset & 0x08)
|
||||||
printf("Read to undefined port [%02x]\n",offset+0x70);
|
printf("Read to undefined port [%02x]\n",offset+0x70);
|
||||||
else
|
else
|
||||||
return machine().device<pit8253_device>("pit8253")->read(space, (offset & 6) >> 1);
|
return m_pit8253->read(space, (offset & 6) >> 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0xff;
|
return 0xff;
|
||||||
@ -1349,7 +1354,7 @@ WRITE8_MEMBER(pc9801_state::pc9801_70_w)
|
|||||||
else // odd
|
else // odd
|
||||||
{
|
{
|
||||||
if(offset < 0x08)
|
if(offset < 0x08)
|
||||||
machine().device<pit8253_device>("pit8253")->write(space, (offset & 6) >> 1, data);
|
m_pit8253->write(space, (offset & 6) >> 1, data);
|
||||||
//else
|
//else
|
||||||
// printf("Write to undefined port [%02x] <- %02x\n",offset+0x70,data);
|
// printf("Write to undefined port [%02x] <- %02x\n",offset+0x70,data);
|
||||||
}
|
}
|
||||||
@ -1502,6 +1507,12 @@ WRITE8_MEMBER(pc9801_state::pc9801_a0_w)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
DECLARE_WRITE_LINE_MEMBER(pc9801_state::write_uart_clock)
|
||||||
|
{
|
||||||
|
m_sio->write_txc(state);
|
||||||
|
m_sio->write_rxc(state);
|
||||||
|
}
|
||||||
|
|
||||||
READ8_MEMBER(pc9801_state::pc9801_fdc_2hd_r)
|
READ8_MEMBER(pc9801_state::pc9801_fdc_2hd_r)
|
||||||
{
|
{
|
||||||
if((offset & 1) == 0)
|
if((offset & 1) == 0)
|
||||||
@ -2264,7 +2275,7 @@ READ8_MEMBER(pc9801_state::pc9801rs_pit_mirror_r)
|
|||||||
if(offset & 0x08)
|
if(offset & 0x08)
|
||||||
printf("Read to undefined port [%02x]\n",offset+0x3fd8);
|
printf("Read to undefined port [%02x]\n",offset+0x3fd8);
|
||||||
else
|
else
|
||||||
return machine().device<pit8253_device>("pit8253")->read(space, (offset & 6) >> 1);
|
return m_pit8253->read(space, (offset & 6) >> 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0xff;
|
return 0xff;
|
||||||
@ -2279,7 +2290,7 @@ WRITE8_MEMBER(pc9801_state::pc9801rs_pit_mirror_w)
|
|||||||
else // odd
|
else // odd
|
||||||
{
|
{
|
||||||
if(offset < 0x08)
|
if(offset < 0x08)
|
||||||
machine().device<pit8253_device>("pit8253")->write(space, (offset & 6) >> 1, data);
|
m_pit8253->write(space, (offset & 6) >> 1, data);
|
||||||
else
|
else
|
||||||
printf("Write to undefined port [%04x] <- %02x\n",offset+0x3fd8,data);
|
printf("Write to undefined port [%04x] <- %02x\n",offset+0x3fd8,data);
|
||||||
}
|
}
|
||||||
@ -3073,44 +3084,6 @@ READ8_MEMBER(pc9801_state::get_slave_ack)
|
|||||||
#define MAIN_CLOCK_X1 XTAL_1_9968MHz
|
#define MAIN_CLOCK_X1 XTAL_1_9968MHz
|
||||||
#define MAIN_CLOCK_X2 XTAL_2_4576MHz
|
#define MAIN_CLOCK_X2 XTAL_2_4576MHz
|
||||||
|
|
||||||
static const struct pit8253_interface pc9801_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
MAIN_CLOCK_X1, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
MAIN_CLOCK_X1, /* Memory Refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
MAIN_CLOCK_X1, /* RS-232c */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct pit8253_interface pc9821_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
MAIN_CLOCK_X2, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
MAIN_CLOCK_X2, /* Memory Refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
MAIN_CLOCK_X2, /* RS-232c */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/****************************************
|
/****************************************
|
||||||
*
|
*
|
||||||
* I8237 DMA interface
|
* I8237 DMA interface
|
||||||
@ -3694,7 +3667,13 @@ static MACHINE_CONFIG_START( pc9801, pc9801_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9801f)
|
MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9801f)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9801f)
|
MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9801f)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(MAIN_CLOCK_X1) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259_master", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(MAIN_CLOCK_X1) /* Memory Refresh */
|
||||||
|
MCFG_PIT8253_CLK2(MAIN_CLOCK_X1) /* RS-232c */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc9801_state, write_uart_clock))
|
||||||
|
|
||||||
MCFG_I8237_ADD("i8237", 5000000, dmac_intf) // unknown clock
|
MCFG_I8237_ADD("i8237", 5000000, dmac_intf) // unknown clock
|
||||||
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
|
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
|
||||||
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
|
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
|
||||||
@ -3706,6 +3685,7 @@ static MACHINE_CONFIG_START( pc9801, pc9801_state )
|
|||||||
MCFG_FRAGMENT_ADD(pc9801_cbus)
|
MCFG_FRAGMENT_ADD(pc9801_cbus)
|
||||||
MCFG_FRAGMENT_ADD(pc9801_sasi)
|
MCFG_FRAGMENT_ADD(pc9801_sasi)
|
||||||
MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
|
MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
|
||||||
|
|
||||||
MCFG_DEVICE_ADD(UPD8251_TAG, I8251, 0)
|
MCFG_DEVICE_ADD(UPD8251_TAG, I8251, 0)
|
||||||
|
|
||||||
MCFG_UPD765A_ADD("upd765_2hd", false, true)
|
MCFG_UPD765A_ADD("upd765_2hd", false, true)
|
||||||
@ -3763,7 +3743,13 @@ static MACHINE_CONFIG_START( pc9801rs, pc9801_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9801rs)
|
MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9801rs)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9801rs)
|
MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9801rs)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(MAIN_CLOCK_X1) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259_master", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(MAIN_CLOCK_X1) /* Memory Refresh */
|
||||||
|
MCFG_PIT8253_CLK2(MAIN_CLOCK_X1) /* RS-232c */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc9801_state, write_uart_clock))
|
||||||
|
|
||||||
MCFG_I8237_ADD("i8237", MAIN_CLOCK_X1*8, pc9801rs_dmac_intf) // unknown clock
|
MCFG_I8237_ADD("i8237", MAIN_CLOCK_X1*8, pc9801rs_dmac_intf) // unknown clock
|
||||||
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
|
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
|
||||||
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
|
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
|
||||||
@ -3841,7 +3827,13 @@ static MACHINE_CONFIG_START( pc9821, pc9801_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9821)
|
MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9821)
|
||||||
MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9821)
|
MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9821)
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pc9821_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(MAIN_CLOCK_X2) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259_master", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(MAIN_CLOCK_X2) /* Memory Refresh */
|
||||||
|
MCFG_PIT8253_CLK2(MAIN_CLOCK_X2) /* RS-232c */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pc9801_state, write_uart_clock))
|
||||||
|
|
||||||
MCFG_I8237_ADD("i8237", 16000000, pc9801rs_dmac_intf) // unknown clock
|
MCFG_I8237_ADD("i8237", 16000000, pc9801rs_dmac_intf) // unknown clock
|
||||||
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
|
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(pc9801_state,get_slave_ack) )
|
||||||
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
|
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
|
||||||
|
@ -223,7 +223,15 @@ static MACHINE_CONFIG_START( pk8020, pk8020_state )
|
|||||||
MCFG_I8255_ADD( "ppi8255_1", pk8020_ppi8255_interface_1 )
|
MCFG_I8255_ADD( "ppi8255_1", pk8020_ppi8255_interface_1 )
|
||||||
MCFG_I8255_ADD( "ppi8255_2", pk8020_ppi8255_interface_2 )
|
MCFG_I8255_ADD( "ppi8255_2", pk8020_ppi8255_interface_2 )
|
||||||
MCFG_I8255_ADD( "ppi8255_3", pk8020_ppi8255_interface_3 )
|
MCFG_I8255_ADD( "ppi8255_3", pk8020_ppi8255_interface_3 )
|
||||||
MCFG_PIT8253_ADD( "pit8253", pk8020_pit8253_intf )
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_20MHz / 10)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(pk8020_state,pk8020_pit_out0))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_20MHz / 10)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pk8020_state,pk8020_pit_out1))
|
||||||
|
MCFG_PIT8253_CLK2((XTAL_20MHz / 8) / 164)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir5_w))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259", WRITELINE(pk8020_state,pk8020_pic_set_int_line), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", WRITELINE(pk8020_state,pk8020_pic_set_int_line), VCC, NULL )
|
||||||
MCFG_DEVICE_ADD( "rs232", I8251, 0)
|
MCFG_DEVICE_ADD( "rs232", I8251, 0)
|
||||||
MCFG_DEVICE_ADD( "lan", I8251, 0)
|
MCFG_DEVICE_ADD( "lan", I8251, 0)
|
||||||
|
@ -552,7 +552,30 @@ static MACHINE_CONFIG_START( pmd85, pmd85_state )
|
|||||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||||
|
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pmd85_pit8253_interface )
|
/*******************************************************************************
|
||||||
|
|
||||||
|
I/O board 8253
|
||||||
|
--------------
|
||||||
|
|
||||||
|
Timer 0:
|
||||||
|
OUT0 - external interfaces connector (K2)
|
||||||
|
CLK0 - external interfaces connector (K2)
|
||||||
|
GATE0 - external interfaces connector (K2), default = 1
|
||||||
|
Timer 1:
|
||||||
|
OUT1 - external interfaces connector (K2), i8251 (for V24 only)
|
||||||
|
CLK1 - hardwired to 2 MHz system clock
|
||||||
|
GATE1 - external interfaces connector (K2), default = 1
|
||||||
|
Timer 2:
|
||||||
|
OUT2 - unused
|
||||||
|
CLK2 - hardwired to 1HZ signal generator
|
||||||
|
GATE2 - hardwired to 5V, default = 1
|
||||||
|
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(0)
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_CLK2(1)
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
|
@ -49,25 +49,6 @@ WRITE_LINE_MEMBER( p1_state::p1_pit8253_out2_changed )
|
|||||||
m_speaker->level_w(m_p1_spkrdata & m_p1_input);
|
m_speaker->level_w(m_p1_spkrdata & m_p1_input);
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct pit8253_interface p1_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_15MHz/12, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_15MHz/12, /* keyboard poll -- XXX edge or level triggered? */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir6_w)
|
|
||||||
}, {
|
|
||||||
XTAL_15MHz/12, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
// Keyboard (via PPI)
|
// Keyboard (via PPI)
|
||||||
|
|
||||||
WRITE8_MEMBER(p1_state::p1_ppi_porta_w)
|
WRITE8_MEMBER(p1_state::p1_ppi_porta_w)
|
||||||
@ -137,7 +118,7 @@ READ8_MEMBER(p1_state::p1_ppi2_portc_r)
|
|||||||
|
|
||||||
WRITE8_MEMBER(p1_state::p1_ppi2_portb_w)
|
WRITE8_MEMBER(p1_state::p1_ppi2_portb_w)
|
||||||
{
|
{
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
p1_speaker_set_spkrdata( data & 0x02 );
|
p1_speaker_set_spkrdata( data & 0x02 );
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -301,7 +282,13 @@ static MACHINE_CONFIG_START( poisk1, p1_state )
|
|||||||
MCFG_MACHINE_START_OVERRIDE( p1_state, poisk1 )
|
MCFG_MACHINE_START_OVERRIDE( p1_state, poisk1 )
|
||||||
MCFG_MACHINE_RESET_OVERRIDE( p1_state, poisk1 )
|
MCFG_MACHINE_RESET_OVERRIDE( p1_state, poisk1 )
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", p1_pit8253_config )
|
MCFG_DEVICE_ADD( "pit8253", PIT8253 ,0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_15MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_15MHz/12) /* keyboard poll -- XXX edge or level triggered? */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir6_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_15MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(p1_state, p1_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD( "pic8259", INPUTLINE(":maincpu", 0), VCC, NULL )
|
MCFG_PIC8259_ADD( "pic8259", INPUTLINE(":maincpu", 0), VCC, NULL )
|
||||||
|
|
||||||
|
@ -221,7 +221,14 @@ static MACHINE_CONFIG_START( pp01, pp01_state )
|
|||||||
MCFG_DEVICE_ADD("uart", I8251, 0)
|
MCFG_DEVICE_ADD("uart", I8251, 0)
|
||||||
// when rts and dtr are both high, the uart is being used for cassette operations
|
// when rts and dtr are both high, the uart is being used for cassette operations
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit8253", pp01_pit8253_intf )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(0)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(pp01_state,pp01_pit_out0))
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pp01_state,pp01_pit_out1))
|
||||||
|
MCFG_PIT8253_CLK2(2000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("pit8253", pit8253_device, write_clk0))
|
||||||
|
|
||||||
MCFG_I8255A_ADD( "ppi8255", pp01_ppi8255_interface )
|
MCFG_I8255A_ADD( "ppi8255", pp01_ppi8255_interface )
|
||||||
|
|
||||||
/* internal ram */
|
/* internal ram */
|
||||||
|
@ -503,40 +503,6 @@ WRITE_LINE_MEMBER(qx10_state::keyboard_clk)
|
|||||||
m_scc->txca_w(state);
|
m_scc->txca_w(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
Timer 0
|
|
||||||
Counter CLK Gate OUT Operation
|
|
||||||
0 Keyboard clock (1200bps) Memory register D0 Speaker timer Speaker timer (100ms)
|
|
||||||
1 Keyboard clock (1200bps) +5V 8259A (10E) IR5 Software timer
|
|
||||||
2 Clock 1,9668MHz Memory register D7 8259 (12E) IR1 Software timer
|
|
||||||
*/
|
|
||||||
|
|
||||||
static const struct pit8253_interface qx10_pit8253_1_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{ 1200, DEVCB_NULL, DEVCB_NULL },
|
|
||||||
{ 1200, DEVCB_LINE_VCC, DEVCB_NULL },
|
|
||||||
{ MAIN_CLK / 8, DEVCB_NULL, DEVCB_NULL },
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
Timer 1
|
|
||||||
Counter CLK Gate OUT Operation
|
|
||||||
0 Clock 1,9668MHz +5V Speaker frequency 1kHz
|
|
||||||
1 Clock 1,9668MHz +5V Keyboard clock 1200bps (Clock / 1664)
|
|
||||||
2 Clock 1,9668MHz +5V RS-232C baud rate 9600bps (Clock / 208)
|
|
||||||
*/
|
|
||||||
static const struct pit8253_interface qx10_pit8253_2_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{ MAIN_CLK / 8, DEVCB_LINE_VCC, DEVCB_NULL },
|
|
||||||
{ MAIN_CLK / 8, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(qx10_state, keyboard_clk) },
|
|
||||||
{ MAIN_CLK / 8, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER("upd7201", z80dart_device, rxtxcb_w) },
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Master PIC8259
|
Master PIC8259
|
||||||
IR0 Power down detection interrupt
|
IR0 Power down detection interrupt
|
||||||
@ -863,8 +829,34 @@ static MACHINE_CONFIG_START( qx10, qx10_state )
|
|||||||
MCFG_PALETTE_LENGTH(8)
|
MCFG_PALETTE_LENGTH(8)
|
||||||
|
|
||||||
/* Devices */
|
/* Devices */
|
||||||
MCFG_PIT8253_ADD("pit8253_1", qx10_pit8253_1_config)
|
|
||||||
MCFG_PIT8253_ADD("pit8253_2", qx10_pit8253_2_config)
|
/*
|
||||||
|
Timer 0
|
||||||
|
Counter CLK Gate OUT Operation
|
||||||
|
0 Keyboard clock (1200bps) Memory register D0 Speaker timer Speaker timer (100ms)
|
||||||
|
1 Keyboard clock (1200bps) +5V 8259A (10E) IR5 Software timer
|
||||||
|
2 Clock 1,9668MHz Memory register D7 8259 (12E) IR1 Software timer
|
||||||
|
*/
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("pit8253_1", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(1200)
|
||||||
|
MCFG_PIT8253_CLK1(1200)
|
||||||
|
MCFG_PIT8253_CLK2(MAIN_CLK / 8)
|
||||||
|
|
||||||
|
/*
|
||||||
|
Timer 1
|
||||||
|
Counter CLK Gate OUT Operation
|
||||||
|
0 Clock 1,9668MHz +5V Speaker frequency 1kHz
|
||||||
|
1 Clock 1,9668MHz +5V Keyboard clock 1200bps (Clock / 1664)
|
||||||
|
2 Clock 1,9668MHz +5V RS-232C baud rate 9600bps (Clock / 208)
|
||||||
|
*/
|
||||||
|
MCFG_DEVICE_ADD("pit8253_2", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(MAIN_CLK / 8)
|
||||||
|
MCFG_PIT8253_CLK1(MAIN_CLK / 8)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(qx10_state, keyboard_clk))
|
||||||
|
MCFG_PIT8253_CLK2(MAIN_CLK / 8)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("upd7201", z80dart_device, rxtxcb_w))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD("pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(qx10_state, get_slave_ack))
|
MCFG_PIC8259_ADD("pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(qx10_state, get_slave_ack))
|
||||||
MCFG_PIC8259_ADD("pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL)
|
MCFG_PIC8259_ADD("pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL)
|
||||||
MCFG_UPD7201_ADD("upd7201", MAIN_CLK/4, qx10_upd7201_interface)
|
MCFG_UPD7201_ADD("upd7201", MAIN_CLK/4, qx10_upd7201_interface)
|
||||||
|
@ -384,34 +384,6 @@ static I8255A_INTERFACE( ppi1_intf )
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit0_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
static const struct pit8253_interface pit0_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
0, // from U75 OUT0
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8259_TAG, pic8259_device, ir6_w)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/2/125,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8253_0_TAG, pit8253_device, clk2_w)
|
|
||||||
}, {
|
|
||||||
0, // from OUT2
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8259_TAG, pic8259_device, ir0_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit1_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( sage2_state::br1_w )
|
WRITE_LINE_MEMBER( sage2_state::br1_w )
|
||||||
{
|
{
|
||||||
m_usart0->write_txc(state);
|
m_usart0->write_txc(state);
|
||||||
@ -424,25 +396,6 @@ WRITE_LINE_MEMBER( sage2_state::br2_w )
|
|||||||
m_usart1->write_rxc(state);
|
m_usart1->write_rxc(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit1_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_16MHz/2/125,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8253_0_TAG, pit8253_device, clk0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/2/13,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(sage2_state, br1_w)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/2/13,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(sage2_state, br2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// upd765_interface fdc_intf
|
// upd765_interface fdc_intf
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -516,8 +469,22 @@ static MACHINE_CONFIG_START( sage2, sage2_state )
|
|||||||
MCFG_PIC8259_ADD(I8259_TAG, INPUTLINE(M68000_TAG, M68K_IRQ_1), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259_TAG, INPUTLINE(M68000_TAG, M68K_IRQ_1), VCC, NULL)
|
||||||
MCFG_I8255A_ADD(I8255A_0_TAG, ppi0_intf)
|
MCFG_I8255A_ADD(I8255A_0_TAG, ppi0_intf)
|
||||||
MCFG_I8255A_ADD(I8255A_1_TAG, ppi1_intf)
|
MCFG_I8255A_ADD(I8255A_1_TAG, ppi1_intf)
|
||||||
MCFG_PIT8253_ADD(I8253_0_TAG, pit0_intf)
|
|
||||||
MCFG_PIT8253_ADD(I8253_1_TAG, pit1_intf)
|
MCFG_DEVICE_ADD(I8253_0_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(0) // from U75 OUT0
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8259_TAG, pic8259_device, ir6_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz/2/125)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE(I8253_0_TAG, pit8253_device, write_clk2))
|
||||||
|
MCFG_PIT8253_CLK2(0) // from OUT2
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE(I8259_TAG, pic8259_device, ir0_w))
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_1_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_16MHz/2/125)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8253_0_TAG, pit8253_device, write_clk0))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz/2/13)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(sage2_state, br1_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz/2/13)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(sage2_state, br2_w))
|
||||||
|
|
||||||
MCFG_DEVICE_ADD(I8251_0_TAG, I8251, 0)
|
MCFG_DEVICE_ADD(I8251_0_TAG, I8251, 0)
|
||||||
MCFG_I8251_TXD_HANDLER(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_txd))
|
MCFG_I8251_TXD_HANDLER(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_txd))
|
||||||
|
@ -384,7 +384,14 @@ static MACHINE_CONFIG_START( special, special_state )
|
|||||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||||
|
|
||||||
/* Devices */
|
/* Devices */
|
||||||
MCFG_PIT8253_ADD( "pit8253", specimx_pit8253_intf )
|
MCFG_DEVICE_ADD( "pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(2000000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(special_state, specimx_pit8253_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(special_state, specimx_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(2000000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(special_state, specimx_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi8255", specialist_ppi8255_interface )
|
MCFG_I8255_ADD( "ppi8255", specialist_ppi8255_interface )
|
||||||
MCFG_CASSETTE_ADD( "cassette", special_cassette_interface )
|
MCFG_CASSETTE_ADD( "cassette", special_cassette_interface )
|
||||||
MCFG_SOFTWARE_LIST_ADD("cass_list","special_cass")
|
MCFG_SOFTWARE_LIST_ADD("cass_list","special_cass")
|
||||||
|
@ -107,15 +107,15 @@ WRITE8_MEMBER( tandy2k_state::enable_w )
|
|||||||
m_extclk = BIT(data, 1);
|
m_extclk = BIT(data, 1);
|
||||||
|
|
||||||
// m_speaker gate
|
// m_speaker gate
|
||||||
m_pit->gate0_w(BIT(data, 2));
|
m_pit->write_gate0(BIT(data, 2));
|
||||||
|
|
||||||
// m_speaker data
|
// m_speaker data
|
||||||
m_spkrdata = BIT(data, 3);
|
m_spkrdata = BIT(data, 3);
|
||||||
speaker_update();
|
speaker_update();
|
||||||
|
|
||||||
// refresh and baud rate clocks
|
// refresh and baud rate clocks
|
||||||
m_pit->gate1_w(BIT(data, 4));
|
m_pit->write_gate1(BIT(data, 4));
|
||||||
m_pit->gate2_w(BIT(data, 4));
|
m_pit->write_gate2(BIT(data, 4));
|
||||||
|
|
||||||
// FDC reset
|
// FDC reset
|
||||||
if(BIT(data, 5))
|
if(BIT(data, 5))
|
||||||
@ -428,25 +428,6 @@ WRITE_LINE_MEMBER( tandy2k_state::rfrqpulse_w )
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_16MHz/16,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(tandy2k_state, outspkr_w)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/8,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(tandy2k_state, intbrclk_w)
|
|
||||||
}, {
|
|
||||||
XTAL_16MHz/8,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(tandy2k_state, rfrqpulse_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
// Intel 8255A Interface
|
// Intel 8255A Interface
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( tandy2k_state::write_centronics_ack )
|
WRITE_LINE_MEMBER( tandy2k_state::write_centronics_ack )
|
||||||
@ -708,7 +689,14 @@ static MACHINE_CONFIG_START( tandy2k, tandy2k_state )
|
|||||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_rxd))
|
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_rxd))
|
||||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_dsr))
|
MCFG_RS232_DSR_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_dsr))
|
||||||
|
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_16MHz/16)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(tandy2k_state, outspkr_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz/8)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(tandy2k_state, intbrclk_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz/8)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(tandy2k_state, rfrqpulse_w))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD(I8259A_0_TAG, DEVWRITELINE(I80186_TAG, i80186_cpu_device, int0_w), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A_0_TAG, DEVWRITELINE(I80186_TAG, i80186_cpu_device, int0_w), VCC, NULL)
|
||||||
MCFG_PIC8259_ADD(I8259A_1_TAG, DEVWRITELINE(I80186_TAG, i80186_cpu_device, int1_w), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A_1_TAG, DEVWRITELINE(I80186_TAG, i80186_cpu_device, int1_w), VCC, NULL)
|
||||||
MCFG_I8272A_ADD(I8272A_TAG, true)
|
MCFG_I8272A_ADD(I8272A_TAG, true)
|
||||||
|
@ -235,54 +235,6 @@ UINT32 tdv2324_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
|
|||||||
// DEVICE CONFIGURATION
|
// DEVICE CONFIGURATION
|
||||||
//**************************************************************************
|
//**************************************************************************
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit0_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
static const struct pit8253_interface pit0_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit1_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
static const struct pit8253_interface pit1_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// Z80SIO_INTERFACE( sio_intf )
|
// Z80SIO_INTERFACE( sio_intf )
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -367,8 +319,11 @@ static MACHINE_CONFIG_START( tdv2324, tdv2324_state )
|
|||||||
|
|
||||||
// devices
|
// devices
|
||||||
MCFG_PIC8259_ADD(P8259A_TAG, NULL, VCC, NULL)
|
MCFG_PIC8259_ADD(P8259A_TAG, NULL, VCC, NULL)
|
||||||
MCFG_PIT8253_ADD(P8253_5_0_TAG, pit0_intf)
|
|
||||||
MCFG_PIT8253_ADD(P8253_5_1_TAG, pit1_intf)
|
MCFG_DEVICE_ADD(P8253_5_0_TAG, PIT8253, 0)
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD(P8253_5_1_TAG, PIT8253, 0)
|
||||||
|
|
||||||
MCFG_Z80SIO2_ADD(MK3887N4_TAG, 8000000/2, sio_intf)
|
MCFG_Z80SIO2_ADD(MK3887N4_TAG, 8000000/2, sio_intf)
|
||||||
MCFG_FD1797x_ADD(FD1797PL02_TAG, 8000000/4)
|
MCFG_FD1797x_ADD(FD1797PL02_TAG, 8000000/4)
|
||||||
MCFG_FLOPPY_DRIVE_ADD(FD1797PL02_TAG":0", tdv2324_floppies, "8dsdd", floppy_image_device::default_floppy_formats)
|
MCFG_FLOPPY_DRIVE_ADD(FD1797PL02_TAG":0", tdv2324_floppies, "8dsdd", floppy_image_device::default_floppy_formats)
|
||||||
|
@ -49,15 +49,18 @@ ToDo:
|
|||||||
class unior_state : public driver_device
|
class unior_state : public driver_device
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
unior_state(const machine_config &mconfig, device_type type, const char *tag)
|
unior_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||||
: driver_device(mconfig, type, tag)
|
driver_device(mconfig, type, tag),
|
||||||
, m_maincpu(*this, "maincpu")
|
m_maincpu(*this, "maincpu"),
|
||||||
, m_pit(*this, "pit")
|
m_pit(*this, "pit"),
|
||||||
, m_dma(*this, "dma")
|
m_dma(*this, "dma"),
|
||||||
{ }
|
m_uart(*this, "uart")
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
DECLARE_WRITE8_MEMBER(vram_w);
|
DECLARE_WRITE8_MEMBER(vram_w);
|
||||||
DECLARE_WRITE8_MEMBER(scroll_w);
|
DECLARE_WRITE8_MEMBER(scroll_w);
|
||||||
|
DECLARE_WRITE_LINE_MEMBER(write_uart_clock);
|
||||||
DECLARE_READ8_MEMBER(ppi0_b_r);
|
DECLARE_READ8_MEMBER(ppi0_b_r);
|
||||||
DECLARE_WRITE8_MEMBER(ppi0_b_w);
|
DECLARE_WRITE8_MEMBER(ppi0_b_w);
|
||||||
DECLARE_READ8_MEMBER(ppi1_a_r);
|
DECLARE_READ8_MEMBER(ppi1_a_r);
|
||||||
@ -78,6 +81,7 @@ private:
|
|||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<pit8253_device> m_pit;
|
required_device<pit8253_device> m_pit;
|
||||||
required_device<i8257_device> m_dma;
|
required_device<i8257_device> m_dma;
|
||||||
|
required_device<i8251_device> m_uart;
|
||||||
};
|
};
|
||||||
|
|
||||||
static ADDRESS_MAP_START( unior_mem, AS_PROGRAM, 8, unior_state )
|
static ADDRESS_MAP_START( unior_mem, AS_PROGRAM, 8, unior_state )
|
||||||
@ -291,40 +295,19 @@ PALETTE_INIT_MEMBER(unior_state,unior)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/*************************************************
|
|
||||||
|
|
||||||
i8253
|
|
||||||
|
|
||||||
*************************************************/
|
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_20MHz / 9, // unknown frequency
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_NULL // looks like vertical or horizontal sync pulses
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_16MHz / 9, // unknown frequency
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_NULL // UART transmit/receive clock
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_16MHz / 9 / 64, // unknown frequency
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("speaker", speaker_sound_device, level_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************************
|
/*************************************************
|
||||||
|
|
||||||
i8255
|
i8255
|
||||||
|
|
||||||
*************************************************/
|
*************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
WRITE_LINE_MEMBER(unior_state::write_uart_clock)
|
||||||
|
{
|
||||||
|
m_uart->write_txc(state);
|
||||||
|
m_uart->write_rxc(state);
|
||||||
|
}
|
||||||
|
|
||||||
READ8_MEMBER( unior_state::ppi0_b_r )
|
READ8_MEMBER( unior_state::ppi0_b_r )
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
@ -377,7 +360,7 @@ d7 = not used
|
|||||||
WRITE8_MEMBER( unior_state::ppi1_c_w )
|
WRITE8_MEMBER( unior_state::ppi1_c_w )
|
||||||
{
|
{
|
||||||
m_4e = data;
|
m_4e = data;
|
||||||
m_pit->gate2_w(BIT(data, 4));
|
m_pit->write_gate2(BIT(data, 4));
|
||||||
}
|
}
|
||||||
|
|
||||||
// ports a & b are for the keyboard
|
// ports a & b are for the keyboard
|
||||||
@ -466,7 +449,14 @@ static MACHINE_CONFIG_START( unior, unior_state )
|
|||||||
|
|
||||||
/* Devices */
|
/* Devices */
|
||||||
MCFG_DEVICE_ADD("uart", I8251, 0)
|
MCFG_DEVICE_ADD("uart", I8251, 0)
|
||||||
MCFG_PIT8253_ADD( "pit", pit_intf )
|
|
||||||
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_20MHz / 9) // unknown frequency, looks like vertical or horizontal sync pulses
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_16MHz / 9) // unknown frequency
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(unior_state, write_uart_clock))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_16MHz / 9 / 64) // unknown frequency
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("speaker", speaker_sound_device, level_w))
|
||||||
|
|
||||||
MCFG_I8255_ADD( "ppi0", ppi0_intf )
|
MCFG_I8255_ADD( "ppi0", ppi0_intf )
|
||||||
MCFG_I8255_ADD( "ppi1", ppi1_intf )
|
MCFG_I8255_ADD( "ppi1", ppi1_intf )
|
||||||
MCFG_I8257_ADD("dma", XTAL_20MHz / 9, dma_intf) // unknown clock
|
MCFG_I8257_ADD("dma", XTAL_20MHz / 9, dma_intf) // unknown clock
|
||||||
|
@ -321,10 +321,6 @@ static MC6845_INTERFACE( hd46505s_intf )
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_interface pit_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(victor9k_state::mux_serial_b_w)
|
WRITE_LINE_MEMBER(victor9k_state::mux_serial_b_w)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
@ -333,27 +329,6 @@ WRITE_LINE_MEMBER(victor9k_state::mux_serial_a_w)
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
2500000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(victor9k_state, mux_serial_b_w)
|
|
||||||
}, {
|
|
||||||
2500000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(victor9k_state, mux_serial_a_w)
|
|
||||||
}, {
|
|
||||||
100000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// PIC8259
|
// PIC8259
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -997,7 +972,15 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
|
|||||||
MCFG_IEEE488_NDAC_CALLBACK(WRITELINE(victor9k_state, write_ndac))
|
MCFG_IEEE488_NDAC_CALLBACK(WRITELINE(victor9k_state, write_ndac))
|
||||||
|
|
||||||
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(2500000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(victor9k_state, mux_serial_b_w))
|
||||||
|
MCFG_PIT8253_CLK1(2500000)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(victor9k_state, mux_serial_a_w))
|
||||||
|
MCFG_PIT8253_CLK2(100000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE(I8259A_TAG, pic8259_device, ir2_w))
|
||||||
|
|
||||||
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_30MHz/30, mpsc_intf)
|
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_30MHz/30, mpsc_intf)
|
||||||
MCFG_MC6852_ADD(MC6852_TAG, XTAL_30MHz/30, ssda_intf)
|
MCFG_MC6852_ADD(MC6852_TAG, XTAL_30MHz/30, ssda_intf)
|
||||||
|
|
||||||
|
@ -193,25 +193,6 @@ IRQ_CALLBACK_MEMBER( votrpss_state::irq_ack )
|
|||||||
return 0x38;
|
return 0x38;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_8MHz, /* Timer 0: baud rate gen for 8251 */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_8MHz / 256, /* Timer 1: Pitch */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_8MHz / 4096, /* Timer 2: Volume */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
READ8_MEMBER( votrpss_state::ppi_pa_r )
|
READ8_MEMBER( votrpss_state::ppi_pa_r )
|
||||||
{
|
{
|
||||||
UINT8 ret = m_term_data;
|
UINT8 ret = m_term_data;
|
||||||
@ -328,10 +309,12 @@ static MACHINE_CONFIG_START( votrpss, votrpss_state )
|
|||||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", i8251_device, write_rxd))
|
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", i8251_device, write_rxd))
|
||||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart", i8251_device, write_dsr))
|
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart", i8251_device, write_dsr))
|
||||||
|
|
||||||
MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
|
MCFG_DEVICE_ADD("pit", PIT8253, 0)
|
||||||
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(votrpss_state, write_uart_clock))
|
MCFG_PIT8253_CLK0(XTAL_8MHz) /* Timer 0: baud rate gen for 8251 */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(votrpss_state, write_uart_clock))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_8MHz / 256) /* Timer 1: Pitch */
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_8MHz / 4096) /* Timer 2: Volume */
|
||||||
|
|
||||||
MCFG_PIT8253_ADD( "pit", pit_intf)
|
|
||||||
MCFG_I8255_ADD("ppi", ppi_intf)
|
MCFG_I8255_ADD("ppi", ppi_intf)
|
||||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_timer", votrpss_state, irq_timer, attotime::from_msec(10))
|
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_timer", votrpss_state, irq_timer, attotime::from_msec(10))
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
@ -881,10 +881,6 @@ static I8255A_INTERFACE( ppi_intf )
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
|
||||||
// pit8253_config pit_intf
|
|
||||||
//-------------------------------------------------
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( wangpc_state::pit2_w )
|
WRITE_LINE_MEMBER( wangpc_state::pit2_w )
|
||||||
{
|
{
|
||||||
if (state)
|
if (state)
|
||||||
@ -894,26 +890,6 @@ WRITE_LINE_MEMBER( wangpc_state::pit2_w )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
500000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
2000000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
500000,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(wangpc_state, pit2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// IM6402_INTERFACE( uart_intf )
|
// IM6402_INTERFACE( uart_intf )
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -1189,7 +1165,14 @@ static MACHINE_CONFIG_START( wangpc, wangpc_state )
|
|||||||
MCFG_AM9517A_ADD(AM9517A_TAG, 4000000, dmac_intf)
|
MCFG_AM9517A_ADD(AM9517A_TAG, 4000000, dmac_intf)
|
||||||
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
|
||||||
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
|
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
|
||||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
|
||||||
|
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(500000)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE(I8259A_TAG, pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(2000000)
|
||||||
|
MCFG_PIT8253_CLK2(500000)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(wangpc_state, pit2_w))
|
||||||
|
|
||||||
MCFG_IM6402_ADD(IM6402_TAG, uart_intf)
|
MCFG_IM6402_ADD(IM6402_TAG, uart_intf)
|
||||||
MCFG_MC2661_ADD(SCN2661_TAG, 0, epci_intf)
|
MCFG_MC2661_ADD(SCN2661_TAG, 0, epci_intf)
|
||||||
MCFG_UPD765A_ADD(UPD765_TAG, false, false)
|
MCFG_UPD765A_ADD(UPD765_TAG, false, false)
|
||||||
|
@ -248,25 +248,6 @@ WRITE8_MEMBER( zorba_state::pia0_porta_w )
|
|||||||
m_floppy1->get_device()->mon_w(BIT(data, 4));
|
m_floppy1->get_device()->mon_w(BIT(data, 4));
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface pit_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_24MHz / 3, /* Timer 0: ? */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_24MHz / 3, /* Timer 1: ? */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_24MHz / 3, /* Timer 2: ? */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
PALETTE_INIT_MEMBER( zorba_state, zorba )
|
PALETTE_INIT_MEMBER( zorba_state, zorba )
|
||||||
{
|
{
|
||||||
palette_set_color_rgb( machine(), 0, 0, 0, 0 ); /* Black */
|
palette_set_color_rgb( machine(), 0, 0, 0, 0 ); /* Black */
|
||||||
@ -403,7 +384,11 @@ static MACHINE_CONFIG_START( zorba, zorba_state )
|
|||||||
// IEEE488 interface
|
// IEEE488 interface
|
||||||
MCFG_DEVICE_ADD("pia1", PIA6821, 0)
|
MCFG_DEVICE_ADD("pia1", PIA6821, 0)
|
||||||
|
|
||||||
MCFG_PIT8254_ADD( "pit", pit_intf)
|
MCFG_DEVICE_ADD("pit", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_24MHz / 3) /* Timer 0: ? */
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_24MHz / 3) /* Timer 1: ? */
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_24MHz / 3) /* Timer 2: ? */
|
||||||
|
|
||||||
MCFG_I8275_ADD("crtc", XTAL_14_31818MHz/7, 8, zorba_update_chr, DEVWRITELINE("dma", z80dma_device, rdy_w))
|
MCFG_I8275_ADD("crtc", XTAL_14_31818MHz/7, 8, zorba_update_chr, DEVWRITELINE("dma", z80dma_device, rdy_w))
|
||||||
MCFG_I8275_IRQ_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
|
MCFG_I8275_IRQ_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
|
||||||
MCFG_FD1793x_ADD("fdc", XTAL_24MHz / 24)
|
MCFG_FD1793x_ADD("fdc", XTAL_24MHz / 24)
|
||||||
|
@ -131,7 +131,7 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER(at_mc146818_irq);
|
DECLARE_WRITE_LINE_MEMBER(at_mc146818_irq);
|
||||||
DECLARE_WRITE8_MEMBER(write_rtc);
|
DECLARE_WRITE8_MEMBER(write_rtc);
|
||||||
UINT8 m_at_spkrdata;
|
UINT8 m_at_spkrdata;
|
||||||
UINT8 m_at_speaker_input;
|
UINT8 m_pit_out2;
|
||||||
int m_dma_channel;
|
int m_dma_channel;
|
||||||
bool m_cur_eop;
|
bool m_cur_eop;
|
||||||
UINT8 m_dma_offset[2][4];
|
UINT8 m_dma_offset[2][4];
|
||||||
@ -144,7 +144,6 @@ public:
|
|||||||
DECLARE_READ8_MEMBER(ps1_kbdc_r);
|
DECLARE_READ8_MEMBER(ps1_kbdc_r);
|
||||||
|
|
||||||
void at_speaker_set_spkrdata(UINT8 data);
|
void at_speaker_set_spkrdata(UINT8 data);
|
||||||
void at_speaker_set_input(UINT8 data);
|
|
||||||
DECLARE_WRITE_LINE_MEMBER(at_shutdown);
|
DECLARE_WRITE_LINE_MEMBER(at_shutdown);
|
||||||
|
|
||||||
UINT8 m_channel_check;
|
UINT8 m_channel_check;
|
||||||
@ -167,7 +166,6 @@ public:
|
|||||||
|
|
||||||
/*----------- defined in machine/at.c -----------*/
|
/*----------- defined in machine/at.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface at_pit8254_config;
|
|
||||||
extern const am9517a_interface at_dma8237_1_config;
|
extern const am9517a_interface at_dma8237_1_config;
|
||||||
extern const am9517a_interface at_dma8237_2_config;
|
extern const am9517a_interface at_dma8237_2_config;
|
||||||
|
|
||||||
|
@ -78,8 +78,6 @@ public:
|
|||||||
|
|
||||||
/*----------- defined in machine/b2m.c -----------*/
|
/*----------- defined in machine/b2m.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface b2m_pit8253_intf;
|
|
||||||
|
|
||||||
extern const i8255_interface b2m_ppi8255_interface_1;
|
extern const i8255_interface b2m_ppi8255_interface_1;
|
||||||
extern const i8255_interface b2m_ppi8255_interface_2;
|
extern const i8255_interface b2m_ppi8255_interface_2;
|
||||||
extern const i8255_interface b2m_ppi8255_interface_3;
|
extern const i8255_interface b2m_ppi8255_interface_3;
|
||||||
|
@ -101,7 +101,6 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER(bebox_ide_interrupt);
|
DECLARE_WRITE_LINE_MEMBER(bebox_ide_interrupt);
|
||||||
|
|
||||||
DECLARE_WRITE_LINE_MEMBER(bebox_keyboard_interrupt);
|
DECLARE_WRITE_LINE_MEMBER(bebox_keyboard_interrupt);
|
||||||
DECLARE_READ8_MEMBER(bebox_get_out2);
|
|
||||||
|
|
||||||
void fdc_interrupt(bool state);
|
void fdc_interrupt(bool state);
|
||||||
void fdc_dma_drq(bool state);
|
void fdc_dma_drq(bool state);
|
||||||
@ -114,7 +113,6 @@ protected:
|
|||||||
|
|
||||||
/*----------- defined in machine/bebox.c -----------*/
|
/*----------- defined in machine/bebox.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface bebox_pit8254_config;
|
|
||||||
extern const am9517a_interface bebox_dma8237_1_config;
|
extern const am9517a_interface bebox_dma8237_1_config;
|
||||||
extern const am9517a_interface bebox_dma8237_2_config;
|
extern const am9517a_interface bebox_dma8237_2_config;
|
||||||
extern const ins8250_interface bebox_uart_inteface_0;
|
extern const ins8250_interface bebox_uart_inteface_0;
|
||||||
|
@ -112,8 +112,6 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER( tmr0_w );
|
DECLARE_WRITE_LINE_MEMBER( tmr0_w );
|
||||||
DECLARE_WRITE_LINE_MEMBER( tmr1_w );
|
DECLARE_WRITE_LINE_MEMBER( tmr1_w );
|
||||||
DECLARE_WRITE_LINE_MEMBER( tmr2_w );
|
DECLARE_WRITE_LINE_MEMBER( tmr2_w );
|
||||||
DECLARE_WRITE_LINE_MEMBER( tmr3_w );
|
|
||||||
DECLARE_WRITE_LINE_MEMBER( tmr4_w );
|
|
||||||
DECLARE_WRITE_LINE_MEMBER( tmr5_w );
|
DECLARE_WRITE_LINE_MEMBER( tmr5_w );
|
||||||
|
|
||||||
TIMER_DEVICE_CALLBACK_MEMBER( tape_tick );
|
TIMER_DEVICE_CALLBACK_MEMBER( tape_tick );
|
||||||
|
@ -102,7 +102,6 @@ protected:
|
|||||||
|
|
||||||
/*----------- defined in machine/dai.c -----------*/
|
/*----------- defined in machine/dai.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface dai_pit8253_intf;
|
|
||||||
extern const i8255_interface dai_ppi82555_intf;
|
extern const i8255_interface dai_ppi82555_intf;
|
||||||
|
|
||||||
|
|
||||||
|
@ -153,7 +153,9 @@ class towns_state : public driver_device
|
|||||||
UINT8 m_towns_scsi_control;
|
UINT8 m_towns_scsi_control;
|
||||||
UINT8 m_towns_scsi_status;
|
UINT8 m_towns_scsi_status;
|
||||||
UINT8 m_towns_spkrdata;
|
UINT8 m_towns_spkrdata;
|
||||||
UINT8 m_towns_speaker_input;
|
UINT8 m_pit_out0;
|
||||||
|
UINT8 m_pit_out1;
|
||||||
|
UINT8 m_pit_out2;
|
||||||
UINT8 m_timer0;
|
UINT8 m_timer0;
|
||||||
UINT8 m_timer1;
|
UINT8 m_timer1;
|
||||||
|
|
||||||
|
@ -60,7 +60,7 @@ public:
|
|||||||
int m_dma_channel;
|
int m_dma_channel;
|
||||||
UINT8 m_dma_offset[4];
|
UINT8 m_dma_offset[4];
|
||||||
UINT8 m_pc_spkrdata;
|
UINT8 m_pc_spkrdata;
|
||||||
UINT8 m_pc_input;
|
UINT8 m_pit_out2;
|
||||||
bool m_cur_eop;
|
bool m_cur_eop;
|
||||||
|
|
||||||
UINT8 m_nmi_enabled;
|
UINT8 m_nmi_enabled;
|
||||||
|
@ -172,7 +172,6 @@ extern const unsigned char mbc55x_palette[SCREEN_NO_COLOURS][3];
|
|||||||
|
|
||||||
/*----------- defined in machine/mbc55x.c -----------*/
|
/*----------- defined in machine/mbc55x.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface mbc55x_pit8253_config;
|
|
||||||
extern const i8255_interface mbc55x_ppi8255_interface;
|
extern const i8255_interface mbc55x_ppi8255_interface;
|
||||||
|
|
||||||
|
|
||||||
|
@ -23,6 +23,7 @@ public:
|
|||||||
mc1502_state(const machine_config &mconfig, device_type type, const char *tag)
|
mc1502_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_upd8251(*this, "upd8251"),
|
||||||
m_pic8259(*this, "pic8259"),
|
m_pic8259(*this, "pic8259"),
|
||||||
m_pit8253(*this, "pit8253"),
|
m_pit8253(*this, "pit8253"),
|
||||||
m_ppi8255n1(*this, "ppi8255n1"),
|
m_ppi8255n1(*this, "ppi8255n1"),
|
||||||
@ -34,6 +35,7 @@ public:
|
|||||||
m_ram(*this, RAM_TAG) { }
|
m_ram(*this, RAM_TAG) { }
|
||||||
|
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
|
required_device<i8251_device> m_upd8251;
|
||||||
required_device<pic8259_device> m_pic8259;
|
required_device<pic8259_device> m_pic8259;
|
||||||
required_device<pit8253_device> m_pit8253;
|
required_device<pit8253_device> m_pit8253;
|
||||||
required_device<i8255_device> m_ppi8255n1;
|
required_device<i8255_device> m_ppi8255n1;
|
||||||
@ -74,6 +76,9 @@ public:
|
|||||||
DECLARE_WRITE8_MEMBER(mc1502_kppi_portb_w);
|
DECLARE_WRITE8_MEMBER(mc1502_kppi_portb_w);
|
||||||
DECLARE_WRITE8_MEMBER(mc1502_kppi_portc_w);
|
DECLARE_WRITE8_MEMBER(mc1502_kppi_portc_w);
|
||||||
|
|
||||||
|
private:
|
||||||
|
int m_pit_out2;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
TIMER_CALLBACK_MEMBER(fdc_motor_callback);
|
TIMER_CALLBACK_MEMBER(fdc_motor_callback);
|
||||||
static struct {
|
static struct {
|
||||||
|
@ -117,8 +117,6 @@ public:
|
|||||||
|
|
||||||
/*----------- defined in machine/mz700.c -----------*/
|
/*----------- defined in machine/mz700.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface mz700_pit8253_config;
|
|
||||||
extern const struct pit8253_interface mz800_pit8253_config;
|
|
||||||
extern const i8255_interface mz700_ppi8255_interface;
|
extern const i8255_interface mz700_ppi8255_interface;
|
||||||
extern const z80pio_interface mz800_z80pio_config;
|
extern const z80pio_interface mz800_z80pio_config;
|
||||||
|
|
||||||
|
@ -63,7 +63,6 @@ public:
|
|||||||
/*----------- defined in machine/mz80.c -----------*/
|
/*----------- defined in machine/mz80.c -----------*/
|
||||||
|
|
||||||
extern const i8255_interface mz80k_8255_int;
|
extern const i8255_interface mz80k_8255_int;
|
||||||
extern const struct pit8253_interface mz80k_pit8253_config;
|
|
||||||
|
|
||||||
|
|
||||||
/*----------- defined in video/mz80.c -----------*/
|
/*----------- defined in video/mz80.c -----------*/
|
||||||
|
@ -52,7 +52,7 @@ public:
|
|||||||
UINT8 m_dma_offset[2][4];
|
UINT8 m_dma_offset[2][4];
|
||||||
int m_cur_eop;
|
int m_cur_eop;
|
||||||
UINT8 m_pc_spkrdata;
|
UINT8 m_pc_spkrdata;
|
||||||
UINT8 m_pc_input;
|
UINT8 m_pit_out2;
|
||||||
UINT8 m_pcjr_dor;
|
UINT8 m_pcjr_dor;
|
||||||
emu_timer *m_pcjr_watchdog;
|
emu_timer *m_pcjr_watchdog;
|
||||||
UINT8 m_pcjx_1ff_count;
|
UINT8 m_pcjx_1ff_count;
|
||||||
@ -142,7 +142,6 @@ public:
|
|||||||
DECLARE_DEVICE_IMAGE_LOAD_MEMBER( pcjr_cartridge );
|
DECLARE_DEVICE_IMAGE_LOAD_MEMBER( pcjr_cartridge );
|
||||||
UINT8 pc_speaker_get_spk();
|
UINT8 pc_speaker_get_spk();
|
||||||
void pc_speaker_set_spkrdata(UINT8 data);
|
void pc_speaker_set_spkrdata(UINT8 data);
|
||||||
void pc_speaker_set_input(UINT8 data);
|
|
||||||
void pcjr_keyb_init();
|
void pcjr_keyb_init();
|
||||||
void mess_init_pc_common(void (*set_keyb_int_func)(running_machine &, int));
|
void mess_init_pc_common(void (*set_keyb_int_func)(running_machine &, int));
|
||||||
void pc_rtc_init();
|
void pc_rtc_init();
|
||||||
@ -174,8 +173,6 @@ void pc_set_keyb_int(running_machine &machine, int state);
|
|||||||
/*----------- defined in machine/pc.c -----------*/
|
/*----------- defined in machine/pc.c -----------*/
|
||||||
|
|
||||||
extern const struct am9517a_interface ibm5150_dma8237_config;
|
extern const struct am9517a_interface ibm5150_dma8237_config;
|
||||||
extern const struct pit8253_interface ibm5150_pit8253_config;
|
|
||||||
extern const struct pit8253_interface pcjr_pit8253_config;
|
|
||||||
extern const ins8250_interface ibm5150_com_interface[4];
|
extern const ins8250_interface ibm5150_com_interface[4];
|
||||||
extern const i8255_interface ibm5160_ppi8255_interface;
|
extern const i8255_interface ibm5160_ppi8255_interface;
|
||||||
extern const i8255_interface pc_ppi8255_interface;
|
extern const i8255_interface pc_ppi8255_interface;
|
||||||
|
@ -96,6 +96,5 @@ protected:
|
|||||||
extern const i8255_interface pk8020_ppi8255_interface_1;
|
extern const i8255_interface pk8020_ppi8255_interface_1;
|
||||||
extern const i8255_interface pk8020_ppi8255_interface_2;
|
extern const i8255_interface pk8020_ppi8255_interface_2;
|
||||||
extern const i8255_interface pk8020_ppi8255_interface_3;
|
extern const i8255_interface pk8020_ppi8255_interface_3;
|
||||||
extern const struct pit8253_interface pk8020_pit8253_intf;
|
|
||||||
|
|
||||||
#endif /* pk8020_H_ */
|
#endif /* pk8020_H_ */
|
||||||
|
@ -153,7 +153,6 @@ protected:
|
|||||||
|
|
||||||
/*----------- defined in machine/pmd85.c -----------*/
|
/*----------- defined in machine/pmd85.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface pmd85_pit8253_interface;
|
|
||||||
extern const i8255_interface pmd85_ppi8255_interface[4];
|
extern const i8255_interface pmd85_ppi8255_interface[4];
|
||||||
extern const i8255_interface alfa_ppi8255_interface[3];
|
extern const i8255_interface alfa_ppi8255_interface[3];
|
||||||
extern const i8255_interface mato_ppi8255_interface;
|
extern const i8255_interface mato_ppi8255_interface;
|
||||||
|
@ -63,7 +63,6 @@ public:
|
|||||||
|
|
||||||
|
|
||||||
/*----------- defined in machine/pp01.c -----------*/
|
/*----------- defined in machine/pp01.c -----------*/
|
||||||
extern const struct pit8253_interface pp01_pit8253_intf;
|
|
||||||
extern const i8255_interface pp01_ppi8255_interface;
|
extern const i8255_interface pp01_ppi8255_interface;
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -154,7 +154,6 @@ protected:
|
|||||||
|
|
||||||
/*----------- defined in machine/special.c -----------*/
|
/*----------- defined in machine/special.c -----------*/
|
||||||
|
|
||||||
extern const struct pit8253_interface specimx_pit8253_intf;
|
|
||||||
extern const i8255_interface specialist_ppi8255_interface;
|
extern const i8255_interface specialist_ppi8255_interface;
|
||||||
extern const i8255_interface specimx_ppi8255_interface;
|
extern const i8255_interface specimx_ppi8255_interface;
|
||||||
|
|
||||||
|
@ -183,7 +183,7 @@ WRITE8_MEMBER( amstrad_pc_state::pc1640_port60_w )
|
|||||||
m_port61=data;
|
m_port61=data;
|
||||||
if (data==0x30) m_port62=(m_port65&0x10)>>4;
|
if (data==0x30) m_port62=(m_port65&0x10)>>4;
|
||||||
else if (data==0x34) m_port62=m_port65&0xf;
|
else if (data==0x34) m_port62=m_port65&0xf;
|
||||||
machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
pc_keyb_set_clock(data&0x40);
|
pc_keyb_set_clock(data&0x40);
|
||||||
break;
|
break;
|
||||||
@ -221,7 +221,7 @@ READ8_MEMBER( amstrad_pc_state::pc1640_port60_r )
|
|||||||
|
|
||||||
case 2:
|
case 2:
|
||||||
data = m_port62;
|
data = m_port62;
|
||||||
if (machine().device<pit8253_device>("pit8253")->get_output(2))
|
if (m_pit_out2)
|
||||||
data |= 0x20;
|
data |= 0x20;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -30,13 +30,7 @@ READ8_MEMBER( at_state::get_slave_ack )
|
|||||||
void at_state::at_speaker_set_spkrdata(UINT8 data)
|
void at_state::at_speaker_set_spkrdata(UINT8 data)
|
||||||
{
|
{
|
||||||
m_at_spkrdata = data ? 1 : 0;
|
m_at_spkrdata = data ? 1 : 0;
|
||||||
m_speaker->level_w(m_at_spkrdata & m_at_speaker_input);
|
m_speaker->level_w(m_at_spkrdata & m_pit_out2);
|
||||||
}
|
|
||||||
|
|
||||||
void at_state::at_speaker_set_input(UINT8 data)
|
|
||||||
{
|
|
||||||
m_at_speaker_input = data ? 1 : 0;
|
|
||||||
m_speaker->level_w(m_at_spkrdata & m_at_speaker_input);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -55,30 +49,11 @@ WRITE_LINE_MEMBER( at_state::at_pit8254_out0_changed )
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER( at_state::at_pit8254_out2_changed )
|
WRITE_LINE_MEMBER( at_state::at_pit8254_out2_changed )
|
||||||
{
|
{
|
||||||
at_speaker_set_input( state );
|
m_pit_out2 = state ? 1 : 0;
|
||||||
|
m_speaker->level_w(m_at_spkrdata & m_pit_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface at_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4772720/4, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(at_state, at_pit8254_out0_changed)
|
|
||||||
}, {
|
|
||||||
4772720/4, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
4772720/4, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(at_state, at_pit8254_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
*
|
*
|
||||||
* PC DMA stuff
|
* PC DMA stuff
|
||||||
@ -271,7 +246,7 @@ READ8_MEMBER( at_state::at_portb_r )
|
|||||||
/* 0x10 is the dram refresh line bit, 15.085us. */
|
/* 0x10 is the dram refresh line bit, 15.085us. */
|
||||||
data |= (machine().time().as_ticks(110000) & 1) ? 0x10 : 0;
|
data |= (machine().time().as_ticks(110000) & 1) ? 0x10 : 0;
|
||||||
|
|
||||||
if (m_pit8254->get_output(2))
|
if (m_pit_out2)
|
||||||
data |= 0x20;
|
data |= 0x20;
|
||||||
else
|
else
|
||||||
data &= ~0x20; /* ps2m30 wants this */
|
data &= ~0x20; /* ps2m30 wants this */
|
||||||
@ -282,7 +257,7 @@ READ8_MEMBER( at_state::at_portb_r )
|
|||||||
WRITE8_MEMBER( at_state::at_portb_w )
|
WRITE8_MEMBER( at_state::at_portb_w )
|
||||||
{
|
{
|
||||||
m_at_speaker = data;
|
m_at_speaker = data;
|
||||||
m_pit8254->gate2_w(BIT(data, 0));
|
m_pit8254->write_gate2(BIT(data, 0));
|
||||||
at_speaker_set_spkrdata( BIT(data, 1));
|
at_speaker_set_spkrdata( BIT(data, 1));
|
||||||
m_channel_check = BIT(data, 3);
|
m_channel_check = BIT(data, 3);
|
||||||
m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
|
m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
|
||||||
@ -296,7 +271,7 @@ READ8_MEMBER( at_state::ps2_portb_r )
|
|||||||
/* 0x10 is the dram refresh line bit, 15.085us. */
|
/* 0x10 is the dram refresh line bit, 15.085us. */
|
||||||
data |= (machine().time().as_ticks(66291) & 1) ? 0x10 : 0;
|
data |= (machine().time().as_ticks(66291) & 1) ? 0x10 : 0;
|
||||||
|
|
||||||
if (m_pit8254->get_output(2))
|
if (m_pit_out2)
|
||||||
data |= 0x20;
|
data |= 0x20;
|
||||||
else
|
else
|
||||||
data &= ~0x20; /* ps2m30 wants this */
|
data &= ~0x20; /* ps2m30 wants this */
|
||||||
@ -354,7 +329,7 @@ MACHINE_START_MEMBER(at_state,at)
|
|||||||
MACHINE_RESET_MEMBER(at_state,at)
|
MACHINE_RESET_MEMBER(at_state,at)
|
||||||
{
|
{
|
||||||
m_at_spkrdata = 0;
|
m_at_spkrdata = 0;
|
||||||
m_at_speaker_input = 0;
|
m_pit_out2 = 0;
|
||||||
m_dma_channel = -1;
|
m_dma_channel = -1;
|
||||||
m_cur_eop = false;
|
m_cur_eop = false;
|
||||||
}
|
}
|
||||||
|
@ -146,31 +146,11 @@ WRITE_LINE_MEMBER(b2m_state::bm2_pit_out1)
|
|||||||
m_speaker->level_w(state);
|
m_speaker->level_w(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct pit8253_interface b2m_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir1_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(b2m_state,bm2_pit_out1)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pit8253", pit8253_device, clk0_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
WRITE8_MEMBER(b2m_state::b2m_8255_porta_w)
|
WRITE8_MEMBER(b2m_state::b2m_8255_porta_w)
|
||||||
{
|
{
|
||||||
m_b2m_8255_porta = data;
|
m_b2m_8255_porta = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(b2m_state::b2m_8255_portb_w)
|
WRITE8_MEMBER(b2m_state::b2m_8255_portb_w)
|
||||||
{
|
{
|
||||||
m_b2m_video_scroll = data;
|
m_b2m_video_scroll = data;
|
||||||
|
@ -681,28 +681,6 @@ WRITE_LINE_MEMBER(bebox_state::bebox_timer0_w)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface bebox_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4772720/4, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_timer0_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
4772720/4, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
},
|
|
||||||
{
|
|
||||||
4772720/4, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
*
|
*
|
||||||
* Flash ROM
|
* Flash ROM
|
||||||
|
@ -145,31 +145,20 @@ I8237_INTERFACE( dma2_config )
|
|||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct pit8253_interface cs4031_pit_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_14_31818MHz / 12,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("intc1", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz / 12,
|
|
||||||
DEVCB_LINE_VCC,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, ctc_out1_w)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz / 12,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, ctc_out2_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( cs4031 )
|
static MACHINE_CONFIG_FRAGMENT( cs4031 )
|
||||||
MCFG_I8237_ADD("dma1", 0, dma1_config)
|
MCFG_I8237_ADD("dma1", 0, dma1_config)
|
||||||
MCFG_I8237_ADD("dma2", 0, dma2_config)
|
MCFG_I8237_ADD("dma2", 0, dma2_config)
|
||||||
MCFG_PIC8259_ADD("intc1", WRITELINE(cs4031_device, intc1_int_w), VCC, READ8(cs4031_device, intc1_slave_ack_r))
|
MCFG_PIC8259_ADD("intc1", WRITELINE(cs4031_device, intc1_int_w), VCC, READ8(cs4031_device, intc1_slave_ack_r))
|
||||||
MCFG_PIC8259_ADD("intc2", DEVWRITELINE("intc1", pic8259_device, ir2_w), GND, NULL)
|
MCFG_PIC8259_ADD("intc2", DEVWRITELINE("intc1", pic8259_device, ir2_w), GND, NULL)
|
||||||
MCFG_PIT8254_ADD("ctc", cs4031_pit_config)
|
|
||||||
|
MCFG_DEVICE_ADD("ctc", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz / 12)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("intc1", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz / 12)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(cs4031_device, ctc_out1_w))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz / 12)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(cs4031_device, ctc_out2_w))
|
||||||
|
|
||||||
MCFG_DS12885_ADD("rtc")
|
MCFG_DS12885_ADD("rtc")
|
||||||
MCFG_MC146818_IRQ_HANDLER(WRITELINE(cs4031_device, rtc_irq_w))
|
MCFG_MC146818_IRQ_HANDLER(WRITELINE(cs4031_device, rtc_irq_w))
|
||||||
MCFG_MC146818_CENTURY_INDEX(0x32)
|
MCFG_MC146818_CENTURY_INDEX(0x32)
|
||||||
@ -351,7 +340,7 @@ void cs4031_device::device_reset()
|
|||||||
void cs4031_device::device_reset_after_children()
|
void cs4031_device::device_reset_after_children()
|
||||||
{
|
{
|
||||||
// timer 2 default state
|
// timer 2 default state
|
||||||
m_ctc->gate2_w(1);
|
m_ctc->write_gate2(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -974,7 +963,7 @@ WRITE8_MEMBER( cs4031_device::portb_w )
|
|||||||
if (!BIT(m_portb, 0))
|
if (!BIT(m_portb, 0))
|
||||||
m_portb |= 1 << 5;
|
m_portb |= 1 << 5;
|
||||||
|
|
||||||
m_ctc->gate2_w(BIT(m_portb, 0));
|
m_ctc->write_gate2(BIT(m_portb, 0));
|
||||||
|
|
||||||
m_write_spkr(!BIT(m_portb, 1));
|
m_write_spkr(!BIT(m_portb, 1));
|
||||||
|
|
||||||
|
@ -80,27 +80,6 @@ I8255A_INTERFACE( dai_ppi82555_intf )
|
|||||||
DEVCB_NULL /* Port C write */
|
DEVCB_NULL /* Port C write */
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct pit8253_interface dai_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("custom", dai_sound_device, set_input_ch0),
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("custom", dai_sound_device, set_input_ch1),
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("custom", dai_sound_device, set_input_ch2),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
IRQ_CALLBACK_MEMBER(dai_state::int_ack)
|
IRQ_CALLBACK_MEMBER(dai_state::int_ack)
|
||||||
{
|
{
|
||||||
return m_tms5501->get_vector();
|
return m_tms5501->get_vector();
|
||||||
|
@ -168,7 +168,7 @@ WRITE8_MEMBER( europc_pc_state::europc_pio_w )
|
|||||||
m_port61=data;
|
m_port61=data;
|
||||||
// if (data == 0x30) pc1640.port62 = (pc1640.port65 & 0x10) >> 4;
|
// if (data == 0x30) pc1640.port62 = (pc1640.port65 & 0x10) >> 4;
|
||||||
// else if (data == 0x34) pc1640.port62 = pc1640.port65 & 0xf;
|
// else if (data == 0x34) pc1640.port62 = pc1640.port65 & 0xf;
|
||||||
space.machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata(BIT(data, 1));
|
pc_speaker_set_spkrdata(BIT(data, 1));
|
||||||
pc_keyb_set_clock(BIT(data, 6));
|
pc_keyb_set_clock(BIT(data, 6));
|
||||||
break;
|
break;
|
||||||
@ -191,7 +191,7 @@ READ8_MEMBER( europc_pc_state::europc_pio_r )
|
|||||||
data = m_port61;
|
data = m_port61;
|
||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
if (space.machine().device<pit8253_device>("pit8253")->get_output(2))
|
if (m_pit_out2)
|
||||||
data |= 0x20;
|
data |= 0x20;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -190,7 +190,7 @@ I8237_INTERFACE( pc_dma8237_config )
|
|||||||
WRITE_LINE_MEMBER(ibm5160_mb_device::pc_speaker_set_spkrdata)
|
WRITE_LINE_MEMBER(ibm5160_mb_device::pc_speaker_set_spkrdata)
|
||||||
{
|
{
|
||||||
m_pc_spkrdata = state ? 1 : 0;
|
m_pc_spkrdata = state ? 1 : 0;
|
||||||
m_speaker->level_w(m_pc_spkrdata & m_pc_input);
|
m_speaker->level_w(m_pc_spkrdata & m_pit_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -214,30 +214,11 @@ WRITE_LINE_MEMBER( ibm5160_mb_device::pc_pit8253_out1_changed )
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER( ibm5160_mb_device::pc_pit8253_out2_changed )
|
WRITE_LINE_MEMBER( ibm5160_mb_device::pc_pit8253_out2_changed )
|
||||||
{
|
{
|
||||||
m_pc_input = state ? 1 : 0;
|
m_pit_out2 = state ? 1 : 0;
|
||||||
m_speaker->level_w(m_pc_spkrdata & m_pc_input);
|
m_speaker->level_w(m_pc_spkrdata & m_pit_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface pc_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_14_31818MHz/12, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_pit8253_out1_changed)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/**********************************************************
|
/**********************************************************
|
||||||
*
|
*
|
||||||
* PPI8255 interface
|
* PPI8255 interface
|
||||||
@ -370,7 +351,6 @@ READ8_MEMBER (ibm5160_mb_device::pc_ppi_porta_r)
|
|||||||
|
|
||||||
READ8_MEMBER ( ibm5160_mb_device::pc_ppi_portc_r )
|
READ8_MEMBER ( ibm5160_mb_device::pc_ppi_portc_r )
|
||||||
{
|
{
|
||||||
int timer2_output = m_pit8253->get_output(2);
|
|
||||||
int data=0xff;
|
int data=0xff;
|
||||||
|
|
||||||
data&=~0x80; // no parity error
|
data&=~0x80; // no parity error
|
||||||
@ -391,9 +371,9 @@ READ8_MEMBER ( ibm5160_mb_device::pc_ppi_portc_r )
|
|||||||
|
|
||||||
if ( m_ppi_portb & 0x01 )
|
if ( m_ppi_portb & 0x01 )
|
||||||
{
|
{
|
||||||
data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
|
data = ( data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
|
||||||
}
|
}
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
@ -406,7 +386,7 @@ WRITE8_MEMBER( ibm5160_mb_device::pc_ppi_portb_w )
|
|||||||
m_ppi_portc_switch_high = data & 0x08;
|
m_ppi_portc_switch_high = data & 0x08;
|
||||||
m_ppi_keyboard_clear = data & 0x80;
|
m_ppi_keyboard_clear = data & 0x80;
|
||||||
m_ppi_keyb_clock = data & 0x40;
|
m_ppi_keyb_clock = data & 0x40;
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
|
|
||||||
/* If PB7 is set clear the shift register and reset the IRQ line */
|
/* If PB7 is set clear the shift register and reset the IRQ line */
|
||||||
@ -492,7 +472,13 @@ const device_type IBM5160_MOTHERBOARD = &device_creator<ibm5160_mb_device>;
|
|||||||
//**************************************************************************
|
//**************************************************************************
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( ibm5160_mb_config )
|
static MACHINE_CONFIG_FRAGMENT( ibm5160_mb_config )
|
||||||
MCFG_PIT8253_ADD( "pit8253", pc_pit8253_config )
|
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
|
||||||
|
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(ibm5160_mb_device, pc_pit8253_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(ibm5160_mb_device, pc_pit8253_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, pc_dma8237_config )
|
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, pc_dma8237_config )
|
||||||
|
|
||||||
@ -685,7 +671,7 @@ void ibm5160_mb_device::device_reset()
|
|||||||
m_u73_q2 = 0;
|
m_u73_q2 = 0;
|
||||||
m_out1 = 2; // initial state of pit output is undefined
|
m_out1 = 2; // initial state of pit output is undefined
|
||||||
m_pc_spkrdata = 0;
|
m_pc_spkrdata = 0;
|
||||||
m_pc_input = 0;
|
m_pit_out2 = 0;
|
||||||
m_dma_channel = -1;
|
m_dma_channel = -1;
|
||||||
m_cur_eop = false;
|
m_cur_eop = false;
|
||||||
memset(m_dma_offset,0,sizeof(m_dma_offset));
|
memset(m_dma_offset,0,sizeof(m_dma_offset));
|
||||||
@ -807,7 +793,6 @@ READ8_MEMBER (ibm5150_mb_device::pc_ppi_porta_r)
|
|||||||
|
|
||||||
READ8_MEMBER ( ibm5150_mb_device::pc_ppi_portc_r )
|
READ8_MEMBER ( ibm5150_mb_device::pc_ppi_portc_r )
|
||||||
{
|
{
|
||||||
int timer2_output = m_pit8253->get_output(2);
|
|
||||||
int data=0xff;
|
int data=0xff;
|
||||||
|
|
||||||
data&=~0x80; // no parity error
|
data&=~0x80; // no parity error
|
||||||
@ -865,10 +850,10 @@ READ8_MEMBER ( ibm5150_mb_device::pc_ppi_portc_r )
|
|||||||
{
|
{
|
||||||
if ( m_ppi_portb & 0x01 )
|
if ( m_ppi_portb & 0x01 )
|
||||||
{
|
{
|
||||||
data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
|
data = ( data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
@ -881,7 +866,7 @@ WRITE8_MEMBER( ibm5150_mb_device::pc_ppi_portb_w )
|
|||||||
m_ppi_portc_switch_high = data & 0x08;
|
m_ppi_portc_switch_high = data & 0x08;
|
||||||
m_ppi_keyboard_clear = data & 0x80;
|
m_ppi_keyboard_clear = data & 0x80;
|
||||||
m_ppi_keyb_clock = data & 0x40;
|
m_ppi_keyb_clock = data & 0x40;
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
|
|
||||||
m_cassette->change_state(( data & 0x08 ) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
|
m_cassette->change_state(( data & 0x08 ) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
|
||||||
@ -992,7 +977,7 @@ WRITE8_MEMBER( ec1841_mb_device::pc_ppi_portb_w )
|
|||||||
m_ppi_portc_switch_high = data & 0x04;
|
m_ppi_portc_switch_high = data & 0x04;
|
||||||
m_ppi_keyboard_clear = data & 0x80;
|
m_ppi_keyboard_clear = data & 0x80;
|
||||||
m_ppi_keyb_clock = data & 0x40;
|
m_ppi_keyb_clock = data & 0x40;
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
|
|
||||||
/* If PB7 is set clear the shift register and reset the IRQ line */
|
/* If PB7 is set clear the shift register and reset the IRQ line */
|
||||||
@ -1010,7 +995,6 @@ WRITE8_MEMBER( ec1841_mb_device::pc_ppi_portb_w )
|
|||||||
|
|
||||||
READ8_MEMBER ( ec1841_mb_device::pc_ppi_portc_r )
|
READ8_MEMBER ( ec1841_mb_device::pc_ppi_portc_r )
|
||||||
{
|
{
|
||||||
int timer2_output = m_pit8253->get_output(2);
|
|
||||||
int data=0xff;
|
int data=0xff;
|
||||||
|
|
||||||
data&=~0x80; // no parity error
|
data&=~0x80; // no parity error
|
||||||
@ -1021,7 +1005,7 @@ READ8_MEMBER ( ec1841_mb_device::pc_ppi_portc_r )
|
|||||||
data = (data & 0xf0) | (ioport("SA2")->read() & 0x0f);
|
data = (data & 0xf0) | (ioport("SA2")->read() & 0x0f);
|
||||||
}
|
}
|
||||||
|
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
|
@ -264,27 +264,6 @@ WRITE_LINE_MEMBER( isa8_ibm_mfc_device::d8253_out1 )
|
|||||||
set_pc_interrupt(PC_IRQ_TIMERB, 1);
|
set_pc_interrupt(PC_IRQ_TIMERB, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pit8253_interface d8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_4MHz / 8,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, isa8_ibm_mfc_device, d8253_out0)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, isa8_ibm_mfc_device, d8253_out1)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_4MHz / 2,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("d8253", pit8253_device, clk1_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// uPD71051 USART
|
// uPD71051 USART
|
||||||
@ -324,7 +303,13 @@ static MACHINE_CONFIG_FRAGMENT( ibm_mfc )
|
|||||||
MCFG_DEVICE_ADD("usart_clock", CLOCK, XTAL_4MHz / 8) // 500KHz
|
MCFG_DEVICE_ADD("usart_clock", CLOCK, XTAL_4MHz / 8) // 500KHz
|
||||||
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(isa8_ibm_mfc_device, write_usart_clock))
|
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(isa8_ibm_mfc_device, write_usart_clock))
|
||||||
|
|
||||||
MCFG_PIT8253_ADD("d8253", d8253_intf)
|
MCFG_DEVICE_ADD("d8253", PIT8253, 0)
|
||||||
|
MCFG_PIT8253_CLK0(XTAL_4MHz / 8)
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(isa8_ibm_mfc_device, d8253_out0))
|
||||||
|
MCFG_PIT8253_CLK1(0)
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(isa8_ibm_mfc_device, d8253_out1))
|
||||||
|
MCFG_PIT8253_CLK2(XTAL_4MHz / 2)
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("d8253", pit8253_device, write_clk1))
|
||||||
|
|
||||||
MCFG_SPEAKER_STANDARD_STEREO("ymleft", "ymright")
|
MCFG_SPEAKER_STANDARD_STEREO("ymleft", "ymright")
|
||||||
MCFG_YM2151_ADD("ym2151", XTAL_4MHz)
|
MCFG_YM2151_ADD("ym2151", XTAL_4MHz)
|
||||||
|
@ -124,29 +124,6 @@ IRQ_CALLBACK_MEMBER(mbc55x_state::mbc55x_irq_callback)
|
|||||||
return m_pic->inta_r();
|
return m_pic->inta_r();
|
||||||
}
|
}
|
||||||
|
|
||||||
/* PIT8253 Configuration */
|
|
||||||
|
|
||||||
const struct pit8253_interface mbc55x_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
PIT_C0_CLOCK,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(PIC8259_TAG, pic8259_device, ir0_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
PIT_C1_CLOCK,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(PIC8259_TAG, pic8259_device, ir1_w)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
PIT_C2_CLOCK,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(mbc55x_state, pit8253_t2)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
READ8_MEMBER(mbc55x_state::mbcpit8253_r)
|
READ8_MEMBER(mbc55x_state::mbcpit8253_r)
|
||||||
{
|
{
|
||||||
return m_pit->read(space, offset >> 1);
|
return m_pit->read(space, offset >> 1);
|
||||||
@ -160,7 +137,7 @@ WRITE8_MEMBER(mbc55x_state::mbcpit8253_w)
|
|||||||
WRITE_LINE_MEMBER( mbc55x_state::pit8253_t2 )
|
WRITE_LINE_MEMBER( mbc55x_state::pit8253_t2 )
|
||||||
{
|
{
|
||||||
m_kb_uart->write_txc(state);
|
m_kb_uart->write_txc(state);
|
||||||
m_kb_uart->write_txc(state);
|
m_kb_uart->write_rxc(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Video ram page register */
|
/* Video ram page register */
|
||||||
|
@ -45,30 +45,6 @@ I8255_INTERFACE( mz700_ppi8255_interface )
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface mz700_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
/* clockin gate callback */
|
|
||||||
{ XTAL_17_73447MHz/20, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_out0_changed) },
|
|
||||||
{ 15611.0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER("pit8253", pit8253_device, clk2_w) },
|
|
||||||
{ 0, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_irq_2) },
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
const struct pit8253_interface mz800_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
/* clockin gate callback */
|
|
||||||
{ XTAL_17_73447MHz/16, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_out0_changed) },
|
|
||||||
{ 15611.0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE_MEMBER("pit8253", pit8253_device, clk2_w) },
|
|
||||||
{ 0, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_irq_2) },
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
INITIALIZATIoN
|
INITIALIZATIoN
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
@ -125,7 +101,7 @@ READ8_MEMBER(mz_state::mz700_e008_r)
|
|||||||
|
|
||||||
WRITE8_MEMBER(mz_state::mz700_e008_w)
|
WRITE8_MEMBER(mz_state::mz700_e008_w)
|
||||||
{
|
{
|
||||||
m_pit->gate0_w(BIT(data, 0));
|
m_pit->write_gate0(BIT(data, 0));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -81,16 +81,6 @@ I8255_INTERFACE( mz80k_8255_int )
|
|||||||
DEVCB_DRIVER_MEMBER(mz80_state, mz80k_8255_portc_w),
|
DEVCB_DRIVER_MEMBER(mz80_state, mz80k_8255_portc_w),
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct pit8253_interface mz80k_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
/* clockin gate callback */
|
|
||||||
{ XTAL_8MHz/ 4, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mz80_state, pit_out0_changed) },
|
|
||||||
{ XTAL_8MHz/256, DEVCB_NULL, DEVCB_DEVICE_LINE_MEMBER("pit8253", pit8253_device, clk2_w) },
|
|
||||||
{ 0, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mz80_state, pit_out2_changed) },
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
READ8_MEMBER( mz80_state::mz80k_strobe_r )
|
READ8_MEMBER( mz80_state::mz80k_strobe_r )
|
||||||
{
|
{
|
||||||
return 0x7e | (UINT8)m_mz80k_tempo_strobe;
|
return 0x7e | (UINT8)m_mz80k_tempo_strobe;
|
||||||
@ -98,5 +88,5 @@ READ8_MEMBER( mz80_state::mz80k_strobe_r )
|
|||||||
|
|
||||||
WRITE8_MEMBER( mz80_state::mz80k_strobe_w )
|
WRITE8_MEMBER( mz80_state::mz80k_strobe_w )
|
||||||
{
|
{
|
||||||
m_pit->gate0_w(BIT(data, 0));
|
m_pit->write_gate0(BIT(data, 0));
|
||||||
}
|
}
|
||||||
|
@ -252,7 +252,7 @@ WRITE_LINE_MEMBER(pc_state::pcjr_pic8259_set_int_line)
|
|||||||
*************************************************************************/
|
*************************************************************************/
|
||||||
UINT8 pc_state::pc_speaker_get_spk()
|
UINT8 pc_state::pc_speaker_get_spk()
|
||||||
{
|
{
|
||||||
return m_pc_spkrdata & m_pc_input;
|
return m_pc_spkrdata & m_pit_out2;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -263,13 +263,6 @@ void pc_state::pc_speaker_set_spkrdata(UINT8 data)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void pc_state::pc_speaker_set_input(UINT8 data)
|
|
||||||
{
|
|
||||||
m_pc_input = data ? 1 : 0;
|
|
||||||
m_speaker->level_w(pc_speaker_get_spk());
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************************************
|
/*************************************************************
|
||||||
*
|
*
|
||||||
* pit8253 configuration
|
* pit8253 configuration
|
||||||
@ -290,55 +283,11 @@ WRITE_LINE_MEMBER(pc_state::ibm5150_pit8253_out1_changed)
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER(pc_state::ibm5150_pit8253_out2_changed)
|
WRITE_LINE_MEMBER(pc_state::ibm5150_pit8253_out2_changed)
|
||||||
{
|
{
|
||||||
pc_speaker_set_input( state );
|
m_pit_out2 = state ? 1 : 0;
|
||||||
|
m_speaker->level_w(pc_speaker_get_spk());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface ibm5150_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_14_31818MHz/12, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out1_changed)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
On the PC Jr the input for clock 1 seems to be selectable
|
|
||||||
based on bit 4(/5?) written to output port A0h. This is not
|
|
||||||
supported yet.
|
|
||||||
*/
|
|
||||||
|
|
||||||
const struct pit8253_interface pcjr_pit8253_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_14_31818MHz/12, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL
|
|
||||||
}, {
|
|
||||||
XTAL_14_31818MHz/12, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/**********************************************************
|
/**********************************************************
|
||||||
*
|
*
|
||||||
* COM hardware
|
* COM hardware
|
||||||
@ -645,7 +594,6 @@ READ8_MEMBER(pc_state::ibm5160_ppi_porta_r)
|
|||||||
|
|
||||||
READ8_MEMBER(pc_state::ibm5160_ppi_portc_r)
|
READ8_MEMBER(pc_state::ibm5160_ppi_portc_r)
|
||||||
{
|
{
|
||||||
int timer2_output = m_pit8253->get_output(2);
|
|
||||||
int data=0xff;
|
int data=0xff;
|
||||||
|
|
||||||
data&=~0x80; // no parity error
|
data&=~0x80; // no parity error
|
||||||
@ -667,9 +615,9 @@ READ8_MEMBER(pc_state::ibm5160_ppi_portc_r)
|
|||||||
|
|
||||||
if ( m_ppi_portb & 0x01 )
|
if ( m_ppi_portb & 0x01 )
|
||||||
{
|
{
|
||||||
data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
|
data = ( data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
|
||||||
}
|
}
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
@ -682,7 +630,7 @@ WRITE8_MEMBER(pc_state::ibm5160_ppi_portb_w)
|
|||||||
m_ppi_portc_switch_high = data & 0x08;
|
m_ppi_portc_switch_high = data & 0x08;
|
||||||
m_ppi_keyboard_clear = data & 0x80;
|
m_ppi_keyboard_clear = data & 0x80;
|
||||||
m_ppi_keyb_clock = data & 0x40;
|
m_ppi_keyb_clock = data & 0x40;
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
|
|
||||||
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
|
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
|
||||||
@ -743,7 +691,7 @@ WRITE8_MEMBER(pc_state::pc_ppi_portb_w)
|
|||||||
m_ppi_portc_switch_high = data & 0x08;
|
m_ppi_portc_switch_high = data & 0x08;
|
||||||
m_ppi_keyboard_clear = data & 0x80;
|
m_ppi_keyboard_clear = data & 0x80;
|
||||||
m_ppi_keyb_clock = data & 0x40;
|
m_ppi_keyb_clock = data & 0x40;
|
||||||
m_pit8253->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
pc_keyb_set_clock( m_ppi_keyb_clock );
|
pc_keyb_set_clock( m_ppi_keyb_clock );
|
||||||
|
|
||||||
@ -768,7 +716,7 @@ WRITE8_MEMBER(pc_state::pcjr_ppi_portb_w)
|
|||||||
/* KB controller port B */
|
/* KB controller port B */
|
||||||
m_ppi_portb = data;
|
m_ppi_portb = data;
|
||||||
m_ppi_portc_switch_high = data & 0x08;
|
m_ppi_portc_switch_high = data & 0x08;
|
||||||
machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
|
|
||||||
m_cassette->change_state(( data & 0x08 ) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
|
m_cassette->change_state(( data & 0x08 ) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
|
||||||
@ -801,7 +749,6 @@ READ8_MEMBER(pc_state::pcjr_ppi_porta_r)
|
|||||||
*/
|
*/
|
||||||
READ8_MEMBER(pc_state::pcjr_ppi_portc_r)
|
READ8_MEMBER(pc_state::pcjr_ppi_portc_r)
|
||||||
{
|
{
|
||||||
int timer2_output = machine().device<pit8253_device>("pit8253")->get_output(2);
|
|
||||||
int data=0xff;
|
int data=0xff;
|
||||||
|
|
||||||
data&=~0x80;
|
data&=~0x80;
|
||||||
@ -826,10 +773,10 @@ READ8_MEMBER(pc_state::pcjr_ppi_portc_r)
|
|||||||
{
|
{
|
||||||
if ( m_ppi_portb & 0x01 )
|
if ( m_ppi_portb & 0x01 )
|
||||||
{
|
{
|
||||||
data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
|
data = ( data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
|
data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
|
||||||
data = ( data & ~0x40 ) | ( ( pcjr_keyb.raw_keyb_data & 0x01 ) ? 0x40 : 0x00 );
|
data = ( data & ~0x40 ) | ( ( pcjr_keyb.raw_keyb_data & 0x01 ) ? 0x40 : 0x00 );
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
@ -1123,7 +1070,7 @@ MACHINE_RESET_MEMBER(pc_state,pc)
|
|||||||
m_u73_q2 = 0;
|
m_u73_q2 = 0;
|
||||||
m_out1 = 0;
|
m_out1 = 0;
|
||||||
m_pc_spkrdata = 0;
|
m_pc_spkrdata = 0;
|
||||||
m_pc_input = 1;
|
m_pit_out2 = 1;
|
||||||
m_dma_channel = -1;
|
m_dma_channel = -1;
|
||||||
m_cur_eop = 0;
|
m_cur_eop = 0;
|
||||||
memset(m_dma_offset,0,sizeof(m_dma_offset));
|
memset(m_dma_offset,0,sizeof(m_dma_offset));
|
||||||
@ -1156,7 +1103,7 @@ MACHINE_RESET_MEMBER(pc_state,pcjr)
|
|||||||
m_u73_q2 = 0;
|
m_u73_q2 = 0;
|
||||||
m_out1 = 0;
|
m_out1 = 0;
|
||||||
m_pc_spkrdata = 0;
|
m_pc_spkrdata = 0;
|
||||||
m_pc_input = 1;
|
m_pit_out2 = 1;
|
||||||
m_dma_channel = -1;
|
m_dma_channel = -1;
|
||||||
memset(m_dma_offset,0,sizeof(m_dma_offset));
|
memset(m_dma_offset,0,sizeof(m_dma_offset));
|
||||||
m_ppi_portc_switch_high = 0;
|
m_ppi_portc_switch_high = 0;
|
||||||
|
@ -920,27 +920,6 @@ WRITE_LINE_MEMBER(pk8020_state::pk8020_pit_out1)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface pk8020_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
XTAL_20MHz / 10,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pk8020_state,pk8020_pit_out0)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
XTAL_20MHz / 10,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pk8020_state,pk8020_pit_out1)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
(XTAL_20MHz / 8) / 164,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir5_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(pk8020_state::pk8020_pic_set_int_line)
|
WRITE_LINE_MEMBER(pk8020_state::pk8020_pic_set_int_line)
|
||||||
{
|
{
|
||||||
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
||||||
|
@ -380,35 +380,6 @@ WRITE8_MEMBER(pmd85_state::pmd85_ppi_2_portc_w)
|
|||||||
|
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
|
|
||||||
/*******************************************************************************
|
|
||||||
|
|
||||||
I/O board 8253
|
|
||||||
--------------
|
|
||||||
|
|
||||||
Timer 0:
|
|
||||||
OUT0 - external interfaces connector (K2)
|
|
||||||
CLK0 - external interfaces connector (K2)
|
|
||||||
GATE0 - external interfaces connector (K2), default = 1
|
|
||||||
Timer 1:
|
|
||||||
OUT0 - external interfaces connector (K2), i8251 (for V24 only)
|
|
||||||
CLK0 - hardwired to 2 MHz system clock
|
|
||||||
GATE0 - external interfaces connector (K2), default = 1
|
|
||||||
Timer 2:
|
|
||||||
OUT0 - unused
|
|
||||||
CLK0 - hardwired to 1HZ signal generator
|
|
||||||
GATE0 - hardwired to 5V, default = 1
|
|
||||||
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
const struct pit8253_interface pmd85_pit8253_interface =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{ 0, DEVCB_NULL, DEVCB_NULL },
|
|
||||||
{ 2000000, DEVCB_NULL, DEVCB_NULL },
|
|
||||||
{ 1, DEVCB_LINE_VCC, DEVCB_NULL }
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
|
|
||||||
I/O board external interfaces connector (K2)
|
I/O board external interfaces connector (K2)
|
||||||
|
@ -159,27 +159,6 @@ WRITE_LINE_MEMBER(pp01_state::pp01_pit_out1)
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct pit8253_interface pp01_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
0,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pp01_state,pp01_pit_out0)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(pp01_state,pp01_pit_out1)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER("pit8253", pit8253_device, clk0_w)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
READ8_MEMBER(pp01_state::pp01_8255_porta_r)
|
READ8_MEMBER(pp01_state::pp01_8255_porta_r)
|
||||||
{
|
{
|
||||||
return m_video_scroll;
|
return m_video_scroll;
|
||||||
|
@ -10,25 +10,6 @@
|
|||||||
#include "bus/pc_kbd/keyboards.h"
|
#include "bus/pc_kbd/keyboards.h"
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface at_pit8254_config =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
4772720/4, /* heartbeat IRQ */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, at_pit8254_out0_changed)
|
|
||||||
}, {
|
|
||||||
4772720/4, /* dram refresh */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, at_pit8254_out1_changed)
|
|
||||||
}, {
|
|
||||||
4772720/4, /* pio port c pin 4, and speaker polling enough */
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, at_pit8254_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
I8237_INTERFACE( at_dma8237_1_config )
|
I8237_INTERFACE( at_dma8237_1_config )
|
||||||
{
|
{
|
||||||
DEVCB_DEVICE_LINE_MEMBER("dma8237_2",am9517a_device,dreq0_w),
|
DEVCB_DEVICE_LINE_MEMBER("dma8237_2",am9517a_device,dreq0_w),
|
||||||
@ -102,7 +83,13 @@ static SLOT_INTERFACE_START(pc_isa_onboard)
|
|||||||
SLOT_INTERFACE_END
|
SLOT_INTERFACE_END
|
||||||
|
|
||||||
static MACHINE_CONFIG_FRAGMENT( southbridge )
|
static MACHINE_CONFIG_FRAGMENT( southbridge )
|
||||||
MCFG_PIT8254_ADD( "pit8254", at_pit8254_config )
|
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
|
||||||
|
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
|
||||||
|
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(southbridge_device, at_pit8254_out0_changed))
|
||||||
|
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
|
||||||
|
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(southbridge_device, at_pit8254_out1_changed))
|
||||||
|
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
|
||||||
|
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(southbridge_device, at_pit8254_out2_changed))
|
||||||
|
|
||||||
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config )
|
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config )
|
||||||
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config )
|
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config )
|
||||||
@ -234,7 +221,7 @@ void southbridge_device::device_start()
|
|||||||
void southbridge_device::device_reset()
|
void southbridge_device::device_reset()
|
||||||
{
|
{
|
||||||
m_at_spkrdata = 0;
|
m_at_spkrdata = 0;
|
||||||
m_at_speaker_input = 0;
|
m_pit_out2 = 0;
|
||||||
m_dma_channel = -1;
|
m_dma_channel = -1;
|
||||||
m_cur_eop = false;
|
m_cur_eop = false;
|
||||||
m_nmi_enabled = 0;
|
m_nmi_enabled = 0;
|
||||||
@ -263,13 +250,7 @@ READ8_MEMBER( southbridge_device::get_slave_ack )
|
|||||||
void southbridge_device::at_speaker_set_spkrdata(UINT8 data)
|
void southbridge_device::at_speaker_set_spkrdata(UINT8 data)
|
||||||
{
|
{
|
||||||
m_at_spkrdata = data ? 1 : 0;
|
m_at_spkrdata = data ? 1 : 0;
|
||||||
m_speaker->level_w(m_at_spkrdata & m_at_speaker_input);
|
m_speaker->level_w(m_at_spkrdata & m_pit_out2);
|
||||||
}
|
|
||||||
|
|
||||||
void southbridge_device::at_speaker_set_input(UINT8 data)
|
|
||||||
{
|
|
||||||
m_at_speaker_input = data ? 1 : 0;
|
|
||||||
m_speaker->level_w(m_at_spkrdata & m_at_speaker_input);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -294,7 +275,8 @@ WRITE_LINE_MEMBER( southbridge_device::at_pit8254_out1_changed )
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER( southbridge_device::at_pit8254_out2_changed )
|
WRITE_LINE_MEMBER( southbridge_device::at_pit8254_out2_changed )
|
||||||
{
|
{
|
||||||
at_speaker_set_input( state );
|
m_pit_out2 = state ? 1 : 0;
|
||||||
|
m_speaker->level_w(m_at_spkrdata & m_pit_out2);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
@ -462,7 +444,7 @@ READ8_MEMBER( southbridge_device::at_portb_r )
|
|||||||
/* 0x10 is the dram refresh line bit on the 5170, just a timer here, 15.085us. */
|
/* 0x10 is the dram refresh line bit on the 5170, just a timer here, 15.085us. */
|
||||||
data |= m_refresh ? 0x10 : 0;
|
data |= m_refresh ? 0x10 : 0;
|
||||||
|
|
||||||
if (m_pit8254->get_output(2))
|
if (m_pit_out2)
|
||||||
data |= 0x20;
|
data |= 0x20;
|
||||||
else
|
else
|
||||||
data &= ~0x20; /* ps2m30 wants this */
|
data &= ~0x20; /* ps2m30 wants this */
|
||||||
@ -473,7 +455,7 @@ READ8_MEMBER( southbridge_device::at_portb_r )
|
|||||||
WRITE8_MEMBER( southbridge_device::at_portb_w )
|
WRITE8_MEMBER( southbridge_device::at_portb_w )
|
||||||
{
|
{
|
||||||
m_at_speaker = data;
|
m_at_speaker = data;
|
||||||
m_pit8254->gate2_w(BIT(data, 0));
|
m_pit8254->write_gate2(BIT(data, 0));
|
||||||
at_speaker_set_spkrdata( BIT(data, 1));
|
at_speaker_set_spkrdata( BIT(data, 1));
|
||||||
m_channel_check = BIT(data, 3);
|
m_channel_check = BIT(data, 3);
|
||||||
m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
|
m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
|
||||||
|
@ -111,7 +111,7 @@ public:
|
|||||||
DECLARE_WRITE8_MEMBER(pc_dma_write_word);
|
DECLARE_WRITE8_MEMBER(pc_dma_write_word);
|
||||||
protected:
|
protected:
|
||||||
UINT8 m_at_spkrdata;
|
UINT8 m_at_spkrdata;
|
||||||
UINT8 m_at_speaker_input;
|
UINT8 m_pit_out2;
|
||||||
int m_dma_channel;
|
int m_dma_channel;
|
||||||
bool m_cur_eop;
|
bool m_cur_eop;
|
||||||
UINT8 m_dma_offset[2][4];
|
UINT8 m_dma_offset[2][4];
|
||||||
@ -120,7 +120,6 @@ protected:
|
|||||||
UINT8 m_at_speaker;
|
UINT8 m_at_speaker;
|
||||||
bool m_refresh;
|
bool m_refresh;
|
||||||
void at_speaker_set_spkrdata(UINT8 data);
|
void at_speaker_set_spkrdata(UINT8 data);
|
||||||
void at_speaker_set_input(UINT8 data);
|
|
||||||
|
|
||||||
UINT8 m_channel_check;
|
UINT8 m_channel_check;
|
||||||
UINT8 m_nmi_enabled;
|
UINT8 m_nmi_enabled;
|
||||||
|
@ -151,9 +151,9 @@ void special_state::device_timer(emu_timer &timer, device_timer_id id, int param
|
|||||||
break;
|
break;
|
||||||
case TIMER_PIT8253_GATES:
|
case TIMER_PIT8253_GATES:
|
||||||
{
|
{
|
||||||
m_pit->gate0_w(0);
|
m_pit->write_gate0(0);
|
||||||
m_pit->gate1_w(0);
|
m_pit->write_gate1(0);
|
||||||
m_pit->gate2_w(0);
|
m_pit->write_gate2(0);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
@ -251,28 +251,6 @@ WRITE_LINE_MEMBER( special_state::specimx_pit8253_out2_changed )
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
const struct pit8253_interface specimx_pit8253_intf =
|
|
||||||
{
|
|
||||||
{
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(special_state, specimx_pit8253_out0_changed)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(special_state, specimx_pit8253_out1_changed)
|
|
||||||
},
|
|
||||||
{
|
|
||||||
2000000,
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_DRIVER_LINE_MEMBER(special_state, specimx_pit8253_out2_changed)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
MACHINE_START_MEMBER(special_state,specimx)
|
MACHINE_START_MEMBER(special_state,specimx)
|
||||||
{
|
{
|
||||||
m_specimx_audio = machine().device<specimx_sound_device>("custom");
|
m_specimx_audio = machine().device<specimx_sound_device>("custom");
|
||||||
|
@ -181,7 +181,7 @@ WRITE8_MEMBER( tandy_pc_state::tandy1000_pio_w )
|
|||||||
{
|
{
|
||||||
case 1:
|
case 1:
|
||||||
m_tandy_ppi_portb = data;
|
m_tandy_ppi_portb = data;
|
||||||
space.machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
|
m_pit8253->write_gate2(BIT(data, 0));
|
||||||
pc_speaker_set_spkrdata( data & 0x02 );
|
pc_speaker_set_spkrdata( data & 0x02 );
|
||||||
// sx enables keyboard from bit 3, others bit 6, hopefully theres no conflict
|
// sx enables keyboard from bit 3, others bit 6, hopefully theres no conflict
|
||||||
pc_keyb_set_clock(data&0x48);
|
pc_keyb_set_clock(data&0x48);
|
||||||
|
Loading…
Reference in New Issue
Block a user