Fix 8085 RST75 not working with PULSE_LINE

According to datasheet, RST7.5 is latched on rising edge, while the other maskable interrupts are sampled.
This commit is contained in:
Nicola Salmoria 2008-03-06 06:51:05 +00:00
parent c537f056f5
commit 3a22b93b59

View File

@ -1122,23 +1122,24 @@ INLINE void execute_one(int opcode)
I.IREQ &= ~I.ISRV; I.IREQ &= ~I.ISRV;
/* reset serviced IRQ */ /* reset serviced IRQ */
I.ISRV = 0; I.ISRV = 0;
if( I.irq_state[0] != CLEAR_LINE ) { if( I.irq_state[I8085_INTR_LINE] != CLEAR_LINE ) {
LOG(("i8085 EI sets INTR\n")); LOG(("i8085 EI sets INTR\n"));
I.IREQ |= IM_INTR; I.IREQ |= IM_INTR;
I.INTR = I8085_INTR; I.INTR = I8085_INTR;
} }
if( I.cputype ) { if( I.cputype ) {
if( I.irq_state[1] != CLEAR_LINE ) { if( I.irq_state[I8085_RST55_LINE] != CLEAR_LINE ) {
LOG(("i8085 EI sets RST5.5\n")); LOG(("i8085 EI sets RST5.5\n"));
I.IREQ |= IM_RST55; I.IREQ |= IM_RST55;
} }
if( I.irq_state[2] != CLEAR_LINE ) { if( I.irq_state[I8085_RST65_LINE] != CLEAR_LINE ) {
LOG(("i8085 EI sets RST6.5\n")); LOG(("i8085 EI sets RST6.5\n"));
I.IREQ |= IM_RST65; I.IREQ |= IM_RST65;
} }
if( I.irq_state[3] != CLEAR_LINE ) { if( I.irq_state[I8085_RST75_LINE] != CLEAR_LINE ) {
LOG(("i8085 EI sets RST7.5\n")); LOG(("i8085 EI sets RST7.5\n"));
I.IREQ |= IM_RST75; I.IREQ |= IM_RST75;
I.irq_state[I8085_RST75_LINE] = CLEAR_LINE; /* clear latch */
} }
/* find highest priority IREQ flag with /* find highest priority IREQ flag with
IM enabled and schedule for execution */ IM enabled and schedule for execution */
@ -1419,6 +1420,7 @@ static void i8085_set_RST75(int state)
{ {
I.IREQ |= IM_RST75; /* request RST7.5 */ I.IREQ |= IM_RST75; /* request RST7.5 */
I.irq_state[I8085_RST75_LINE] = CLEAR_LINE; /* clear latch */
if( I.IM & IM_RST75 ) return; /* if masked, ignore it for now */ if( I.IM & IM_RST75 ) return; /* if masked, ignore it for now */
if( !I.ISRV ) /* if no higher priority IREQ is serviced */ if( !I.ISRV ) /* if no higher priority IREQ is serviced */
{ {
@ -1506,7 +1508,14 @@ static void i8085_set_irq_line(int irqline, int state)
} }
else if (irqline < 4) else if (irqline < 4)
{ {
I.irq_state[irqline] = state; if (irqline == I8085_RST75_LINE) /* RST7.5 is latched on rising edge, the others are sampled */
{
if( state != CLEAR_LINE )
I.irq_state[irqline] = state;
}
else
I.irq_state[irqline] = state;
if (state == CLEAR_LINE) if (state == CLEAR_LINE)
{ {
if( !(I.IM & IM_IEN) ) if( !(I.IM & IM_IEN) )