mirror of
https://github.com/holub/mame
synced 2025-05-17 19:24:59 +03:00
modernized 2 drivers skipped in past (nw)
This commit is contained in:
parent
f7e95c828e
commit
3b0ee026b9
@ -76,17 +76,22 @@ class gammagic_state : public driver_device
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public:
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public:
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gammagic_state(const machine_config &mconfig, device_type type, const char *tag)
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gammagic_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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: driver_device(mconfig, type, tag),
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m_pit8254(*this, "pit8254" ),
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m_pic8259_1(*this, "pic8259_1" ),
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m_pic8259_2(*this, "pic8259_2" ),
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m_dma8237_1(*this, "dma8237_1" ),
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m_dma8237_2(*this, "dma8237_2" ),
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m_maincpu(*this, "maincpu") { }
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m_maincpu(*this, "maincpu") { }
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int m_dma_channel;
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int m_dma_channel;
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UINT8 m_dma_offset[2][4];
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UINT8 m_dma_offset[2][4];
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UINT8 m_at_pages[0x10];
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UINT8 m_at_pages[0x10];
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device_t *m_pit8254;
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required_device<device_t> m_pit8254;
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device_t *m_pic8259_1;
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required_device<device_t> m_pic8259_1;
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device_t *m_pic8259_2;
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required_device<device_t> m_pic8259_2;
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i8237_device *m_dma8237_1;
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required_device<i8237_device> m_dma8237_1;
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i8237_device *m_dma8237_2;
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required_device<i8237_device> m_dma8237_2;
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emu_timer *m_atapi_timer;
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emu_timer *m_atapi_timer;
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//SCSIInstance *m_inserted_cdrom;
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//SCSIInstance *m_inserted_cdrom;
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@ -104,113 +109,125 @@ public:
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DECLARE_DRIVER_INIT(gammagic);
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DECLARE_DRIVER_INIT(gammagic);
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IRQ_CALLBACK_MEMBER(irq_callback);
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IRQ_CALLBACK_MEMBER(irq_callback);
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DECLARE_READ8_MEMBER(get_out2);
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DECLARE_READ8_MEMBER(get_out2);
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DECLARE_READ8_MEMBER(at_page8_r);
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DECLARE_WRITE8_MEMBER(at_page8_w);
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DECLARE_READ8_MEMBER(pc_dma_read_byte);
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DECLARE_WRITE8_MEMBER(pc_dma_write_byte);
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DECLARE_READ8_MEMBER(at_dma8237_2_r);
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DECLARE_WRITE8_MEMBER(at_dma8237_2_w);
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DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed);
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void set_dma_channel(int channel, int state);
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DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
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DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
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DECLARE_WRITE_LINE_MEMBER(pc_dack2_w);
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DECLARE_WRITE_LINE_MEMBER(pc_dack3_w);
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DECLARE_WRITE_LINE_MEMBER(gammagic_pic8259_1_set_int_line);
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DECLARE_READ8_MEMBER(get_slave_ack);
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virtual void machine_start();
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virtual void machine_reset();
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void atapi_init();
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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};
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};
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//static void atapi_irq(running_machine &machine, int state);
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READ8_MEMBER(gammagic_state::at_dma8237_2_r)
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static READ8_DEVICE_HANDLER(at_dma8237_2_r)
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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return m_dma8237_2->i8237_r(space, offset / 2);
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return state->m_dma8237_2->i8237_r(space, offset / 2);
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}
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}
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static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
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WRITE8_MEMBER(gammagic_state::at_dma8237_2_w)
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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m_dma8237_2->i8237_w(space, offset / 2, data);
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state->m_dma8237_2->i8237_w(space, offset / 2, data);
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}
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}
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static READ8_HANDLER(at_page8_r)
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READ8_MEMBER(gammagic_state::at_page8_r)
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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UINT8 data = m_at_pages[offset % 0x10];
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UINT8 data = state->m_at_pages[offset % 0x10];
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switch(offset % 8) {
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switch(offset % 8) {
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case 1:
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case 1:
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data = state->m_dma_offset[(offset / 8) & 1][2];
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data = m_dma_offset[(offset / 8) & 1][2];
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break;
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break;
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case 2:
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case 2:
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data = state->m_dma_offset[(offset / 8) & 1][3];
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data = m_dma_offset[(offset / 8) & 1][3];
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break;
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break;
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case 3:
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case 3:
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data = state->m_dma_offset[(offset / 8) & 1][1];
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data = m_dma_offset[(offset / 8) & 1][1];
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break;
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break;
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case 7:
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case 7:
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data = state->m_dma_offset[(offset / 8) & 1][0];
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data = m_dma_offset[(offset / 8) & 1][0];
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break;
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break;
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}
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}
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return data;
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return data;
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}
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}
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static WRITE8_HANDLER(at_page8_w)
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WRITE8_MEMBER(gammagic_state::at_page8_w)
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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m_at_pages[offset % 0x10] = data;
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state->m_at_pages[offset % 0x10] = data;
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switch(offset % 8) {
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switch(offset % 8) {
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case 1:
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case 1:
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state->m_dma_offset[(offset / 8) & 1][2] = data;
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m_dma_offset[(offset / 8) & 1][2] = data;
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break;
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break;
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case 2:
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case 2:
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state->m_dma_offset[(offset / 8) & 1][3] = data;
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m_dma_offset[(offset / 8) & 1][3] = data;
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break;
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break;
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case 3:
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case 3:
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state->m_dma_offset[(offset / 8) & 1][1] = data;
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m_dma_offset[(offset / 8) & 1][1] = data;
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break;
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break;
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case 7:
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case 7:
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state->m_dma_offset[(offset / 8) & 1][0] = data;
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m_dma_offset[(offset / 8) & 1][0] = data;
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break;
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break;
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}
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}
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}
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}
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static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
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WRITE_LINE_MEMBER(gammagic_state::pc_dma_hrq_changed)
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{
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{
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gammagic_state *drvstate = device->machine().driver_data<gammagic_state>();
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m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
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drvstate->m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
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/* Assert HLDA */
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/* Assert HLDA */
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drvstate->m_dma8237_1->i8237_hlda_w( state );
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m_dma8237_1->i8237_hlda_w(state);
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}
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}
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static READ8_HANDLER( pc_dma_read_byte )
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READ8_MEMBER(gammagic_state::pc_dma_read_byte)
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16)
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offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16)
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& 0xFF0000;
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& 0xFF0000;
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return space.read_byte(page_offset + offset);
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return space.read_byte(page_offset + offset);
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}
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}
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static WRITE8_HANDLER( pc_dma_write_byte )
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WRITE8_MEMBER(gammagic_state::pc_dma_write_byte)
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16)
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offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16)
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& 0xFF0000;
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& 0xFF0000;
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space.write_byte(page_offset + offset, data);
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space.write_byte(page_offset + offset, data);
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}
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}
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static void set_dma_channel(device_t *device, int channel, int state)
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void gammagic_state::set_dma_channel(int channel, int state)
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{
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{
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gammagic_state *drvstate = device->machine().driver_data<gammagic_state>();
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if (!state) m_dma_channel = channel;
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if (!state) drvstate->m_dma_channel = channel;
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}
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}
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static WRITE_LINE_DEVICE_HANDLER( pc_dack0_w ) { set_dma_channel(device, 0, state); }
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WRITE_LINE_MEMBER(gammagic_state::pc_dack0_w){ set_dma_channel(0, state); }
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static WRITE_LINE_DEVICE_HANDLER( pc_dack1_w ) { set_dma_channel(device, 1, state); }
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WRITE_LINE_MEMBER(gammagic_state::pc_dack1_w){ set_dma_channel(1, state); }
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static WRITE_LINE_DEVICE_HANDLER( pc_dack2_w ) { set_dma_channel(device, 2, state); }
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WRITE_LINE_MEMBER(gammagic_state::pc_dack2_w){ set_dma_channel(2, state); }
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static WRITE_LINE_DEVICE_HANDLER( pc_dack3_w ) { set_dma_channel(device, 3, state); }
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WRITE_LINE_MEMBER(gammagic_state::pc_dack3_w){ set_dma_channel(3, state); }
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static I8237_INTERFACE( dma8237_1_config )
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static I8237_INTERFACE( dma8237_1_config )
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{
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{
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DEVCB_LINE(pc_dma_hrq_changed),
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DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dma_hrq_changed),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte),
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DEVCB_DRIVER_MEMBER(gammagic_state, pc_dma_read_byte),
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DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte),
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DEVCB_DRIVER_MEMBER(gammagic_state, pc_dma_write_byte),
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
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{ DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) }
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{ DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(gammagic_state,pc_dack3_w) }
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};
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};
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static I8237_INTERFACE( dma8237_2_config )
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static I8237_INTERFACE( dma8237_2_config )
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@ -224,40 +241,39 @@ static I8237_INTERFACE( dma8237_2_config )
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
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};
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};
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/*
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/*
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static READ32_HANDLER( atapi_r )
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READ32_MEMBER( gammagic_state::atapi_r )
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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UINT8 *atapi_regs = m_atapi_regs;
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UINT8 *atapi_regs = state->m_atapi_regs;
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//running_machine &machine = space.machine();
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//running_machine &machine = space.machine();
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int reg, data;
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int reg, data;
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if (mem_mask == 0x0000ffff) // word-wide command read
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if (mem_mask == 0x0000ffff) // word-wide command read
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{
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{
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logerror("ATAPI: packet read = %04x\n", state->m_atapi_data[state->m_atapi_data_ptr]);
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logerror("ATAPI: packet read = %04x\n", m_atapi_data[m_atapi_data_ptr]);
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// assert IRQ and drop DRQ
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// assert IRQ and drop DRQ
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if (state->m_atapi_data_ptr == 0 && state->m_atapi_data_len == 0)
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if (m_atapi_data_ptr == 0 && m_atapi_data_len == 0)
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{
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{
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// get the data from the device
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// get the data from the device
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if( state->m_atapi_xferlen > 0 )
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if( m_atapi_xferlen > 0 )
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{
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{
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SCSIReadData( state->m_inserted_cdrom, state->m_atapi_data, state->m_atapi_xferlen );
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SCSIReadData( m_inserted_cdrom, m_atapi_data, m_atapi_xferlen );
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state->m_atapi_data_len = state->m_atapi_xferlen;
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m_atapi_data_len = m_atapi_xferlen;
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}
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}
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if (state->m_atapi_xfermod > MAX_TRANSFER_SIZE)
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if (m_atapi_xfermod > MAX_TRANSFER_SIZE)
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{
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{
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state->m_atapi_xferlen = MAX_TRANSFER_SIZE;
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m_atapi_xferlen = MAX_TRANSFER_SIZE;
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state->m_atapi_xfermod = state->m_atapi_xfermod - MAX_TRANSFER_SIZE;
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m_atapi_xfermod = m_atapi_xfermod - MAX_TRANSFER_SIZE;
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}
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}
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else
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else
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{
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{
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state->m_atapi_xferlen = state->m_atapi_xfermod;
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m_atapi_xferlen = m_atapi_xfermod;
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state->m_atapi_xfermod = 0;
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m_atapi_xfermod = 0;
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}
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}
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//verboselog\\( machine, 2, "atapi_r: atapi_xferlen=%d\n", state->m_atapi_xferlen );
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//verboselog\\( machine, 2, "atapi_r: atapi_xferlen=%d\n", m_atapi_xferlen );
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if( state->m_atapi_xferlen != 0 )
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if( m_atapi_xferlen != 0 )
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{
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{
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atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
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atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
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atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
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atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
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@ -269,23 +285,23 @@ static READ32_HANDLER( atapi_r )
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atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
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atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
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}
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}
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atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff;
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atapi_regs[ATAPI_REG_COUNTLOW] = m_atapi_xferlen & 0xff;
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atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff;
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atapi_regs[ATAPI_REG_COUNTHIGH] = (m_atapi_xferlen>>8)&0xff;
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atapi_irq(space.machine(), ASSERT_LINE);
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atapi_irq(space.machine(), ASSERT_LINE);
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}
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}
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if( state->m_atapi_data_ptr < state->m_atapi_data_len )
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if( m_atapi_data_ptr < m_atapi_data_len )
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{
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{
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data = state->m_atapi_data[state->m_atapi_data_ptr++];
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data = m_atapi_data[m_atapi_data_ptr++];
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data |= ( state->m_atapi_data[state->m_atapi_data_ptr++] << 8 );
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data |= ( m_atapi_data[m_atapi_data_ptr++] << 8 );
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if( state->m_atapi_data_ptr >= state->m_atapi_data_len )
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if( m_atapi_data_ptr >= m_atapi_data_len )
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{
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{
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state->m_atapi_data_ptr = 0;
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m_atapi_data_ptr = 0;
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state->m_atapi_data_len = 0;
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m_atapi_data_len = 0;
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if( state->m_atapi_xferlen == 0 )
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if( m_atapi_xferlen == 0 )
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{
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{
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atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
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atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
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atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
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atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
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@ -330,24 +346,23 @@ static READ32_HANDLER( atapi_r )
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return data;
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return data;
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}
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}
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static WRITE32_HANDLER( atapi_w )
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WRITE32_MEMBER( gammagic_state::atapi_w )
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{
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{
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gammagic_state *state = space.machine().driver_data<gammagic_state>();
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UINT8 *atapi_regs = m_atapi_regs;
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UINT8 *atapi_regs = state->m_atapi_regs;
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UINT8 *atapi_data = m_atapi_data;
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UINT8 *atapi_data = state->m_atapi_data;
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int reg;
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int reg;
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if (mem_mask == 0x0000ffff) // word-wide command write
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if (mem_mask == 0x0000ffff) // word-wide command write
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{
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{
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atapi_data[state->m_atapi_data_ptr++] = data & 0xff;
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atapi_data[m_atapi_data_ptr++] = data & 0xff;
|
||||||
atapi_data[state->m_atapi_data_ptr++] = data >> 8;
|
atapi_data[m_atapi_data_ptr++] = data >> 8;
|
||||||
|
|
||||||
if (state->m_atapi_cdata_wait)
|
if (m_atapi_cdata_wait)
|
||||||
{
|
{
|
||||||
logerror("ATAPI: waiting, ptr %d wait %d\n", state->m_atapi_data_ptr, state->m_atapi_cdata_wait);
|
logerror("ATAPI: waiting, ptr %d wait %d\n", m_atapi_data_ptr, m_atapi_cdata_wait);
|
||||||
if (state->m_atapi_data_ptr == state->m_atapi_cdata_wait)
|
if (m_atapi_data_ptr == m_atapi_cdata_wait)
|
||||||
{
|
{
|
||||||
// send it to the device
|
// send it to the device
|
||||||
SCSIWriteData( state->m_inserted_cdrom, atapi_data, state->m_atapi_cdata_wait );
|
SCSIWriteData( m_inserted_cdrom, atapi_data, m_atapi_cdata_wait );
|
||||||
|
|
||||||
// assert IRQ
|
// assert IRQ
|
||||||
atapi_irq(space.machine(), ASSERT_LINE);
|
atapi_irq(space.machine(), ASSERT_LINE);
|
||||||
@ -357,35 +372,35 @@ static WRITE32_HANDLER( atapi_w )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
else if ( state->m_atapi_data_ptr == 12 )
|
else if ( m_atapi_data_ptr == 12 )
|
||||||
{
|
{
|
||||||
int phase;
|
int phase;
|
||||||
// reset data pointer for reading SCSI results
|
// reset data pointer for reading SCSI results
|
||||||
state->m_atapi_data_ptr = 0;
|
m_atapi_data_ptr = 0;
|
||||||
state->m_atapi_data_len = 0;
|
m_atapi_data_len = 0;
|
||||||
|
|
||||||
// send it to the SCSI device
|
// send it to the SCSI device
|
||||||
SCSISetCommand( state->m_inserted_cdrom, state->m_atapi_data, 12 );
|
SCSISetCommand( m_inserted_cdrom, m_atapi_data, 12 );
|
||||||
SCSIExecCommand( state->m_inserted_cdrom, &state->m_atapi_xferlen );
|
SCSIExecCommand( m_inserted_cdrom, &m_atapi_xferlen );
|
||||||
SCSIGetPhase( state->m_inserted_cdrom, &phase );
|
SCSIGetPhase( m_inserted_cdrom, &phase );
|
||||||
|
|
||||||
if (state->m_atapi_xferlen != -1)
|
if (m_atapi_xferlen != -1)
|
||||||
{
|
{
|
||||||
logerror("ATAPI: SCSI command %02x returned %d bytes from the device\n", atapi_data[0]&0xff, state->m_atapi_xferlen);
|
logerror("ATAPI: SCSI command %02x returned %d bytes from the device\n", atapi_data[0]&0xff, m_atapi_xferlen);
|
||||||
|
|
||||||
// store the returned command length in the ATAPI regs, splitting into
|
// store the returned command length in the ATAPI regs, splitting into
|
||||||
// multiple transfers if necessary
|
// multiple transfers if necessary
|
||||||
state->m_atapi_xfermod = 0;
|
m_atapi_xfermod = 0;
|
||||||
if (state->m_atapi_xferlen > MAX_TRANSFER_SIZE)
|
if (m_atapi_xferlen > MAX_TRANSFER_SIZE)
|
||||||
{
|
{
|
||||||
state->m_atapi_xfermod = state->m_atapi_xferlen - MAX_TRANSFER_SIZE;
|
m_atapi_xfermod = m_atapi_xferlen - MAX_TRANSFER_SIZE;
|
||||||
state->m_atapi_xferlen = MAX_TRANSFER_SIZE;
|
m_atapi_xferlen = MAX_TRANSFER_SIZE;
|
||||||
}
|
}
|
||||||
|
|
||||||
atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff;
|
atapi_regs[ATAPI_REG_COUNTLOW] = m_atapi_xferlen & 0xff;
|
||||||
atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff;
|
atapi_regs[ATAPI_REG_COUNTHIGH] = (m_atapi_xferlen>>8)&0xff;
|
||||||
|
|
||||||
if (state->m_atapi_xferlen == 0)
|
if (m_atapi_xferlen == 0)
|
||||||
{
|
{
|
||||||
// if no data to return, set the registers properly
|
// if no data to return, set the registers properly
|
||||||
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRDY;
|
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRDY;
|
||||||
@ -401,7 +416,7 @@ static WRITE32_HANDLER( atapi_w )
|
|||||||
switch( phase )
|
switch( phase )
|
||||||
{
|
{
|
||||||
case SCSI_PHASE_DATAOUT:
|
case SCSI_PHASE_DATAOUT:
|
||||||
state->m_atapi_cdata_wait = state->m_atapi_xferlen;
|
m_atapi_cdata_wait = m_atapi_xferlen;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -415,7 +430,7 @@ static WRITE32_HANDLER( atapi_w )
|
|||||||
|
|
||||||
case 0x45: // PLAY
|
case 0x45: // PLAY
|
||||||
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY;
|
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY;
|
||||||
state->m_atapi_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( ATAPI_CYCLES_PER_SECTOR ) );
|
m_atapi_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( ATAPI_CYCLES_PER_SECTOR ) );
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -466,27 +481,27 @@ static WRITE32_HANDLER( atapi_w )
|
|||||||
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
|
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
|
||||||
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND;
|
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND;
|
||||||
|
|
||||||
state->m_atapi_data_ptr = 0;
|
m_atapi_data_ptr = 0;
|
||||||
state->m_atapi_data_len = 0;
|
m_atapi_data_len = 0;
|
||||||
|
|
||||||
// we have no data
|
// we have no data
|
||||||
state->m_atapi_xferlen = 0;
|
m_atapi_xferlen = 0;
|
||||||
state->m_atapi_xfermod = 0;
|
m_atapi_xfermod = 0;
|
||||||
|
|
||||||
state->m_atapi_cdata_wait = 0;
|
m_atapi_cdata_wait = 0;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0xa1: // IDENTIFY PACKET DEVICE
|
case 0xa1: // IDENTIFY PACKET DEVICE
|
||||||
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
|
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
|
||||||
|
|
||||||
state->m_atapi_data_ptr = 0;
|
m_atapi_data_ptr = 0;
|
||||||
state->m_atapi_data_len = 512;
|
m_atapi_data_len = 512;
|
||||||
|
|
||||||
// we have no data
|
// we have no data
|
||||||
state->m_atapi_xferlen = 0;
|
m_atapi_xferlen = 0;
|
||||||
state->m_atapi_xfermod = 0;
|
m_atapi_xfermod = 0;
|
||||||
|
|
||||||
memset( atapi_data, 0, state->m_atapi_data_len );
|
memset( atapi_data, 0, m_atapi_data_len );
|
||||||
|
|
||||||
atapi_data[ 0 ^ 1 ] = 0x85; // ATAPI device, cmd set 5 compliant, DRQ within 3 ms of PACKET command
|
atapi_data[ 0 ^ 1 ] = 0x85; // ATAPI device, cmd set 5 compliant, DRQ within 3 ms of PACKET command
|
||||||
atapi_data[ 1 ^ 1 ] = 0x80; // ATAPI device, removable media
|
atapi_data[ 1 ^ 1 ] = 0x80; // ATAPI device, removable media
|
||||||
@ -532,8 +547,8 @@ static WRITE32_HANDLER( atapi_w )
|
|||||||
case 0xef: // SET FEATURES
|
case 0xef: // SET FEATURES
|
||||||
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
|
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
|
||||||
|
|
||||||
state->m_atapi_data_ptr = 0;
|
m_atapi_data_ptr = 0;
|
||||||
state->m_atapi_data_len = 0;
|
m_atapi_data_len = 0;
|
||||||
|
|
||||||
atapi_irq(space.machine(), ASSERT_LINE);
|
atapi_irq(space.machine(), ASSERT_LINE);
|
||||||
break;
|
break;
|
||||||
@ -561,9 +576,9 @@ static ADDRESS_MAP_START( gammagic_io, AS_IO, 32, gammagic_state)
|
|||||||
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
||||||
AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff)
|
AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE8("kbdc", kbdc8042_device, data_r, data_w, 0xffffffff)
|
||||||
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff)
|
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff)
|
||||||
AM_RANGE(0x0080, 0x009f) AM_READWRITE8_LEGACY(at_page8_r, at_page8_w, 0xffffffff)
|
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
|
||||||
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
||||||
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
|
AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
|
||||||
AM_RANGE(0x00e8, 0x00ef) AM_NOP
|
AM_RANGE(0x00e8, 0x00ef) AM_NOP
|
||||||
AM_RANGE(0x00f0, 0x01ef) AM_NOP
|
AM_RANGE(0x00f0, 0x01ef) AM_NOP
|
||||||
//AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(atapi_r, atapi_w)
|
//AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(atapi_r, atapi_w)
|
||||||
@ -632,57 +647,44 @@ IRQ_CALLBACK_MEMBER(gammagic_state::irq_callback)
|
|||||||
return pic8259_acknowledge(m_pic8259_1);
|
return pic8259_acknowledge(m_pic8259_1);
|
||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_START(gammagic)
|
void gammagic_state::machine_start()
|
||||||
{
|
{
|
||||||
gammagic_state *state = machine.driver_data<gammagic_state>();
|
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(gammagic_state::irq_callback),this));
|
||||||
state->m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(gammagic_state::irq_callback),state));
|
|
||||||
|
|
||||||
state->m_pit8254 = machine.device( "pit8254" );
|
|
||||||
state->m_pic8259_1 = machine.device( "pic8259_1" );
|
|
||||||
state->m_pic8259_2 = machine.device( "pic8259_2" );
|
|
||||||
state->m_dma8237_1 = machine.device<i8237_device>( "dma8237_1" );
|
|
||||||
state->m_dma8237_2 = machine.device<i8237_device>( "dma8237_2" );
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_RESET( gammagic )
|
void gammagic_state::machine_reset()
|
||||||
{
|
{
|
||||||
//gammagic_state *state = machine.driver_data<gammagic_state>();
|
|
||||||
|
|
||||||
//void *cd;
|
//void *cd;
|
||||||
//SCSIGetDevice( state->m_inserted_cdrom, &cd );
|
//SCSIGetDevice( m_inserted_cdrom, &cd );
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/*static void atapi_irq(running_machine &machine, int state)
|
/*void gammagic_state::atapi_irq(int state)
|
||||||
{
|
{
|
||||||
gammagic_state *drvstate = machine.driver_data<gammagic_state>();
|
pic8259_ir6_w(m_pic8259_2, state);
|
||||||
pic8259_ir6_w(drvstate->m_pic8259_2, state);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void atapi_exit(running_machine& machine)
|
void gammagic_state::atapi_exit(running_machine& machine)
|
||||||
{
|
{
|
||||||
gammagic_state *state = machine.driver_data<gammagic_state>();
|
SCSIDeleteInstance(m_inserted_cdrom);
|
||||||
SCSIDeleteInstance(state->m_inserted_cdrom);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static void atapi_init(running_machine &machine)
|
void gammagic_state::atapi_init()
|
||||||
{
|
{
|
||||||
gammagic_state *state = machine.driver_data<gammagic_state>();
|
m_atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
|
||||||
|
m_atapi_regs[ATAPI_REG_ERRFEAT] = 1;
|
||||||
|
m_atapi_regs[ATAPI_REG_COUNTLOW] = 0x14;
|
||||||
|
m_atapi_regs[ATAPI_REG_COUNTHIGH] = 0xeb;
|
||||||
|
m_atapi_data_ptr = 0;
|
||||||
|
m_atapi_data_len = 0;
|
||||||
|
m_atapi_cdata_wait = 0;
|
||||||
|
|
||||||
state->m_atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
|
//SCSIAllocInstance( machine, &SCSIClassCr589, &m_inserted_cdrom, ":cdrom" );
|
||||||
state->m_atapi_regs[ATAPI_REG_ERRFEAT] = 1;
|
|
||||||
state->m_atapi_regs[ATAPI_REG_COUNTLOW] = 0x14;
|
|
||||||
state->m_atapi_regs[ATAPI_REG_COUNTHIGH] = 0xeb;
|
|
||||||
state->m_atapi_data_ptr = 0;
|
|
||||||
state->m_atapi_data_len = 0;
|
|
||||||
state->m_atapi_cdata_wait = 0;
|
|
||||||
|
|
||||||
//SCSIAllocInstance( machine, &SCSIClassCr589, &state->m_inserted_cdrom, ":cdrom" );
|
//machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(atapi_exit), &machine));
|
||||||
|
|
||||||
//machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(atapi_exit), &machine));
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -693,26 +695,24 @@ static void atapi_init(running_machine &machine)
|
|||||||
*
|
*
|
||||||
*************************************************************/
|
*************************************************************/
|
||||||
|
|
||||||
static WRITE_LINE_DEVICE_HANDLER( gammagic_pic8259_1_set_int_line )
|
WRITE_LINE_MEMBER(gammagic_state::gammagic_pic8259_1_set_int_line)
|
||||||
{
|
{
|
||||||
gammagic_state *drvstate = device->machine().driver_data<gammagic_state>();
|
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
||||||
drvstate->m_maincpu->set_input_line( 0, state ? HOLD_LINE : CLEAR_LINE);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static READ8_DEVICE_HANDLER( get_slave_ack )
|
READ8_MEMBER(gammagic_state::get_slave_ack)
|
||||||
{
|
{
|
||||||
gammagic_state *state = device->machine().driver_data<gammagic_state>();
|
|
||||||
if (offset==2) {
|
if (offset==2) {
|
||||||
return pic8259_acknowledge(state->m_pic8259_2);
|
return pic8259_acknowledge(m_pic8259_2);
|
||||||
}
|
}
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct pic8259_interface gammagic_pic8259_1_config =
|
static const struct pic8259_interface gammagic_pic8259_1_config =
|
||||||
{
|
{
|
||||||
DEVCB_LINE(gammagic_pic8259_1_set_int_line),
|
DEVCB_DRIVER_LINE_MEMBER(gammagic_state,gammagic_pic8259_1_set_int_line),
|
||||||
DEVCB_LINE_VCC,
|
DEVCB_LINE_VCC,
|
||||||
DEVCB_HANDLER(get_slave_ack)
|
DEVCB_DRIVER_MEMBER(gammagic_state,get_slave_ack)
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct pic8259_interface gammagic_pic8259_2_config =
|
static const struct pic8259_interface gammagic_pic8259_2_config =
|
||||||
@ -768,8 +768,6 @@ static MACHINE_CONFIG_START( gammagic, gammagic_state )
|
|||||||
MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // Intel Pentium 133
|
MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // Intel Pentium 133
|
||||||
MCFG_CPU_PROGRAM_MAP(gammagic_map)
|
MCFG_CPU_PROGRAM_MAP(gammagic_map)
|
||||||
MCFG_CPU_IO_MAP(gammagic_io)
|
MCFG_CPU_IO_MAP(gammagic_io)
|
||||||
MCFG_MACHINE_START(gammagic)
|
|
||||||
MCFG_MACHINE_RESET( gammagic )
|
|
||||||
MCFG_PIT8254_ADD( "pit8254", gammagic_pit8254_config )
|
MCFG_PIT8254_ADD( "pit8254", gammagic_pit8254_config )
|
||||||
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
|
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
|
||||||
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
|
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
|
||||||
@ -791,7 +789,7 @@ MACHINE_CONFIG_END
|
|||||||
|
|
||||||
DRIVER_INIT_MEMBER(gammagic_state,gammagic)
|
DRIVER_INIT_MEMBER(gammagic_state,gammagic)
|
||||||
{
|
{
|
||||||
atapi_init(machine());
|
atapi_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
ROM_START( gammagic )
|
ROM_START( gammagic )
|
||||||
|
@ -174,7 +174,17 @@ public:
|
|||||||
|
|
||||||
UINT16* m_videoram;
|
UINT16* m_videoram;
|
||||||
tilemap_t *m_bg_tilemap;
|
tilemap_t *m_bg_tilemap;
|
||||||
|
virtual void video_start();
|
||||||
|
UINT32 screen_update_nevada(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||||
|
virtual void palette_init();
|
||||||
|
|
||||||
|
DECLARE_WRITE_LINE_MEMBER(nevada_rtc_irq);
|
||||||
|
DECLARE_READ16_MEMBER(io_board_r);
|
||||||
|
DECLARE_WRITE16_MEMBER(io_board_w);
|
||||||
|
DECLARE_WRITE16_MEMBER (io_board_x);
|
||||||
|
DECLARE_READ16_MEMBER( nevada_sec_r );
|
||||||
|
DECLARE_WRITE16_MEMBER( nevada_sec_w );
|
||||||
|
virtual void machine_reset();
|
||||||
|
|
||||||
DECLARE_DRIVER_INIT(nevada);
|
DECLARE_DRIVER_INIT(nevada);
|
||||||
};
|
};
|
||||||
@ -245,13 +255,12 @@ static const gfx_layout charlayout =
|
|||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
/*
|
/*
|
||||||
static WRITE16_HANDLER( nevada_videoram_w )
|
WRITE16_MEMBER( nevada_state:nevada_videoram_w )
|
||||||
{
|
{
|
||||||
// Todo, Just for sample
|
// Todo, Just for sample
|
||||||
|
|
||||||
nevada_state *state = space->machine().driver_data<nevada_state>();
|
m_videoram[offset] = data;
|
||||||
state->m_videoram[offset] = data;
|
m_bg_tilemap->mark_tile_dirty(offset);
|
||||||
state->m_bg_tilemap->mark_tile_dirty(offset);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
@ -263,44 +272,40 @@ GFXDECODE_END
|
|||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
/*
|
/*
|
||||||
static TILE_GET_INFO( get_bg_tile_info )
|
static TILE_GET_INFO_MEMBER( nevada_state::get_bg_tile_info )
|
||||||
{
|
{
|
||||||
// Todo, Just for sample
|
// Todo, Just for sample
|
||||||
nevada_state *state = machine.driver_data<nevada_state>();
|
int attr = m_colorram[tile_index];
|
||||||
|
int code = ((attr & 1) << 8) | m_videoram[tile_index];
|
||||||
int attr = state->m_colorram[tile_index];
|
|
||||||
int code = ((attr & 1) << 8) | state->m_videoram[tile_index];
|
|
||||||
int bank = (attr & 0x02) >> 1;
|
int bank = (attr & 0x02) >> 1;
|
||||||
int color = (attr & 0x3c) >> 2;
|
int color = (attr & 0x3c) >> 2;
|
||||||
|
|
||||||
SET_TILE_INFO(bank, code, color, 0);
|
SET_TILE_INFO_MEMBER(bank, code, color, 0);
|
||||||
|
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static VIDEO_START( nevada )
|
void nevada_state::video_start()
|
||||||
{
|
{
|
||||||
// todo
|
// todo
|
||||||
/*
|
/*
|
||||||
nevada_state *state = machine.driver_data<nevada_state>();
|
m_bg_tilemap = tilemap_create(machine(), get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
|
||||||
state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
|
|
||||||
*/
|
*/
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static SCREEN_UPDATE_IND16( nevada )
|
UINT32 nevada_state::screen_update_nevada(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||||
{
|
{
|
||||||
// Todo
|
// Todo
|
||||||
/*
|
/*
|
||||||
nevada_state *state = screen.machine().driver_data<nevada_state>();
|
m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
|
||||||
state->m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
|
|
||||||
*/
|
*/
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static PALETTE_INIT( nevada )
|
void nevada_state::palette_init()
|
||||||
{
|
{
|
||||||
// Palette init
|
// Palette init
|
||||||
}
|
}
|
||||||
@ -449,16 +454,15 @@ static UINT8 duart40_input( device_t *device )
|
|||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
/********************* RTC SECTION ********************************/
|
/********************* RTC SECTION ********************************/
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static WRITE_LINE_DEVICE_HANDLER(nevada_rtc_irq)
|
WRITE_LINE_MEMBER(nevada_state::nevada_rtc_irq)
|
||||||
{
|
{
|
||||||
nevada_state *drvstate = device->machine().driver_data<nevada_state>();
|
m_maincpu->set_input_line(INPUT_LINE_IRQ1, HOLD_LINE); // rtc interrupt on INT1
|
||||||
drvstate->m_maincpu->set_input_line(INPUT_LINE_IRQ1, HOLD_LINE); // rtc interrupt on INT1
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static MSM6242_INTERFACE( nevada_rtc_intf )
|
static MSM6242_INTERFACE( nevada_rtc_intf )
|
||||||
{
|
{
|
||||||
DEVCB_LINE(nevada_rtc_irq)
|
DEVCB_DRIVER_LINE_MEMBER(nevada_state,nevada_rtc_irq)
|
||||||
};
|
};
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
@ -477,42 +481,40 @@ static const ay8910_interface ay8910_config =
|
|||||||
};
|
};
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static READ16_HANDLER(io_board_r)
|
READ16_MEMBER(nevada_state::io_board_r)
|
||||||
{
|
{
|
||||||
// IO board Serial communication 0xA00000
|
// IO board Serial communication 0xA00000
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static WRITE16_HANDLER(io_board_w)
|
WRITE16_MEMBER(nevada_state::io_board_w)
|
||||||
{
|
{
|
||||||
// IO board Serial communication 0xA00000 on bit0
|
// IO board Serial communication 0xA00000 on bit0
|
||||||
}
|
}
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static WRITE16_HANDLER (io_board_x)
|
WRITE16_MEMBER(nevada_state::io_board_x)
|
||||||
{
|
{
|
||||||
// IO board Serial communication 0xA80000 on bit15
|
// IO board Serial communication 0xA80000 on bit15
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static READ16_HANDLER( nevada_sec_r )
|
READ16_MEMBER(nevada_state::nevada_sec_r )
|
||||||
{
|
{
|
||||||
nevada_state *state = space.machine().driver_data<nevada_state>();
|
|
||||||
// D3..D0 = DOOR OPEN or Track STATE of PAL35
|
// D3..D0 = DOOR OPEN or Track STATE of PAL35
|
||||||
UINT16 res;
|
UINT16 res;
|
||||||
/* UPPER byte is use for input in PAL35 */
|
/* UPPER byte is use for input in PAL35 */
|
||||||
// 74LS173 $bits Register used LOWER bits D3..D0 for PAL35 state and DOOR LOGIC SWITCH
|
// 74LS173 $bits Register used LOWER bits D3..D0 for PAL35 state and DOOR LOGIC SWITCH
|
||||||
res = pal35[state->m_datA40000 >> 8];
|
res = pal35[m_datA40000 >> 8];
|
||||||
res = res << 8;
|
res = res << 8;
|
||||||
res = res | (state->m_datA40000 & 0x00FF);
|
res = res | (m_datA40000 & 0x00FF);
|
||||||
|
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static WRITE16_HANDLER( nevada_sec_w )
|
WRITE16_MEMBER(nevada_state::nevada_sec_w )
|
||||||
{
|
{
|
||||||
nevada_state *state = space.machine().driver_data<nevada_state>();
|
|
||||||
// 74LS173 $bits Register used LOWER bits D3..D0 for DOOR LOGIC SWITCH
|
// 74LS173 $bits Register used LOWER bits D3..D0 for DOOR LOGIC SWITCH
|
||||||
state->m_datA40000 = data | 0x00f0; // since D7..D4 are not used and are connected to PULLUP
|
m_datA40000 = data | 0x00f0; // since D7..D4 are not used and are connected to PULLUP
|
||||||
// popmessage("WRITE %04x %04x ",datA40000,data);
|
// popmessage("WRITE %04x %04x ",datA40000,data);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -602,13 +604,13 @@ static ADDRESS_MAP_START( nevada_map, AS_PROGRAM, 16,nevada_state )
|
|||||||
AM_RANGE(0x00010000, 0x00021fff) AM_RAM AM_SHARE("backup")
|
AM_RANGE(0x00010000, 0x00021fff) AM_RAM AM_SHARE("backup")
|
||||||
AM_RANGE(0x00900000, 0x00900001) AM_DEVWRITE8("crtc",mc6845_device, address_w,0x00ff )
|
AM_RANGE(0x00900000, 0x00900001) AM_DEVWRITE8("crtc",mc6845_device, address_w,0x00ff )
|
||||||
AM_RANGE(0x00908000, 0x00908001) AM_DEVWRITE8("crtc",mc6845_device,register_w,0x00ff )
|
AM_RANGE(0x00908000, 0x00908001) AM_DEVWRITE8("crtc",mc6845_device,register_w,0x00ff )
|
||||||
AM_RANGE(0x00a00000, 0x00a00001) AM_READWRITE_LEGACY (io_board_r,io_board_w)
|
AM_RANGE(0x00a00000, 0x00a00001) AM_READWRITE(io_board_r,io_board_w)
|
||||||
AM_RANGE(0x00a08000, 0x00a08001) AM_WRITE_LEGACY(io_board_x)
|
AM_RANGE(0x00a08000, 0x00a08001) AM_WRITE(io_board_x)
|
||||||
AM_RANGE(0x00a10000, 0x00a10001) AM_WRITE(watchdog_reset16_w )
|
AM_RANGE(0x00a10000, 0x00a10001) AM_WRITE(watchdog_reset16_w )
|
||||||
AM_RANGE(0x00a20000, 0x00a20001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_address_w,0x00ff )
|
AM_RANGE(0x00a20000, 0x00a20001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_address_w,0x00ff )
|
||||||
AM_RANGE(0x00a28000, 0x00a28001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_w ,0x00ff )
|
AM_RANGE(0x00a28000, 0x00a28001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_w ,0x00ff )
|
||||||
AM_RANGE(0x00a30000, 0x00A300ff) AM_DEVREADWRITE8("rtc",msm6242_device, read, write, 0x00ff)
|
AM_RANGE(0x00a30000, 0x00A300ff) AM_DEVREADWRITE8("rtc",msm6242_device, read, write, 0x00ff)
|
||||||
AM_RANGE(0x00a40000, 0x00A40001) AM_READWRITE_LEGACY( nevada_sec_r, nevada_sec_w)
|
AM_RANGE(0x00a40000, 0x00A40001) AM_READWRITE( nevada_sec_r, nevada_sec_w)
|
||||||
//AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM_WRITE(nevada_videoram_w) AM_BASE_MEMBER(nevada_state, m_videoram)
|
//AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM_WRITE(nevada_videoram_w) AM_BASE_MEMBER(nevada_state, m_videoram)
|
||||||
AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM // Video
|
AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM // Video
|
||||||
AM_RANGE(0x00b10000, 0x00b100ff) AM_DEVREADWRITE8_LEGACY( "duart40_68681", duart68681_r, duart68681_w, 0x00ff ) // Lower byte
|
AM_RANGE(0x00b10000, 0x00b100ff) AM_DEVREADWRITE8_LEGACY( "duart40_68681", duart68681_r, duart68681_w, 0x00ff ) // Lower byte
|
||||||
@ -694,13 +696,11 @@ static const duart68681_config nevada_duart40_68681_config =
|
|||||||
* Machine Reset *
|
* Machine Reset *
|
||||||
*************************/
|
*************************/
|
||||||
|
|
||||||
static MACHINE_RESET( nevada )
|
void nevada_state::machine_reset()
|
||||||
{
|
{
|
||||||
nevada_state *state = machine.driver_data<nevada_state>();
|
m_duart18_68681 = machine().device( "duart18_68681" );
|
||||||
|
m_duart39_68681 = machine().device( "duart39_68681" );
|
||||||
state->m_duart18_68681 = machine.device( "duart18_68681" );
|
m_duart40_68681 = machine().device( "duart40_68681" );
|
||||||
state->m_duart39_68681 = machine.device( "duart39_68681" );
|
|
||||||
state->m_duart40_68681 = machine.device( "duart40_68681" );
|
|
||||||
}
|
}
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|
||||||
@ -714,7 +714,6 @@ static MACHINE_CONFIG_START( nevada, nevada_state )
|
|||||||
MCFG_CPU_PROGRAM_MAP(nevada_map)
|
MCFG_CPU_PROGRAM_MAP(nevada_map)
|
||||||
MCFG_CPU_IO_MAP(nevada_iomap) //0x10000 0x20000
|
MCFG_CPU_IO_MAP(nevada_iomap) //0x10000 0x20000
|
||||||
|
|
||||||
MCFG_MACHINE_RESET(nevada)
|
|
||||||
MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(150)) /* 150ms Ds1232 TD to Ground */
|
MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(150)) /* 150ms Ds1232 TD to Ground */
|
||||||
|
|
||||||
|
|
||||||
@ -726,12 +725,10 @@ static MACHINE_CONFIG_START( nevada, nevada_state )
|
|||||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||||
MCFG_SCREEN_SIZE((42+1)*8, (32+1)*8) /* From MC6845 init, registers 00 & 04 (programmed with value-1). */
|
MCFG_SCREEN_SIZE((42+1)*8, (32+1)*8) /* From MC6845 init, registers 00 & 04 (programmed with value-1). */
|
||||||
MCFG_SCREEN_VISIBLE_AREA(0*8, 31*8-1, 0*8, 31*8-1) /* From MC6845 init, registers 01 & 06. */
|
MCFG_SCREEN_VISIBLE_AREA(0*8, 31*8-1, 0*8, 31*8-1) /* From MC6845 init, registers 01 & 06. */
|
||||||
MCFG_SCREEN_UPDATE_STATIC(nevada)
|
MCFG_SCREEN_UPDATE_DRIVER(nevada_state, screen_update_nevada)
|
||||||
|
|
||||||
MCFG_GFXDECODE(nevada)
|
MCFG_GFXDECODE(nevada)
|
||||||
MCFG_PALETTE_LENGTH(256)
|
MCFG_PALETTE_LENGTH(256)
|
||||||
MCFG_PALETTE_INIT(nevada)
|
|
||||||
MCFG_VIDEO_START(nevada)
|
|
||||||
|
|
||||||
MCFG_MC6845_ADD("crtc", MC6845, MC6845_CLOCK, mc6845_intf)
|
MCFG_MC6845_ADD("crtc", MC6845, MC6845_CLOCK, mc6845_intf)
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user