mirror of
https://github.com/holub/mame
synced 2025-05-23 14:19:01 +03:00
Cleanups and version bump.
This commit is contained in:
parent
cf9d3c888d
commit
3b302a8bae
@ -53,23 +53,23 @@
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**********************************************************************
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**********************************************************************
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Cheats are generally broken down into categories based on
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Cheats are generally broken down into categories based on
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which actions are defined and whether or not there is a
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which actions are defined and whether or not there is a
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parameter present:
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parameter present:
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---- Actions -----
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---- Actions -----
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On Off Run Chg Param? Type
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On Off Run Chg Param? Type
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=== === === === ====== =================================
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=== === === === ====== =================================
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N N N ? None Text-only (displays text in menu)
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N N N ? None Text-only (displays text in menu)
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Y N N ? None Oneshot (select to activate)
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Y N N ? None Oneshot (select to activate)
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Y Y N ? None On/Off (select to toggle)
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Y Y N ? None On/Off (select to toggle)
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? ? Y ? None On/Off (select to toggle)
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? ? Y ? None On/Off (select to toggle)
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? N N Y Any Oneshot parameter (select to alter)
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? N N Y Any Oneshot parameter (select to alter)
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? Y ? ? Value Value parameter (off or a live value)
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? Y ? ? Value Value parameter (off or a live value)
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? ? Y ? Value Value parameter (off or a live value)
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? ? Y ? Value Value parameter (off or a live value)
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? Y ? ? List Item list parameter (off or a live value)
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? Y ? ? List Item list parameter (off or a live value)
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? ? Y ? List Item list parameter (off or a live value)
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? ? Y ? List Item list parameter (off or a live value)
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*********************************************************************/
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*********************************************************************/
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@ -726,16 +726,16 @@ static UINT32 compute_config_register(const mips3_state *mips)
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if (mips->flavor == MIPS3_TYPE_VR4300)
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if (mips->flavor == MIPS3_TYPE_VR4300)
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{
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{
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/*
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/*
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For VR43xx, Config is as follows:
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For VR43xx, Config is as follows:
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bit 31 = always 0
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bit 31 = always 0
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bits 28-30 = EC
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bits 28-30 = EC
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bits 24-27 = EP
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bits 24-27 = EP
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bits 16-23 = always b0000010
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bits 16-23 = always b0000010
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bit 15 = endian indicator as standard MIPS III
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bit 15 = endian indicator as standard MIPS III
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bits 4-14 = always b11001000110
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bits 4-14 = always b11001000110
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bit 3 = CU
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bit 3 = CU
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bits 0-2 = K0 ("Coherency algorithm of kseg0")
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bits 0-2 = K0 ("Coherency algorithm of kseg0")
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*/
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*/
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configreg = 0x6460;
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configreg = 0x6460;
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}
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}
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@ -1322,7 +1322,7 @@ static void ide_controller_write(const device_config *device, int bank, offs_t o
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/* logit */
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/* logit */
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if (BANK(bank, offset) != IDE_BANK0_DATA)
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if (BANK(bank, offset) != IDE_BANK0_DATA)
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LOG(("%s:IDE write to %d:%X = %08X, size=%d\n", cpuexec_describe_context(device->machine), bank, offset, data, size));
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LOG(("%s:IDE write to %d:%X = %08X, size=%d\n", cpuexec_describe_context(device->machine), bank, offset, data, size));
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// fprintf(stderr, "ide write %03x %02x size=%d\n", offset, data, size);
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// fprintf(stderr, "ide write %03x %02x size=%d\n", offset, data, size);
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switch (BANK(bank, offset))
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switch (BANK(bank, offset))
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{
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{
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/* unknown config register */
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/* unknown config register */
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@ -876,7 +876,7 @@ int ay8910_read_ym(void *chip)
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if (r > 15) return 0;
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if (r > 15) return 0;
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/* FIXME: calling stream_update here makes gyruss sound awfull.
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/* FIXME: calling stream_update here makes gyruss sound awfull.
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* For the time being, no idea why this is the case */
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* For the time being, no idea why this is the case */
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/* update the output buffer before returning the register */
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/* update the output buffer before returning the register */
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/* stream_update(psg->channel); */
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/* stream_update(psg->channel); */
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@ -12,18 +12,18 @@ unneeded for now...)
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- clean-ups;
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- clean-ups;
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I/O Memo (http://bochs.sourceforge.net/techspec/PORTS.LST):
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I/O Memo (http://bochs.sourceforge.net/techspec/PORTS.LST):
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46E8 ---- 8514/A and compatible video cards (e.g. ATI Graphics Ultra)
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46E8 ---- 8514/A and compatible video cards (e.g. ATI Graphics Ultra)
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46E8 w ROM page select
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46E8 w ROM page select
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83C0-83CF ---- Compaq QVision - Line Draw Engine
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83C0-83CF ---- Compaq QVision - Line Draw Engine
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83C4 ---- Compaq Qvision EISA - Virtual Controller Select
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83C4 ---- Compaq Qvision EISA - Virtual Controller Select
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83C6-83C9 ---- Compaq Qvision EISA - DAC color registers
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83C6-83C9 ---- Compaq Qvision EISA - DAC color registers
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43c4 is a 83c4 mirror?
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43c4 is a 83c4 mirror?
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04D0-04D1 ---- EISA IRQ control
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04D0-04D1 ---- EISA IRQ control
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00F0-00F5 ---- PCjr Disk Controller
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00F0-00F5 ---- PCjr Disk Controller
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(or)
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(or)
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00F0-00FF ---- coprocessor (8087..80387)
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00F0-00FF ---- coprocessor (8087..80387)
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=====================================================================================
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=====================================================================================
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@ -98,7 +98,7 @@ static ADDRESS_MAP_START( chsuper_prg_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0xfb000, 0xfbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
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AM_RANGE(0xfb000, 0xfbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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// AM_RANGE(0xaff8, 0xaff8) AM_DEVWRITE("oki", okim6295_w)
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// AM_RANGE(0xaff8, 0xaff8) AM_DEVWRITE("oki", okim6295_w)
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static ADDRESS_MAP_START( chsuper_portmap, ADDRESS_SPACE_IO, 8 )
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static ADDRESS_MAP_START( chsuper_portmap, ADDRESS_SPACE_IO, 8 )
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AM_RANGE( 0x0000, 0x003f ) AM_RAM // Z180 internal regs
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AM_RANGE( 0x0000, 0x003f ) AM_RAM // Z180 internal regs
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@ -88,7 +88,7 @@ static VIDEO_START( cntsteer )
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tilemap_set_transparent_pen(fg_tilemap,0);
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tilemap_set_transparent_pen(fg_tilemap,0);
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// tilemap_set_flip(bg_tilemap, TILEMAP_FLIPX | TILEMAP_FLIPY);
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// tilemap_set_flip(bg_tilemap, TILEMAP_FLIPX | TILEMAP_FLIPY);
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}
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}
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static VIDEO_START( zerotrgt )
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static VIDEO_START( zerotrgt )
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@ -98,7 +98,7 @@ static VIDEO_START( zerotrgt )
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tilemap_set_transparent_pen(fg_tilemap,0);
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tilemap_set_transparent_pen(fg_tilemap,0);
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// tilemap_set_flip(bg_tilemap, TILEMAP_FLIPX | TILEMAP_FLIPY);
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// tilemap_set_flip(bg_tilemap, TILEMAP_FLIPX | TILEMAP_FLIPY);
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}
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}
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/*
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/*
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@ -226,22 +226,22 @@ static VIDEO_UPDATE( zerotrgt )
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rot_val = rotation_sign ? (-rotation_x) : (rotation_x);
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rot_val = rotation_sign ? (-rotation_x) : (rotation_x);
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// popmessage("%d %02x %02x",rot_val,rotation_sign,rotation_x);
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// popmessage("%d %02x %02x",rot_val,rotation_sign,rotation_x);
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if(rot_val > 90) { rot_val = 90; }
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if(rot_val > 90) { rot_val = 90; }
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if(rot_val < -90) { rot_val = -90; }
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if(rot_val < -90) { rot_val = -90; }
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/*
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/*
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(u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
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(u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
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*/
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*/
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/*
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/*
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1
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1
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0----|----0
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0----|----0
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-1
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-1
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0
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0
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0----|----1
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0----|----1
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0
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0
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*/
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*/
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/*65536*z*cos(a), 65536*z*sin(a), -65536*z*sin(a), 65536*z*cos(a)*/
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/*65536*z*cos(a), 65536*z*sin(a), -65536*z*sin(a), 65536*z*cos(a)*/
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p1 = -65536*1*cos(2*M_PI*(rot_val)/1024);
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p1 = -65536*1*cos(2*M_PI*(rot_val)/1024);
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p2 = -65536*1*sin(2*M_PI*(rot_val)/1024);
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p2 = -65536*1*sin(2*M_PI*(rot_val)/1024);
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@ -278,19 +278,19 @@ static VIDEO_UPDATE( cntsteer )
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rot_val = (rotation_sign & 4) ? (rotation_x) : (-rotation_x);
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rot_val = (rotation_sign & 4) ? (rotation_x) : (-rotation_x);
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// popmessage("%d %02x %02x",rot_val,rotation_sign,rotation_x);
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// popmessage("%d %02x %02x",rot_val,rotation_sign,rotation_x);
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/*
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/*
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(u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
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(u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
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*/
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*/
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/*
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/*
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1
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1
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0----|----0
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0----|----0
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-1
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-1
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0
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0
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0----|----1
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0----|----1
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0
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0
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*/
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*/
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/*65536*z*cos(a), 65536*z*sin(a), -65536*z*sin(a), 65536*z*cos(a)*/
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/*65536*z*cos(a), 65536*z*sin(a), -65536*z*sin(a), 65536*z*cos(a)*/
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p1 = -65536*1*cos(2*M_PI*(rot_val)/1024);
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p1 = -65536*1*cos(2*M_PI*(rot_val)/1024);
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p2 = -65536*1*sin(2*M_PI*(rot_val)/1024);
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p2 = -65536*1*sin(2*M_PI*(rot_val)/1024);
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@ -409,14 +409,14 @@ static WRITE8_HANDLER( zerotrgt_ctrl_w )
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static WRITE8_HANDLER( cntsteer_sub_irq_w )
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static WRITE8_HANDLER( cntsteer_sub_irq_w )
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{
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{
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cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE);
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cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE);
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// printf("%02x IRQ\n",data);
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// printf("%02x IRQ\n",data);
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}
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}
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static WRITE8_HANDLER( cntsteer_sub_nmi_w )
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static WRITE8_HANDLER( cntsteer_sub_nmi_w )
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{
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{
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// if(data)
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// if(data)
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// cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
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// cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
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// popmessage("%02x",data);
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// popmessage("%02x",data);
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}
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}
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static WRITE8_HANDLER( cntsteer_main_irq_w )
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static WRITE8_HANDLER( cntsteer_main_irq_w )
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@ -1300,8 +1300,8 @@ static ADDRESS_MAP_START( awp68k_program_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x00480080, 0x00480081) AM_DEVWRITE("upd", upd7759_w)
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AM_RANGE(0x00480080, 0x00480081) AM_DEVWRITE("upd", upd7759_w)
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AM_RANGE(0x00480082, 0x00480083) AM_DEVWRITE("upd",volume_w)
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AM_RANGE(0x00480082, 0x00480083) AM_DEVWRITE("upd",volume_w)
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AM_RANGE(0x00480084, 0x00480085) AM_DEVREAD("upd", upd7759_r)
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AM_RANGE(0x00480084, 0x00480085) AM_DEVREAD("upd", upd7759_r)
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// AM_RANGE(0x004801e0, 0x004801ff) AM_READWRITE(duart_2_r, duart_2_w)
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// AM_RANGE(0x004801e0, 0x004801ff) AM_READWRITE(duart_2_r, duart_2_w)
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// AM_RANGE(0x00800000, 0x00800007) AM_READWRITE(m68k_tms_r, m68k_tms_w)
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// AM_RANGE(0x00800000, 0x00800007) AM_READWRITE(m68k_tms_r, m68k_tms_w)
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AM_RANGE(0x00c00000, 0x00cfffff) AM_ROM
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AM_RANGE(0x00c00000, 0x00cfffff) AM_ROM
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AM_RANGE(0x00d00000, 0x00dfffff) AM_ROM
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AM_RANGE(0x00d00000, 0x00dfffff) AM_ROM
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AM_RANGE(0x00e00000, 0x00efffff) AM_ROM
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AM_RANGE(0x00e00000, 0x00efffff) AM_ROM
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@ -3191,20 +3191,20 @@ ROM_END
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/*
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/*
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Title VIRTUA TENNIS 2 (POWER SMASH 2)
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Title VIRTUA TENNIS 2 (POWER SMASH 2)
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Media ID D72C
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Media ID D72C
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Media Config GD-ROM1/1
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Media Config GD-ROM1/1
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Regions J
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Regions J
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Peripheral String 0000000
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Peripheral String 0000000
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Product Number GDS-0015A
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Product Number GDS-0015A
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Version V2.000
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Version V2.000
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Release Date 20010827
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Release Date 20010827
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Manufacturer ID
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Manufacturer ID
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TOC DISC
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TOC DISC
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Track Start Sector End Sector Track Size
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Track Start Sector End Sector Track Size
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track01.bin 150 449 705600
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track01.bin 150 449 705600
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track02.raw 600 2732 5016816
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track02.raw 600 2732 5016816
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track03.bin 45150 549299 1185760800
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track03.bin 45150 549299 1185760800
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PIC
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PIC
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@ -3226,19 +3226,19 @@ ROM_START( vtennis2 )
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ROM_END
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ROM_END
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/*
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/*
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Title MONKEY_BALL
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Title MONKEY_BALL
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Media ID 43EB
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Media ID 43EB
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Media Config GD-ROM1/1
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Media Config GD-ROM1/1
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Regions J
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Regions J
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Peripheral String 0000000
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Peripheral String 0000000
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Product Number GDS-0008
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Product Number GDS-0008
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Version V1.008
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Version V1.008
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Release Date 20010425
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Release Date 20010425
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Manufacturer ID
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Manufacturer ID
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Track Start Sector End Sector Track Size
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Track Start Sector End Sector Track Size
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track01.bin 150 449 705600
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track01.bin 150 449 705600
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track02.raw 600 2732 5016816
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track02.raw 600 2732 5016816
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track03.bin 45150 549299 1185760800
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track03.bin 45150 549299 1185760800
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PIC
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PIC
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@ -3274,20 +3274,20 @@ ROM_START( luptype )
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ROM_END
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ROM_END
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/*
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/*
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Title THE_MAZE_OF_THE_KINGS
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Title THE_MAZE_OF_THE_KINGS
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Media ID E3D0
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Media ID E3D0
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Media Config GD-ROM1/1
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Media Config GD-ROM1/1
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Regions J
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Regions J
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Peripheral String 0000000
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Peripheral String 0000000
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Product Number GDS-0022
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Product Number GDS-0022
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Version V1.001
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Version V1.001
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Release Date 20020306
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Release Date 20020306
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Manufacturer ID
|
Manufacturer ID
|
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TOC DISC
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TOC DISC
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Track Start Sector End Sector Track Size
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Track Start Sector End Sector Track Size
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track01.bin 150 449 705600
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track01.bin 150 449 705600
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track02.raw 600 2732 5016816
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track02.raw 600 2732 5016816
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track03.bin 45150 549299 1185760800
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track03.bin 45150 549299 1185760800
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PIC
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PIC
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@ -3320,20 +3320,20 @@ ROM_START( lupinsho )
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ROM_END
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ROM_END
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/*
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/*
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Title CONFIDENTIAL MISSION
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Title CONFIDENTIAL MISSION
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Media ID FFCA
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Media ID FFCA
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Media Config GD-ROM1/1
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Media Config GD-ROM1/1
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Regions J
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Regions J
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Peripheral String 0000000
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Peripheral String 0000000
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Product Number GDS-0001
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Product Number GDS-0001
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Version V1.050
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Version V1.050
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Release Date 20001011
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Release Date 20001011
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Manufacturer ID SEGA ENTERPRISES
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Manufacturer ID SEGA ENTERPRISES
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TOC DISC
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TOC DISC
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Track Start Sector End Sector Track Size
|
Track Start Sector End Sector Track Size
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track01.bin 150 3788 8558928
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track01.bin 150 3788 8558928
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track02.raw 3939 6071 5016816
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track02.raw 3939 6071 5016816
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track03.bin 45150 549299 1185760800
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track03.bin 45150 549299 1185760800
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PIC
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PIC
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@ -3372,8 +3372,8 @@ static READ64_HANDLER( naomigd_bios_idle_skip_r )
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if (cpu_get_pc(space->cpu)==0xc04173c)
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if (cpu_get_pc(space->cpu)==0xc04173c)
|
||||||
cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));
|
cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));
|
||||||
//cpu_spinuntil_int(space->cpu);
|
//cpu_spinuntil_int(space->cpu);
|
||||||
// else
|
// else
|
||||||
// printf("%08x\n", cpu_get_pc(space->cpu));
|
// printf("%08x\n", cpu_get_pc(space->cpu));
|
||||||
|
|
||||||
return naomi_ram64[0x2ad238/8];
|
return naomi_ram64[0x2ad238/8];
|
||||||
}
|
}
|
||||||
@ -3579,20 +3579,20 @@ ROM_END
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
Title BEACH SPIKERS
|
Title BEACH SPIKERS
|
||||||
Media ID 0897
|
Media ID 0897
|
||||||
Media Config GD-ROM1/1
|
Media Config GD-ROM1/1
|
||||||
Regions J
|
Regions J
|
||||||
Peripheral String 0000000
|
Peripheral String 0000000
|
||||||
Product Number GDS-0014
|
Product Number GDS-0014
|
||||||
Version V1.001
|
Version V1.001
|
||||||
Release Date 20010613
|
Release Date 20010613
|
||||||
Manufacturer ID
|
Manufacturer ID
|
||||||
TOC DISC
|
TOC DISC
|
||||||
Track Start Sector End Sector Track Size
|
Track Start Sector End Sector Track Size
|
||||||
track01.bin 150 449 705600
|
track01.bin 150 449 705600
|
||||||
track02.raw 600 2746 5049744
|
track02.raw 600 2746 5049744
|
||||||
track03.bin 45150 549299 1185760800
|
track03.bin 45150 549299 1185760800
|
||||||
|
|
||||||
PIC
|
PIC
|
||||||
|
|
||||||
@ -3603,7 +3603,7 @@ PIC
|
|||||||
|
|
||||||
ROM_START( beachspi )
|
ROM_START( beachspi )
|
||||||
NAOMI2_BIOS
|
NAOMI2_BIOS
|
||||||
// NAOMIGD_BIOS
|
// NAOMIGD_BIOS
|
||||||
|
|
||||||
ROM_REGION( 0x10000000, "user1", ROMREGION_ERASE) // allocate max size in init instead?
|
ROM_REGION( 0x10000000, "user1", ROMREGION_ERASE) // allocate max size in init instead?
|
||||||
|
|
||||||
@ -3618,7 +3618,7 @@ ROM_END
|
|||||||
|
|
||||||
ROM_START( initd )
|
ROM_START( initd )
|
||||||
NAOMI2_BIOS
|
NAOMI2_BIOS
|
||||||
// NAOMIGD_BIOS
|
// NAOMIGD_BIOS
|
||||||
|
|
||||||
ROM_REGION( 0x10000000, "user1", ROMREGION_ERASE) // allocate max size in init instead?
|
ROM_REGION( 0x10000000, "user1", ROMREGION_ERASE) // allocate max size in init instead?
|
||||||
|
|
||||||
@ -3633,7 +3633,7 @@ ROM_END
|
|||||||
|
|
||||||
ROM_START( initdexp )
|
ROM_START( initdexp )
|
||||||
NAOMI2_BIOS
|
NAOMI2_BIOS
|
||||||
// NAOMIGD_BIOS
|
// NAOMIGD_BIOS
|
||||||
|
|
||||||
ROM_REGION( 0x10000000, "user1", ROMREGION_ERASE) // allocate max size in init instead?
|
ROM_REGION( 0x10000000, "user1", ROMREGION_ERASE) // allocate max size in init instead?
|
||||||
|
|
||||||
@ -3684,20 +3684,20 @@ ROM_END
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
Title VIRTUA STRIKER 4
|
Title VIRTUA STRIKER 4
|
||||||
Media ID 93B2
|
Media ID 93B2
|
||||||
Media Config GD-ROM1/1
|
Media Config GD-ROM1/1
|
||||||
Regions J
|
Regions J
|
||||||
Peripheral String 0000000
|
Peripheral String 0000000
|
||||||
Product Number GDT-0015
|
Product Number GDT-0015
|
||||||
Version V1.001
|
Version V1.001
|
||||||
Release Date 20041202
|
Release Date 20041202
|
||||||
Manufacturer ID
|
Manufacturer ID
|
||||||
TOC DISC
|
TOC DISC
|
||||||
Track Start Sector End Sector Track Size
|
Track Start Sector End Sector Track Size
|
||||||
track01.bin 150 449 705600
|
track01.bin 150 449 705600
|
||||||
track02.raw 600 1951 3179904
|
track02.raw 600 1951 3179904
|
||||||
track03.bin 45150 549299 1185760800
|
track03.bin 45150 549299 1185760800
|
||||||
|
|
||||||
|
|
||||||
PIC
|
PIC
|
||||||
@ -3720,14 +3720,14 @@ ROM_START( vs4 )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Title VIRTUA_STRIKER_2002
|
Title VIRTUA_STRIKER_2002
|
||||||
Media ID 0DD8
|
Media ID 0DD8
|
||||||
Media Config GD-ROM1/1
|
Media Config GD-ROM1/1
|
||||||
Regions J
|
Regions J
|
||||||
Peripheral String 0000000
|
Peripheral String 0000000
|
||||||
Product Number GDT-0002
|
Product Number GDT-0002
|
||||||
Version V1.005
|
Version V1.005
|
||||||
Release Date 20020730
|
Release Date 20020730
|
||||||
|
|
||||||
|
|
||||||
PIC
|
PIC
|
||||||
@ -3773,14 +3773,14 @@ ROM_END
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
Title GHOST SQUAD
|
Title GHOST SQUAD
|
||||||
Media ID 004F
|
Media ID 004F
|
||||||
Media Config GD-ROM1/1
|
Media Config GD-ROM1/1
|
||||||
Regions J
|
Regions J
|
||||||
Peripheral String 0000000
|
Peripheral String 0000000
|
||||||
Product Number GDX-0012A
|
Product Number GDX-0012A
|
||||||
Version V2.000
|
Version V2.000
|
||||||
Release Date 20041209
|
Release Date 20041209
|
||||||
Manufacturer ID
|
Manufacturer ID
|
||||||
|
|
||||||
PIC
|
PIC
|
||||||
@ -3803,20 +3803,20 @@ ROM_END
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
Title VIRTUA COP 3
|
Title VIRTUA COP 3
|
||||||
Media ID C4AD
|
Media ID C4AD
|
||||||
Media Config GD-ROM1/1
|
Media Config GD-ROM1/1
|
||||||
Regions J
|
Regions J
|
||||||
Peripheral String 0000000
|
Peripheral String 0000000
|
||||||
Product Number GDX-0003A
|
Product Number GDX-0003A
|
||||||
Version V2.004
|
Version V2.004
|
||||||
Release Date 20030226
|
Release Date 20030226
|
||||||
Manufacturer ID
|
Manufacturer ID
|
||||||
TOC DISC
|
TOC DISC
|
||||||
Track Start Sector End Sector Track Size
|
Track Start Sector End Sector Track Size
|
||||||
track01.bin 150 599 1058400
|
track01.bin 150 599 1058400
|
||||||
track02.raw 750 2101 3179904
|
track02.raw 750 2101 3179904
|
||||||
track03.bin 45150 549299 1185760800
|
track03.bin 45150 549299 1185760800
|
||||||
|
|
||||||
|
|
||||||
PIC
|
PIC
|
||||||
|
@ -21,17 +21,17 @@
|
|||||||
Zsolt Vasvari
|
Zsolt Vasvari
|
||||||
|
|
||||||
|
|
||||||
The arcade version of the Neo-Geo system is called Multi Video System (MVS).
|
The arcade version of the Neo-Geo system is called Multi Video System (MVS).
|
||||||
It is a cartridge based system.
|
It is a cartridge based system.
|
||||||
MVS hardware was produced in 1 / 2 / 4 and 6 Slot versions.
|
MVS hardware was produced in 1 / 2 / 4 and 6 Slot versions.
|
||||||
|
|
||||||
Known hardware (incomplete):
|
Known hardware (incomplete):
|
||||||
============================
|
============================
|
||||||
|
|
||||||
1 Slot: MV1 / MV1A / MV1B (MV1B CHX) / MV1C / MV1F (MV1FT / MV1FS) / MV1FZ
|
1 Slot: MV1 / MV1A / MV1B (MV1B CHX) / MV1C / MV1F (MV1FT / MV1FS) / MV1FZ
|
||||||
2 Slot: MV2F / MV2F-01
|
2 Slot: MV2F / MV2F-01
|
||||||
4 Slot: MV4F / MV4FS
|
4 Slot: MV4F / MV4FS
|
||||||
6 Slot: MV6F
|
6 Slot: MV6F
|
||||||
|
|
||||||
|
|
||||||
Neo-Geo Motherboard (info - courtesy of Guru):
|
Neo-Geo Motherboard (info - courtesy of Guru):
|
||||||
@ -68,88 +68,88 @@
|
|||||||
|---------------------------------------------------------------------|
|
|---------------------------------------------------------------------|
|
||||||
|
|
||||||
|
|
||||||
MVS cart pinout
|
MVS cart pinout
|
||||||
===============
|
===============
|
||||||
|
|
||||||
kindly submitted by Apollo69 (apollo69@columbus.rr.com)
|
kindly submitted by Apollo69 (apollo69@columbus.rr.com)
|
||||||
=================================================================
|
=================================================================
|
||||||
CTRG1 CTRG2
|
CTRG1 CTRG2
|
||||||
=================================================================
|
=================================================================
|
||||||
GND = 01A | 01B = GND GND = 01A | 01B = GND
|
GND = 01A | 01B = GND GND = 01A | 01B = GND
|
||||||
GND = 02A | 02B = GND GND = 02A | 02B = GND
|
GND = 02A | 02B = GND GND = 02A | 02B = GND
|
||||||
P0 = 03A | 03B = P1 GND = 03A | 03B = GND
|
P0 = 03A | 03B = P1 GND = 03A | 03B = GND
|
||||||
P2 = 04A | 04B = P3 GND = 04A | 04B = GND
|
P2 = 04A | 04B = P3 GND = 04A | 04B = GND
|
||||||
P4 = 05A | 05B = P5 D0 = 05A | 05B = A1
|
P4 = 05A | 05B = P5 D0 = 05A | 05B = A1
|
||||||
P6 = 06A | 06B = P7 D1 = 06A | 06B = A2
|
P6 = 06A | 06B = P7 D1 = 06A | 06B = A2
|
||||||
P8 = 07A | 07B = P9 D2 = 07A | 07B = A3
|
P8 = 07A | 07B = P9 D2 = 07A | 07B = A3
|
||||||
P10 = 08A | 08B = P11 D3 = 08A | 08B = A4
|
P10 = 08A | 08B = P11 D3 = 08A | 08B = A4
|
||||||
P12 = 09A | 09B = P13 D4 = 09A | 09B = A5
|
P12 = 09A | 09B = P13 D4 = 09A | 09B = A5
|
||||||
P14 = 10A | 10B = P15 D5 = 10A | 10B = A6
|
P14 = 10A | 10B = P15 D5 = 10A | 10B = A6
|
||||||
P16 = 11A | 11B = P17 D6 = 11A | 11B = A7
|
P16 = 11A | 11B = P17 D6 = 11A | 11B = A7
|
||||||
P18 = 12A | 12B = P19 D7 = 12A | 12B = A8
|
P18 = 12A | 12B = P19 D7 = 12A | 12B = A8
|
||||||
P20 = 13A | 13B = P21 D8 = 13A | 13B = A9
|
P20 = 13A | 13B = P21 D8 = 13A | 13B = A9
|
||||||
P22 = 14A | 14B = P23 D9 = 14A | 14B = A10
|
P22 = 14A | 14B = P23 D9 = 14A | 14B = A10
|
||||||
PCK1B = 15A | 15B = 24M D10 = 15A | 15B = A11
|
PCK1B = 15A | 15B = 24M D10 = 15A | 15B = A11
|
||||||
PCK2B = 16A | 16B = 12M D11 = 16A | 16B = A12
|
PCK2B = 16A | 16B = 12M D11 = 16A | 16B = A12
|
||||||
2H1 = 17A | 17B = 8M D12 = 17A | 17B = A13
|
2H1 = 17A | 17B = 8M D12 = 17A | 17B = A13
|
||||||
CA4 = 18A | 18B = RESET D13 = 18A | 18B = A14
|
CA4 = 18A | 18B = RESET D13 = 18A | 18B = A14
|
||||||
CR0 = 19A | 19B = CR1 D14 = 19A | 19B = A15
|
CR0 = 19A | 19B = CR1 D14 = 19A | 19B = A15
|
||||||
CR2 = 20A | 20B = CR3 D15 = 20A | 20B = A16
|
CR2 = 20A | 20B = CR3 D15 = 20A | 20B = A16
|
||||||
CR4 = 21A | 21B = CR5 R/W = 21A | 21B = A17
|
CR4 = 21A | 21B = CR5 R/W = 21A | 21B = A17
|
||||||
CR6 = 22A | 22B = CR7 AS = 22A | 22B = A18
|
CR6 = 22A | 22B = CR7 AS = 22A | 22B = A18
|
||||||
CR8 = 23A | 23B = CR9 ROMOEU = 23A | 23B = A19
|
CR8 = 23A | 23B = CR9 ROMOEU = 23A | 23B = A19
|
||||||
CR10 = 24A | 24B = CR11 ROMOEL = 24A | 24B = 68KCLKB
|
CR10 = 24A | 24B = CR11 ROMOEL = 24A | 24B = 68KCLKB
|
||||||
CR12 = 25A | 25B = CR13 PORTOEU = 25A | 25B = ROMWAIT
|
CR12 = 25A | 25B = CR13 PORTOEU = 25A | 25B = ROMWAIT
|
||||||
CR14 = 26A | 26B = CR15 PORTOEL = 26A | 26B = PWAIT0
|
CR14 = 26A | 26B = CR15 PORTOEL = 26A | 26B = PWAIT0
|
||||||
CR16 = 27A | 27B = CR17 PORTWEU = 27A | 27B = PWAIT1
|
CR16 = 27A | 27B = CR17 PORTWEU = 27A | 27B = PWAIT1
|
||||||
CR18 = 28A | 28B = CR19 PORTWEL = 28A | 28B = PDTACT
|
CR18 = 28A | 28B = CR19 PORTWEL = 28A | 28B = PDTACT
|
||||||
VCC = 29A | 29B = VCC VCC = 29A | 29B = VCC
|
VCC = 29A | 29B = VCC VCC = 29A | 29B = VCC
|
||||||
VCC = 30A | 30B = VCC VCC = 30A | 30B = VCC
|
VCC = 30A | 30B = VCC VCC = 30A | 30B = VCC
|
||||||
VCC = 31A | 31B = VCC VCC = 31A | 31B = VCC
|
VCC = 31A | 31B = VCC VCC = 31A | 31B = VCC
|
||||||
VCC = 32A | 32B = VCC VCC = 32A | 32B = VCC
|
VCC = 32A | 32B = VCC VCC = 32A | 32B = VCC
|
||||||
CR20 = 33A | 33B = CR21 PORTADRS = 33A | 33B = 4MB
|
CR20 = 33A | 33B = CR21 PORTADRS = 33A | 33B = 4MB
|
||||||
CR22 = 34A | 34B = CR23 NC = 34A | 34B = ROMOE
|
CR22 = 34A | 34B = CR23 NC = 34A | 34B = ROMOE
|
||||||
CR24 = 35A | 35B = CR25 NC = 35A | 35B = RESET
|
CR24 = 35A | 35B = CR25 NC = 35A | 35B = RESET
|
||||||
CR26 = 36A | 36B = CR27 NC = 36A | 36B = NC
|
CR26 = 36A | 36B = CR27 NC = 36A | 36B = NC
|
||||||
CR28 = 37A | 37B = CR29 NC = 37A | 37B = NC
|
CR28 = 37A | 37B = CR29 NC = 37A | 37B = NC
|
||||||
CR30 = 38A | 38B = CR31 NC = 38A | 38B = NC
|
CR30 = 38A | 38B = CR31 NC = 38A | 38B = NC
|
||||||
NC = 39A | 39B = FIX00 NC = 39A | 39B = NC
|
NC = 39A | 39B = FIX00 NC = 39A | 39B = NC
|
||||||
NC = 40A | 40B = FIX01 NC = 40A | 40B = NC
|
NC = 40A | 40B = FIX01 NC = 40A | 40B = NC
|
||||||
NC = 41A | 41B = FIX02 NC = 41A | 41B = SDPAD0
|
NC = 41A | 41B = FIX02 NC = 41A | 41B = SDPAD0
|
||||||
SYSTEMB = 42A | 42B = FIX03 SYSTEMB = 42A | 42B = SDPAD1
|
SYSTEMB = 42A | 42B = FIX03 SYSTEMB = 42A | 42B = SDPAD1
|
||||||
SDA0 = 43A | 43B = FIX04 SDPA8 = 43A | 43B = SDPAD2
|
SDA0 = 43A | 43B = FIX04 SDPA8 = 43A | 43B = SDPAD2
|
||||||
SDA1 = 44A | 44B = FIX05 SDPA9 = 44A | 44B = SDPAD3
|
SDA1 = 44A | 44B = FIX05 SDPA9 = 44A | 44B = SDPAD3
|
||||||
SDA2 = 45A | 45B = FIX06 SDPA10 = 45A | 45B = SDPAD4
|
SDA2 = 45A | 45B = FIX06 SDPA10 = 45A | 45B = SDPAD4
|
||||||
SDA3 = 46A | 46B = FIX07 SDPA11 = 46A | 46B = SDPAD5
|
SDA3 = 46A | 46B = FIX07 SDPA11 = 46A | 46B = SDPAD5
|
||||||
SDA4 = 47A | 47B = SDRD0 SDPMPX = 47A | 47B = SDPAD6
|
SDA4 = 47A | 47B = SDRD0 SDPMPX = 47A | 47B = SDPAD6
|
||||||
SDA5 = 48A | 48B = SDRD1 SDPOE = 48A | 48B = SDPAD7
|
SDA5 = 48A | 48B = SDRD1 SDPOE = 48A | 48B = SDPAD7
|
||||||
SDA6 = 49A | 49B = SDROM SDRA8 = 49A | 49B = SDRA00
|
SDA6 = 49A | 49B = SDROM SDRA8 = 49A | 49B = SDRA00
|
||||||
SDA7 = 50A | 50B = SDMRD SDRA9 = 50A | 50B = SDRA01
|
SDA7 = 50A | 50B = SDMRD SDRA9 = 50A | 50B = SDRA01
|
||||||
SDA8 = 51A | 51B = SDDO SDRA20 = 51A | 51B = SDRA02
|
SDA8 = 51A | 51B = SDDO SDRA20 = 51A | 51B = SDRA02
|
||||||
SDA9 = 52A | 52B = SDD1 SDRA21 = 52A | 52B = SDRA03
|
SDA9 = 52A | 52B = SDD1 SDRA21 = 52A | 52B = SDRA03
|
||||||
SDA10 = 53A | 53B = SDD2 SDRA22 = 53A | 53B = SDRA04
|
SDA10 = 53A | 53B = SDD2 SDRA22 = 53A | 53B = SDRA04
|
||||||
SDA11 = 54A | 54B = SDD3 SDRA23 = 54A | 54B = SDRA05
|
SDA11 = 54A | 54B = SDD3 SDRA23 = 54A | 54B = SDRA05
|
||||||
SDA12 = 55A | 55B = SDD4 SDRMPX = 55A | 55B = SDRA06
|
SDA12 = 55A | 55B = SDD4 SDRMPX = 55A | 55B = SDRA06
|
||||||
SDA13 = 56A | 56B = SDD5 SDROE = 56A | 56B = SDRA07
|
SDA13 = 56A | 56B = SDD5 SDROE = 56A | 56B = SDRA07
|
||||||
SDA14 = 57A | 57B = SDD6 GND = 57A | 57B = GND
|
SDA14 = 57A | 57B = SDD6 GND = 57A | 57B = GND
|
||||||
SDA15 = 58A | 58B = SDD7 GND = 58A | 58B = GND
|
SDA15 = 58A | 58B = SDD7 GND = 58A | 58B = GND
|
||||||
GND = 59A | 59B = GND GND = 59A | 59B = GND
|
GND = 59A | 59B = GND GND = 59A | 59B = GND
|
||||||
GND = 60A | 60B = GND GND = 60A | 60B = GND
|
GND = 60A | 60B = GND GND = 60A | 60B = GND
|
||||||
|
|
||||||
CTRG1 (CHA) = Contains gfx data ('C' - rom), text layer data ('S' - rom) and sound driver ('M' - rom)
|
CTRG1 (CHA) = Contains gfx data ('C' - rom), text layer data ('S' - rom) and sound driver ('M' - rom)
|
||||||
CTRG2 (PROG) = Contains sample data ('V' - rom) and program code ('P' - rom)
|
CTRG2 (PROG) = Contains sample data ('V' - rom) and program code ('P' - rom)
|
||||||
|
|
||||||
NOTE: On CTRG2-B, The "A" lines start at "A1". If you trace this on an
|
NOTE: On CTRG2-B, The "A" lines start at "A1". If you trace this on an
|
||||||
actual cart, you will see that this is actually "A0" (A0 - A18).
|
actual cart, you will see that this is actually "A0" (A0 - A18).
|
||||||
|
|
||||||
These are from a very hard to read copy of the schematics, so
|
These are from a very hard to read copy of the schematics, so
|
||||||
I hope that I got the pin names correct.
|
I hope that I got the pin names correct.
|
||||||
|
|
||||||
Apollo69 10/19/99
|
Apollo69 10/19/99
|
||||||
|
|
||||||
|
|
||||||
Known driver issues/to-do's:
|
Known driver issues/to-do's:
|
||||||
============================
|
============================
|
||||||
|
|
||||||
* Fatal Fury 3 crashes during the ending - this doesn't occur if
|
* Fatal Fury 3 crashes during the ending - this doesn't occur if
|
||||||
the language is set to Japanese, maybe the English endings
|
the language is set to Japanese, maybe the English endings
|
||||||
|
@ -416,7 +416,7 @@ static ADDRESS_MAP_START( pcat_io, ADDRESS_SPACE_IO, 32 )
|
|||||||
AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_r, pic8259_w, 0xffffffff)
|
AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_r, pic8259_w, 0xffffffff)
|
||||||
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
||||||
AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
|
AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
|
||||||
AM_RANGE(0x0070, 0x007f) AM_RAM//READWRITE(mc146818_port32le_r, mc146818_port32le_w)
|
AM_RANGE(0x0070, 0x007f) AM_RAM//READWRITE(mc146818_port32le_r, mc146818_port32le_w)
|
||||||
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(dma_page_select_r,dma_page_select_w, 0xffffffff)//TODO
|
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(dma_page_select_r,dma_page_select_w, 0xffffffff)//TODO
|
||||||
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
||||||
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8("dma8237_2", dma8237_r, dma8237_w, 0xffff)
|
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8("dma8237_2", dma8237_r, dma8237_w, 0xffff)
|
||||||
@ -521,9 +521,9 @@ static void streetg2_set_keyb_int(running_machine *machine, int state) {
|
|||||||
|
|
||||||
static MACHINE_START( streetg2 )
|
static MACHINE_START( streetg2 )
|
||||||
{
|
{
|
||||||
// bank = -1;
|
// bank = -1;
|
||||||
// lastvalue = -1;
|
// lastvalue = -1;
|
||||||
// hv_blank = 0;
|
// hv_blank = 0;
|
||||||
cpu_set_irq_callback(machine->cpu[0], irq_callback);
|
cpu_set_irq_callback(machine->cpu[0], irq_callback);
|
||||||
streetg2_devices.pit8253 = devtag_get_device( machine, "pit8254" );
|
streetg2_devices.pit8253 = devtag_get_device( machine, "pit8254" );
|
||||||
streetg2_devices.pic8259_1 = devtag_get_device( machine, "pic8259_1" );
|
streetg2_devices.pic8259_1 = devtag_get_device( machine, "pic8259_1" );
|
||||||
@ -574,7 +574,7 @@ static MACHINE_DRIVER_START( pcat_nit )
|
|||||||
MDRV_MACHINE_START(streetg2)
|
MDRV_MACHINE_START(streetg2)
|
||||||
MDRV_NVRAM_HANDLER( mc146818 )
|
MDRV_NVRAM_HANDLER( mc146818 )
|
||||||
|
|
||||||
// MDRV_IMPORT_FROM( at_kbdc8042 )
|
// MDRV_IMPORT_FROM( at_kbdc8042 )
|
||||||
MDRV_PIC8259_ADD( "pic8259_1", pic8259_1_config )
|
MDRV_PIC8259_ADD( "pic8259_1", pic8259_1_config )
|
||||||
MDRV_PIC8259_ADD( "pic8259_2", pic8259_2_config )
|
MDRV_PIC8259_ADD( "pic8259_2", pic8259_2_config )
|
||||||
MDRV_DMA8237_ADD( "dma8237_1", dma8237_1_config )
|
MDRV_DMA8237_ADD( "dma8237_1", dma8237_1_config )
|
||||||
|
@ -6,11 +6,11 @@
|
|||||||
driver by Angelo Salese and Pierpaolo Prazzoli
|
driver by Angelo Salese and Pierpaolo Prazzoli
|
||||||
dump and info provided by Yoshi
|
dump and info provided by Yoshi
|
||||||
|
|
||||||
To initialize the eeprom, keep Service button pressed at boot.
|
To initialize the eeprom, keep Service button pressed at boot.
|
||||||
|
|
||||||
Notes:
|
Notes:
|
||||||
- Text tilemap flickering could be a bit slower / faster
|
- Text tilemap flickering could be a bit slower / faster
|
||||||
- Brightness effect could be a bit darker / lighter
|
- Brightness effect could be a bit darker / lighter
|
||||||
|
|
||||||
*****************************************************************************************/
|
*****************************************************************************************/
|
||||||
|
|
||||||
|
@ -49,9 +49,9 @@ static ADDRESS_MAP_START(queen_io, ADDRESS_SPACE_IO, 32)
|
|||||||
AM_RANGE(0x0000, 0x001f) AM_RAM//AM_DEVREADWRITE8("dma8237_1", dma8237_r, dma8237_w, 0xffffffff)
|
AM_RANGE(0x0000, 0x001f) AM_RAM//AM_DEVREADWRITE8("dma8237_1", dma8237_r, dma8237_w, 0xffffffff)
|
||||||
AM_RANGE(0x0020, 0x003f) AM_RAM//AM_DEVREADWRITE8("pic8259_1", pic8259_r, pic8259_w, 0xffffffff)
|
AM_RANGE(0x0020, 0x003f) AM_RAM//AM_DEVREADWRITE8("pic8259_1", pic8259_r, pic8259_w, 0xffffffff)
|
||||||
AM_RANGE(0x0040, 0x005f) AM_RAM//AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
AM_RANGE(0x0040, 0x005f) AM_RAM//AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
||||||
AM_RANGE(0x0060, 0x006f) AM_RAM//AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
|
AM_RANGE(0x0060, 0x006f) AM_RAM//AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
|
||||||
AM_RANGE(0x0070, 0x007f) AM_RAM//AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w)
|
AM_RANGE(0x0070, 0x007f) AM_RAM//AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w)
|
||||||
AM_RANGE(0x0080, 0x009f) AM_RAM//AM_READWRITE(at_page32_r, at_page32_w)
|
AM_RANGE(0x0080, 0x009f) AM_RAM//AM_READWRITE(at_page32_r, at_page32_w)
|
||||||
AM_RANGE(0x00a0, 0x00bf) AM_RAM//AM_DEVREADWRITE8("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
AM_RANGE(0x00a0, 0x00bf) AM_RAM//AM_DEVREADWRITE8("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
||||||
AM_RANGE(0x00c0, 0x00df) AM_RAM//AM_DEVREADWRITE("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
|
AM_RANGE(0x00c0, 0x00df) AM_RAM//AM_DEVREADWRITE("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
|
||||||
AM_RANGE(0x00e8, 0x00eb) AM_NOP
|
AM_RANGE(0x00e8, 0x00eb) AM_NOP
|
||||||
@ -61,7 +61,7 @@ static ADDRESS_MAP_START(queen_io, ADDRESS_SPACE_IO, 32)
|
|||||||
AM_RANGE(0x0278, 0x027b) AM_WRITENOP//AM_WRITE(pnp_config_w)
|
AM_RANGE(0x0278, 0x027b) AM_WRITENOP//AM_WRITE(pnp_config_w)
|
||||||
AM_RANGE(0x03f0, 0x03ff) AM_RAM//AM_DEVREADWRITE("ide", fdc_r, fdc_w)
|
AM_RANGE(0x03f0, 0x03ff) AM_RAM//AM_DEVREADWRITE("ide", fdc_r, fdc_w)
|
||||||
AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE(pnp_data_w)
|
AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE(pnp_data_w)
|
||||||
AM_RANGE(0x0cf8, 0x0cff) AM_RAM//AM_DEVREADWRITE("pcibus", pci_32le_r, pci_32le_w)
|
AM_RANGE(0x0cf8, 0x0cff) AM_RAM//AM_DEVREADWRITE("pcibus", pci_32le_r, pci_32le_w)
|
||||||
AM_RANGE(0x4004, 0x4007) AM_RAM // - todo: identify these two.
|
AM_RANGE(0x4004, 0x4007) AM_RAM // - todo: identify these two.
|
||||||
AM_RANGE(0x5000, 0x5007) AM_RAM // /
|
AM_RANGE(0x5000, 0x5007) AM_RAM // /
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
@ -656,56 +656,56 @@ static VIDEO_UPDATE(sfbonus)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
/*
|
/*
|
||||||
popmessage("%02x %02x %02x %02x %02x %02x %02x %02x -- %02x -- %02x %02x -- %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
|
popmessage("%02x %02x %02x %02x %02x %02x %02x %02x -- %02x -- %02x %02x -- %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
|
||||||
sfbonus_3800_regs[0],
|
sfbonus_3800_regs[0],
|
||||||
sfbonus_3800_regs[1],
|
sfbonus_3800_regs[1],
|
||||||
sfbonus_3800_regs[2],
|
sfbonus_3800_regs[2],
|
||||||
sfbonus_3800_regs[3],
|
sfbonus_3800_regs[3],
|
||||||
sfbonus_3800_regs[4],
|
sfbonus_3800_regs[4],
|
||||||
sfbonus_3800_regs[5],
|
sfbonus_3800_regs[5],
|
||||||
sfbonus_3800_regs[6],
|
sfbonus_3800_regs[6],
|
||||||
sfbonus_3800_regs[7],
|
sfbonus_3800_regs[7],
|
||||||
sfbonus_3000_regs[0],
|
sfbonus_3000_regs[0],
|
||||||
sfbonus_2801_regs[0],
|
sfbonus_2801_regs[0],
|
||||||
sfbonus_2c01_regs[0],
|
sfbonus_2c01_regs[0],
|
||||||
sfbonus_vregs[8],
|
sfbonus_vregs[8],
|
||||||
sfbonus_vregs[0],
|
sfbonus_vregs[0],
|
||||||
sfbonus_vregs[10],
|
sfbonus_vregs[10],
|
||||||
sfbonus_vregs[11],
|
sfbonus_vregs[11],
|
||||||
sfbonus_vregs[12],
|
sfbonus_vregs[12],
|
||||||
sfbonus_vregs[13],
|
sfbonus_vregs[13],
|
||||||
sfbonus_vregs[14],
|
sfbonus_vregs[14],
|
||||||
sfbonus_vregs[15],
|
sfbonus_vregs[15],
|
||||||
sfbonus_vregs[16],
|
sfbonus_vregs[16],
|
||||||
sfbonus_vregs[17],
|
sfbonus_vregs[17],
|
||||||
sfbonus_vregs[18],
|
sfbonus_vregs[18],
|
||||||
sfbonus_vregs[19],
|
sfbonus_vregs[19],
|
||||||
sfbonus_vregs[20],
|
sfbonus_vregs[20],
|
||||||
sfbonus_vregs[21],
|
sfbonus_vregs[21],
|
||||||
sfbonus_vregs[22],
|
sfbonus_vregs[22],
|
||||||
sfbonus_vregs[23],
|
sfbonus_vregs[23],
|
||||||
sfbonus_vregs[24],
|
sfbonus_vregs[24],
|
||||||
sfbonus_vregs[25],
|
sfbonus_vregs[25],
|
||||||
sfbonus_vregs[26],
|
sfbonus_vregs[26],
|
||||||
sfbonus_vregs[27],
|
sfbonus_vregs[27],
|
||||||
sfbonus_vregs[28],
|
sfbonus_vregs[28],
|
||||||
sfbonus_vregs[29],
|
sfbonus_vregs[29],
|
||||||
sfbonus_vregs[30],
|
sfbonus_vregs[30],
|
||||||
sfbonus_vregs[31]
|
sfbonus_vregs[31]
|
||||||
);
|
);
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
popmessage("-- %02x %02x %02x %02x %02x %02x %02x %02x",
|
popmessage("-- %02x %02x %02x %02x %02x %02x %02x %02x",
|
||||||
sfbonus_1800_regs[0],
|
sfbonus_1800_regs[0],
|
||||||
sfbonus_1800_regs[1],
|
sfbonus_1800_regs[1],
|
||||||
sfbonus_1800_regs[2],
|
sfbonus_1800_regs[2],
|
||||||
sfbonus_1800_regs[3],
|
sfbonus_1800_regs[3],
|
||||||
sfbonus_1800_regs[4],
|
sfbonus_1800_regs[4],
|
||||||
sfbonus_1800_regs[5],
|
sfbonus_1800_regs[5],
|
||||||
sfbonus_1800_regs[6],
|
sfbonus_1800_regs[6],
|
||||||
sfbonus_1800_regs[7]);
|
sfbonus_1800_regs[7]);
|
||||||
*/
|
*/
|
||||||
|
|
||||||
if (screen->machine->gamedrv->ipt==ipt_amcoetype2)
|
if (screen->machine->gamedrv->ipt==ipt_amcoetype2)
|
||||||
{
|
{
|
||||||
|
@ -58,7 +58,7 @@ static WRITE8_HANDLER( rom2_bank_select_w )
|
|||||||
{
|
{
|
||||||
UINT8 *region_base = memory_region(space->machine, "user2");
|
UINT8 *region_base = memory_region(space->machine, "user2");
|
||||||
mame_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,cpu_get_previouspc(space->cpu));
|
mame_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,cpu_get_previouspc(space->cpu));
|
||||||
// if(data == 0) data = 1; //test hack
|
// if(data == 0) data = 1; //test hack
|
||||||
memory_set_bankptr(space->machine, 1, region_base + (data&0x0f ) * 0x4000);
|
memory_set_bankptr(space->machine, 1, region_base + (data&0x0f ) * 0x4000);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -148,12 +148,12 @@ static unsigned char rf5c296_reg = 0;
|
|||||||
|
|
||||||
static void rf5c296_reg_w(ATTR_UNUSED running_machine *machine, UINT8 reg, UINT8 data)
|
static void rf5c296_reg_w(ATTR_UNUSED running_machine *machine, UINT8 reg, UINT8 data)
|
||||||
{
|
{
|
||||||
// fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, cpuexec_describe_context(machine));
|
// fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, cpuexec_describe_context(machine));
|
||||||
}
|
}
|
||||||
|
|
||||||
static UINT8 rf5c296_reg_r(ATTR_UNUSED running_machine *machine, UINT8 reg)
|
static UINT8 rf5c296_reg_r(ATTR_UNUSED running_machine *machine, UINT8 reg)
|
||||||
{
|
{
|
||||||
// fprintf(stderr, "rf5c296_reg_r %02x (%s)\n", reg, cpuexec_describe_context(machine));
|
// fprintf(stderr, "rf5c296_reg_r %02x (%s)\n", reg, cpuexec_describe_context(machine));
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -756,7 +756,7 @@ MACHINE_DRIVER_END
|
|||||||
static MACHINE_DRIVER_START( buggyboy )
|
static MACHINE_DRIVER_START( buggyboy )
|
||||||
MDRV_CPU_ADD("main_cpu", I8086, CPU_MASTER_CLOCK / 3)
|
MDRV_CPU_ADD("main_cpu", I8086, CPU_MASTER_CLOCK / 3)
|
||||||
MDRV_CPU_PROGRAM_MAP(buggyboy_main, 0)
|
MDRV_CPU_PROGRAM_MAP(buggyboy_main, 0)
|
||||||
// MDRV_WATCHDOG_TIME_INIT(5)
|
// MDRV_WATCHDOG_TIME_INIT(5)
|
||||||
|
|
||||||
MDRV_CPU_ADD("math_cpu", I8086, CPU_MASTER_CLOCK / 3)
|
MDRV_CPU_ADD("math_cpu", I8086, CPU_MASTER_CLOCK / 3)
|
||||||
MDRV_CPU_PROGRAM_MAP(buggyboy_math, 0)
|
MDRV_CPU_PROGRAM_MAP(buggyboy_math, 0)
|
||||||
@ -1137,10 +1137,10 @@ ROM_START( buggyboy )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
The game is comprised of three boards:
|
The game is comprised of three boards:
|
||||||
- Sound Board (labeled TC043-1, top small board)
|
- Sound Board (labeled TC043-1, top small board)
|
||||||
- CPU Board (labeled TC041, middle board, uses 15.000 MHz xtal)
|
- CPU Board (labeled TC041, middle board, uses 15.000 MHz xtal)
|
||||||
- Video Board (labeled TC042, bottom board, uses 18.000 MHz xtal)
|
- Video Board (labeled TC042, bottom board, uses 18.000 MHz xtal)
|
||||||
*/
|
*/
|
||||||
ROM_START( buggybjr )
|
ROM_START( buggybjr )
|
||||||
ROM_REGION( 0x100000, "main_cpu", 0 )
|
ROM_REGION( 0x100000, "main_cpu", 0 )
|
||||||
|
@ -245,8 +245,8 @@ static void kick_sn74s516(running_machine *machine, UINT16 *data, const int ins)
|
|||||||
#define CLEAR_SEQUENCE (SN74S516.code = 0)
|
#define CLEAR_SEQUENCE (SN74S516.code = 0)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Remember to change the Z/W flag.
|
Remember to change the Z/W flag.
|
||||||
*/
|
*/
|
||||||
switch (SN74S516.state)
|
switch (SN74S516.state)
|
||||||
{
|
{
|
||||||
case 0:
|
case 0:
|
||||||
@ -462,11 +462,11 @@ static void tx1_update_state(running_machine *machine)
|
|||||||
if (!GO_EN(math.inslatch) && GO_EN(prom[math.promaddr]))
|
if (!GO_EN(math.inslatch) && GO_EN(prom[math.promaddr]))
|
||||||
go = 1;
|
go = 1;
|
||||||
/*
|
/*
|
||||||
Example:
|
Example:
|
||||||
120 /GO /LHIEN
|
120 /GO /LHIEN
|
||||||
121 /GO /LLOEN
|
121 /GO /LLOEN
|
||||||
Both 120 and 121 are used.
|
Both 120 and 121 are used.
|
||||||
*/
|
*/
|
||||||
else if ((GO_EN(math.inslatch) && GO_EN(prom[math.promaddr])) && (LHIEN(math.inslatch) && LLOEN(prom[math.promaddr])))
|
else if ((GO_EN(math.inslatch) && GO_EN(prom[math.promaddr])) && (LHIEN(math.inslatch) && LLOEN(prom[math.promaddr])))
|
||||||
go = 1;
|
go = 1;
|
||||||
|
|
||||||
@ -523,15 +523,15 @@ static void tx1_update_state(running_machine *machine)
|
|||||||
kick_sn74s516(machine, &data, ins);
|
kick_sn74s516(machine, &data, ins);
|
||||||
}
|
}
|
||||||
/*
|
/*
|
||||||
TODO: Changed ppshift to muxlatch for TX-1
|
TODO: Changed ppshift to muxlatch for TX-1
|
||||||
|
|
||||||
/TMPLD1: /LHIEN
|
/TMPLD1: /LHIEN
|
||||||
/TMPLD2: /LLOEN.!O4 + (/LHIEN.O4)
|
/TMPLD2: /LLOEN.!O4 + (/LHIEN.O4)
|
||||||
/TMPLD3: /LLOEN
|
/TMPLD3: /LLOEN
|
||||||
O4: !SD9.!SD10./LMSEL + SD7.SD10./LMSEL +
|
O4: !SD9.!SD10./LMSEL + SD7.SD10./LMSEL +
|
||||||
!SD8.SD9./LMSEL + !SD7.SD8./LMSEL +
|
!SD8.SD9./LMSEL + !SD7.SD8./LMSEL +
|
||||||
/LMSEL./DSEL1 + /LMSEL.TFAD13 + /LMSEL.TFAD12 + /LMSEL.TFAD11
|
/LMSEL./DSEL1 + /LMSEL.TFAD13 + /LMSEL.TFAD12 + /LMSEL.TFAD11
|
||||||
*/
|
*/
|
||||||
else if (LHIEN(math.inslatch) || LLOEN(math.inslatch))
|
else if (LHIEN(math.inslatch) || LLOEN(math.inslatch))
|
||||||
{
|
{
|
||||||
UINT16 data;
|
UINT16 data;
|
||||||
@ -561,13 +561,13 @@ static void tx1_update_state(running_machine *machine)
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
/TMPLD1: /LHIEN
|
/TMPLD1: /LHIEN
|
||||||
/TMPLD2: /LLOEN.!O4 + /LHIEN.O4
|
/TMPLD2: /LLOEN.!O4 + /LHIEN.O4
|
||||||
/TMPLD3: /LLOEN
|
/TMPLD3: /LLOEN
|
||||||
O4: !SD9.!SD10./LMSEL + SD7.SD10./LMSEL +
|
O4: !SD9.!SD10./LMSEL + SD7.SD10./LMSEL +
|
||||||
!SD8.SD9./LMSEL + !SD7.SD8./LMSEL +
|
!SD8.SD9./LMSEL + !SD7.SD8./LMSEL +
|
||||||
/LMSEL./DSEL1 + /LMSEL.TFAD13 + /LMSEL.TFAD12 + /LMSEL.TFAD11
|
/LMSEL./DSEL1 + /LMSEL.TFAD13 + /LMSEL.TFAD12 + /LMSEL.TFAD11
|
||||||
*/
|
*/
|
||||||
int dsel = (math.inslatch >> 8) & TX1_DSEL;
|
int dsel = (math.inslatch >> 8) & TX1_DSEL;
|
||||||
int tfad = (math.inslatch & 0x1c00) << 1;
|
int tfad = (math.inslatch & 0x1c00) << 1;
|
||||||
int sd = math.ppshift;
|
int sd = math.ppshift;
|
||||||
@ -684,9 +684,9 @@ READ16_HANDLER( tx1_math_r )
|
|||||||
else if (dsel == 1 )
|
else if (dsel == 1 )
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
TODO make this constant somewhere
|
TODO make this constant somewhere
|
||||||
e.g. math.retval = math.romptr[ get_tx1_datarom_addr() ];
|
e.g. math.retval = math.romptr[ get_tx1_datarom_addr() ];
|
||||||
*/
|
*/
|
||||||
UINT16 *romdata = (UINT16*)memory_region(space->machine, "au_data");
|
UINT16 *romdata = (UINT16*)memory_region(space->machine, "au_data");
|
||||||
UINT16 addr = get_tx1_datarom_addr();
|
UINT16 addr = get_tx1_datarom_addr();
|
||||||
math.retval = romdata[addr];
|
math.retval = romdata[addr];
|
||||||
@ -812,10 +812,10 @@ WRITE16_HANDLER( tx1_math_w )
|
|||||||
{
|
{
|
||||||
|
|
||||||
/*
|
/*
|
||||||
/TMPLD1: 0
|
/TMPLD1: 0
|
||||||
/TMPLD2: 0
|
/TMPLD2: 0
|
||||||
/TMPLD3: 0
|
/TMPLD3: 0
|
||||||
*/
|
*/
|
||||||
math.muxlatch = math.cpulatch;
|
math.muxlatch = math.cpulatch;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1285,7 +1285,7 @@ WRITE16_HANDLER( buggyboy_math_w )
|
|||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
This is for ROM range 0x5000-0x7fff
|
This is for ROM range 0x5000-0x7fff
|
||||||
*/
|
*/
|
||||||
READ16_HANDLER( buggyboy_spcs_rom_r )
|
READ16_HANDLER( buggyboy_spcs_rom_r )
|
||||||
{
|
{
|
||||||
|
@ -1523,9 +1523,9 @@ void buggyboy_get_roadpix(int screen, int ls161, UINT8 rva0_6, UINT8 sld, UINT32
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
TODO: When ROM is not enabled, data = 0xff
|
TODO: When ROM is not enabled, data = 0xff
|
||||||
But does anybody care?
|
But does anybody care?
|
||||||
*/
|
*/
|
||||||
*rc0 = *rc1 = *rc2 = *rc3 = 0;
|
*rc0 = *rc1 = *rc2 = *rc3 = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1832,11 +1832,11 @@ static void buggyboy_draw_road(running_machine *machine, UINT8 *bitmap)
|
|||||||
px3[2] = BIT(rc3[2], pix);
|
px3[2] = BIT(rc3[2], pix);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Now evaluate the pixel logic for each of the three screens
|
Now evaluate the pixel logic for each of the three screens
|
||||||
|
|
||||||
TODO: A lot of this could be macrofied to avoid repetition.
|
TODO: A lot of this could be macrofied to avoid repetition.
|
||||||
Shuffling the equations around would squeeze out some extra speed.
|
Shuffling the equations around would squeeze out some extra speed.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Left */
|
/* Left */
|
||||||
ic96_o14 =
|
ic96_o14 =
|
||||||
@ -2747,11 +2747,11 @@ static void buggyboy_draw_objs(running_machine *machine, UINT8 *bitmap, int wide
|
|||||||
UINT32 low_addr = ((x_acc >> (FRAC + 3)) & x_mask);
|
UINT32 low_addr = ((x_acc >> (FRAC + 3)) & x_mask);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Objects are grouped by width (either 16, 8 or 4 tiles) in
|
Objects are grouped by width (either 16, 8 or 4 tiles) in
|
||||||
the LUT ROMs. The ROM address lines therefore indicate
|
the LUT ROMs. The ROM address lines therefore indicate
|
||||||
width and are used to determine the correct scan order
|
width and are used to determine the correct scan order
|
||||||
when x-flip is set.
|
when x-flip is set.
|
||||||
*/
|
*/
|
||||||
if (gxflip)
|
if (gxflip)
|
||||||
{
|
{
|
||||||
UINT32 xor_mask;
|
UINT32 xor_mask;
|
||||||
|
@ -247,7 +247,7 @@ static chd_error guess_chs(const char *filename, int offset, int sectorsize, UIN
|
|||||||
get_chs_from_ident - extract chs from an ident
|
get_chs_from_ident - extract chs from an ident
|
||||||
information, validate it with the file size
|
information, validate it with the file size
|
||||||
|
|
||||||
Note: limited to IDE for now
|
Note: limited to IDE for now
|
||||||
-------------------------------------------------*/
|
-------------------------------------------------*/
|
||||||
|
|
||||||
static chd_error get_chs_from_ident(const char *filename, int offset, const UINT8 *ident, UINT32 identsize, UINT32 *cylinders, UINT32 *heads, UINT32 *sectors, UINT32 *bps)
|
static chd_error get_chs_from_ident(const char *filename, int offset, const UINT8 *ident, UINT32 identsize, UINT32 *cylinders, UINT32 *heads, UINT32 *sectors, UINT32 *bps)
|
||||||
|
@ -9,4 +9,4 @@
|
|||||||
|
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
const char build_version[] = "0.130 ("__DATE__")";
|
const char build_version[] = "0.130u1 ("__DATE__")";
|
||||||
|
Loading…
Reference in New Issue
Block a user