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From: Atari Ace [mailto:atari_ace@verizon.net]

Browse Source 
Sent: Saturday, February 28, 2009 3:53 PM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] More static/const qualifiers

Hi mamedev,

Another round of static/const qualifier additions, plus a rename of 
has_addon_chip to snes_has_addon_chip.  Notably a number of z80ctc_interface 
are now const (devicification must have removed the cases where it was 
dynamically modified).  Notice that the READWRITExTOy macros declare two 
functions, so you can't make the 2nd function static.  Those macros should 
probably be reworked or removed.

~aa
This commit is contained in:
Aaron Giles 2009-03-05 08:24:08 +00:00
parent 328aa85a24
commit 3b34b6b8b4
22 changed files with 89 additions and 85 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/emu/cpu/esrip/esrip.c
View File

@ -133,12 +133,12 @@ UINT8 get_rip_status(const device_config *cpu)
INITIALIZATION AND SHUTDOWN
***************************************************************************/
enum
enum ops
{
ROTR1, TOR1, ROTR2, ROTC, ROTM, BOR2, CRCF, CRCR,
SVSTR, PRT, SOR, TOR2, SHFTR, TEST, NOP, SETST, RSTST,
ROTNR, BONR, BOR1, SONR, SHFTNR, PRTNR, TONR
} ops;
};
static void make_ops(esrip_state *cpustate)
{

2
src/mame/audio/cchasm.c
View File

@ -109,7 +109,7 @@ static WRITE8_DEVICE_HANDLER( ctc_timer_2_w )
}
}
z80ctc_interface cchasm_ctc_intf =
const z80ctc_interface cchasm_ctc_intf =
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */

2
src/mame/audio/cinemat.c
View File

@ -1522,7 +1522,7 @@ static void ctc_interrupt(const device_config *device, int state)
}
static z80ctc_interface demon_z80ctc_interface =
static const z80ctc_interface demon_z80ctc_interface =
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */

2
src/mame/drivers/astrocde.c
View File

@ -504,7 +504,7 @@ static void ctc_interrupt(const device_config *device, int state)
}
static z80ctc_interface ctc_intf =
static const z80ctc_interface ctc_intf =
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */

12
src/mame/drivers/bfm_sc1.c
View File

@ -1012,7 +1012,7 @@ INPUT_PORTS_END
// input ports for scorpion1 board ////////////////////////////////////////
INPUT_PORTS_START( clatt )
static INPUT_PORTS_START( clatt )
PORT_START("STROBE0")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("20p")
@ -1124,7 +1124,7 @@ INPUT_PORTS_START( clatt )
INPUT_PORTS_END
INPUT_PORTS_START( toppoker )
static INPUT_PORTS_START( toppoker )
PORT_START("STROBE0")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
@ -1359,7 +1359,7 @@ static void sc1_common_init(running_machine *machine, int reels, int decrypt)
}
}
DRIVER_INIT(toppoker)
static DRIVER_INIT(toppoker)
{
sc1_common_init(machine,3,1);
adder2_decode_char_roms(machine); // decode GFX roms
@ -1368,7 +1368,7 @@ DRIVER_INIT(toppoker)
BFM_BD1_init(0);
}
DRIVER_INIT(lotse)
static DRIVER_INIT(lotse)
{
sc1_common_init(machine,6,1);
Mechmtr_init(8);
@ -1379,7 +1379,7 @@ DRIVER_INIT(lotse)
/////////////////////////////////////////////////////////////////////////////////////
DRIVER_INIT(rou029)
static DRIVER_INIT(rou029)
{
sc1_common_init(machine,6,0);
Mechmtr_init(8);
@ -1389,7 +1389,7 @@ DRIVER_INIT(rou029)
/////////////////////////////////////////////////////////////////////////////////////
DRIVER_INIT(clatt)
static DRIVER_INIT(clatt)
{
sc1_common_init(machine,6,1);
Mechmtr_init(8);

4
src/mame/drivers/bfmsys85.c
View File

@ -99,8 +99,8 @@ static UINT8 Inputs[64]; // ?? multiplexed inputs
// Serial Communications (Where does this go?) ////////////////////////////
///////////////////////////////////////////////////////////////////////////
UINT8 sys85_data_line_r;
UINT8 sys85_data_line_t;
static UINT8 sys85_data_line_r;
static UINT8 sys85_data_line_t;
static READ_LINE_DEVICE_HANDLER( sys85_data_r )
{

36
src/mame/drivers/bishjan.c
View File

@ -100,15 +100,15 @@ static READ8_HANDLER( bishjan_videoram_2_hi_r ) { return bishjan_videoram_2_hi[o
// 16-bit handlers for an 8-bit chip
WRITE8TO16BE_MSB( bishjan_byte_lo_msb, bishjan_byte_lo_w );
static WRITE8TO16BE_MSB( bishjan_byte_lo_msb, bishjan_byte_lo_w );
READWRITE8TO16BE( bishjan_videoram_1_lo_word, bishjan_videoram_1_lo_r, bishjan_videoram_1_lo_w );
READWRITE8TO16BE( bishjan_videoram_1_hi_word, bishjan_videoram_1_hi_r, bishjan_videoram_1_hi_w );
WRITE8TO16BE ( bishjan_videoram_1_hi_lo_word, bishjan_videoram_1_hi_lo_w );
static READ8TO16BE( bishjan_videoram_1_lo_word, bishjan_videoram_1_lo_r );
static READ8TO16BE( bishjan_videoram_1_hi_word, bishjan_videoram_1_hi_r );
static WRITE8TO16BE ( bishjan_videoram_1_hi_lo_word, bishjan_videoram_1_hi_lo_w );
READWRITE8TO16BE( bishjan_videoram_2_lo_word, bishjan_videoram_2_lo_r, bishjan_videoram_2_lo_w );
READWRITE8TO16BE( bishjan_videoram_2_hi_word, bishjan_videoram_2_hi_r, bishjan_videoram_2_hi_w );
WRITE8TO16BE ( bishjan_videoram_2_hi_lo_word, bishjan_videoram_2_hi_lo_w );
static READ8TO16BE( bishjan_videoram_2_lo_word, bishjan_videoram_2_lo_r );
static READ8TO16BE( bishjan_videoram_2_hi_word, bishjan_videoram_2_hi_r );
static WRITE8TO16BE ( bishjan_videoram_2_hi_lo_word, bishjan_videoram_2_hi_lo_w );
/***************************************************************************
@ -163,15 +163,19 @@ static WRITE8_HANDLER( bishjan_scrollram_2_hi_lo_w )
// 16-bit handlers for an 8-bit chip
WRITE8TO16BE( bishjan_scroll_word, bishjan_scroll_w );
static WRITE8TO16BE( bishjan_scroll_word, bishjan_scroll_w );
READWRITE8TO16BE( bishjan_scrollram_1_lo_word, bishjan_scrollram_1_lo_r, bishjan_scrollram_1_lo_w );
READWRITE8TO16BE( bishjan_scrollram_1_hi_word, bishjan_scrollram_1_hi_r, bishjan_scrollram_1_hi_w );
WRITE8TO16BE ( bishjan_scrollram_1_hi_lo_word, bishjan_scrollram_1_hi_lo_w );
static READ8TO16BE( bishjan_scrollram_1_lo_word, bishjan_scrollram_1_lo_r );
static WRITE8TO16BE( bishjan_scrollram_1_lo_word, bishjan_scrollram_1_lo_w );
static READ8TO16BE( bishjan_scrollram_1_hi_word, bishjan_scrollram_1_hi_r );
static WRITE8TO16BE( bishjan_scrollram_1_hi_word, bishjan_scrollram_1_hi_w );
static WRITE8TO16BE ( bishjan_scrollram_1_hi_lo_word, bishjan_scrollram_1_hi_lo_w );
READWRITE8TO16BE( bishjan_scrollram_2_lo_word, bishjan_scrollram_2_lo_r, bishjan_scrollram_2_lo_w );
READWRITE8TO16BE( bishjan_scrollram_2_hi_word, bishjan_scrollram_2_hi_r, bishjan_scrollram_2_hi_w );
WRITE8TO16BE ( bishjan_scrollram_2_hi_lo_word, bishjan_scrollram_2_hi_lo_w );
static READ8TO16BE( bishjan_scrollram_2_lo_word, bishjan_scrollram_2_lo_r );
static WRITE8TO16BE( bishjan_scrollram_2_lo_word, bishjan_scrollram_2_lo_w );
static READ8TO16BE( bishjan_scrollram_2_hi_word, bishjan_scrollram_2_hi_r );
static WRITE8TO16BE( bishjan_scrollram_2_hi_word, bishjan_scrollram_2_hi_w );
static WRITE8TO16BE ( bishjan_scrollram_2_hi_lo_word, bishjan_scrollram_2_hi_lo_w );
/***************************************************************************
@ -187,7 +191,7 @@ static WRITE8_HANDLER( bishjan_disable_w )
// 16-bit handlers for an 8-bit chip
WRITE8TO16BE_LSB( bishjan_disable_lsb, bishjan_disable_w );
static WRITE8TO16BE_LSB( bishjan_disable_lsb, bishjan_disable_w );
/***************************************************************************
@ -298,7 +302,7 @@ static WRITE8_HANDLER(colordac_w)
// 16-bit handlers for an 8-bit chip
WRITE8TO16BE( colordac_word, colordac_w );
static WRITE8TO16BE( colordac_word, colordac_w );
/***************************************************************************

2
src/mame/drivers/cchasm.c
View File

@ -157,8 +157,6 @@ static const z80_daisy_chain daisy_chain[] =
*
*************************************/
extern z80ctc_interface cchasm_ctc_intf;
static MACHINE_DRIVER_START( cchasm )
/* basic machine hardware */

8
src/mame/drivers/cischeat.c
View File

@ -502,7 +502,7 @@ static WRITE16_HANDLER( scudhamm_paletteram16_w )
}
UINT16 scudhamm_motor_command;
static UINT16 scudhamm_motor_command;
/* Motor Status.
@ -512,14 +512,14 @@ UINT16 scudhamm_motor_command;
---- ---- ---- --1- Up Limit
---- ---- ---- ---0 Down Limit */
READ16_HANDLER( scudhamm_motor_status_r )
static READ16_HANDLER( scudhamm_motor_status_r )
{
// return 1 << (mame_rand(space->machine)&1); // Motor Status
return scudhamm_motor_command; // Motor Status
}
READ16_HANDLER( scudhamm_motor_pos_r )
static READ16_HANDLER( scudhamm_motor_pos_r )
{
return 0x00 << 8;
}
@ -539,7 +539,7 @@ static WRITE16_HANDLER( scudhamm_motor_command_w )
}
READ16_HANDLER( scudhamm_analog_r )
static READ16_HANDLER( scudhamm_analog_r )
{
return input_port_read(space->machine, "IN1");
}

4
src/mame/drivers/kungfur.c
View File

@ -37,7 +37,7 @@ http://www.hoizinger.com/ed/EM.HTML
static UINT8 led[0x10]; //not the right size,TODO
static UINT8 mux_data;
VIDEO_START( kungfur )
static VIDEO_START( kungfur )
{
}
@ -101,7 +101,7 @@ static void draw_led(bitmap_t *bitmap, int x, int y,UINT8 value)
}
/* actually debugging purpose, it will be converted to the artwork system at some point. */
VIDEO_UPDATE( kungfur )
static VIDEO_UPDATE( kungfur )
{
// popmessage("%02x %02x %02x %02x %02x %02x",io_data[0],io_data[1],io_data[2],io_data[3],io_data[4],io_data[5]);
int i;

6
src/mame/drivers/maygayv1.c
View File

@ -205,7 +205,7 @@ static struct
UINT8 *line_buf; // there's actually two
} i82716;
WRITE16_HANDLER( i82716_w )
static WRITE16_HANDLER( i82716_w )
{
// Accessing register window?
if ((VREG(RWBA) & 0xfff0) == (offset & 0xfff0))
@ -223,7 +223,7 @@ WRITE16_HANDLER( i82716_w )
}
}
READ16_HANDLER( i82716_r )
static READ16_HANDLER( i82716_r )
{
// Accessing register window?
if ((VREG(RWBA) & ~0xf) == (offset & ~0xf))
@ -442,7 +442,7 @@ static READ16_HANDLER( read_odd )
}
struct _i8279_state
static struct _i8279_state
{
UINT8 command;
UINT8 mode;

2
src/mame/drivers/mpu4.c
View File

@ -1706,7 +1706,7 @@ static DRIVER_INIT (m_ccelbr)
}
DRIVER_INIT (m_gmball)
static DRIVER_INIT (m_gmball)
{
int x;
static const UINT8 chr_table[72]= { 0x00,0x0C,0x50,0x90,0xB0,0x38,0xD4,0xA0,

10
src/mame/drivers/multfish.c
View File

@ -219,7 +219,7 @@ ADDRESS_MAP_END
// Bet/Cancel | 1 Line | 3 Lines | 5 Lines | 7 Lines | 9 Lines | Start
INPUT_PORTS_START( multfish )
static INPUT_PORTS_START( multfish )
PORT_START("IN0")
PORT_DIPNAME( 0x01, 0x01, "Key In (35 A)" ) // Key In ( 35 A )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
@ -332,13 +332,13 @@ INPUT_PORTS_START( multfish )
INPUT_PORTS_END
WRITE8_HANDLER( multfish_f3_w )
static WRITE8_HANDLER( multfish_f3_w )
{
//popmessage("multfish_f3_w %02x",data);
}
WRITE8_HANDLER( multfish_f4_w )
static WRITE8_HANDLER( multfish_f4_w )
{
//popmessage("multfish_f4_w %02x",data); // display enable?
multfish_disp_enable = data;
@ -408,7 +408,7 @@ static GFXDECODE_START( multfish )
GFXDECODE_ENTRY( "gfx", 0, tiles16x16_layout, 0, 16 )
GFXDECODE_END
MACHINE_RESET( multfish )
static MACHINE_RESET( multfish )
{
memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "maincpu"), 0x4000);
memory_set_bank(machine, 1, 0);
@ -425,7 +425,7 @@ static const ay8910_interface ay8910_config =
};
MACHINE_DRIVER_START( multfish )
static MACHINE_DRIVER_START( multfish )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80,6000000) /* 6 MHz? */
MDRV_CPU_PROGRAM_MAP(multfish_map,0)

4
src/mame/drivers/nbmj9195.c
View File

@ -487,7 +487,7 @@ static INTERRUPT_GEN( ctc0_trg1 )
z80ctc_trg1_w(ctc, 0, 0);
}
static z80ctc_interface ctc_intf_main =
static const z80ctc_interface ctc_intf_main =
{
0, /* timer disables */
ctc0_interrupt, /* interrupt handler */
@ -496,7 +496,7 @@ static z80ctc_interface ctc_intf_main =
0, /* ZC/TO2 callback */
};
static z80ctc_interface ctc_intf_audio =
static const z80ctc_interface ctc_intf_audio =
{
0, /* timer disables */
ctc1_interrupt, /* interrupt handler */

2
src/mame/drivers/niyanpai.c
View File

@ -170,7 +170,7 @@ static void ctc0_interrupt(const device_config *device, int state)
cputag_set_input_line(device->machine, "audiocpu", 0, state);
}
static z80ctc_interface ctc_intf =
static const z80ctc_interface ctc_intf =
{
0, /* timer disables */
ctc0_interrupt, /* interrupt handler */

8
src/mame/drivers/seta2.c
View File

@ -973,11 +973,13 @@ static READ16_HANDLER( paletteram16_word_r )
return paletteram16[offset];
}
READWRITE16BETO32BE( spriteram32_dword, spriteram16_word_r, spriteram16_word_w );
static READ16BETO32BE( spriteram32_dword, spriteram16_word_r );
static WRITE16BETO32BE( spriteram32_dword, spriteram16_word_w );
READWRITE16BETO32BE( paletteram32_dword, paletteram16_word_r, paletteram16_xRRRRRGGGGGBBBBB_word_w );
static READ16BETO32BE( paletteram32_dword, paletteram16_word_r );
static WRITE16BETO32BE( paletteram32_dword, paletteram16_xRRRRRGGGGGBBBBB_word_w );
WRITE16BETO32BE( seta2_vregs_dword, seta2_vregs_w );
static WRITE16BETO32BE( seta2_vregs_dword, seta2_vregs_w );
// Main CPU

2
src/mame/drivers/sothello.c
View File

@ -313,7 +313,7 @@ static void adpcm_int(const device_config *device)
}
static msm5205_interface msm_interface =
static const msm5205_interface msm_interface =
{
adpcm_int, /* interrupt function */
MSM5205_S48_4B /* changed on the fly */

2
src/mame/includes/cchasm.h
View File

@ -12,7 +12,7 @@ WRITE16_HANDLER( cchasm_led_w );
/*----------- defined in audio/cchasm.c -----------*/
extern z80ctc_interface cchasm_ctc_intf;
extern const z80ctc_interface cchasm_ctc_intf;
READ8_HANDLER( cchasm_coin_sound_r );
READ8_HANDLER( cchasm_soundlatch2_r );

2
src/mame/includes/snes.h
View File

@ -399,7 +399,7 @@ extern WRITE8_HANDLER( snes_w_bank5 );
extern WRITE8_HANDLER( snes_w_bank6 );
extern WRITE8_HANDLER( snes_w_bank7 );
extern UINT8 has_addon_chip;
extern UINT8 snes_has_addon_chip;
extern void snes_gdma( const address_space *space, UINT8 channels );
extern void snes_hdma_init(void);

56
src/mame/machine/snes.c
View File

@ -41,7 +41,7 @@ static emu_timer *snes_nmi_timer;
static emu_timer *snes_hirq_timer;
static UINT16 hblank_offset;
static UINT16 snes_htmult; /* in 512 wide, we run HTOTAL double and halve it on latching */
UINT8 has_addon_chip;
UINT8 snes_has_addon_chip;
// full graphic variables
static UINT16 vram_fgr_high, vram_fgr_increment, vram_fgr_count, vram_fgr_mask, vram_fgr_shift, vram_read_buffer;
@ -1174,18 +1174,18 @@ READ8_HANDLER( snes_r_bank1 )
value = snes_r_io(space, address);
else if (address < 0x8000)
{
if (has_addon_chip == HAS_OBC1)
if (snes_has_addon_chip == HAS_OBC1)
value = obc1_read(space, offset);
else if ((has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
else if ((snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
value = (address < 0x7000) ? DSP2_read() : 0x00;
else if ((snes_cart.mode == SNES_MODE_21) && (has_addon_chip == HAS_DSP1) && (offset < 0x100000))
else if ((snes_cart.mode == SNES_MODE_21) && (snes_has_addon_chip == HAS_DSP1) && (offset < 0x100000))
value = (address < 0x7000) ? DSP1_getDr() : DSP1_getSr();
else
value = 0xff; /* Reserved */
}
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
value = (address < 0xc000) ? DSP1_getDr() : DSP1_getSr();
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
value = (address < 0xc000) ? DSP2_read() : 0x00;
else
value = snes_ram[offset];
@ -1205,9 +1205,9 @@ READ8_HANDLER( snes_r_bank2 )
value = snes_r_io(space, address);
else if (address < 0x8000) /* SRAM for mode_21, Reserved othewise */
{
if (has_addon_chip == HAS_OBC1)
if (snes_has_addon_chip == HAS_OBC1)
value = obc1_read (space, offset);
else if (has_addon_chip == HAS_DSP2)
else if (snes_has_addon_chip == HAS_DSP2)
value = (address < 0x7000) ? DSP2_read() : 0x00;
else if ((snes_cart.mode == SNES_MODE_21) && (snes_cart.sram > 0))
{
@ -1219,9 +1219,9 @@ READ8_HANDLER( snes_r_bank2 )
value = 0xff;
}
/* some dsp1 games use these banks 0x30 to 0x3f at address 0x8000 */
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP1))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP1))
value = (address < 0xc000) ? DSP1_getDr() : DSP1_getSr();
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP2))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP2))
value = (address < 0xc000) ? DSP2_read() : 0x00;
else
value = snes_ram[0x300000 + offset];
@ -1259,7 +1259,7 @@ READ8_HANDLER( snes_r_bank4 )
if (address >= 0x8000)
value = snes_ram[0x600000 + offset];
/* some other dsp1 games use these banks 0x60 to 0x6f at address 0x0000 */
else if (has_addon_chip == HAS_DSP1)
else if (snes_has_addon_chip == HAS_DSP1)
value = (address >= 0x4000) ? DSP1_getSr() : DSP1_getDr();
else
value = 0xff; /* Reserved */
@ -1316,9 +1316,9 @@ READ8_HANDLER( snes_r_bank6 )
value = 0xff;
}
}
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
value = (address < 0xc000) ? DSP1_getDr() : DSP1_getSr();
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
value = (address < 0xc000) ? DSP2_read() : 0x00;
else
value = snes_ram[0x800000 + offset];
@ -1357,18 +1357,18 @@ WRITE8_HANDLER( snes_w_bank1 )
snes_w_io(space, address, data);
else if (address < 0x8000)
{
if (has_addon_chip == HAS_OBC1)
if (snes_has_addon_chip == HAS_OBC1)
obc1_write(space, offset, data);
else if ((has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
else if ((snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
DSP2_write(data);
else if ((snes_cart.mode == SNES_MODE_21) && (has_addon_chip == HAS_DSP1) && (offset < 0x100000))
else if ((snes_cart.mode == SNES_MODE_21) && (snes_has_addon_chip == HAS_DSP1) && (offset < 0x100000))
DSP1_setDr(data);
else
logerror( "Attempt to write to reserved address: %X\n", offset );
}
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
DSP1_setDr(data);
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP2) && (offset >= 0x200000) && (address < 0xc000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000) && (address < 0xc000))
DSP2_write(data);
else
logerror( "Attempt to write to ROM address: %X\n", offset );
@ -1385,9 +1385,9 @@ WRITE8_HANDLER( snes_w_bank2 )
snes_w_io(space, address, data);
else if (address < 0x8000) /* SRAM for mode_21, Reserved othewise */
{
if (has_addon_chip == HAS_OBC1)
if (snes_has_addon_chip == HAS_OBC1)
obc1_write(space, offset, data);
else if (has_addon_chip == HAS_DSP2)
else if (snes_has_addon_chip == HAS_DSP2)
DSP2_write(data);
else if ((snes_cart.mode == SNES_MODE_21) && (snes_cart.sram > 0))
{
@ -1399,9 +1399,9 @@ WRITE8_HANDLER( snes_w_bank2 )
logerror("Attempt to write to reserved address: %X\n", offset + 0x300000);
}
/* some dsp1 games use these banks 0x30 to 0x3f at address 0x8000 */
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP1))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP1))
DSP1_setDr(data);
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP2) && (address < 0xc000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP2) && (address < 0xc000))
DSP2_write(data);
else
logerror("Attempt to write to ROM address: %X\n", offset + 0x300000);
@ -1416,7 +1416,7 @@ WRITE8_HANDLER( snes_w_bank4 )
{
if (address >= 0x8000)
logerror("Attempt to write to ROM address: %X\n", offset + 0x600000);
else if (has_addon_chip == HAS_DSP1)
else if (snes_has_addon_chip == HAS_DSP1)
DSP1_setDr(data);
else
logerror("Attempt to write to reserved address: %X\n", offset + 0x600000);
@ -1478,9 +1478,9 @@ WRITE8_HANDLER( snes_w_bank6 )
logerror("Attempt to write to reserved address: %X\n", offset + 0x800000);
}
}
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP1) && (offset >= 0x200000))
DSP1_setDr(data);
else if ((snes_cart.mode == SNES_MODE_20) && (has_addon_chip == HAS_DSP2) && (offset >= 0x200000) && (address < 0xc000))
else if ((snes_cart.mode == SNES_MODE_20) && (snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000) && (address < 0xc000))
DSP2_write(data);
else
logerror("Attempt to write to ROM address: %X\n", offset + 0x800000);
@ -1572,7 +1572,7 @@ static void snes_init_ram(running_machine *machine)
hblank_offset = 268;
timer_adjust_oneshot(snes_hblank_timer, video_screen_get_time_until_pos(machine->primary_screen, ((snes_ram[STAT78] & 0x10) == SNES_NTSC) ? SNES_VTOTAL_NTSC-1 : SNES_VTOTAL_PAL-1, hblank_offset), 0);
switch (has_addon_chip)
switch (snes_has_addon_chip)
{
case HAS_DSP2:
DSP2_reset();
@ -1679,7 +1679,7 @@ DRIVER_INIT( snes )
/* all NSS games seem to use MODE 20 */
snes_cart.mode = SNES_MODE_20;
snes_cart.sram_max = 0x40000;
has_addon_chip = HAS_NONE;
snes_has_addon_chip = HAS_NONE;
/* Find the number of blocks in this ROM */
total_blocks = (memory_region_length(machine, "user3") / 0x8000);
@ -1744,7 +1744,7 @@ DRIVER_INIT( snes_hirom )
snes_cart.mode = SNES_MODE_21;
snes_cart.sram_max = 0x40000;
has_addon_chip = HAS_NONE;
snes_has_addon_chip = HAS_NONE;
/* Find the number of blocks in this ROM */
total_blocks = (memory_region_length(machine, "user3") / 0x10000);

2
src/mame/video/avgdvg.c
View File

@ -1412,7 +1412,7 @@ static const vgconf avg_quantum =
avg_vgrst
};
static vgconf avg_tomcat =
static const vgconf avg_tomcat =
{
{
avg_latch0,

2
src/mame/video/esripsys.c
View File

@ -15,7 +15,7 @@
*
*************************************/
struct
static struct
{
UINT8 *colour_buf;
UINT8 *intensity_buf;