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running_device -> device_t

Browse Source 
They both already existed. No sense in having two names for the
same object type.
This commit is contained in:
Aaron Giles 2010-12-31 21:42:55 +00:00
parent 2ca38fad3e
commit 3b41606ca0
1245 changed files with 4164 additions and 4168 deletions
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4
src/emu/cpu/alph8201/alph8201.c
View File

@ -225,7 +225,7 @@ typedef struct {
#define LP1 lp1
#define LP2 lp2
INLINE alpha8201_state *get_safe_token(running_device *device)
INLINE alpha8201_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == ALPHA8201 ||
@ -730,7 +730,7 @@ static CPU_EXIT( alpha8201 )
* Execute cycles CPU cycles. Return number of cycles really executed
****************************************************************************/
static void alpha8xxx_execute(running_device *device,const s_opcode *op_map)
static void alpha8xxx_execute(device_t *device,const s_opcode *op_map)
{
alpha8201_state *cpustate = get_safe_token(device);
unsigned opcode;

2
src/emu/cpu/am29000/am29000.c
View File

@ -143,7 +143,7 @@ typedef struct _am29000_state
STATE ACCESSORS
***************************************************************************/
INLINE am29000_state *get_safe_token(running_device *device)
INLINE am29000_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == AM29000);

2
src/emu/cpu/apexc/apexc.c
View File

@ -368,7 +368,7 @@ struct _apexc_state
#define DELAY(n) {cpustate->icount -= (n); cpustate->current_word = (cpustate->current_word + (n)) & 0x1f;}
INLINE apexc_state *get_safe_token(running_device *device)
INLINE apexc_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == APEXC);

2
src/emu/cpu/arm/arm.c
View File

@ -253,7 +253,7 @@ static void arm_check_irq_state(ARM_REGS* cpustate);
/***************************************************************************/
INLINE ARM_REGS *get_safe_token(running_device *device)
INLINE ARM_REGS *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == ARM || device->type() == ARM_BE);

2
src/emu/cpu/arm7/arm7.c
View File

@ -68,7 +68,7 @@ void arm7_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, void (*wr
#define ARM7REG(reg) cpustate->sArmRegister[reg]
#define ARM7_ICOUNT cpustate->iCount
INLINE arm_state *get_safe_token(running_device *device)
INLINE arm_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == ARM7 || device->type() == ARM7_BE || device->type() == ARM9 || device->type() == ARM920T || device->type() == PXA255);

2
src/emu/cpu/arm7/arm7core.c
View File

@ -556,7 +556,7 @@ static int storeDec(arm_state *cpustate, UINT32 pat, UINT32 rbv)
***************************************************************************/
// CPU INIT
static void arm7_core_init(running_device *device, const char *cpuname)
static void arm7_core_init(device_t *device, const char *cpuname)
{
arm_state *cpustate = get_safe_token(device);

2
src/emu/cpu/avr8/avr8.c
View File

@ -75,7 +75,7 @@ enum
#define ZREG ((READ_IO_8(cpustate, 31) << 8) | READ_IO_8(cpustate, 30))
#define SPREG ((READ_IO_8(cpustate, AVR8_IO_SPH) << 8) | READ_IO_8(cpustate, AVR8_IO_SPL))
INLINE avr8_state *get_safe_token(running_device *device)
INLINE avr8_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == AVR8);

6
src/emu/cpu/ccpu/ccpu.c
View File

@ -51,7 +51,7 @@ struct _ccpu_state
};
INLINE ccpu_state *get_safe_token(running_device *device)
INLINE ccpu_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == CCPU);
@ -103,7 +103,7 @@ do { \
INITIALIZATION AND SHUTDOWN
***************************************************************************/
static UINT8 read_jmi(running_device *device)
static UINT8 read_jmi(device_t *device)
{
/* this routine is called when there is no external input */
/* and the JMI jumper is present */
@ -112,7 +112,7 @@ static UINT8 read_jmi(running_device *device)
}
void ccpu_wdt_timer_trigger(running_device *device)
void ccpu_wdt_timer_trigger(device_t *device)
{
ccpu_state *cpustate = get_safe_token(device);
cpustate->waiting = FALSE;

6
src/emu/cpu/ccpu/ccpu.h
View File

@ -38,8 +38,8 @@ enum
CONFIG STRUCTURE
***************************************************************************/
typedef UINT8 (*ccpu_input_func)(running_device *device);
typedef void (*ccpu_vector_func)(running_device *device, INT16 sx, INT16 sy, INT16 ex, INT16 ey, UINT8 shift);
typedef UINT8 (*ccpu_input_func)(device_t *device);
typedef void (*ccpu_vector_func)(device_t *device, INT16 sx, INT16 sy, INT16 ex, INT16 ey, UINT8 shift);
typedef struct _ccpu_config ccpu_config;
struct _ccpu_config
@ -56,7 +56,7 @@ struct _ccpu_config
DECLARE_LEGACY_CPU_DEVICE(CCPU, ccpu);
void ccpu_wdt_timer_trigger(running_device *device);
void ccpu_wdt_timer_trigger(device_t *device);
CPU_DISASSEMBLE( ccpu );

10
src/emu/cpu/cop400/cop400.c
View File

@ -200,7 +200,7 @@ struct _cop400_opcode_map {
INLINE FUNCTIONS
***************************************************************************/
INLINE cop400_state *get_safe_token(running_device *device)
INLINE cop400_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == COP401 ||
@ -823,7 +823,7 @@ static TIMER_CALLBACK( microbus_tick )
INITIALIZATION
***************************************************************************/
static void define_state_table(running_device *device)
static void define_state_table(device_t *device)
{
cop400_state *cpustate = get_safe_token(device);
@ -943,7 +943,7 @@ static void cop400_init(legacy_cpu_device *device, UINT8 g_mask, UINT8 d_mask, U
state_save_register_device_item(device, 0, cpustate->idle);
}
static void cop410_init_opcodes(running_device *device)
static void cop410_init_opcodes(device_t *device)
{
cop400_state *cpustate = get_safe_token(device);
int i;
@ -973,7 +973,7 @@ static void cop410_init_opcodes(running_device *device)
cpustate->opcode_map = COP410_OPCODE_MAP;
}
static void cop420_init_opcodes(running_device *device)
static void cop420_init_opcodes(device_t *device)
{
cop400_state *cpustate = get_safe_token(device);
int i;
@ -1007,7 +1007,7 @@ static void cop420_init_opcodes(running_device *device)
cpustate->opcode_map = COP420_OPCODE_MAP;
}
static void cop444_init_opcodes(running_device *device)
static void cop444_init_opcodes(device_t *device)
{
cop400_state *cpustate = get_safe_token(device);
int i;

4
src/emu/cpu/cosmac/cosmac.h
View File

@ -114,8 +114,8 @@ extern const device_type COSMAC;
// TYPE DEFINITIONS
//**************************************************************************
typedef void (*cosmac_out_sc_func)(running_device *device, cosmac_state_code sc);
#define COSMAC_SC_WRITE(name) void name(running_device *device, cosmac_state_code sc)
typedef void (*cosmac_out_sc_func)(device_t *device, cosmac_state_code sc);
#define COSMAC_SC_WRITE(name) void name(device_t *device, cosmac_state_code sc)
// ======================> cosmac_interface

2
src/emu/cpu/cp1610/cp1610.c
View File

@ -51,7 +51,7 @@ struct _cp1610_state
int icount;
};
INLINE cp1610_state *get_safe_token(running_device *device)
INLINE cp1610_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == CP1610);

20
src/emu/cpu/cubeqcpu/cubeqcpu.c
View File

@ -196,21 +196,21 @@ typedef struct
STATE ACCESSORS
***************************************************************************/
INLINE cquestsnd_state *get_safe_token_snd(running_device *device)
INLINE cquestsnd_state *get_safe_token_snd(device_t *device)
{
assert(device != NULL);
assert(device->type() == CQUESTSND);
return (cquestsnd_state *)downcast<legacy_cpu_device *>(device)->token();
}
INLINE cquestrot_state *get_safe_token_rot(running_device *device)
INLINE cquestrot_state *get_safe_token_rot(device_t *device)
{
assert(device != NULL);
assert(device->type() == CQUESTROT);
return (cquestrot_state *)downcast<legacy_cpu_device *>(device)->token();
}
INLINE cquestlin_state *get_safe_token_lin(running_device *device)
INLINE cquestlin_state *get_safe_token_lin(device_t *device)
{
assert(device != NULL);
assert(device->type() == CQUESTLIN);
@ -255,7 +255,7 @@ static STATE_POSTLOAD( cquestsnd_postload )
}
static void cquestsnd_state_register(running_device *device)
static void cquestsnd_state_register(device_t *device)
{
cquestsnd_state *cpustate = get_safe_token_snd(device);
state_save_register_device_item_array(device, 0, cpustate->ram);
@ -320,7 +320,7 @@ static STATE_POSTLOAD( cquestrot_postload )
}
static void cquestrot_state_register(running_device *device)
static void cquestrot_state_register(device_t *device)
{
cquestrot_state *cpustate = get_safe_token_rot(device);
state_save_register_device_item_array(device, 0, cpustate->ram);
@ -399,7 +399,7 @@ static STATE_POSTLOAD( cquestlin_postload )
}
static void cquestlin_state_register(running_device *device)
static void cquestlin_state_register(device_t *device)
{
cquestlin_state *cpustate = get_safe_token_lin(device);
@ -1142,26 +1142,26 @@ INLINE int do_linjmp(cquestlin_state *cpustate, int jmp)
void cubeqcpu_swap_line_banks(running_device *device)
void cubeqcpu_swap_line_banks(device_t *device)
{
cquestlin_state *cpustate = get_safe_token_lin(device);
cpustate->field = cpustate->field ^ 1;
}
void cubeqcpu_clear_stack(running_device *device)
void cubeqcpu_clear_stack(device_t *device)
{
cquestlin_state *cpustate = get_safe_token_lin(device);
memset(&cpustate->ptr_ram[cpustate->field * 256], 0, 256);
}
UINT8 cubeqcpu_get_ptr_ram_val(running_device *device, int i)
UINT8 cubeqcpu_get_ptr_ram_val(device_t *device, int i)
{
cquestlin_state *cpustate = get_safe_token_lin(device);
return cpustate->ptr_ram[(VISIBLE_FIELD * 256) + i];
}
UINT32* cubeqcpu_get_stack_ram(running_device *device)
UINT32* cubeqcpu_get_stack_ram(device_t *device)
{
cquestlin_state *cpustate = get_safe_token_lin(device);
if (VISIBLE_FIELD == ODD_FIELD)

10
src/emu/cpu/cubeqcpu/cubeqcpu.h
View File

@ -116,7 +116,7 @@ enum
CONFIGURATION STRUCTURE
***************************************************************************/
typedef void (*cubeqst_dac_w_func)(running_device *, UINT16);
typedef void (*cubeqst_dac_w_func)(device_t *, UINT16);
typedef struct _cubeqst_snd_config cubeqst_snd_config;
struct _cubeqst_snd_config
@ -148,11 +148,11 @@ extern WRITE16_DEVICE_HANDLER( cubeqcpu_sndram_w );
extern READ16_DEVICE_HANDLER( cubeqcpu_rotram_r );
extern WRITE16_DEVICE_HANDLER( cubeqcpu_rotram_w );
void cubeqcpu_swap_line_banks(running_device *device);
void cubeqcpu_swap_line_banks(device_t *device);
void cubeqcpu_clear_stack(running_device *device);
UINT8 cubeqcpu_get_ptr_ram_val(running_device *device, int i);
UINT32* cubeqcpu_get_stack_ram(running_device *device);
void cubeqcpu_clear_stack(device_t *device);
UINT8 cubeqcpu_get_ptr_ram_val(device_t *device, int i);
UINT32* cubeqcpu_get_stack_ram(device_t *device);
DECLARE_LEGACY_CPU_DEVICE(CQUESTSND, cquestsnd);
DECLARE_LEGACY_CPU_DEVICE(CQUESTROT, cquestrot);

6
src/emu/cpu/drcbec.c
View File

@ -212,7 +212,7 @@ enum
/* internal backend-specific state */
struct _drcbe_state
{
running_device * device; /* CPU device we are associated with */
device_t * device; /* CPU device we are associated with */
address_space * space[ADDRESS_SPACES]; /* pointers to CPU's address space */
drcuml_state * drcuml; /* pointer back to our owner */
drccache * cache; /* pointer to the cache */
@ -254,7 +254,7 @@ union _drcbec_instruction
***************************************************************************/
/* primary back-end callbacks */
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits);
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits);
static void drcbec_free(drcbe_state *drcbe);
static void drcbec_reset(drcbe_state *drcbe);
static int drcbec_execute(drcbe_state *state, drcuml_codehandle *entry);
@ -340,7 +340,7 @@ extern const drcbe_interface drcbe_c_be_interface =
state
-------------------------------------------------*/
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits)
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits)
{
int spacenum;

6
src/emu/cpu/drcbex64.c
View File

@ -262,7 +262,7 @@ struct _opcode_table_entry
/* internal backend-specific state */
struct _drcbe_state
{
running_device * device; /* CPU device we are associated with */
device_t * device; /* CPU device we are associated with */
drcuml_state * drcuml; /* pointer back to our owner */
drccache * cache; /* pointer to the cache */
drcuml_machine_state state; /* state of the machine */
@ -306,7 +306,7 @@ struct _drcbe_state
***************************************************************************/
/* primary back-end callbacks */
static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits);
static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits);
static void drcbex64_free(drcbe_state *drcbe);
static void drcbex64_reset(drcbe_state *drcbe);
static int drcbex64_execute(drcbe_state *drcbe, drcuml_codehandle *entry);
@ -684,7 +684,7 @@ INLINE void emit_smart_call_m64(drcbe_state *drcbe, x86code **dst, x86code **tar
state
-------------------------------------------------*/
static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits)
static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits)
{
/* SSE control register mapping */
static const UINT32 sse_control[4] =

6
src/emu/cpu/drcbex86.c
View File

@ -154,7 +154,7 @@ struct _opcode_table_entry
/* internal backend-specific state */
struct _drcbe_state
{
running_device * device; /* CPU device we are associated with */
device_t * device; /* CPU device we are associated with */
drcuml_state * drcuml; /* pointer back to our owner */
drccache * cache; /* pointer to the cache */
drcuml_machine_state state; /* state of the machine */
@ -201,7 +201,7 @@ struct _drcbe_state
***************************************************************************/
/* primary back-end callbacks */
static drcbe_state *drcbex86_alloc(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits);
static drcbe_state *drcbex86_alloc(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits);
static void drcbex86_free(drcbe_state *drcbe);
static void drcbex86_reset(drcbe_state *drcbe);
static int drcbex86_execute(drcbe_state *drcbe, drcuml_codehandle *entry);
@ -614,7 +614,7 @@ INLINE void track_resolve_link(drcbe_state *drcbe, x86code **destptr, const emit
state
-------------------------------------------------*/
static drcbe_state *drcbex86_alloc(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits)
static drcbe_state *drcbex86_alloc(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits)
{
int opnum, regnum, entry, spacenum;
drcbe_state *drcbe;

2
src/emu/cpu/drcfe.c
View File

@ -120,7 +120,7 @@ INLINE void desc_free(drcfe_state *drcfe, opcode_desc *desc)
drcfe_init - initializate the drcfe state
-------------------------------------------------*/
drcfe_state *drcfe_init(running_device *cpu, const drcfe_config *config, void *param)
drcfe_state *drcfe_init(device_t *cpu, const drcfe_config *config, void *param)
{
drcfe_state *drcfe;

2
src/emu/cpu/drcfe.h
View File

@ -149,7 +149,7 @@ struct _drcfe_config
***************************************************************************/
/* initializate the drcfe state */
drcfe_state *drcfe_init(running_device *cpu, const drcfe_config *config, void *param);
drcfe_state *drcfe_init(device_t *cpu, const drcfe_config *config, void *param);
/* clean up after ourselves */
void drcfe_exit(drcfe_state *drcfe);

4
src/emu/cpu/drcuml.c
View File

@ -135,7 +135,7 @@ struct _drcuml_symbol
/* structure describing UML generation state */
struct _drcuml_state
{
running_device * device; /* CPU device we are associated with */
device_t * device; /* CPU device we are associated with */
drccache * cache; /* pointer to the codegen cache */
drcuml_block * blocklist; /* list of active blocks */
const drcbe_interface * beintf; /* backend interface pointer */
@ -538,7 +538,7 @@ INLINE void convert_to_mov_param(drcuml_instruction *inst, int pnum)
generator and initialize the back-end
-------------------------------------------------*/
drcuml_state *drcuml_alloc(running_device *device, drccache *cache, UINT32 flags, int modes, int addrbits, int ignorebits)
drcuml_state *drcuml_alloc(device_t *device, drccache *cache, UINT32 flags, int modes, int addrbits, int ignorebits)
{
drcuml_state *drcuml;
int opnum;

4
src/emu/cpu/drcuml.h
View File

@ -417,7 +417,7 @@ struct _drcbe_info
/* typedefs for back-end callback functions */
typedef drcbe_state *(*drcbe_alloc_func)(drcuml_state *drcuml, drccache *cache, running_device *device, UINT32 flags, int modes, int addrbits, int ignorebits);
typedef drcbe_state *(*drcbe_alloc_func)(drcuml_state *drcuml, drccache *cache, device_t *device, UINT32 flags, int modes, int addrbits, int ignorebits);
typedef void (*drcbe_free_func)(drcbe_state *state);
typedef void (*drcbe_reset_func)(drcbe_state *state);
typedef int (*drcbe_execute_func)(drcbe_state *state, drcuml_codehandle *entry);
@ -448,7 +448,7 @@ struct _drcbe_interface
/* ----- initialization/teardown ----- */
/* allocate state for the code generator and initialize the back-end */
drcuml_state *drcuml_alloc(running_device *device, drccache *cache, UINT32 flags, int modes, int addrbits, int ignorebits);
drcuml_state *drcuml_alloc(device_t *device, drccache *cache, UINT32 flags, int modes, int addrbits, int ignorebits);
/* return information about the back-end */
void drcuml_get_backend_info(drcuml_state *drcuml, drcbe_info *info);

10
src/emu/cpu/dsp32/dsp32.c
View File

@ -183,7 +183,7 @@ struct _dsp32_state
int icount;
UINT8 lastpins;
UINT32 ppc;
void (*output_pins_changed)(running_device *device, UINT32 pins);
void (*output_pins_changed)(device_t *device, UINT32 pins);
legacy_cpu_device * device;
address_space *program;
direct_read_data *direct;
@ -203,7 +203,7 @@ static CPU_RESET( dsp32c );
STATE ACCESSORS
***************************************************************************/
INLINE dsp32_state *get_safe_token(running_device *device)
INLINE dsp32_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == DSP32C);
@ -310,7 +310,7 @@ static void update_pcr(dsp32_state *cpustate, UINT16 newval)
INITIALIZATION AND SHUTDOWN
***************************************************************************/
static void dsp32_register_save( running_device *device )
static void dsp32_register_save( device_t *device )
{
dsp32_state *cpustate = get_safe_token(device);
@ -538,7 +538,7 @@ INLINE void dma_store(dsp32_state *cpustate)
}
void dsp32c_pio_w(running_device *device, int reg, int data)
void dsp32c_pio_w(device_t *device, int reg, int data)
{
dsp32_state *cpustate = get_safe_token(device);
UINT16 mask;
@ -617,7 +617,7 @@ void dsp32c_pio_w(running_device *device, int reg, int data)
PARALLEL INTERFACE READS
***************************************************************************/
int dsp32c_pio_r(running_device *device, int reg)
int dsp32c_pio_r(device_t *device, int reg)
{
dsp32_state *cpustate = get_safe_token(device);
UINT16 mask, result = 0xffff;

6
src/emu/cpu/dsp32/dsp32.h
View File

@ -67,7 +67,7 @@ enum
typedef struct _dsp32_config dsp32_config;
struct _dsp32_config
{
void (*output_pins_changed)(running_device *device, UINT32 pins); /* a change has occurred on an output pin */
void (*output_pins_changed)(device_t *device, UINT32 pins); /* a change has occurred on an output pin */
};
@ -78,7 +78,7 @@ struct _dsp32_config
DECLARE_LEGACY_CPU_DEVICE(DSP32C, dsp32c);
extern void dsp32c_pio_w(running_device *device, int reg, int data);
extern int dsp32c_pio_r(running_device *device, int reg);
extern void dsp32c_pio_w(device_t *device, int reg, int data);
extern int dsp32c_pio_r(device_t *device, int reg);
#endif /* __DSP32_H__ */

4
src/emu/cpu/dsp56k/dsp56k.c
View File

@ -162,7 +162,7 @@ static void set_irq_line(dsp56k_core* cpustate, int irqline, int state)
/***************************************************************************
INITIALIZATION AND SHUTDOWN
***************************************************************************/
static void agu_init(dsp56k_core* cpustate, running_device *device)
static void agu_init(dsp56k_core* cpustate, device_t *device)
{
/* save states - dsp56k_agu members */
state_save_register_device_item(device, 0, cpustate->AGU.r0);
@ -180,7 +180,7 @@ static void agu_init(dsp56k_core* cpustate, running_device *device)
state_save_register_device_item(device, 0, cpustate->AGU.temp);
}
static void alu_init(dsp56k_core* cpustate, running_device *device)
static void alu_init(dsp56k_core* cpustate, device_t *device)
{
/* save states - dsp56k_alu members */
state_save_register_device_item(device, 0, cpustate->ALU.x);

8
src/emu/cpu/dsp56k/dsp56k.h
View File

@ -200,7 +200,7 @@ typedef struct
} dsp56k_core;
INLINE dsp56k_core *get_safe_token(running_device *device)
INLINE dsp56k_core *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == DSP56156);
@ -211,9 +211,9 @@ INLINE dsp56k_core *get_safe_token(running_device *device)
/***************************************************************************
PUBLIC FUNCTIONS - ACCESSIBLE TO DRIVERS
***************************************************************************/
void dsp56k_host_interface_write(running_device* device, UINT8 offset, UINT8 data);
UINT8 dsp56k_host_interface_read(running_device* device, UINT8 offset);
void dsp56k_host_interface_write(device_t* device, UINT8 offset, UINT8 data);
UINT8 dsp56k_host_interface_read(device_t* device, UINT8 offset);
UINT16 dsp56k_get_peripheral_memory(running_device* device, UINT16 addr);
UINT16 dsp56k_get_peripheral_memory(device_t* device, UINT16 addr);
#endif /* __DSP56K_H__ */

6
src/emu/cpu/dsp56k/dsp56mem.c
View File

@ -790,7 +790,7 @@ WRITE16_HANDLER( peripheral_register_w )
/* These two functions are exposed to the outside world */
/* They represent the host side of the dsp56k's host interface */
void dsp56k_host_interface_write(running_device* device, UINT8 offset, UINT8 data)
void dsp56k_host_interface_write(device_t* device, UINT8 offset, UINT8 data)
{
dsp56k_core* cpustate = get_safe_token(device);
@ -886,7 +886,7 @@ void dsp56k_host_interface_write(running_device* device, UINT8 offset, UINT8 dat
}
}
UINT8 dsp56k_host_interface_read(running_device* device, UINT8 offset)
UINT8 dsp56k_host_interface_read(device_t* device, UINT8 offset)
{
dsp56k_core* cpustate = get_safe_token(device);
@ -953,7 +953,7 @@ UINT8 dsp56k_host_interface_read(running_device* device, UINT8 offset)
}
/* MISC*/
UINT16 dsp56k_get_peripheral_memory(running_device* device, UINT16 addr)
UINT16 dsp56k_get_peripheral_memory(device_t* device, UINT16 addr)
{
dsp56k_core* cpustate = get_safe_token(device);
return cpustate->peripheral_ram[A2O(addr)];

2
src/emu/cpu/dsp56k/dsp56pcu.c
View File

@ -96,7 +96,7 @@ UINT8 SE_bit(dsp56k_core* cpustate) { return ((SP & 0x0010) != 0); }
/***************************************************************************
INITIALIZATION AND RESET
***************************************************************************/
void pcu_init(dsp56k_core* cpustate, running_device *device)
void pcu_init(dsp56k_core* cpustate, device_t *device)
{
/* Init the irq table */
dsp56k_irq_table_init();

2
src/emu/cpu/dsp56k/dsp56pcu.h
View File

@ -10,7 +10,7 @@ namespace DSP56K
PCU
***************************************************************************/
void pcu_reset(dsp56k_core* cpustate);
void pcu_init(dsp56k_core* cpustate, running_device *device);
void pcu_init(dsp56k_core* cpustate, device_t *device);
#define PC (cpustate->PCU.pc)
#define LA (cpustate->PCU.la)
#define LC (cpustate->PCU.lc)

2
src/emu/cpu/e132xs/e132xs.c
View File

@ -414,7 +414,7 @@ static ADDRESS_MAP_START( e132_16k_iram_map, ADDRESS_SPACE_PROGRAM, 32 )
ADDRESS_MAP_END
INLINE hyperstone_state *get_safe_token(running_device *device)
INLINE hyperstone_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == E116T ||

4
src/emu/cpu/esrip/esrip.c
View File

@ -121,7 +121,7 @@ typedef struct
} esrip_state;
INLINE esrip_state *get_safe_token(running_device *device)
INLINE esrip_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == ESRIP);
@ -133,7 +133,7 @@ INLINE esrip_state *get_safe_token(running_device *device)
PUBLIC FUNCTIONS
***************************************************************************/
UINT8 get_rip_status(running_device *cpu)
UINT8 get_rip_status(device_t *cpu)
{
esrip_state *cpustate = get_safe_token(cpu);
return cpustate->status_out;

2
src/emu/cpu/esrip/esrip.h
View File

@ -96,6 +96,6 @@ struct _esrip_config_
DECLARE_LEGACY_CPU_DEVICE(ESRIP, esrip);
extern UINT8 get_rip_status(running_device *cpu);
extern UINT8 get_rip_status(device_t *cpu);
#endif /* _ESRIP_H */

2
src/emu/cpu/f8/f8.c
View File

@ -62,7 +62,7 @@ struct _f8_Regs
int irq_request;
};
INLINE f8_Regs *get_safe_token(running_device *device)
INLINE f8_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == F8);

4
src/emu/cpu/g65816/g65816.c
View File

@ -95,7 +95,7 @@ TODO general:
#include "emu.h"
#include "g65816.h"
INLINE g65816i_cpu_struct *get_safe_token(running_device *device)
INLINE g65816i_cpu_struct *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == G65816 || device->type() == _5A22);
@ -406,7 +406,7 @@ static CPU_SET_INFO( g65816 )
void g65816_set_read_vector_callback(running_device *device, read8_space_func read_vector)
void g65816_set_read_vector_callback(device_t *device, read8_space_func read_vector)
{
g65816i_cpu_struct *cpustate = get_safe_token(device);
READ_VECTOR = read_vector;

2
src/emu/cpu/g65816/g65816.h
View File

@ -64,7 +64,7 @@ DECLARE_LEGACY_CPU_DEVICE(_5A22, _5a22);
#define CPU_TYPE_5A22 1
void g65816_set_read_vector_callback(running_device *device, read8_space_func read_vector);
void g65816_set_read_vector_callback(device_t *device, read8_space_func read_vector);
/* ======================================================================== */

6
src/emu/cpu/h6280/h6280.c
View File

@ -117,7 +117,7 @@ static void set_irq_line(h6280_Regs* cpustate, int irqline, int state);
/* include the macros */
#include "h6280ops.h"
INLINE h6280_Regs *get_safe_token(running_device *device)
INLINE h6280_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == H6280);
@ -359,12 +359,12 @@ static CPU_TRANSLATE( h6280 )
return TRUE;
}
UINT8 h6280io_get_buffer(running_device *device)
UINT8 h6280io_get_buffer(device_t *device)
{
h6280_Regs* cpustate = get_safe_token(device);
return cpustate->io_buffer;
}
void h6280io_set_buffer(running_device *device, UINT8 data)
void h6280io_set_buffer(device_t *device, UINT8 data)
{
h6280_Regs* cpustate = get_safe_token(device);
cpustate->io_buffer=data;

4
src/emu/cpu/h6280/h6280.h
View File

@ -82,8 +82,8 @@ READ8_HANDLER( h6280_timer_r );
WRITE8_HANDLER( h6280_timer_w );
/* functions for use by the PSG and joypad port only! */
UINT8 h6280io_get_buffer(running_device*);
void h6280io_set_buffer(running_device*, UINT8);
UINT8 h6280io_get_buffer(device_t*);
void h6280io_set_buffer(device_t*, UINT8);
CPU_DISASSEMBLE( h6280 );

2
src/emu/cpu/h83002/h8priv.h
View File

@ -47,7 +47,7 @@ struct _h83xx_state
int mode_8bit;
};
INLINE h83xx_state *get_safe_token(running_device *device)
INLINE h83xx_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == H83002 ||

2
src/emu/cpu/hcd62121/hcd62121.c
View File

@ -302,7 +302,7 @@ INLINE int check_cond( hcd62121_state *cpustate, UINT8 op )
}
INLINE hcd62121_state *get_safe_token(running_device *device)
INLINE hcd62121_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == HCD62121);

4
src/emu/cpu/hd6309/hd6309.c
View File

@ -152,7 +152,7 @@ struct _m68_state_t
UINT8 const *index_cycle;
};
INLINE m68_state_t *get_safe_token(running_device *device)
INLINE m68_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == HD6309);
@ -505,7 +505,7 @@ static void check_irq_lines( m68_state_t *m68_state )
static STATE_POSTLOAD( hd6309_postload )
{
running_device *device = (legacy_cpu_device *)param;
device_t *device = (legacy_cpu_device *)param;
m68_state_t *m68_state = get_safe_token(device);
UpdateState(m68_state);

2
src/emu/cpu/i386/i386priv.h
View File

@ -258,7 +258,7 @@ struct _i386_state
UINT8 *cycle_table_rm;
};
INLINE i386_state *get_safe_token(running_device *device)
INLINE i386_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I386 ||

4
src/emu/cpu/i4004/i4004.c
View File

@ -52,7 +52,7 @@ struct _i4004_state
INLINE FUNCTIONS
***************************************************************************/
INLINE i4004_state *get_safe_token(running_device *device)
INLINE i4004_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I4004);
@ -155,7 +155,7 @@ INLINE void POP_STACK(i4004_state *cpustate)
cpustate->pc_pos = (cpustate->pc_pos - 1) & cpustate->addr_mask;
}
void i4004_set_test(running_device *device, UINT8 val)
void i4004_set_test(device_t *device, UINT8 val)
{
i4004_state *cpustate = get_safe_token(device);
cpustate->TEST = val;

2
src/emu/cpu/i4004/i4004.h
View File

@ -30,5 +30,5 @@ DECLARE_LEGACY_CPU_DEVICE(I4004, i4004);
CPU_DISASSEMBLE( i4004 );
void i4004_set_test(running_device *device, UINT8 val);
void i4004_set_test(device_t *device, UINT8 val);
#endif

2
src/emu/cpu/i8008/i8008.c
View File

@ -55,7 +55,7 @@ struct _i8008_state
INLINE FUNCTIONS
***************************************************************************/
INLINE i8008_state *get_safe_token(running_device *device)
INLINE i8008_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8008);

2
src/emu/cpu/i8085/i8085.c
View File

@ -273,7 +273,7 @@ static void execute_one(i8085_state *cpustate, int opcode);
INLINE FUNCTIONS
***************************************************************************/
INLINE i8085_state *get_safe_token(running_device *device)
INLINE i8085_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8080 ||

2
src/emu/cpu/i86/i286.c
View File

@ -82,7 +82,7 @@ struct _i80286_state
UINT8 ea_seg; /* effective segment of the address */
};
INLINE i80286_state *get_safe_token(running_device *device)
INLINE i80286_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I80286);

4
src/emu/cpu/i86/i86.c
View File

@ -72,7 +72,7 @@ struct _i8086_state
devcb_resolved_write_line out_tmrout1_func;
};
INLINE i8086_state *get_safe_token(running_device *device)
INLINE i8086_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8086 ||
@ -111,7 +111,7 @@ static UINT8 parity_table[256];
/***************************************************************************/
static void i8086_state_register(running_device *device)
static void i8086_state_register(device_t *device)
{
i8086_state *cpustate = get_safe_token(device);
state_save_register_device_item_array(device, 0, cpustate->regs.w);

4
src/emu/cpu/i860/i860.h
View File

@ -175,7 +175,7 @@ typedef struct {
} i860_state_t;
INLINE i860_state_t *get_safe_token(running_device *device)
INLINE i860_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I860);
@ -193,7 +193,7 @@ extern void i860_gen_interrupt(i860_state_t*);
/* This is the external interface for asserting/deasserting a pin on
the i860. */
extern void i860_set_pin(running_device *, int, int);
extern void i860_set_pin(device_t *, int, int);
/* Hard or soft reset. */
extern void reset_i860(i860_state_t*);

2
src/emu/cpu/i860/i860dec.c
View File

@ -309,7 +309,7 @@ static int has_delay_slot(UINT32 insn)
/* This is the external interface for asserting/deasserting pins on
the i860. */
void i860_set_pin (running_device *device, int pin, int val)
void i860_set_pin (device_t *device, int pin, int val)
{
i860s *cpustate = get_safe_token(device);
if (pin == DEC_PIN_BUS_HOLD)

6
src/emu/cpu/i960/i960.c
View File

@ -41,7 +41,7 @@ struct _i960_state_t {
int icount;
};
INLINE i960_state_t *get_safe_token(running_device *device)
INLINE i960_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I960);
@ -2217,13 +2217,13 @@ CPU_GET_INFO( i960 )
// call from any read/write handler for a memory area that can't be bursted
// on the real hardware (e.g. Model 2's interrupt control registers)
void i960_noburst(running_device *device)
void i960_noburst(device_t *device)
{
i960_state_t *i960 = get_safe_token(device);
i960->bursting = 0;
}
void i960_stall(running_device *device)
void i960_stall(device_t *device)
{
i960_state_t *i960 = get_safe_token(device);
i960->IP = i960->PIP;

4
src/emu/cpu/i960/i960.h
View File

@ -62,7 +62,7 @@ enum
DECLARE_LEGACY_CPU_DEVICE(I960, i960);
void i960_noburst(running_device *device);
void i960_stall(running_device *device);
void i960_noburst(device_t *device);
void i960_stall(device_t *device);
#endif /* __I960_H__ */

10
src/emu/cpu/jaguar/jaguar.c
View File

@ -249,7 +249,7 @@ static void (*const dsp_op_table[64])(jaguar_state *jaguar, UINT16 op) =
INLINE FUNCTIONS
***************************************************************************/
INLINE jaguar_state *get_safe_token(running_device *device)
INLINE jaguar_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == JAGUARGPU ||
@ -1237,7 +1237,7 @@ void xor_rn_rn(jaguar_state *jaguar, UINT16 op)
I/O HANDLING
***************************************************************************/
UINT32 jaguargpu_ctrl_r(running_device *device, offs_t offset)
UINT32 jaguargpu_ctrl_r(device_t *device, offs_t offset)
{
jaguar_state *jaguar = get_safe_token(device);
@ -1247,7 +1247,7 @@ UINT32 jaguargpu_ctrl_r(running_device *device, offs_t offset)
}
void jaguargpu_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
void jaguargpu_ctrl_w(device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{
jaguar_state *jaguar = get_safe_token(device);
UINT32 oldval, newval;
@ -1333,7 +1333,7 @@ void jaguargpu_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32
I/O HANDLING
***************************************************************************/
UINT32 jaguardsp_ctrl_r(running_device *device, offs_t offset)
UINT32 jaguardsp_ctrl_r(device_t *device, offs_t offset)
{
jaguar_state *jaguar = get_safe_token(device);
@ -1345,7 +1345,7 @@ UINT32 jaguardsp_ctrl_r(running_device *device, offs_t offset)
}
void jaguardsp_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
void jaguardsp_ctrl_w(device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{
jaguar_state *jaguar = get_safe_token(device);
UINT32 oldval, newval;

10
src/emu/cpu/jaguar/jaguar.h
View File

@ -71,7 +71,7 @@ enum
CONFIGURATION STRUCTURE
***************************************************************************/
typedef void (*jaguar_int_func)(running_device *device);
typedef void (*jaguar_int_func)(device_t *device);
typedef struct _jaguar_cpu_config jaguar_cpu_config;
@ -100,12 +100,12 @@ struct _jaguar_cpu_config
***************************************************************************/
DECLARE_LEGACY_CPU_DEVICE(JAGUARGPU, jaguargpu);
extern void jaguargpu_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguargpu_ctrl_r(running_device *device, offs_t offset);
extern void jaguargpu_ctrl_w(device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguargpu_ctrl_r(device_t *device, offs_t offset);
DECLARE_LEGACY_CPU_DEVICE(JAGUARDSP, jaguardsp);
extern void jaguardsp_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguardsp_ctrl_r(running_device *device, offs_t offset);
extern void jaguardsp_ctrl_w(device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguardsp_ctrl_r(device_t *device, offs_t offset);
#endif /* __JAGUAR_H__ */

4
src/emu/cpu/konami/konami.c
View File

@ -67,7 +67,7 @@ struct _konami_state
konami_set_lines_func setlines_callback;
};
INLINE konami_state *get_safe_token(running_device *device)
INLINE konami_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == KONAMI);
@ -502,7 +502,7 @@ static CPU_EXECUTE( konami )
}
void konami_configure_set_lines(running_device *device, konami_set_lines_func func)
void konami_configure_set_lines(device_t *device, konami_set_lines_func func)
{
konami_state *cpustate = get_safe_token(device);
cpustate->setlines_callback = func;

6
src/emu/cpu/konami/konami.h
View File

@ -6,7 +6,7 @@
#define __KONAMI_H__
typedef void (*konami_set_lines_func)(running_device *device, int lines);
typedef void (*konami_set_lines_func)(device_t *device, int lines);
enum
{
@ -14,7 +14,7 @@ enum
KONAMI_DP
};
#define KONAMI_SETLINES_CALLBACK(name) void name(running_device *device, int lines)
#define KONAMI_SETLINES_CALLBACK(name) void name(device_t *device, int lines)
#define KONAMI_IRQ_LINE 0 /* IRQ line number */
#define KONAMI_FIRQ_LINE 1 /* FIRQ line number */
@ -24,7 +24,7 @@ DECLARE_LEGACY_CPU_DEVICE(KONAMI, konami);
CPU_DISASSEMBLE( konami );
void konami_configure_set_lines(running_device *device, konami_set_lines_func func);
void konami_configure_set_lines(device_t *device, konami_set_lines_func func);
#endif /* __KONAMI_H__ */

2
src/emu/cpu/lh5801/lh5801.c
View File

@ -69,7 +69,7 @@ struct _lh5810_state
int icount;
};
INLINE lh5801_state *get_safe_token(running_device *device)
INLINE lh5801_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == LH5801);

2
src/emu/cpu/lh5801/lh5801.h
View File

@ -65,7 +65,7 @@ pc 8bit
typedef UINT8 (*lh5801_in_func)(running_device *device);
typedef UINT8 (*lh5801_in_func)(device_t *device);
typedef struct _lh5801_cpu_core lh5801_cpu_core;
struct _lh5801_cpu_core

2
src/emu/cpu/lr35902/lr35902.c
View File

@ -113,7 +113,7 @@ union _lr35902_state {
lr35902_8BitRegs b;
};
INLINE lr35902_state *get_safe_token(running_device *device)
INLINE lr35902_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == LR35902);

2
src/emu/cpu/lr35902/lr35902.h
View File

@ -4,7 +4,7 @@
#define __LR35902_H__
typedef void (*lr35902_timer_fired_func)(running_device *device, int cycles);
typedef void (*lr35902_timer_fired_func)(device_t *device, int cycles);
typedef struct _lr35902_cpu_core lr35902_cpu_core;
struct _lr35902_cpu_core

2
src/emu/cpu/m37710/m37710cm.h
View File

@ -127,7 +127,7 @@ struct _m37710i_cpu_struct
emu_timer *timers[8];
};
INLINE m37710i_cpu_struct *get_safe_token(running_device *device)
INLINE m37710i_cpu_struct *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M37710 ||

2
src/emu/cpu/m6502/m4510.c
View File

@ -157,7 +157,7 @@ struct _m4510_Regs {
m6510_port_write_func port_write;
};
INLINE m4510_Regs *get_safe_token(running_device *device)
INLINE m4510_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M4510);

4
src/emu/cpu/m6502/m6502.c
View File

@ -85,7 +85,7 @@ struct _m6502_Regs
m6510_port_write_func port_write;
};
INLINE m6502_Regs *get_safe_token(running_device *device)
INLINE m6502_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M6502 ||
@ -330,7 +330,7 @@ static CPU_INIT( n2a03 )
Bit 7 of address $4011 (the PSG's DPCM control register), when set,
causes an IRQ to be generated. This function allows the IRQ to be called
from the PSG core when such an occasion arises. */
void n2a03_irq(running_device *device)
void n2a03_irq(device_t *device)
{
m6502_Regs *cpustate = get_safe_token(device);

6
src/emu/cpu/m6502/m6502.h
View File

@ -51,8 +51,8 @@ enum
positiv edge sets overflow flag */
#define M6502_SET_OVERFLOW 1
typedef UINT8 (*m6510_port_read_func)(running_device *device, UINT8 direction);
typedef void (*m6510_port_write_func)(running_device *device, UINT8 direction, UINT8 data);
typedef UINT8 (*m6510_port_read_func)(device_t *device, UINT8 direction);
typedef void (*m6510_port_write_func)(device_t *device, UINT8 direction, UINT8 data);
/* Optional interface to set callbacks */
@ -162,7 +162,7 @@ DECLARE_LEGACY_CPU_DEVICE(N2A03, n2a03);
Bit 7 of address $4011 (the PSG's DPCM control register), when set,
causes an IRQ to be generated. This function allows the IRQ to be called
from the PSG core when such an occasion arises. */
extern void n2a03_irq(running_device *device);
extern void n2a03_irq(device_t *device);
/****************************************************************************

2
src/emu/cpu/m6502/m6509.c
View File

@ -88,7 +88,7 @@ struct _m6509_Regs {
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
};
INLINE m6509_Regs *get_safe_token(running_device *device)
INLINE m6509_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M6509);

2
src/emu/cpu/m6502/m65ce02.c
View File

@ -82,7 +82,7 @@ struct _m65ce02_Regs {
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
};
INLINE m65ce02_Regs *get_safe_token(running_device *device)
INLINE m65ce02_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M65CE02);

2
src/emu/cpu/m6800/m6800.c
View File

@ -154,7 +154,7 @@ struct _m6800_state
};
INLINE m6800_state *get_safe_token(running_device *device)
INLINE m6800_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M6800 ||

22
src/emu/cpu/m68000/m68000.h
View File

@ -70,11 +70,11 @@ enum
M68K_GENPCBASE = STATE_GENPCBASE
};
typedef void (*m68k_bkpt_ack_func)(running_device *device, UINT32 data);
typedef void (*m68k_reset_func)(running_device *device);
typedef void (*m68k_cmpild_func)(running_device *device, UINT32 data, UINT8 reg);
typedef void (*m68k_rte_func)(running_device *device);
typedef int (*m68k_tas_func)(running_device *device);
typedef void (*m68k_bkpt_ack_func)(device_t *device, UINT32 data);
typedef void (*m68k_reset_func)(device_t *device);
typedef void (*m68k_cmpild_func)(device_t *device, UINT32 data, UINT8 reg);
typedef void (*m68k_rte_func)(device_t *device);
typedef int (*m68k_tas_func)(device_t *device);
DECLARE_LEGACY_CPU_DEVICE(M68000, m68000);
@ -92,15 +92,15 @@ DECLARE_LEGACY_CPU_DEVICE(M68040, m68040);
DECLARE_LEGACY_CPU_DEVICE(SCC68070, scc68070);
void m68k_set_encrypted_opcode_range(running_device *device, offs_t start, offs_t end);
void m68k_set_encrypted_opcode_range(device_t *device, offs_t start, offs_t end);
void m68k_set_hmmu_enable(running_device *device, int enable);
void m68k_set_hmmu_enable(device_t *device, int enable);
unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type);
void m68k_set_reset_callback(running_device *device, m68k_reset_func callback);
void m68k_set_cmpild_callback(running_device *device, m68k_cmpild_func callback);
void m68k_set_rte_callback(running_device *device, m68k_rte_func callback);
void m68k_set_tas_callback(running_device *device, m68k_tas_func callback);
void m68k_set_reset_callback(device_t *device, m68k_reset_func callback);
void m68k_set_cmpild_callback(device_t *device, m68k_cmpild_func callback);
void m68k_set_rte_callback(device_t *device, m68k_rte_func callback);
void m68k_set_tas_callback(device_t *device, m68k_tas_func callback);
#endif /* __M68000_H__ */

18
src/emu/cpu/m68000/m68kcpu.c
View File

@ -493,7 +493,7 @@ const UINT8 m68ki_ea_idx_cycle_table[64] =
#define MASK_040_OR_LATER (CPU_TYPE_040 | CPU_TYPE_EC040)
INLINE m68ki_cpu_core *get_safe_token(running_device *device)
INLINE m68ki_cpu_core *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M68000 ||
@ -633,7 +633,7 @@ static CPU_EXECUTE( m68k )
debugger_instruction_hook(device, REG_PC);
// FIXME: remove this
// void apollo_debug_instruction(running_device *device);
// void apollo_debug_instruction(device_t *device);
// apollo_debug_instruction(device);
/* Record previous program counter */
@ -1052,14 +1052,14 @@ static CPU_GET_INFO( m68k )
/* global access */
void m68k_set_encrypted_opcode_range(running_device *device, offs_t start, offs_t end)
void m68k_set_encrypted_opcode_range(device_t *device, offs_t start, offs_t end)
{
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->encrypted_start = start;
m68k->encrypted_end = end;
}
void m68k_set_hmmu_enable(running_device *device, int enable)
void m68k_set_hmmu_enable(device_t *device, int enable)
{
m68ki_cpu_core *m68k = get_safe_token(device);
@ -1487,25 +1487,25 @@ void m68k_memory_interface::init32hmmu(address_space &space)
write32 = m68k_write32_delegate(m68k_write32_proto_delegate::create_member(m68k_memory_interface, writelong_d32_hmmu), *this);
}
void m68k_set_reset_callback(running_device *device, m68k_reset_func callback)
void m68k_set_reset_callback(device_t *device, m68k_reset_func callback)
{
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->reset_instr_callback = callback;
}
void m68k_set_cmpild_callback(running_device *device, m68k_cmpild_func callback)
void m68k_set_cmpild_callback(device_t *device, m68k_cmpild_func callback)
{
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->cmpild_instr_callback = callback;
}
void m68k_set_rte_callback(running_device *device, m68k_rte_func callback)
void m68k_set_rte_callback(device_t *device, m68k_rte_func callback)
{
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->rte_instr_callback = callback;
}
void m68k_set_tas_callback(running_device *device, m68k_tas_func callback)
void m68k_set_tas_callback(device_t *device, m68k_tas_func callback)
{
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->tas_instr_callback = callback;
@ -1516,7 +1516,7 @@ void m68k_set_tas_callback(running_device *device, m68k_tas_func callback)
* State definition
****************************************************************************/
static void define_state(running_device *device)
static void define_state(device_t *device)
{
m68ki_cpu_core *m68k = get_safe_token(device);
UINT32 addrmask = (m68k->cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;

2
src/emu/cpu/m6805/m6805.c
View File

@ -69,7 +69,7 @@ typedef struct
int nmi_state;
} m6805_Regs;
INLINE m6805_Regs *get_safe_token(running_device *device)
INLINE m6805_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M6805 ||

2
src/emu/cpu/m6809/m6809.c
View File

@ -107,7 +107,7 @@ struct _m68_state_t
UINT8 nmi_state;
};
INLINE m68_state_t *get_safe_token(running_device *device)
INLINE m68_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M6809 ||

2
src/emu/cpu/mb86233/mb86233.c
View File

@ -66,7 +66,7 @@ struct _mb86233_state
UINT32 *Tables;
};
INLINE mb86233_state *get_safe_token(running_device *device)
INLINE mb86233_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == MB86233);

4
src/emu/cpu/mb86233/mb86233.h
View File

@ -42,8 +42,8 @@ enum
STRUCTURES
***************************************************************************/
typedef int (*mb86233_fifo_read_func)(running_device *device, UINT32 *data);
typedef void (*mb86233_fifo_write_func)(running_device *device, UINT32 data);
typedef int (*mb86233_fifo_read_func)(device_t *device, UINT32 *data);
typedef void (*mb86233_fifo_write_func)(device_t *device, UINT32 data);
typedef struct _mb86233_cpu_core mb86233_cpu_core;
struct _mb86233_cpu_core

4
src/emu/cpu/mb88xx/mb88xx.c
View File

@ -82,7 +82,7 @@ struct _mb88_state
int icount;
};
INLINE mb88_state *get_safe_token(running_device *device)
INLINE mb88_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == MB88 ||
@ -334,7 +334,7 @@ static void update_pio( mb88_state *cpustate, int cycles )
}
}
void mb88_external_clock_w(running_device *device, int state)
void mb88_external_clock_w(device_t *device, int state)
{
mb88_state *cpustate = get_safe_token(device);
if (state != cpustate->ctr)

2
src/emu/cpu/mb88xx/mb88xx.h
View File

@ -72,6 +72,6 @@ DECLARE_LEGACY_CPU_DEVICE(MB8844, mb8844);
CPU_DISASSEMBLE( mb88 );
void mb88_external_clock_w(running_device *device, int state);
void mb88_external_clock_w(device_t *device, int state);
#endif /* __MB88XX_H__ */

2
src/emu/cpu/mc68hc11/mc68hc11.c
View File

@ -79,7 +79,7 @@ struct _hc11_state
UINT8 tflg1;
};
INLINE hc11_state *get_safe_token(running_device *device)
INLINE hc11_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == MC68HC11);

6
src/emu/cpu/mcs48/mcs48.c
View File

@ -218,7 +218,7 @@ static int check_irqs(mcs48_state *cpustate);
INLINE FUNCTIONS
***************************************************************************/
INLINE mcs48_state *get_safe_token(running_device *device)
INLINE mcs48_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8021 ||
@ -1163,7 +1163,7 @@ static CPU_EXECUTE( mcs48 )
read
-------------------------------------------------*/
UINT8 upi41_master_r(running_device *device, UINT8 a0)
UINT8 upi41_master_r(device_t *device, UINT8 a0)
{
mcs48_state *cpustate = get_safe_token(device);
@ -1212,7 +1212,7 @@ static TIMER_CALLBACK( master_callback )
cpustate->sts |= STS_F1;
}
void upi41_master_w(running_device *_device, UINT8 a0, UINT8 data)
void upi41_master_w(device_t *_device, UINT8 a0, UINT8 data)
{
legacy_cpu_device *device = downcast<legacy_cpu_device *>(_device);
timer_call_after_resynch(device->machine, (void *)device, (a0 << 8) | data, master_callback);

4
src/emu/cpu/mcs48/mcs48.h
View File

@ -119,8 +119,8 @@ DECLARE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */
***************************************************************************/
/* functions for talking to the input/output buffers on the UPI41-class chips */
UINT8 upi41_master_r(running_device *device, UINT8 a0);
void upi41_master_w(running_device *device, UINT8 a0, UINT8 data);
UINT8 upi41_master_r(device_t *device, UINT8 a0);
void upi41_master_w(device_t *device, UINT8 a0, UINT8 data);
/* disassemblers */

2
src/emu/cpu/mcs48/mcs48dsm.c
View File

@ -10,7 +10,7 @@
#include "emu.h"
static UINT32 common_dasm(running_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int upi41)
static UINT32 common_dasm(device_t *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int upi41)
{
const UINT8 *startram = opram;
UINT32 flags = 0;

6
src/emu/cpu/mcs51/mcs51.c
View File

@ -649,7 +649,7 @@ INLINE void serial_transmit(mcs51_state_t *mcs51_state, UINT8 data);
INLINE FUNCTIONS
***************************************************************************/
INLINE mcs51_state_t *get_safe_token(running_device *device)
INLINE mcs51_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8031 ||
@ -1282,13 +1282,13 @@ INLINE void update_irq_prio(mcs51_state_t *mcs51_state, UINT8 ipl, UINT8 iph)
***************************************************************************/
void i8051_set_serial_tx_callback(running_device *device, mcs51_serial_tx_func tx_func)
void i8051_set_serial_tx_callback(device_t *device, mcs51_serial_tx_func tx_func)
{
mcs51_state_t *mcs51_state = get_safe_token(device);
mcs51_state->serial_tx_callback = tx_func;
}
void i8051_set_serial_rx_callback(running_device *device, mcs51_serial_rx_func rx_func)
void i8051_set_serial_rx_callback(device_t *device, mcs51_serial_rx_func rx_func)
{
mcs51_state_t *mcs51_state = get_safe_token(device);
mcs51_state->serial_rx_callback = rx_func;

8
src/emu/cpu/mcs51/mcs51.h
View File

@ -89,11 +89,11 @@ struct _ds5002fp_config
FUNCTION PROTOTYPES
***************************************************************************/
typedef void (*mcs51_serial_tx_func)(running_device *device, int data);
typedef int (*mcs51_serial_rx_func)(running_device *device);
typedef void (*mcs51_serial_tx_func)(device_t *device, int data);
typedef int (*mcs51_serial_rx_func)(device_t *device);
extern void i8051_set_serial_tx_callback(running_device *device, mcs51_serial_tx_func tx_func);
extern void i8051_set_serial_rx_callback(running_device *device, mcs51_serial_rx_func rx_func);
extern void i8051_set_serial_tx_callback(device_t *device, mcs51_serial_tx_func tx_func);
extern void i8051_set_serial_rx_callback(device_t *device, mcs51_serial_rx_func rx_func);
/* variants with no internal rom and 128 byte internal memory */
DECLARE_LEGACY_CPU_DEVICE(I8031, i8031);

2
src/emu/cpu/minx/minx.c
View File

@ -93,7 +93,7 @@ typedef struct {
#define WR(offset,data) minx->program->write_byte( offset, data )
#define GET_MINX_PC ( ( minx->PC & 0x8000 ) ? ( minx->V << 15 ) | (minx->PC & 0x7FFF ) : minx->PC )
INLINE minx_state *get_safe_token(running_device *device)
INLINE minx_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == MINX);

6
src/emu/cpu/mips/mips3.h
View File

@ -224,9 +224,9 @@ struct _mips3_config
PUBLIC FUNCTIONS
***************************************************************************/
void mips3drc_set_options(running_device *device, UINT32 options);
void mips3drc_add_fastram(running_device *device, offs_t start, offs_t end, UINT8 readonly, void *base);
void mips3drc_add_hotspot(running_device *device, offs_t pc, UINT32 opcode, UINT32 cycles);
void mips3drc_set_options(device_t *device, UINT32 options);
void mips3drc_add_fastram(device_t *device, offs_t start, offs_t end, UINT8 readonly, void *base);
void mips3drc_add_hotspot(device_t *device, offs_t pc, UINT32 opcode, UINT32 cycles);
DECLARE_LEGACY_CPU_DEVICE(VR4300BE, vr4300be);
DECLARE_LEGACY_CPU_DEVICE(VR4300LE, vr4300le);

8
src/emu/cpu/mips/mips3drc.c
View File

@ -273,7 +273,7 @@ static const UINT8 fpmode_source[4] =
INLINE FUNCTIONS
***************************************************************************/
INLINE mips3_state *get_safe_token(running_device *device)
INLINE mips3_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == VR4300BE ||
@ -625,7 +625,7 @@ static CPU_GET_INFO( mips3 )
mips3drc_set_options - configure DRC options
-------------------------------------------------*/
void mips3drc_set_options(running_device *device, UINT32 options)
void mips3drc_set_options(device_t *device, UINT32 options)
{
mips3_state *mips3 = get_safe_token(device);
mips3->impstate->drcoptions = options;
@ -637,7 +637,7 @@ void mips3drc_set_options(running_device *device, UINT32 options)
region
-------------------------------------------------*/
void mips3drc_add_fastram(running_device *device, offs_t start, offs_t end, UINT8 readonly, void *base)
void mips3drc_add_fastram(device_t *device, offs_t start, offs_t end, UINT8 readonly, void *base)
{
mips3_state *mips3 = get_safe_token(device);
if (mips3->impstate->fastram_select < ARRAY_LENGTH(mips3->impstate->fastram))
@ -655,7 +655,7 @@ void mips3drc_add_fastram(running_device *device, offs_t start, offs_t end, UINT
mips3drc_add_hotspot - add a new hotspot
-------------------------------------------------*/
void mips3drc_add_hotspot(running_device *device, offs_t pc, UINT32 opcode, UINT32 cycles)
void mips3drc_add_hotspot(device_t *device, offs_t pc, UINT32 opcode, UINT32 cycles)
{
mips3_state *mips3 = get_safe_token(device);
if (mips3->impstate->hotspot_select < ARRAY_LENGTH(mips3->impstate->hotspot))

2
src/emu/cpu/mips/psx.c
View File

@ -194,7 +194,7 @@ struct _psxcpu_state
UINT32 bad_word_address_mask;
};
INLINE psxcpu_state *get_safe_token(running_device *device)
INLINE psxcpu_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PSXCPU ||

2
src/emu/cpu/mips/r3000.c
View File

@ -163,7 +163,7 @@ struct _r3000_state
size_t dcache_size;
};
INLINE r3000_state *get_safe_token(running_device *device)
INLINE r3000_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == R3000BE ||

2
src/emu/cpu/mn10200/mn10200.c
View File

@ -146,7 +146,7 @@ INLINE void mn102_change_pc(mn102_info *mn102, UINT32 pc)
mn102->pc = pc & 0xffffff;
}
INLINE mn102_info *get_safe_token(running_device *device)
INLINE mn102_info *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == MN10200);

2
src/emu/cpu/nec/nec.c
View File

@ -118,7 +118,7 @@ typedef UINT32 DWORD;
extern int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, const nec_config *config);
INLINE nec_state_t *get_safe_token(running_device *device)
INLINE nec_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == V20 ||

2
src/emu/cpu/nec/v25.c
View File

@ -37,7 +37,7 @@ static const nec_config default_config =
extern int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, const nec_config *config);
INLINE v25_state_t *get_safe_token(running_device *device)
INLINE v25_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == V25 || device->type() == V35);

18
src/emu/cpu/pdp1/pdp1.c
View File

@ -422,7 +422,7 @@ struct _pdp1_state
int icount;
};
INLINE pdp1_state *get_safe_token(running_device *device)
INLINE pdp1_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PDP1);
@ -430,10 +430,10 @@ INLINE pdp1_state *get_safe_token(running_device *device)
}
static void execute_instruction(pdp1_state *cpustate);
static void null_iot (running_device *device, int op2, int nac, int mb, int *io, int ac);
static void lem_eem_iot(running_device *device, int op2, int nac, int mb, int *io, int ac);
static void sbs_iot(running_device *device, int op2, int nac, int mb, int *io, int ac);
static void type_20_sbs_iot(running_device *device, int op2, int nac, int mb, int *io, int ac);
static void null_iot (device_t *device, int op2, int nac, int mb, int *io, int ac);
static void lem_eem_iot(device_t *device, int op2, int nac, int mb, int *io, int ac);
static void sbs_iot(device_t *device, int op2, int nac, int mb, int *io, int ac);
static void type_20_sbs_iot(device_t *device, int op2, int nac, int mb, int *io, int ac);
static void pulse_start_clear(pdp1_state *cpustate);
@ -1698,7 +1698,7 @@ no_fetch:
/*
Handle unimplemented IOT
*/
static void null_iot(running_device *device, int op2, int nac, int mb, int *io, int ac)
static void null_iot(device_t *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = get_safe_token(device);
/* Note that the dummy IOT 0 is used to wait for the completion pulse
@ -1721,7 +1721,7 @@ static void null_iot(running_device *device, int op2, int nac, int mb, int *io,
IOT 74: LEM/EEM
*/
static void lem_eem_iot(running_device *device, int op2, int nac, int mb, int *io, int ac)
static void lem_eem_iot(device_t *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = get_safe_token(device);
if (! cpustate->extend_support) /* extend mode supported? */
@ -1745,7 +1745,7 @@ static void lem_eem_iot(running_device *device, int op2, int nac, int mb, int *i
IOT 55: esm
IOT 56: cbs
*/
static void sbs_iot(running_device *device, int op2, int nac, int mb, int *io, int ac)
static void sbs_iot(device_t *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = get_safe_token(device);
switch (op2)
@ -1789,7 +1789,7 @@ static void sbs_iot(running_device *device, int op2, int nac, int mb, int *io, i
IOT 52: isb
IOT 53: cac
*/
static void type_20_sbs_iot(running_device *device, int op2, int nac, int mb, int *io, int ac)
static void type_20_sbs_iot(device_t *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = get_safe_token(device);
int channel, mask;

6
src/emu/cpu/pdp1/pdp1.h
View File

@ -22,9 +22,9 @@ enum
#define pdp1_pulse_start_clear(cpudevice) cpu_set_reg(cpudevice, PDP1_START_CLEAR, (UINT64)0)
#define pdp1_pulse_iot_done(cpudevice) cpu_set_reg(cpudevice, PDP1_IO_COMPLETE, (UINT64)0)
typedef void (*pdp1_extern_iot_func)(running_device *device, int op2, int nac, int mb, int *io, int ac);
typedef void (*pdp1_read_binary_word_func)(running_device *device);
typedef void (*pdp1_io_sc_func)(running_device *device);
typedef void (*pdp1_extern_iot_func)(device_t *device, int op2, int nac, int mb, int *io, int ac);
typedef void (*pdp1_read_binary_word_func)(device_t *device);
typedef void (*pdp1_io_sc_func)(device_t *device);
typedef struct _pdp1_reset_param_t pdp1_reset_param_t;

14
src/emu/cpu/pdp1/tx0.c
View File

@ -15,9 +15,9 @@
#define LOG 0
#define LOG_EXTRA 0
static void execute_instruction_64kw(running_device *device);
static void execute_instruction_8kw(running_device *device);
static void pulse_reset(running_device *device);
static void execute_instruction_64kw(device_t *device);
static void execute_instruction_8kw(device_t *device);
static void pulse_reset(device_t *device);
/* TX-0 Registers */
@ -68,7 +68,7 @@ struct _tx0_state
address_space *program;
};
INLINE tx0_state *get_safe_token(running_device *device)
INLINE tx0_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TX0_64KW ||
@ -677,7 +677,7 @@ CPU_GET_INFO( tx0_8kw )
/* execute one instruction */
static void execute_instruction_64kw(running_device *device)
static void execute_instruction_64kw(device_t *device)
{
tx0_state *cpustate = get_safe_token(device);
@ -868,7 +868,7 @@ static void indexed_address_eval(tx0_state *cpustate)
}
/* execute one instruction */
static void execute_instruction_8kw(running_device *device)
static void execute_instruction_8kw(device_t *device)
{
tx0_state *cpustate = get_safe_token(device);
@ -1274,7 +1274,7 @@ static void execute_instruction_8kw(running_device *device)
reset most registers and flip-flops, and initialize a few emulator state
variables.
*/
static void pulse_reset(running_device *device)
static void pulse_reset(device_t *device)
{
tx0_state *cpustate = get_safe_token(device);

6
src/emu/cpu/pdp1/tx0.h
View File

@ -35,11 +35,11 @@ struct _tx0_reset_param_t
5: reserved (for unimplemented typ instruction?)
6: p6h
7: p7h */
void (*io_handlers[8])(running_device *device);
void (*io_handlers[8])(device_t *device);
/* select instruction handler */
void (*sel_handler)(running_device *device);
void (*sel_handler)(device_t *device);
/* callback called when reset line is pulsed: IO devices should reset */
void (*io_reset_callback)(running_device *device);
void (*io_reset_callback)(device_t *device);
};
/* PUBLIC FUNCTIONS */

4
src/emu/cpu/pic16c5x/pic16c5x.c
View File

@ -104,7 +104,7 @@ struct _pic16c5x_state
address_space *io;
};
INLINE pic16c5x_state *get_safe_token(running_device *device)
INLINE pic16c5x_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PIC16C54 ||
@ -798,7 +798,7 @@ static void pic16c5x_soft_reset(pic16c5x_state *cpustate)
pic16c5x_reset_regs(cpustate);
}
void pic16c5x_set_config(running_device *cpu, int data)
void pic16c5x_set_config(device_t *cpu, int data)
{
pic16c5x_state *cpustate = get_safe_token(cpu);

2
src/emu/cpu/pic16c5x/pic16c5x.h
View File

@ -43,7 +43,7 @@ enum
* the value if known (available in HEX dumps of the ROM).
*/
void pic16c5x_set_config(running_device *cpu, int data);
void pic16c5x_set_config(device_t *cpu, int data);

4
src/emu/cpu/pic16c62x/pic16c62x.c
View File

@ -94,7 +94,7 @@ struct _pic16c62x_state
address_space *io;
};
INLINE pic16c62x_state *get_safe_token(running_device *device)
INLINE pic16c62x_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PIC16C620 ||
@ -917,7 +917,7 @@ static void pic16c62x_soft_reset(pic16c62x_state *cpustate)
pic16c62x_reset_regs(cpustate);
}
void pic16c62x_set_config(running_device *cpu, int data)
void pic16c62x_set_config(device_t *cpu, int data)
{
pic16c62x_state *cpustate = get_safe_token(cpu);

2
src/emu/cpu/pic16c62x/pic16c62x.h
View File

@ -46,7 +46,7 @@ enum
* the value if known (available in HEX dumps of the ROM).
*/
void pic16c62x_set_config(running_device *cpu, int data);
void pic16c62x_set_config(device_t *cpu, int data);

12
src/emu/cpu/powerpc/ppc.h
View File

@ -145,7 +145,7 @@ enum
STRUCTURES AND TYPEDEFS
***************************************************************************/
typedef void (*ppc4xx_spu_tx_handler)(running_device *device, UINT8 data);
typedef void (*ppc4xx_spu_tx_handler)(device_t *device, UINT8 data);
typedef struct _powerpc_config powerpc_config;
struct _powerpc_config
@ -159,12 +159,12 @@ struct _powerpc_config
PUBLIC FUNCTIONS
***************************************************************************/
void ppcdrc_set_options(running_device *device, UINT32 options);
void ppcdrc_add_fastram(running_device *device, offs_t start, offs_t end, UINT8 readonly, void *base);
void ppcdrc_add_hotspot(running_device *device, offs_t pc, UINT32 opcode, UINT32 cycles);
void ppcdrc_set_options(device_t *device, UINT32 options);
void ppcdrc_add_fastram(device_t *device, offs_t start, offs_t end, UINT8 readonly, void *base);
void ppcdrc_add_hotspot(device_t *device, offs_t pc, UINT32 opcode, UINT32 cycles);
void ppc4xx_spu_set_tx_handler(running_device *device, ppc4xx_spu_tx_handler handler);
void ppc4xx_spu_receive_byte(running_device *device, UINT8 byteval);
void ppc4xx_spu_set_tx_handler(device_t *device, ppc4xx_spu_tx_handler handler);
void ppc4xx_spu_receive_byte(device_t *device, UINT8 byteval);
DECLARE_LEGACY_CPU_DEVICE(PPC403GA, ppc403ga);

4
src/emu/cpu/powerpc/ppccom.c
View File

@ -2102,7 +2102,7 @@ ADDRESS_MAP_END
specific TX handler configuration
-------------------------------------------------*/
void ppc4xx_spu_set_tx_handler(running_device *device, ppc4xx_spu_tx_handler handler)
void ppc4xx_spu_set_tx_handler(device_t *device, ppc4xx_spu_tx_handler handler)
{
powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(device)->token();
ppc->spu.tx_handler = handler;
@ -2114,7 +2114,7 @@ void ppc4xx_spu_set_tx_handler(running_device *device, ppc4xx_spu_tx_handler han
specific serial byte receive
-------------------------------------------------*/
void ppc4xx_spu_receive_byte(running_device *device, UINT8 byteval)
void ppc4xx_spu_receive_byte(device_t *device, UINT8 byteval)
{
powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(device)->token();
ppc4xx_spu_rx_data(ppc, byteval);

8
src/emu/cpu/powerpc/ppcdrc.c
View File

@ -435,7 +435,7 @@ static const UINT8 fcmp_cr_table_source[32] =
INLINE FUNCTIONS
***************************************************************************/
INLINE powerpc_state *get_safe_token(running_device *device)
INLINE powerpc_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PPC403GA ||
@ -817,7 +817,7 @@ static CPU_GET_INFO( ppcdrc )
ppcdrc_set_options - configure DRC options
-------------------------------------------------*/
void ppcdrc_set_options(running_device *device, UINT32 options)
void ppcdrc_set_options(device_t *device, UINT32 options)
{
powerpc_state *ppc = get_safe_token(device);
ppc->impstate->drcoptions = options;
@ -829,7 +829,7 @@ void ppcdrc_set_options(running_device *device, UINT32 options)
region
-------------------------------------------------*/
void ppcdrc_add_fastram(running_device *device, offs_t start, offs_t end, UINT8 readonly, void *base)
void ppcdrc_add_fastram(device_t *device, offs_t start, offs_t end, UINT8 readonly, void *base)
{
powerpc_state *ppc = get_safe_token(device);
if (ppc->impstate->fastram_select < ARRAY_LENGTH(ppc->impstate->fastram))
@ -847,7 +847,7 @@ void ppcdrc_add_fastram(running_device *device, offs_t start, offs_t end, UINT8
ppcdrc_add_hotspot - add a new hotspot
-------------------------------------------------*/
void ppcdrc_add_hotspot(running_device *device, offs_t pc, UINT32 opcode, UINT32 cycles)
void ppcdrc_add_hotspot(device_t *device, offs_t pc, UINT32 opcode, UINT32 cycles)
{
powerpc_state *ppc = get_safe_token(device);
if (ppc->impstate->hotspot_select < ARRAY_LENGTH(ppc->impstate->hotspot))

10
src/emu/cpu/rsp/rsp.c
View File

@ -30,7 +30,7 @@ CPU_DISASSEMBLE( rsp );
extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
INLINE rsp_state *get_safe_token(running_device *device)
INLINE rsp_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == RSP);
@ -3123,19 +3123,19 @@ CPU_GET_INFO( rsp )
}
}
void rspdrc_set_options(running_device *device, UINT32 options)
void rspdrc_set_options(device_t *device, UINT32 options)
{
}
void rspdrc_add_imem(running_device *device, void *base)
void rspdrc_add_imem(device_t *device, void *base)
{
}
void rspdrc_add_dmem(running_device *device, void *base)
void rspdrc_add_dmem(device_t *device, void *base)
{
}
void rspdrc_flush_drc_cache(running_device *device)
void rspdrc_flush_drc_cache(device_t *device)
{
}

10
src/emu/cpu/rsp/rsp.h
View File

@ -68,7 +68,7 @@ enum
STRUCTURES
***************************************************************************/
typedef void (*rsp_set_status_func)(running_device *device, UINT32 status);
typedef void (*rsp_set_status_func)(device_t *device, UINT32 status);
typedef struct _rsp_config rsp_config;
struct _rsp_config
@ -86,10 +86,10 @@ struct _rsp_config
PUBLIC FUNCTIONS
***************************************************************************/
void rspdrc_flush_drc_cache(running_device *device);
void rspdrc_set_options(running_device *device, UINT32 options);
void rspdrc_add_imem(running_device *device, void *base);
void rspdrc_add_dmem(running_device *device, void *base);
void rspdrc_flush_drc_cache(device_t *device);
void rspdrc_set_options(device_t *device, UINT32 options);
void rspdrc_add_imem(device_t *device, void *base);
void rspdrc_add_dmem(device_t *device, void *base);
/***************************************************************************
HELPER MACROS

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