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sgi_ge5: fix bus logic (nw)

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This commit is contained in:
Patrick Mackinlay 2019-10-04 19:42:45 +07:00
parent 73e0eb6b4e
commit 3bbbe5080b
2 changed files with 10 additions and 8 deletions
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14
src/mame/video/sgi_ge5.cpp
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@ -147,7 +147,7 @@ void sgi_ge5_device::device_add_mconfig(machine_config &config)
{ {
WTL3132(config, m_fpu, clock()); WTL3132(config, m_fpu, clock());
m_fpu->out_fpcn().set([this](int state) { m_fpu_c = bool(state); }); m_fpu->out_fpcn().set([this](int state) { m_fpu_c = bool(state); });
m_fpu->out_port_x().set([this](u32 data) { m_bus = data; }); m_fpu->out_port_x().set([this](u32 data) { m_fpu_data = data; });
} }
@ -186,6 +186,7 @@ void sgi_ge5_device::device_start()
void sgi_ge5_device::device_reset() void sgi_ge5_device::device_reset()
{ {
m_pc = 0;
m_sp = 0; m_sp = 0;
m_reptr = 0; m_reptr = 0;
m_memptr = 0; m_memptr = 0;
@ -225,7 +226,7 @@ void sgi_ge5_device::execute_run()
// execute secondary operation // execute secondary operation
if (m_decode.secondary) if (m_decode.secondary)
secondary(m_bus_latch); secondary();
// increment memptr // increment memptr
if (m_decode.inc_memptr) if (m_decode.inc_memptr)
@ -272,6 +273,7 @@ void sgi_ge5_device::execute_run()
break; break;
case 3: // fpu case 3: // fpu
m_decode.fpu |= (2ULL << wtl3132_device::S_IOCT); m_decode.fpu |= (2ULL << wtl3132_device::S_IOCT);
m_bus = m_fpu_data;
break; break;
} }
break; break;
@ -445,7 +447,6 @@ void sgi_ge5_device::execute_run()
} }
// FIXME: fpu condition has additional 1 cycle latency // FIXME: fpu condition has additional 1 cycle latency
m_bus_latch = m_bus;
m_fpu_c_latch = m_fpu_c; m_fpu_c_latch = m_fpu_c;
// fpu operation // fpu operation
@ -487,7 +488,7 @@ void sgi_ge5_device::decode()
} }
} }
void sgi_ge5_device::secondary(u64 bus) void sgi_ge5_device::secondary()
{ {
switch (m_decode.operation) switch (m_decode.operation)
{ {
@ -520,7 +521,7 @@ void sgi_ge5_device::secondary(u64 bus)
break; break;
case 0xb0: // load memptr case 0xb0: // load memptr
m_memptr = bus & 0x7fff; m_memptr = m_bus & 0x7fff;
break; break;
case 0xb4: // set memptr case 0xb4: // set memptr
@ -529,6 +530,7 @@ void sgi_ge5_device::secondary(u64 bus)
case 0xb6: // set memptr; set finish flag case 0xb6: // set memptr; set finish flag
m_memptr = m_decode.immediate & 0x7fff; m_memptr = m_decode.immediate & 0x7fff;
LOG("finish flag %d set (%s)\n", m_decode.immediate & 1, machine().describe_context());
m_finish[m_decode.immediate & 1] = 1; m_finish[m_decode.immediate & 1] = 1;
break; break;
@ -693,7 +695,7 @@ offs_t sgi_ge5_disassembler::disassemble(std::ostream &stream, offs_t pc, data_b
case 3: case 3:
case 5: case 5:
case 6: case 6:
fpu_ctrl |= 0x2'0000'0000; // ENCN=2 fpu_ctrl |= 0x1'0000'0000; // ENCN=1
break; break;
} }

4
src/mame/video/sgi_ge5.h
View File

@ -61,7 +61,7 @@ protected:
void data_map(address_map &map); void data_map(address_map &map);
void decode(); void decode();
void secondary(u64 bus); void secondary();
void set_int(bool state) void set_int(bool state)
{ {
@ -136,7 +136,7 @@ private:
// dynamic state // dynamic state
u64 m_bus; u64 m_bus;
u64 m_bus_latch; u32 m_fpu_data;
bool m_fpu_c_latch; bool m_fpu_c_latch;
}; };