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hornet.cpp, nwk-tr.cpp: extracted nwk-tr.cpp lan board implementation to a device and hooked it up to thrilldbu in hornet.cpp. It doesn't reset anymore but needs analog controls hook-up

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This commit is contained in:
Ivan Vangelista 2021-05-05 20:23:59 +02:00
parent cdca170186
commit 3bdefe103f
5 changed files with 309 additions and 168 deletions
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2
scripts/target/mame/arcade.lua
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@ -2509,6 +2509,8 @@ files {
MAME_DIR .. "src/mame/drivers/hornet.cpp",
MAME_DIR .. "src/mame/machine/konppc.cpp",
MAME_DIR .. "src/mame/machine/konppc.h",
MAME_DIR .. "src/mame/machine/konami_gn676_lan.cpp",
MAME_DIR .. "src/mame/machine/konami_gn676_lan.h",
MAME_DIR .. "src/mame/drivers/hyperspt.cpp",
MAME_DIR .. "src/mame/includes/hyperspt.h",
MAME_DIR .. "src/mame/audio/hyprolyb.cpp",

28
src/mame/drivers/hornet.cpp
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@ -351,16 +351,17 @@ Jumpers set on GFX PCB to scope monitor:
#include "cpu/powerpc/ppc.h"
#include "cpu/sharc/sharc.h"
#include "machine/adc1213x.h"
#include "machine/ds2401.h"
#include "machine/eepromser.h"
#include "machine/k033906.h"
#include "machine/konami_gn676_lan.h"
#include "machine/konppc.h"
#include "machine/timekpr.h"
#include "machine/ds2401.h"
#include "machine/watchdog.h"
#include "sound/rf5c400.h"
#include "sound/k056800.h"
#include "video/voodoo.h"
#include "sound/rf5c400.h"
#include "video/k037122.h"
#include "video/voodoo.h"
#include "emupal.h"
#include "screen.h"
#include "speaker.h"
@ -405,6 +406,7 @@ public:
{ }
void hornet(machine_config &config);
void hornet_lan(machine_config &config);
void terabrst(machine_config &config);
void sscope(machine_config &config);
void sscope2(machine_config &config);
@ -487,6 +489,7 @@ private:
int jvs_decode_data(uint8_t *in, uint8_t *out, int length);
void jamma_jvs_cmd_exec();
void hornet_map(address_map &map);
void hornet_lan_map(address_map &map);
void terabrst_map(address_map &map);
void sscope_map(address_map &map);
void sscope2_map(address_map &map);
@ -791,6 +794,14 @@ void hornet_state::hornet_map(address_map &map)
map(0x7fc00000, 0x7fffffff).rom().region("user1", 0); /* Program ROM */
}
void hornet_state::hornet_lan_map(address_map &map)
{
hornet_map(map);
map(0x7d040000, 0x7d04ffff).rw("gn676_lan", FUNC(konami_gn676_lan_device::lanc1_r), FUNC(konami_gn676_lan_device::lanc1_w));
map(0x7d050000, 0x7d05ffff).rw("gn676_lan", FUNC(konami_gn676_lan_device::lanc2_r), FUNC(konami_gn676_lan_device::lanc2_w));
}
void hornet_state::terabrst_map(address_map &map)
{
hornet_map(map);
@ -1197,6 +1208,15 @@ void hornet_state::hornet(machine_config &config)
m_konppc->set_cbboard_type(konppc_device::CGBOARD_TYPE_HORNET);
}
void hornet_state::hornet_lan(machine_config &config)
{
hornet(config);
m_maincpu->set_addrmap(AS_PROGRAM, &hornet_state::hornet_lan_map);
KONAMI_GN676_LAN(config, "gn676_lan", 0, m_workram);
}
void hornet_state::terabrst(machine_config &config) //todo: add K056800 from I/O board
{
hornet(config);
@ -1738,7 +1758,7 @@ GAME( 1998, nbapbpa, nbapbp, hornet, nbapbp, hornet_state, init_hornet,
GAME( 1998, terabrst, 0, terabrst, terabrst, hornet_state, init_hornet, ROT0, "Konami", "Teraburst (1998/07/17 ver UEL)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1998, terabrsta, terabrst, terabrst, terabrst, hornet_state, init_hornet, ROT0, "Konami", "Teraburst (1998/02/25 ver AAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
// identifies as NWK-LC system
GAME( 1998, thrilldbu, thrilld, hornet, gradius4, hornet_state, init_hornet, ROT0, "Konami", "Thrill Drive (ver UFB)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE | MACHINE_NODEVICE_LAN ) // resets after checking wheels, needs proper analog inputs, but the reset probably isn't related
GAME( 1998, thrilldbu, thrilld, hornet_lan, hornet, hornet_state, init_hornet, ROT0, "Konami", "Thrill Drive (ver UFB)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE | MACHINE_NODEVICE_LAN ) // heavy GFX glitches, fails wheel motor test, for now it's possible to get in game by switching "SW:2" to on
// The region comes from the Timekeeper NVRAM, without a valid default all sets except 'xxD, Ver 1.33' will init their NVRAM to UAx versions, the xxD set seems to incorrectly init it to JXD, which isn't a valid
// version, and thus can't be booted. If you copy the NVRAM from another already initialized set, it will boot as UAD.

169
src/mame/drivers/nwk-tr.cpp
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@ -273,6 +273,7 @@ Thrill Drive 713A13 - 713A14 -
#include "cpu/sharc/sharc.h"
#include "machine/adc1213x.h"
#include "machine/k033906.h"
#include "machine/konami_gn676_lan.h"
#include "machine/konppc.h"
#include "machine/timekpr.h"
//#include "machine/x76f041.h"
@ -324,6 +325,10 @@ public:
void init_racingj();
void init_thrilld();
protected:
virtual void machine_start() override;
virtual void machine_reset() override;
private:
// TODO: Needs verification on real hardware
static const int m_sound_timer_usec = 2400;
@ -345,11 +350,6 @@ private:
required_shared_ptr<uint32_t> m_generic_paletteram_32;
emu_timer *m_sound_irq_timer;
int m_fpga_uploaded;
int m_lanc2_ram_r;
int m_lanc2_ram_w;
uint8_t m_lanc2_reg[3];
std::unique_ptr<uint8_t[]> m_lanc2_ram;
std::unique_ptr<uint32_t[]> m_sharc0_dataram;
std::unique_ptr<uint32_t[]> m_sharc1_dataram;
void paletteram32_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
@ -361,10 +361,6 @@ private:
void nwktr_k001604_reg_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint8_t sysreg_r(offs_t offset);
void sysreg_w(offs_t offset, uint8_t data);
uint32_t lanc1_r(offs_t offset);
void lanc1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t lanc2_r(offs_t offset, uint32_t mem_mask = ~0);
void lanc2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t dsp_dataram0_r(offs_t offset);
void dsp_dataram0_w(offs_t offset, uint32_t data);
uint32_t dsp_dataram1_r(offs_t offset);
@ -376,13 +372,10 @@ private:
double adc12138_input_callback(uint8_t input);
TIMER_CALLBACK_MEMBER(sound_irq);
virtual void machine_start() override;
virtual void machine_reset() override;
uint32_t screen_update_lscreen(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
uint32_t screen_update_rscreen(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void lanc2_init();
void nwktr_map(address_map &map);
void sharc0_map(address_map &map);
void sharc1_map(address_map &map);
@ -530,148 +523,6 @@ void nwktr_state::sysreg_w(offs_t offset, uint8_t data)
}
void nwktr_state::lanc2_init()
{
m_fpga_uploaded = 0;
m_lanc2_ram_r = 0;
m_lanc2_ram_w = 0;
m_lanc2_ram = std::make_unique<uint8_t[]>(0x8000);
}
uint32_t nwktr_state::lanc1_r(offs_t offset)
{
switch (offset)
{
case 0x40/4:
{
uint32_t r = 0;
r |= (m_fpga_uploaded) ? (1 << 6) : 0;
r |= 1 << 5;
return (r) << 24;
}
default:
{
//printf("lanc1_r: %08X, %08X at %08X\n", offset, mem_mask, m_maincpu->pc());
return 0xffffffff;
}
}
}
void nwktr_state::lanc1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
//printf("lanc1_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_maincpu->pc());
}
uint32_t nwktr_state::lanc2_r(offs_t offset, uint32_t mem_mask)
{
uint32_t r = 0;
if (offset == 0)
{
if (ACCESSING_BITS_0_7)
{
r |= m_lanc2_ram[m_lanc2_ram_r & 0x7fff];
m_lanc2_ram_r++;
}
else
{
r |= 0xffffff00;
}
}
if (offset == 4)
{
if (ACCESSING_BITS_24_31)
{
r |= 0x00000000;
}
}
//printf("lanc2_r: %08X, %08X at %08X\n", offset, mem_mask, m_maincpu->pc());
return r;
}
void nwktr_state::lanc2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (offset == 0)
{
if (ACCESSING_BITS_24_31)
{
uint8_t value = data >> 24;
value = ((value >> 7) & 0x01) |
((value >> 5) & 0x02) |
((value >> 3) & 0x04) |
((value >> 1) & 0x08) |
((value << 1) & 0x10) |
((value << 3) & 0x20) |
((value << 5) & 0x40) |
((value << 7) & 0x80);
m_fpga_uploaded = 1;
m_lanc2_reg[0] = (uint8_t)(data >> 24);
//printf("lanc2_fpga_w: %02X at %08X\n", value, m_maincpu->pc());
}
else if (ACCESSING_BITS_8_15)
{
m_lanc2_ram_r = 0;
m_lanc2_ram_w = 0;
m_lanc2_reg[1] = (uint8_t)(data >> 8);
}
else if (ACCESSING_BITS_16_23)
{
if (m_lanc2_reg[0] != 0)
{
m_lanc2_ram[2] = (data >> 20) & 0xf;
m_lanc2_ram[3] = 0;
}
m_lanc2_reg[2] = (uint8_t)(data >> 16);
}
else if (ACCESSING_BITS_0_7)
{
m_lanc2_ram[m_lanc2_ram_w & 0x7fff] = data & 0xff;
m_lanc2_ram_w++;
}
else
{
//printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_maincpu->pc());
}
}
if (offset == 4)
{
// TODO: The data below would normally be present on the serialflash at 2G.
if (strcmp(machine().system().name, "thrilld") == 0 ||
strcmp(machine().system().name, "thrilldb") == 0 ||
strcmp(machine().system().name, "thrilldbe") == 0)
{
m_work_ram[(0x3ffed0/4) + 0] = 0x472a3731; // G*71
m_work_ram[(0x3ffed0/4) + 1] = 0x33202020; // 3
m_work_ram[(0x3ffed0/4) + 2] = 0x2d2d2a2a; // --**
m_work_ram[(0x3ffed0/4) + 3] = 0x2a207878; // *
m_work_ram[(0x3fff40/4) + 0] = 0x47433731; // GC71
m_work_ram[(0x3fff40/4) + 1] = 0x33000000; // 3
m_work_ram[(0x3fff40/4) + 2] = 0x19994a41; // JA
m_work_ram[(0x3fff40/4) + 3] = 0x4100a9b1; // A
}
else if (strcmp(machine().system().name, "racingj2") == 0)
{
m_work_ram[(0x3ffc80/4) + 0] = 0x47453838; // GE88
m_work_ram[(0x3ffc80/4) + 1] = 0x38003030; // 8 00
m_work_ram[(0x3ffc80/4) + 2] = 0x39374541; // 97EA
m_work_ram[(0x3ffc80/4) + 3] = 0x410058da; // A
}
}
//printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_maincpu->pc());
}
/*****************************************************************************/
TIMER_CALLBACK_MEMBER(nwktr_state::sound_irq)
@ -729,8 +580,8 @@ void nwktr_state::nwktr_map(address_map &map)
map(0x7d010000, 0x7d01ffff).w(FUNC(nwktr_state::sysreg_w));
map(0x7d020000, 0x7d021fff).rw("m48t58", FUNC(timekeeper_device::read), FUNC(timekeeper_device::write)); // M48T58Y RTC/NVRAM
map(0x7d030000, 0x7d03000f).rw(m_k056800, FUNC(k056800_device::host_r), FUNC(k056800_device::host_w));
map(0x7d040000, 0x7d04ffff).rw(FUNC(nwktr_state::lanc1_r), FUNC(nwktr_state::lanc1_w));
map(0x7d050000, 0x7d05ffff).rw(FUNC(nwktr_state::lanc2_r), FUNC(nwktr_state::lanc2_w));
map(0x7d040000, 0x7d04ffff).rw("gn676_lan", FUNC(konami_gn676_lan_device::lanc1_r), FUNC(konami_gn676_lan_device::lanc1_w));
map(0x7d050000, 0x7d05ffff).rw("gn676_lan", FUNC(konami_gn676_lan_device::lanc2_r), FUNC(konami_gn676_lan_device::lanc2_w));
map(0x7e000000, 0x7e7fffff).rom().region("user2", 0); /* Data ROM */
map(0x7f000000, 0x7f1fffff).rom().region("user1", 0);
map(0x7fe00000, 0x7fffffff).rom().region("user1", 0); /* Program ROM */
@ -961,6 +812,8 @@ void nwktr_state::nwktr(machine_config &config)
KONPPC(config, m_konppc, 0);
m_konppc->set_num_boards(2);
m_konppc->set_cbboard_type(konppc_device::CGBOARD_TYPE_NWKTR);
KONAMI_GN676_LAN(config, "gn676_lan", 0, m_work_ram);
}
void nwktr_state::thrilld(machine_config &config)
@ -978,8 +831,6 @@ void nwktr_state::init_nwktr()
{
m_sharc0_dataram = std::make_unique<uint32_t[]>(0x100000 / 4);
m_sharc1_dataram = std::make_unique<uint32_t[]>(0x100000 / 4);
lanc2_init();
}
void nwktr_state::init_racingj()

226
src/mame/machine/konami_gn676_lan.cpp Normal file
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@ -0,0 +1,226 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde
/*
Hardware info by Guru
Network PCB (Racing Jam and Thrill Drive (NWK-LC))
-----------
GN676-PWB(H)A
MADE IN JAPAN
(C)1998 KONAMI
|------------------------|
| CY7C199 N676H1 |
| |
|CN3 |
| HYC2485S |
| XC5204 XC5210 |
|CN2 |
| CN1 |
|------------------------|
Notes:
CN1 - Connector joining to CPU board CN4
CN2/3 - RCA jacks for network cable
HYC2485S - Hybrid ceramic module for RS485
CY7C199 - 32k x8 SRAM
XC5204 - Xilinx XC5204 FPGA
XC5210 - Xilink XC5210 FPGA
N676H1 - PALCE16V8Q-15 stamped 'N676H1'
Network PCB (Racing Jam 2 and Thrill Drive (NWK-TR))
-----------
GN676-PWB(H)B
MADE IN JAPAN
(C)1998 KONAMI
|------------------------|
| CY7C199 N676H1 |
| 2G|
|CN3 |
| HYC2485S |
| XC5204 XC5210 |
|CN2 |
| CN1 |
|------------------------|
This pcb is the same as the A version but with one added chip:
2G - XICOR X76F041 Secure SerialFlash (SOIC8)
Note: This chip is also present on *some* Hornet games on the GN715 CPU board at location
30C. The chip refreshes game and region specific serial data to the Timekeeper RAM if the
region ID matches the timekeeper. Because Racing Jam 2 and Thrill Drive came in a conversion
kit for Racing Jam, the two former games will first boot with a "backup data error" because
because of the timekeeper used for the incorrect game. Pressing the test switch then sets the
timekeeper back to factory settings for the new kitted game installed. If the region ID in
serialflash and timekeeper do not match, the game boots with a "hardware error" message.
TODO:
- Add X76F041 device when dumps will be available and get rid of the work_ram hack
*/
#include "emu.h"
#include "konami_gn676_lan.h"
//#define VERBOSE (LOG_GENERAL)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(KONAMI_GN676_LAN, konami_gn676_lan_device, "konami_gn676_lan", "Konami GN676 Network PCB")
konami_gn676_lan_device::konami_gn676_lan_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, KONAMI_GN676_LAN, tag, owner, clock),
m_fpga_uploaded(false),
m_lanc2_ram_r(0),
m_lanc2_ram_w(0),
m_lanc2_ram(nullptr),
m_work_ram(*this, finder_base::DUMMY_TAG)
{
std::fill(std::begin(m_lanc2_reg), std::end(m_lanc2_reg), 0);
}
void konami_gn676_lan_device::device_start()
{
m_lanc2_ram = std::make_unique<uint8_t[]>(0x8000);
save_item(NAME(m_fpga_uploaded));
save_item(NAME(m_lanc2_ram_r));
save_item(NAME(m_lanc2_ram_w));
save_item(NAME(m_lanc2_reg));
save_pointer(NAME(m_lanc2_ram), 0x8000);
}
uint32_t konami_gn676_lan_device::lanc1_r(offs_t offset)
{
switch (offset)
{
case 0x40/4:
{
uint32_t r = 0;
r |= (m_fpga_uploaded) ? (1 << 6) : 0;
r |= 1 << 5;
return (r) << 24;
}
default:
{
LOG("lanc1_r: %08X at %08X\n", offset, machine().describe_context());
return 0xffffffff;
}
}
}
void konami_gn676_lan_device::lanc1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOG("lanc1_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, machine().describe_context());
}
uint32_t konami_gn676_lan_device::lanc2_r(offs_t offset, uint32_t mem_mask)
{
uint32_t r = 0;
if (offset == 0)
{
if (ACCESSING_BITS_0_7)
{
r |= m_lanc2_ram[m_lanc2_ram_r & 0x7fff];
m_lanc2_ram_r++;
}
else
{
r |= 0xffffff00;
}
}
if (offset == 4)
{
if (ACCESSING_BITS_24_31)
{
r |= 0x00000000;
}
}
LOG("lanc2_r: %08X, %08X at %08X\n", offset, mem_mask, machine().describe_context());
return r;
}
void konami_gn676_lan_device::lanc2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (offset == 0)
{
if (ACCESSING_BITS_24_31)
{
uint8_t value = data >> 24;
value = ((value >> 7) & 0x01) |
((value >> 5) & 0x02) |
((value >> 3) & 0x04) |
((value >> 1) & 0x08) |
((value << 1) & 0x10) |
((value << 3) & 0x20) |
((value << 5) & 0x40) |
((value << 7) & 0x80);
m_fpga_uploaded = true;
m_lanc2_reg[0] = (uint8_t)(data >> 24);
LOG("lanc2_fpga_w: %02X at %08X\n", value, machine().describe_context());
}
else if (ACCESSING_BITS_8_15)
{
m_lanc2_ram_r = 0;
m_lanc2_ram_w = 0;
m_lanc2_reg[1] = (uint8_t)(data >> 8);
}
else if (ACCESSING_BITS_16_23)
{
if (m_lanc2_reg[0] != 0)
{
m_lanc2_ram[2] = (data >> 20) & 0xf;
m_lanc2_ram[3] = 0;
}
m_lanc2_reg[2] = (uint8_t)(data >> 16);
}
else if (ACCESSING_BITS_0_7)
{
m_lanc2_ram[m_lanc2_ram_w & 0x7fff] = data & 0xff;
m_lanc2_ram_w++;
}
else
{
LOG("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, machine().describe_context());
}
}
if (offset == 4) // only type B has the chip at 2G
{
// TODO: HACK! The data below would normally be present on the serialflash at 2G.
if (strcmp(machine().system().name, "thrilld") == 0 ||
strcmp(machine().system().name, "thrilldb") == 0 ||
strcmp(machine().system().name, "thrilldbe") == 0)
{
m_work_ram[(0x3ffed0/4) + 0] = 0x472a3731; // G*71
m_work_ram[(0x3ffed0/4) + 1] = 0x33202020; // 3
m_work_ram[(0x3ffed0/4) + 2] = 0x2d2d2a2a; // --**
m_work_ram[(0x3ffed0/4) + 3] = 0x2a207878; // *
m_work_ram[(0x3fff40/4) + 0] = 0x47433731; // GC71
m_work_ram[(0x3fff40/4) + 1] = 0x33000000; // 3
m_work_ram[(0x3fff40/4) + 2] = 0x19994a41; // JA
m_work_ram[(0x3fff40/4) + 3] = 0x4100a9b1; // A
}
else if (strcmp(machine().system().name, "racingj2") == 0)
{
m_work_ram[(0x3ffc80/4) + 0] = 0x47453838; // GE88
m_work_ram[(0x3ffc80/4) + 1] = 0x38003030; // 8 00
m_work_ram[(0x3ffc80/4) + 2] = 0x39374541; // 97EA
m_work_ram[(0x3ffc80/4) + 3] = 0x410058da; // A
}
}
LOG("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, machine().describe_context());
}

42
src/mame/machine/konami_gn676_lan.h Normal file
View File

@ -0,0 +1,42 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde
#ifndef MAME_MACHINE_KONAMI_GN676_LAN_H
#define MAME_MACHINE_KONAMI_GN676_LAN_H
#pragma once
class konami_gn676_lan_device : public device_t
{
public:
template <typename T>
konami_gn676_lan_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&work_ram_tag)
: konami_gn676_lan_device(mconfig, tag, owner, clock)
{
m_work_ram.set_tag(std::forward<T>(work_ram_tag));
}
konami_gn676_lan_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
uint32_t lanc1_r(offs_t offset);
void lanc1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t lanc2_r(offs_t offset, uint32_t mem_mask = ~0);
void lanc2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
protected:
virtual void device_start() override;
private:
bool m_fpga_uploaded;
int m_lanc2_ram_r;
int m_lanc2_ram_w;
uint8_t m_lanc2_reg[3];
std::unique_ptr<uint8_t[]> m_lanc2_ram;
required_shared_ptr<uint32_t> m_work_ram;
};
DECLARE_DEVICE_TYPE(KONAMI_GN676_LAN, konami_gn676_lan_device)
#endif // MAME_MACHINE_KONAMI_GN676_LAN_H