mirror of
https://github.com/holub/mame
synced 2025-06-27 14:49:11 +03:00
(MESS) compis: Added configuration jumpers. (nw)
This commit is contained in:
parent
3b4a3cf97d
commit
3bef04de42
@ -92,6 +92,7 @@ public:
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virtual void opt0_w(int state) { }
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virtual void opt0_w(int state) { }
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virtual void opt1_w(int state) { }
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virtual void opt1_w(int state) { }
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virtual void tdma_w(int state) { }
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virtual void tdma_w(int state) { }
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virtual void mclk_w(int state) { }
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protected:
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protected:
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isbx_slot_device *m_slot;
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isbx_slot_device *m_slot;
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@ -123,6 +124,7 @@ public:
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DECLARE_WRITE_LINE_MEMBER( opt0_w ) { if (m_card) m_card->opt0_w(state); }
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DECLARE_WRITE_LINE_MEMBER( opt0_w ) { if (m_card) m_card->opt0_w(state); }
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DECLARE_WRITE_LINE_MEMBER( opt1_w ) { if (m_card) m_card->opt1_w(state); }
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DECLARE_WRITE_LINE_MEMBER( opt1_w ) { if (m_card) m_card->opt1_w(state); }
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DECLARE_WRITE_LINE_MEMBER( tdma_w ) { if (m_card) m_card->tdma_w(state); }
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DECLARE_WRITE_LINE_MEMBER( tdma_w ) { if (m_card) m_card->tdma_w(state); }
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DECLARE_WRITE_LINE_MEMBER( mclk_w ) { if (m_card) m_card->mclk_w(state); }
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// card interface
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// card interface
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DECLARE_WRITE_LINE_MEMBER( mintr0_w ) { m_write_mintr0(state); }
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DECLARE_WRITE_LINE_MEMBER( mintr0_w ) { m_write_mintr0(state); }
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@ -42,24 +42,15 @@
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#include "includes/compis.h"
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#include "includes/compis.h"
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static UPD7220_DISPLAY_PIXELS( hgdc_display_pixels )
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{
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compis_state *state = device->machine().driver_data<compis_state>();
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UINT8 i,gfx = state->m_video_ram[address];
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for(i=0; i<8; i++)
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bitmap.pix32(y, x + i) = RGB_MONOCHROME_GREEN_HIGHLIGHT[BIT(gfx,i )];
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}
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static UPD7220_INTERFACE( hgdc_intf )
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//**************************************************************************
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{
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// READ/WRITE HANDLERS
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hgdc_display_pixels,
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//**************************************************************************
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NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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};
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//-------------------------------------------------
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// tape_mon_w -
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//-------------------------------------------------
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WRITE8_MEMBER( compis_state::tape_mon_w )
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WRITE8_MEMBER( compis_state::tape_mon_w )
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{
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{
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@ -68,6 +59,11 @@ WRITE8_MEMBER( compis_state::tape_mon_w )
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m_cassette->change_state(state, CASSETTE_MASK_MOTOR);
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m_cassette->change_state(state, CASSETTE_MASK_MOTOR);
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}
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}
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//-------------------------------------------------
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// isbx
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//-------------------------------------------------
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READ16_MEMBER( compis_state::isbx0_tdma_r )
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READ16_MEMBER( compis_state::isbx0_tdma_r )
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{
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{
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if (ACCESSING_BITS_0_7)
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if (ACCESSING_BITS_0_7)
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@ -224,12 +220,20 @@ WRITE16_MEMBER( compis_state::isbx1_dack_w )
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}
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}
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//-------------------------------------------------
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// vram_r -
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//-------------------------------------------------
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READ8_MEMBER( compis_state::vram_r )
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READ8_MEMBER( compis_state::vram_r )
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{
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{
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return m_video_ram[offset];
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return m_video_ram[offset];
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}
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}
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//-------------------------------------------------
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// vram_w -
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//-------------------------------------------------
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WRITE8_MEMBER( compis_state::vram_w )
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WRITE8_MEMBER( compis_state::vram_w )
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{
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{
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m_video_ram[offset] = data;
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m_video_ram[offset] = data;
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@ -315,19 +319,146 @@ ADDRESS_MAP_END
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//-------------------------------------------------
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//-------------------------------------------------
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static INPUT_PORTS_START( compis )
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static INPUT_PORTS_START( compis )
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PORT_START("DSW0")
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PORT_START("S1")
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PORT_DIPNAME( 0x18, 0x00, "S8 Test mode")
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PORT_CONFNAME( 0x01, 0x00, "S1 ROM Type")
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PORT_DIPSETTING( 0x00, DEF_STR( Normal ) )
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PORT_CONFSETTING( 0x00, "27128" )
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PORT_DIPSETTING( 0x08, "Remote" )
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PORT_CONFSETTING( 0x01, "27256" )
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PORT_DIPSETTING( 0x10, "Stand alone" )
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PORT_DIPSETTING( 0x18, "Reserved" )
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PORT_START("S2")
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PORT_CONFNAME( 0x01, 0x00, "S2 IC36/IC40")
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PORT_CONFSETTING( 0x00, "ROM" )
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PORT_CONFSETTING( 0x01, "RAM" )
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PORT_START("S3")
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PORT_CONFNAME( 0x03, 0x00, "S3 J4 RxC")
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PORT_CONFSETTING( 0x00, "DCE" )
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PORT_CONFSETTING( 0x01, "Tmr3" )
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PORT_CONFSETTING( 0x02, "Tmr4" )
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PORT_START("S4")
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PORT_CONFNAME( 0x01, 0x01, "S4 iSBX0 Bus Width")
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PORT_CONFSETTING( 0x00, "8 Bit" )
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PORT_CONFSETTING( 0x01, "16 Bit" )
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PORT_START("S5")
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PORT_CONFNAME( 0x01, 0x01, "S5 iSBX1 Bus Width")
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PORT_CONFSETTING( 0x00, "8 Bit" )
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PORT_CONFSETTING( 0x01, "16 Bit" )
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PORT_START("S6")
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PORT_CONFNAME( 0x001, 0x001, "S6 INT 8274")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x001, DEF_STR( On ) )
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PORT_CONFNAME( 0x002, 0x000, "S6 TxRDY 8251")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x002, DEF_STR( On ) )
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PORT_CONFNAME( 0x004, 0x000, "S6 INT KB")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x004, DEF_STR( On ) )
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PORT_CONFNAME( 0x008, 0x008, "S6 DELAY 80150")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x008, DEF_STR( On ) )
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PORT_CONFNAME( 0x010, 0x000, "S6 INT0 iSBX1 (J9)")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x010, DEF_STR( On ) )
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PORT_CONFNAME( 0x020, 0x000, "S6 INT1 iSBX1 (J9)")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x020, DEF_STR( On ) )
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PORT_CONFNAME( 0x040, 0x040, "S6 ACK J7")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x040, DEF_STR( On ) )
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PORT_CONFNAME( 0x080, 0x000, "S6 SYSTICK 80150")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x080, DEF_STR( On ) )
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PORT_CONFNAME( 0x100, 0x100, "S6 RxRDY 8251")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x100, DEF_STR( On ) )
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PORT_CONFNAME( 0x200, 0x000, "S6 INT0 iSBX0 (J8)")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x200, DEF_STR( On ) )
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PORT_CONFNAME( 0x400, 0x400, "S6 INT1 iSBX0 (J8)")
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PORT_CONFSETTING( 0x000, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x400, DEF_STR( On ) )
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PORT_START("S7")
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PORT_CONFNAME( 0x01, 0x00, "S7 ROM Type")
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PORT_CONFSETTING( 0x00, "27128" )
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PORT_CONFSETTING( 0x01, "27256" )
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PORT_START("S8")
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PORT_CONFNAME( 0x18, 0x00, "S8 Test Mode")
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x08, "Remote Test" )
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PORT_CONFSETTING( 0x10, "Standalone Test" )
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PORT_CONFSETTING( 0x18, "Reserved" )
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PORT_START("S9")
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PORT_CONFNAME( 0x03, 0x00, "S9 8274 TxCB")
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PORT_CONFSETTING( 0x00, "DCE-Rxc (J4-11)" )
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PORT_CONFSETTING( 0x01, "DCE-Txc (J4-13)" )
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PORT_CONFSETTING( 0x02, "Tmr3" )
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PORT_START("S10")
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PORT_CONFNAME( 0x01, 0x01, "S10 8274 RxCA")
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PORT_CONFSETTING( 0x00, "DCE (J2-11)" )
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PORT_CONFSETTING( 0x01, "Tmr5" )
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PORT_START("S11")
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PORT_CONFNAME( 0x03, 0x01, "S11 8274 TxCA")
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, "DCE (J2-13)" )
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PORT_CONFSETTING( 0x02, "Tmr5" )
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PORT_START("S12")
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PORT_CONFNAME( 0x01, 0x01, "S12 8274 TxDA")
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, "V24 (J2)" )
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PORT_START("S13")
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PORT_CONFNAME( 0x01, 0x01, "S13 8274 RxDA")
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, "V24 (J2)" )
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PORT_START("S14")
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PORT_CONFNAME( 0x01, 0x01, "S14 8274 TxCA")
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, DEF_STR( On ) )
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PORT_START("S15")
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PORT_CONFNAME( 0x01, 0x00, "S15 Network")
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PORT_CONFSETTING( 0x00, "Server" )
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PORT_CONFSETTING( 0x01, "Client" )
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INPUT_PORTS_END
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INPUT_PORTS_END
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//**************************************************************************
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//**************************************************************************
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// DEVICE CONFIGURATION
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// DEVICE CONFIGURATION
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//**************************************************************************
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//**************************************************************************
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//-------------------------------------------------
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// UPD7220_INTERFACE( hgdc_intf )
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//-------------------------------------------------
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static UPD7220_DISPLAY_PIXELS( hgdc_display_pixels )
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{
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compis_state *state = device->machine().driver_data<compis_state>();
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UINT8 i,gfx = state->m_video_ram[address];
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for(i=0; i<8; i++)
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bitmap.pix32(y, x + i) = RGB_MONOCHROME_GREEN_HIGHLIGHT[BIT(gfx, i)];
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}
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static UPD7220_INTERFACE( hgdc_intf )
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{
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hgdc_display_pixels,
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NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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};
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//-------------------------------------------------
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//-------------------------------------------------
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// I80186_INTERFACE( cpu_intf )
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// I80186_INTERFACE( cpu_intf )
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//-------------------------------------------------
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//-------------------------------------------------
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@ -342,6 +473,16 @@ WRITE_LINE_MEMBER( compis_state::tmr0_w )
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m_tmr0 = state;
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m_tmr0 = state;
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m_cassette->output(m_tmr0 ? -1 : 1);
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m_cassette->output(m_tmr0 ? -1 : 1);
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m_maincpu->tmrin0_w(state);
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}
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WRITE_LINE_MEMBER( compis_state::tmr1_w )
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{
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m_isbx0->mclk_w(state);
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m_isbx1->mclk_w(state);
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m_maincpu->tmrin1_w(state);
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}
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}
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@ -436,7 +577,7 @@ READ8_MEMBER( compis_state::ppi_pb_r )
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UINT8 data = 0;
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UINT8 data = 0;
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/* DIP switch - Test mode */
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/* DIP switch - Test mode */
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data = ioport("DSW0")->read();
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data = m_s8->read();
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// cassette
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// cassette
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data |= (m_cassette->input() > 0.0) << 2;
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data |= (m_cassette->input() > 0.0) << 2;
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@ -623,6 +764,7 @@ static MACHINE_CONFIG_START( compis, compis_state )
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MCFG_CPU_IO_MAP(compis_io)
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MCFG_CPU_IO_MAP(compis_io)
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MCFG_80186_IRQ_SLAVE_ACK(DEVREAD8(DEVICE_SELF, compis_state, compis_irq_callback))
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MCFG_80186_IRQ_SLAVE_ACK(DEVREAD8(DEVICE_SELF, compis_state, compis_irq_callback))
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MCFG_80186_TMROUT0_HANDLER(DEVWRITELINE(DEVICE_SELF, compis_state, tmr0_w))
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MCFG_80186_TMROUT0_HANDLER(DEVWRITELINE(DEVICE_SELF, compis_state, tmr0_w))
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MCFG_80186_TMROUT1_HANDLER(DEVWRITELINE(DEVICE_SELF, compis_state, tmr1_w))
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// video hardware
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// video hardware
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MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
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MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
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@ -65,7 +65,8 @@ public:
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m_isbx0(*this, ISBX_0_TAG),
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m_isbx0(*this, ISBX_0_TAG),
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m_isbx1(*this, ISBX_1_TAG),
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m_isbx1(*this, ISBX_1_TAG),
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m_ram(*this, RAM_TAG),
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m_ram(*this, RAM_TAG),
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m_video_ram(*this, "video_ram")
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m_video_ram(*this, "video_ram"),
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m_s8(*this, "S8")
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{ }
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{ }
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required_device<i80186_cpu_device> m_maincpu;
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required_device<i80186_cpu_device> m_maincpu;
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required_device<isbx_slot_device> m_isbx1;
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required_device<isbx_slot_device> m_isbx1;
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required_device<ram_device> m_ram;
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required_device<ram_device> m_ram;
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required_shared_ptr<UINT8> m_video_ram;
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required_shared_ptr<UINT8> m_video_ram;
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required_ioport m_s8;
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virtual void machine_start();
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virtual void machine_start();
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virtual void machine_reset();
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virtual void machine_reset();
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@ -109,8 +111,8 @@ public:
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DECLARE_WRITE8_MEMBER( ppi_pc_w );
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DECLARE_WRITE8_MEMBER( ppi_pc_w );
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DECLARE_WRITE_LINE_MEMBER( tmr0_w );
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DECLARE_WRITE_LINE_MEMBER( tmr0_w );
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DECLARE_WRITE_LINE_MEMBER( tmr1_w );
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DECLARE_WRITE_LINE_MEMBER( tmr2_w );
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DECLARE_WRITE_LINE_MEMBER( tmr2_w );
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DECLARE_WRITE_LINE_MEMBER( tmr3_w );
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DECLARE_WRITE_LINE_MEMBER( tmr3_w );
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DECLARE_WRITE_LINE_MEMBER( tmr4_w );
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DECLARE_WRITE_LINE_MEMBER( tmr4_w );
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DECLARE_WRITE_LINE_MEMBER( tmr5_w );
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DECLARE_WRITE_LINE_MEMBER( tmr5_w );
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@ -54,8 +54,8 @@ const rom_entry *compis_keyboard_device::device_rom_region() const
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static ADDRESS_MAP_START( compis_keyboard_io, AS_IO, 8, compis_keyboard_device )
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static ADDRESS_MAP_START( compis_keyboard_io, AS_IO, 8, compis_keyboard_device )
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AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
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AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
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AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(p1_r)
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AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(p1_r) AM_WRITENOP
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AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(p2_r)
|
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(p2_r) AM_WRITENOP
|
||||||
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_NOP
|
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_NOP
|
||||||
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_NOP
|
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_NOP
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
Loading…
Reference in New Issue
Block a user