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https://github.com/holub/mame
synced 2025-07-05 09:57:47 +03:00
ncd88k: add mcx variant and video output
This commit is contained in:
Patrick Mackinlay
parent
93586b85c4
commit
3c33d9c161
@ -5,10 +5,32 @@
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Skeleton driver for MC88100-based NCD X terminals.
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****************************************************************************/
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/*
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* WIP notes
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*
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* 88k "base" (19c, 19g, 17cr, 19cp)
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* - https://web-docs.gsi.de/~kraemer/COLLECTION/ftp.ncd.com/pub/ncd/Archive/NCD-Articles/NCD_X_Terminals/Memory_specs/NCD_88k_family_memory_specs
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*
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* MCX
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* - 2MB code and 4MB data memory on motherboard
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* - J10 SIMM slot for code, J11/J12 for data
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* - Code memory can be added as 256Kx32, 512Kx32, 1Mx32, 2Mx32, 4Mx32,
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* or 8Mx32 SIMMs. Data memory can be added as 1Mx32, 2Mx32, 4Mx32,
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* or 8Mx32 SIMMs.
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* - 256Kx32 and 512Kx32 SIMMs are only supported as code memory
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*
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*/
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#include "emu.h"
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#include "cpu/m88000/m88000.h"
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#include "machine/mc68681.h"
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#include "machine/am79c90.h"
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#include "machine/eepromser.h"
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#include "bus/rs232/rs232.h"
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#include "video/bt45x.h"
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#include "video/bt47x.h"
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#include "screen.h"
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class ncd88k_state : public driver_device
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@ -18,6 +40,8 @@ public:
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_screen(*this, "screen")
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, m_ramdac(*this, "ramdac")
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, m_vram(*this, "vram")
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{
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}
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@ -31,27 +55,50 @@ private:
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required_device<cpu_device> m_maincpu;
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required_device<screen_device> m_screen;
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required_device<bt458_device> m_ramdac;
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required_shared_ptr<u32> m_vram;
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};
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u32 ncd88k_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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u32 *pixel_pointer = m_vram;
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for (int y = screen.visible_area().min_y; y <= screen.visible_area().max_y; y++)
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{
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for (int x = screen.visible_area().min_x; x <= screen.visible_area().max_x; x += 4)
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{
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u32 const pixel_data = *pixel_pointer++;
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bitmap.pix(y, x + 0) = m_ramdac->pen_color(u8(pixel_data >> 24));
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bitmap.pix(y, x + 1) = m_ramdac->pen_color(u8(pixel_data >> 16));
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bitmap.pix(y, x + 2) = m_ramdac->pen_color(u8(pixel_data >> 8));
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bitmap.pix(y, x + 3) = m_ramdac->pen_color(u8(pixel_data >> 0));
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}
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// compensate by 2048 - 1280 pixels per line
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pixel_pointer += 0xc0;
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}
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return 0;
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}
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void ncd88k_state::code_map(address_map &map)
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{
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map(0x00000000, 0x0001cfff).rom().region("program", 0);
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map(0x04000000, 0x07ffffff).ram().share("mainram");
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map(0x04000000, 0x07ffffff).ram().share("coderam");
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}
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void ncd88k_state::data_map(address_map &map)
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{
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map(0x00000000, 0x0001cfff).rom().region("program", 0);
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map(0x01000000, 0x0100003f).rw("duart", FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask32(0xff000000);
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map(0x01400000, 0x01400007).nopw(); // RAMDAC?
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map(0x04000000, 0x07ffffff).ram().share("mainram");
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map(0x08000000, 0x0803ffff).ram();
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map(0x0e000000, 0x0e1fffff).ram();
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map(0x01400000, 0x0140001f).m(m_ramdac, FUNC(bt458_device::map)).umask32(0xff000000);
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map(0x04000000, 0x07ffffff).ram().share("coderam");
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map(0x08000000, 0x0d03ffff).ram().share("dataram");
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map(0x0e000000, 0x0e1fffff).ram().share("vram");
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}
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static INPUT_PORTS_START(ncd19c)
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@ -65,6 +112,8 @@ void ncd88k_state::ncd19c(machine_config &config)
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SCN2681(config, "duart", 3'686'400);
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BT458(config, m_ramdac, 0);
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SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
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m_screen->set_raw(125'000'000, 1680, 0, 1280, 1063, 0, 1024); // 74.4 kHz horizontal, 70 Hz vertical
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m_screen->set_screen_update(FUNC(ncd88k_state::screen_update));
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@ -77,4 +126,115 @@ ROM_START(ncd19c)
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ROM_LOAD16_BYTE("ncd19c-o.rom", 0x0001, 0xb000, CRC(dfd9be7c) SHA1(2e99a325b039f8c3bb89833cd1940e6737b64d79) BAD_DUMP)
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ROM_END
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COMP(1990, ncd19c, 0, 0, ncd19c, ncd19c, ncd88k_state, empty_init, "Network Computing Devices", "NCD19c", MACHINE_IS_SKELETON)
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class ncdmcx_state : public driver_device
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{
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public:
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ncdmcx_state(machine_config const &mconfig, device_type type, char const *tag)
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: driver_device(mconfig, type, tag)
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, m_cpu(*this, "cpu")
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, m_eeprom(*this, "eeprom")
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, m_lance(*this, "lance")
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, m_duart(*this, "duart")
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, m_ramdac(*this, "ramdac")
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, m_screen(*this, "screen")
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, m_vram(*this, "vram")
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{
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}
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void ncdmcx(machine_config &config);
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private:
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u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect);
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void code_map(address_map &map);
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void data_map(address_map &map);
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required_device<cpu_device> m_cpu;
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required_device<eeprom_serial_93cxx_device> m_eeprom;
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required_device<am79c90_device> m_lance;
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required_device<scn2681_device> m_duart;
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required_device<bt477_device> m_ramdac;
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required_device<screen_device> m_screen;
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required_shared_ptr<u32> m_vram;
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};
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u32 ncdmcx_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect)
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{
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u32 *pixel_pointer = m_vram;
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for (int y = screen.visible_area().min_y; y <= screen.visible_area().max_y; y++)
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{
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for (int x = screen.visible_area().min_x; x <= screen.visible_area().max_x; x += 4)
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{
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u32 const pixel_data = *pixel_pointer++;
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bitmap.pix(y, x + 0) = m_ramdac->pen_color(u8(pixel_data >> 24));
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bitmap.pix(y, x + 1) = m_ramdac->pen_color(u8(pixel_data >> 16));
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bitmap.pix(y, x + 2) = m_ramdac->pen_color(u8(pixel_data >> 8));
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bitmap.pix(y, x + 3) = m_ramdac->pen_color(u8(pixel_data >> 0));
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}
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// compensate by 2048 - 1280 pixels per line
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pixel_pointer += 0xc0;
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}
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return 0;
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}
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void ncdmcx_state::ncdmcx(machine_config &config)
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{
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MC88100(config, m_cpu, 80_MHz_XTAL / 4);
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m_cpu->set_addrmap(AS_PROGRAM, &ncdmcx_state::code_map);
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m_cpu->set_addrmap(AS_DATA, &ncdmcx_state::data_map);
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// CAT35C104P 256x16 or 512x8 4K-Bit SERIAL E2PROM
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EEPROM_93C66_8BIT(config, m_eeprom);
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// ICD2061ASC-1
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// 4100004
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AM79C90(config, m_lance, 20_MHz_XTAL);
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SCN2681(config, m_duart, 3'686'400);
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// ATT20C497-11
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BT477(config, m_ramdac, 125'000'000);
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SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
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m_screen->set_raw(125'000'000, 1680, 0, 1280, 1063, 0, 1024); // 74.4 kHz horizontal, 70 Hz vertical
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m_screen->set_screen_update(FUNC(ncdmcx_state::screen_update));
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}
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void ncdmcx_state::code_map(address_map &map)
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{
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map(0x00000000, 0x0003ffff).rom().region("program", 0);
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map(0x04000000, 0x07ffffff).ram().share("coderam");
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}
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void ncdmcx_state::data_map(address_map &map)
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{
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map(0x00000000, 0x0003ffff).rom().region("program", 0);
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map(0x01000000, 0x0100003f).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask32(0xff000000);
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map(0x01400000, 0x0140001f).m(m_ramdac, FUNC(bt477_device::map)).umask32(0xff000000);
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// bit 0 -> icd2061a clock
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// bit 1 -> icd2016a data
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map(0x01580000, 0x01580003).nopw();
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map(0x04000000, 0x07ffffff).ram().share("coderam"); // maximum 64M
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map(0x08000000, 0x0dffffff).ram().share("dataram"); // maximum 96M
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map(0x0e000000, 0x0e3fffff).ram().share("vram");
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}
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ROM_START(ncdmcx)
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ROM_REGION32_BE(0x40000, "program", 0)
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ROM_LOAD16_BYTE("ncd88k_mcx_bm.u3", 0x0000, 0x20000, CRC(70305680) SHA1(b10b250fe319e823cff28ba7b449b0a40755f5a2))
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ROM_LOAD16_BYTE("ncd88k_mcx_bm.u14", 0x0001, 0x20000, CRC(fc066464) SHA1(fa894de56b77bd4bc619040a2cf3a0d260914727))
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ROM_END
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COMP(1990, ncd19c, 0, 0, ncd19c, ncd19c, ncd88k_state, empty_init, "Network Computing Devices", "19c", MACHINE_IS_SKELETON)
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COMP(1990, ncdmcx, 0, 0, ncdmcx, 0, ncdmcx_state, empty_init, "Network Computing Devices", "MCX", MACHINE_IS_SKELETON)
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