mirror of
https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
made gte a separate class.
This commit is contained in:
smf-
parent
ad7eaf9cce
commit
3c81107df2
@ -9,20 +9,19 @@
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#include "emu.h"
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#include "gte.h"
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#include "psx.h"
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#if 0
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void ATTR_PRINTF(1,2) GTELOG(const char *a,...)
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void ATTR_PRINTF(2,3) GTELOG( UINT32 pc, const char *a,...)
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{
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va_list va;
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char s_text[ 1024 ];
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va_start( va, a );
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vsprintf( s_text, a, va );
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va_end( va );
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logerror( "%08x: GTE: %08x %s\n", m_pc, INS_COFUN( m_op ), s_text );
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logerror( "%08x: GTE: %s\n", pc, s_text );
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}
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#else
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INLINE void ATTR_PRINTF(1,2) GTELOG(const char *a, ...) {}
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INLINE void ATTR_PRINTF(2,3) GTELOG( UINT32 pc, const char *a, ...) {}
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#endif
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@ -150,7 +149,7 @@ INLINE void ATTR_PRINTF(1,2) GTELOG(const char *a, ...) {}
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#define ZSF4 ( m_cp2cr[ 30 ].sw.l )
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#define FLAG ( m_cp2cr[ 31 ].d )
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INT32 psxcpu_device::LIM( INT32 value, INT32 max, INT32 min, UINT32 flag )
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INT32 gte::LIM( INT32 value, INT32 max, INT32 min, UINT32 flag )
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{
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if( value > max )
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{
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@ -165,7 +164,7 @@ INT32 psxcpu_device::LIM( INT32 value, INT32 max, INT32 min, UINT32 flag )
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return value;
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}
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UINT32 psxcpu_device::getcp2dr( int reg )
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UINT32 gte::getcp2dr( UINT32 pc, int reg )
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{
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switch( reg )
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{
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@ -197,13 +196,13 @@ UINT32 psxcpu_device::getcp2dr( int reg )
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break;
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}
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GTELOG( "get CP2DR%u=%08x", reg, m_cp2dr[ reg ].d );
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GTELOG( pc, "get CP2DR%u=%08x", reg, m_cp2dr[ reg ].d );
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return m_cp2dr[ reg ].d;
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}
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void psxcpu_device::setcp2dr( int reg, UINT32 value )
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void gte::setcp2dr( UINT32 pc, int reg, UINT32 value )
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{
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GTELOG( "set CP2DR%u=%08x", reg, value );
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GTELOG( pc, "set CP2DR%u=%08x", reg, value );
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switch( reg )
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{
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@ -245,16 +244,16 @@ void psxcpu_device::setcp2dr( int reg, UINT32 value )
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m_cp2dr[ reg ].d = value;
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}
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UINT32 psxcpu_device::getcp2cr( int reg )
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UINT32 gte::getcp2cr( UINT32 pc, int reg )
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{
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GTELOG( "get CP2CR%u=%08x", reg, m_cp2cr[ reg ].d );
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GTELOG( pc, "get CP2CR%u=%08x", reg, m_cp2cr[ reg ].d );
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return m_cp2cr[ reg ].d;
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}
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void psxcpu_device::setcp2cr( int reg, UINT32 value )
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void gte::setcp2cr( UINT32 pc, int reg, UINT32 value )
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{
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GTELOG( "set CP2CR%u=%08x", reg, value );
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GTELOG( pc, "set CP2CR%u=%08x", reg, value );
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switch( reg )
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{
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@ -280,7 +279,7 @@ void psxcpu_device::setcp2cr( int reg, UINT32 value )
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m_cp2cr[ reg ].d = value;
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}
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INT64 psxcpu_device::BOUNDS( INT64 n_value, INT64 n_max, int n_maxflag, INT64 n_min, int n_minflag )
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INT64 gte::BOUNDS( INT64 n_value, INT64 n_max, int n_maxflag, INT64 n_min, int n_minflag )
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{
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if( n_value > n_max )
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{
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@ -2379,7 +2378,7 @@ INLINE UINT32 gte_divide( INT16 numerator, UINT16 denominator )
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#define Lm_C3( a ) LIM( ( a ), 0x00ff, 0x0000, ( 1 << 19 ) )
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#define Lm_D( a ) LIM( ( a ), 0xffff, 0x0000, ( 1 << 31 ) | ( 1 << 18 ) )
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UINT32 psxcpu_device::Lm_E( UINT32 result )
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UINT32 gte::Lm_E( UINT32 result )
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{
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if( result > 0x1ffff )
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{
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@ -2395,7 +2394,7 @@ UINT32 psxcpu_device::Lm_E( UINT32 result )
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#define Lm_G2( a ) LIM( ( a ), 0x3ff, -0x400, ( 1 << 31 ) | ( 1 << 13 ) )
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#define Lm_H( a ) LIM( ( a ), 0xfff, 0x000, ( 1 << 12 ) )
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void psxcpu_device::docop2( int gteop )
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int gte::docop2( UINT32 pc, int gteop )
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{
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int shift;
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int v;
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@ -2410,7 +2409,7 @@ void psxcpu_device::docop2( int gteop )
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case 0x01:
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if( gteop == 0x0180001 )
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{
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GTELOG( "RTPS" );
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GTELOG( pc, "%08x RTPS", gteop );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64) TRX << 12 ) + ( R11 * VX0 ) + ( R12 * VY0 ) + ( R13 * VZ0 ) ) >> 12 );
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@ -2430,19 +2429,19 @@ void psxcpu_device::docop2( int gteop )
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SY2 = Lm_G2( F( (INT64) OFY + ( (INT64) IR2 * h_over_sz3 ) ) >> 16 );
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MAC0 = F( (INT64) DQB + ( (INT64) DQA * h_over_sz3 ) );
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IR0 = Lm_H( MAC0 >> 12 );
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return;
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return 1;
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}
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break;
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case 0x06:
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GTELOG( "NCLIP" );
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GTELOG( pc, "%08x NCLIP", gteop );
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FLAG = 0;
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MAC0 = F( (INT64)( SX0 * SY1 ) + ( SX1 * SY2 ) + ( SX2 * SY0 ) - ( SX0 * SY2 ) - ( SX1 * SY0 ) - ( SX2 * SY1 ) );
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return;
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return 1;
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case 0x0c:
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GTELOG( "OP" );
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GTELOG( pc, "%08x OP", gteop );
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FLAG = 0;
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shift = 12 * GTE_SF( gteop );
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@ -2454,10 +2453,10 @@ void psxcpu_device::docop2( int gteop )
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IR1 = Lm_B1( MAC1, lm );
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IR2 = Lm_B2( MAC2, lm );
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IR3 = Lm_B3( MAC3, lm );
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return;
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return 1;
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case 0x10:
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GTELOG( "DPCS" );
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GTELOG( pc, "%08x DPCS", gteop );
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FLAG = 0;
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shift = 12 * GTE_SF( gteop );
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@ -2475,10 +2474,10 @@ void psxcpu_device::docop2( int gteop )
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R2 = Lm_C1( MAC1 >> 4 );
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G2 = Lm_C2( MAC2 >> 4 );
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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case 0x11:
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GTELOG( "INTPL" );
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GTELOG( pc, "%08x INTPL", gteop );
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FLAG = 0;
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shift = 12 * GTE_SF( gteop );
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@ -2496,12 +2495,12 @@ void psxcpu_device::docop2( int gteop )
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R2 = Lm_C1( MAC1 >> 4 );
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G2 = Lm_C2( MAC2 >> 4 );
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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case 0x12:
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if( GTE_OP( gteop ) == 0x04 )
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{
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GTELOG( "MVMVA" );
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GTELOG( pc, "%08x MVMVA", gteop );
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shift = 12 * GTE_SF( gteop );
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mx = GTE_MX( gteop );
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v = GTE_V( gteop );
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@ -2517,13 +2516,13 @@ void psxcpu_device::docop2( int gteop )
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IR1 = Lm_B1( MAC1, lm );
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IR2 = Lm_B2( MAC2, lm );
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IR3 = Lm_B3( MAC3, lm );
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return;
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return 1;
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}
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break;
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case 0x13:
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if( gteop == 0x0e80413 )
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{
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GTELOG( "NCDS" );
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GTELOG( pc, "%08x NCDS", gteop );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64) L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) ) >> 12 );
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@ -2556,13 +2555,13 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x14:
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if( gteop == 0x1280414 )
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{
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GTELOG( "CDP" );
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GTELOG( pc, "%08x CDP", gteop );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) ) >> 12 );
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@ -2589,13 +2588,13 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x16:
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if( gteop == 0x0f80416 )
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{
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GTELOG( "NCDT" );
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GTELOG( pc, "%08x NCDT", gteop );
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FLAG = 0;
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for( v = 0; v < 3; v++ )
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@ -2631,13 +2630,13 @@ void psxcpu_device::docop2( int gteop )
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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}
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return;
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return 1;
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}
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break;
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case 0x1b:
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if( gteop == 0x108041b || gteop == 0x118041b )
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{
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GTELOG( "NCCS" );
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GTELOG( pc, "%08x NCCS", gteop );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64) L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) ) >> 12 );
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@ -2670,13 +2669,13 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x1c:
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if( gteop == 0x138041c )
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{
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GTELOG( "CC" );
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GTELOG( pc, "%08x CC", gteop );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) ) >> 12 );
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@ -2703,13 +2702,13 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x1e:
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if( gteop == 0x0c8041e )
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{
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GTELOG( "NCS" );
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GTELOG( pc, "%08x NCS", gteop );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64) L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) ) >> 12 );
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@ -2736,13 +2735,13 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x20:
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if( gteop == 0x0d80420 )
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{
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GTELOG( "NCT" );
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GTELOG( pc, "%08x NCT", gteop );
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FLAG = 0;
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for( v = 0; v < 3; v++ )
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@ -2772,12 +2771,12 @@ void psxcpu_device::docop2( int gteop )
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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}
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return;
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return 1;
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}
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break;
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case 0x28:
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GTELOG( "SQR" );
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GTELOG( pc, "%08x SQR", gteop );
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FLAG = 0;
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shift = 12 * GTE_SF( gteop );
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@ -2789,13 +2788,13 @@ void psxcpu_device::docop2( int gteop )
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IR1 = Lm_B1( MAC1, lm );
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IR2 = Lm_B2( MAC2, lm );
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IR3 = Lm_B3( MAC3, lm );
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return;
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return 1;
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// DCPL 0x29
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case 0x2a:
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if( gteop == 0x0f8002a )
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{
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GTELOG( "DPCT" );
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GTELOG( pc, "%08x DPCT", gteop );
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FLAG = 0;
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for( v = 0; v < 3; v++ )
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@ -2819,34 +2818,34 @@ void psxcpu_device::docop2( int gteop )
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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}
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return;
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return 1;
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}
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break;
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case 0x2d:
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GTELOG( "AVSZ3" );
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GTELOG( pc, "%08x AVSZ3", gteop );
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FLAG = 0;
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mac0 = F( (INT64) ( ZSF3 * SZ1 ) + ( ZSF3 * SZ2 ) + ( ZSF3 * SZ3 ) );
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OTZ = Lm_D( mac0 >> 12 );
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MAC0 = mac0;
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return;
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return 1;
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case 0x2e:
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GTELOG( "AVSZ4" );
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GTELOG( pc, "%08x AVSZ4", gteop );
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FLAG = 0;
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mac0 = F( (INT64) ( ZSF4 * SZ0 ) + ( ZSF4 * SZ1 ) + ( ZSF4 * SZ2 ) + ( ZSF4 * SZ3 ) );
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OTZ = Lm_D( mac0 >> 12 );
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MAC0 = mac0;
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return;
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return 1;
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case 0x30:
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if( gteop == 0x0280030 )
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{
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GTELOG( "RTPT" );
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GTELOG( pc, "%08x RTPT", gteop );
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FLAG = 0;
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for( v = 0; v < 3; v++ )
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@ -2869,14 +2868,14 @@ void psxcpu_device::docop2( int gteop )
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MAC0 = F( (INT64) DQB + ( (INT64) DQA * h_over_sz3 ) );
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IR0 = Lm_H( MAC0 >> 12 );
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}
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return;
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return 1;
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}
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break;
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case 0x3d:
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if( GTE_OP( gteop ) == 0x09 ||
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GTE_OP( gteop ) == 0x19 )
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{
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GTELOG( "GPF" );
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GTELOG( pc, "%08x GPF", gteop );
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shift = 12 * GTE_SF( gteop );
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FLAG = 0;
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@ -2898,13 +2897,13 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x3e:
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if( GTE_OP( gteop ) == 0x1a )
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{
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GTELOG( "GPL" );
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GTELOG( pc, "%08x GPL", gteop );
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shift = 12 * GTE_SF( gteop );
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FLAG = 0;
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@ -2926,14 +2925,14 @@ void psxcpu_device::docop2( int gteop )
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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return 1;
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}
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break;
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case 0x3f:
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if( gteop == 0x108043f ||
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gteop == 0x118043f )
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{
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GTELOG( "NCCT" );
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GTELOG( pc, "%08x NCCT", gteop );
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FLAG = 0;
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for( v = 0; v < 3; v++ )
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@ -2969,11 +2968,13 @@ void psxcpu_device::docop2( int gteop )
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B1 = B2;
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B2 = Lm_C3( MAC3 >> 4 );
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}
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return;
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return 1;
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}
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break;
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}
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popmessage( "unknown GTE op %08x", gteop );
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logerror( "%08x: unknown GTE op %08x\n", m_pc, gteop );
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stop();
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logerror( "%08x: unknown GTE op %08x\n", pc, gteop );
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return 0;
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}
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@ -1,3 +1,19 @@
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/*
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* Geometry Transformation Engine
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*
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* Copyright 2003-2011 smf
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*
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* divider reverse engineering by pSXAuthor.
|
||||
*
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#ifndef __GTE_H__
|
||||
#define __GTE_H__
|
||||
|
||||
#define GTE_OP( op ) ( ( op >> 20 ) & 31 )
|
||||
#define GTE_SF( op ) ( ( op >> 19 ) & 1 )
|
||||
#define GTE_MX( op ) ( ( op >> 17 ) & 3 )
|
||||
@ -7,3 +23,23 @@
|
||||
#define GTE_LM( op ) ( ( op >> 10 ) & 1 )
|
||||
#define GTE_CT( op ) ( ( op >> 6 ) & 15 ) /* not used */
|
||||
#define GTE_FUNCT( op ) ( op & 63 )
|
||||
|
||||
class gte
|
||||
{
|
||||
public:
|
||||
PAIR m_cp2cr[ 32 ];
|
||||
PAIR m_cp2dr[ 32 ];
|
||||
|
||||
UINT32 getcp2dr( UINT32 pc, int reg );
|
||||
void setcp2dr( UINT32 pc, int reg, UINT32 value );
|
||||
UINT32 getcp2cr( UINT32 pc, int reg );
|
||||
void setcp2cr( UINT32 pc, int reg, UINT32 value );
|
||||
int docop2( UINT32 pc, int gteop );
|
||||
|
||||
protected:
|
||||
INT32 LIM( INT32 value, INT32 max, INT32 min, UINT32 flag );
|
||||
INT64 BOUNDS( INT64 n_value, INT64 n_max, int n_maxflag, INT64 n_min, int n_minflag );
|
||||
UINT32 Lm_E( UINT32 result );
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -1214,7 +1214,10 @@ int psxcpu_device::execute_unstoppable_instructions( int executeCop2 )
|
||||
return 0;
|
||||
}
|
||||
|
||||
docop2( INS_COFUN( m_op ) );
|
||||
if( !m_gte.docop2( m_pc, INS_COFUN( m_op ) ) )
|
||||
{
|
||||
stop();
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1612,8 +1615,8 @@ void psxcpu_device::device_start()
|
||||
save_item( NAME(m_biu) );
|
||||
save_item( NAME(m_r) );
|
||||
save_item( NAME(m_cp0r) );
|
||||
save_item( NAME(m_cp2cr) );
|
||||
save_item( NAME(m_cp2dr) );
|
||||
save_item( NAME(m_gte.m_cp2cr) );
|
||||
save_item( NAME(m_gte.m_cp2dr) );
|
||||
save_item( NAME(m_icacheTag) );
|
||||
save_item( NAME(m_icache) );
|
||||
save_item( NAME(m_dcache) );
|
||||
@ -1676,70 +1679,70 @@ void psxcpu_device::device_start()
|
||||
state_add( PSXCPU_CP0R13, "Cause", m_cp0r[ 13 ] ).callimport();
|
||||
state_add( PSXCPU_CP0R14, "EPC", m_cp0r[ 14 ] );
|
||||
state_add( PSXCPU_CP0R15, "PRId", m_cp0r[ 15 ] );
|
||||
state_add( PSXCPU_CP2DR0, "vxy0", m_cp2dr[ 0 ].d );
|
||||
state_add( PSXCPU_CP2DR1, "vz0", m_cp2dr[ 1 ].d );
|
||||
state_add( PSXCPU_CP2DR2, "vxy1", m_cp2dr[ 2 ].d );
|
||||
state_add( PSXCPU_CP2DR3, "vz1", m_cp2dr[ 3 ].d );
|
||||
state_add( PSXCPU_CP2DR4, "vxy2", m_cp2dr[ 4 ].d );
|
||||
state_add( PSXCPU_CP2DR5, "vz2", m_cp2dr[ 5 ].d );
|
||||
state_add( PSXCPU_CP2DR6, "rgb", m_cp2dr[ 6 ].d );
|
||||
state_add( PSXCPU_CP2DR7, "otz", m_cp2dr[ 7 ].d );
|
||||
state_add( PSXCPU_CP2DR8, "ir0", m_cp2dr[ 8 ].d );
|
||||
state_add( PSXCPU_CP2DR9, "ir1", m_cp2dr[ 9 ].d );
|
||||
state_add( PSXCPU_CP2DR10, "ir2", m_cp2dr[ 10 ].d );
|
||||
state_add( PSXCPU_CP2DR11, "ir3", m_cp2dr[ 11 ].d );
|
||||
state_add( PSXCPU_CP2DR12, "sxy0", m_cp2dr[ 12 ].d );
|
||||
state_add( PSXCPU_CP2DR13, "sxy1", m_cp2dr[ 13 ].d );
|
||||
state_add( PSXCPU_CP2DR14, "sxy2", m_cp2dr[ 14 ].d );
|
||||
state_add( PSXCPU_CP2DR15, "sxyp", m_cp2dr[ 15 ].d );
|
||||
state_add( PSXCPU_CP2DR16, "sz0", m_cp2dr[ 16 ].d );
|
||||
state_add( PSXCPU_CP2DR17, "sz1", m_cp2dr[ 17 ].d );
|
||||
state_add( PSXCPU_CP2DR18, "sz2", m_cp2dr[ 18 ].d );
|
||||
state_add( PSXCPU_CP2DR19, "sz3", m_cp2dr[ 19 ].d );
|
||||
state_add( PSXCPU_CP2DR20, "rgb0", m_cp2dr[ 20 ].d );
|
||||
state_add( PSXCPU_CP2DR21, "rgb1", m_cp2dr[ 21 ].d );
|
||||
state_add( PSXCPU_CP2DR22, "rgb2", m_cp2dr[ 22 ].d );
|
||||
state_add( PSXCPU_CP2DR23, "res1", m_cp2dr[ 23 ].d );
|
||||
state_add( PSXCPU_CP2DR24, "mac0", m_cp2dr[ 24 ].d );
|
||||
state_add( PSXCPU_CP2DR25, "mac1", m_cp2dr[ 25 ].d );
|
||||
state_add( PSXCPU_CP2DR26, "mac2", m_cp2dr[ 26 ].d );
|
||||
state_add( PSXCPU_CP2DR27, "mac3", m_cp2dr[ 27 ].d );
|
||||
state_add( PSXCPU_CP2DR28, "irgb", m_cp2dr[ 28 ].d );
|
||||
state_add( PSXCPU_CP2DR29, "orgb", m_cp2dr[ 29 ].d );
|
||||
state_add( PSXCPU_CP2DR30, "lzcs", m_cp2dr[ 30 ].d );
|
||||
state_add( PSXCPU_CP2DR31, "lzcr", m_cp2dr[ 31 ].d );
|
||||
state_add( PSXCPU_CP2CR0, "r11r12", m_cp2cr[ 0 ].d );
|
||||
state_add( PSXCPU_CP2CR1, "r13r21", m_cp2cr[ 1 ].d );
|
||||
state_add( PSXCPU_CP2CR2, "r22r23", m_cp2cr[ 2 ].d );
|
||||
state_add( PSXCPU_CP2CR3, "r31r32", m_cp2cr[ 3 ].d );
|
||||
state_add( PSXCPU_CP2CR4, "r33", m_cp2cr[ 4 ].d );
|
||||
state_add( PSXCPU_CP2CR5, "trx", m_cp2cr[ 5 ].d );
|
||||
state_add( PSXCPU_CP2CR6, "try", m_cp2cr[ 6 ].d );
|
||||
state_add( PSXCPU_CP2CR7, "trz", m_cp2cr[ 7 ].d );
|
||||
state_add( PSXCPU_CP2CR8, "l11l12", m_cp2cr[ 8 ].d );
|
||||
state_add( PSXCPU_CP2CR9, "l13l21", m_cp2cr[ 9 ].d );
|
||||
state_add( PSXCPU_CP2CR10, "l22l23", m_cp2cr[ 10 ].d );
|
||||
state_add( PSXCPU_CP2CR11, "l31l32", m_cp2cr[ 11 ].d );
|
||||
state_add( PSXCPU_CP2CR12, "l33", m_cp2cr[ 12 ].d );
|
||||
state_add( PSXCPU_CP2CR13, "rbk", m_cp2cr[ 13 ].d );
|
||||
state_add( PSXCPU_CP2CR14, "gbk", m_cp2cr[ 14 ].d );
|
||||
state_add( PSXCPU_CP2CR15, "bbk", m_cp2cr[ 15 ].d );
|
||||
state_add( PSXCPU_CP2CR16, "lr1lr2", m_cp2cr[ 16 ].d );
|
||||
state_add( PSXCPU_CP2CR17, "lr31g1", m_cp2cr[ 17 ].d );
|
||||
state_add( PSXCPU_CP2CR18, "lg2lg3", m_cp2cr[ 18 ].d );
|
||||
state_add( PSXCPU_CP2CR19, "lb1lb2", m_cp2cr[ 19 ].d );
|
||||
state_add( PSXCPU_CP2CR20, "lb3", m_cp2cr[ 20 ].d );
|
||||
state_add( PSXCPU_CP2CR21, "rfc", m_cp2cr[ 21 ].d );
|
||||
state_add( PSXCPU_CP2CR22, "gfc", m_cp2cr[ 22 ].d );
|
||||
state_add( PSXCPU_CP2CR23, "bfc", m_cp2cr[ 23 ].d );
|
||||
state_add( PSXCPU_CP2CR24, "ofx", m_cp2cr[ 24 ].d );
|
||||
state_add( PSXCPU_CP2CR25, "ofy", m_cp2cr[ 25 ].d );
|
||||
state_add( PSXCPU_CP2CR26, "h", m_cp2cr[ 26 ].d );
|
||||
state_add( PSXCPU_CP2CR27, "dqa", m_cp2cr[ 27 ].d );
|
||||
state_add( PSXCPU_CP2CR28, "dqb", m_cp2cr[ 28 ].d );
|
||||
state_add( PSXCPU_CP2CR29, "zsf3", m_cp2cr[ 29 ].d );
|
||||
state_add( PSXCPU_CP2CR30, "zsf4", m_cp2cr[ 30 ].d );
|
||||
state_add( PSXCPU_CP2CR31, "flag", m_cp2cr[ 31 ].d );
|
||||
state_add( PSXCPU_CP2DR0, "vxy0", m_gte.m_cp2dr[ 0 ].d );
|
||||
state_add( PSXCPU_CP2DR1, "vz0", m_gte.m_cp2dr[ 1 ].d );
|
||||
state_add( PSXCPU_CP2DR2, "vxy1", m_gte.m_cp2dr[ 2 ].d );
|
||||
state_add( PSXCPU_CP2DR3, "vz1", m_gte.m_cp2dr[ 3 ].d );
|
||||
state_add( PSXCPU_CP2DR4, "vxy2", m_gte.m_cp2dr[ 4 ].d );
|
||||
state_add( PSXCPU_CP2DR5, "vz2", m_gte.m_cp2dr[ 5 ].d );
|
||||
state_add( PSXCPU_CP2DR6, "rgb", m_gte.m_cp2dr[ 6 ].d );
|
||||
state_add( PSXCPU_CP2DR7, "otz", m_gte.m_cp2dr[ 7 ].d );
|
||||
state_add( PSXCPU_CP2DR8, "ir0", m_gte.m_cp2dr[ 8 ].d );
|
||||
state_add( PSXCPU_CP2DR9, "ir1", m_gte.m_cp2dr[ 9 ].d );
|
||||
state_add( PSXCPU_CP2DR10, "ir2", m_gte.m_cp2dr[ 10 ].d );
|
||||
state_add( PSXCPU_CP2DR11, "ir3", m_gte.m_cp2dr[ 11 ].d );
|
||||
state_add( PSXCPU_CP2DR12, "sxy0", m_gte.m_cp2dr[ 12 ].d );
|
||||
state_add( PSXCPU_CP2DR13, "sxy1", m_gte.m_cp2dr[ 13 ].d );
|
||||
state_add( PSXCPU_CP2DR14, "sxy2", m_gte.m_cp2dr[ 14 ].d );
|
||||
state_add( PSXCPU_CP2DR15, "sxyp", m_gte.m_cp2dr[ 15 ].d );
|
||||
state_add( PSXCPU_CP2DR16, "sz0", m_gte.m_cp2dr[ 16 ].d );
|
||||
state_add( PSXCPU_CP2DR17, "sz1", m_gte.m_cp2dr[ 17 ].d );
|
||||
state_add( PSXCPU_CP2DR18, "sz2", m_gte.m_cp2dr[ 18 ].d );
|
||||
state_add( PSXCPU_CP2DR19, "sz3", m_gte.m_cp2dr[ 19 ].d );
|
||||
state_add( PSXCPU_CP2DR20, "rgb0", m_gte.m_cp2dr[ 20 ].d );
|
||||
state_add( PSXCPU_CP2DR21, "rgb1", m_gte.m_cp2dr[ 21 ].d );
|
||||
state_add( PSXCPU_CP2DR22, "rgb2", m_gte.m_cp2dr[ 22 ].d );
|
||||
state_add( PSXCPU_CP2DR23, "res1", m_gte.m_cp2dr[ 23 ].d );
|
||||
state_add( PSXCPU_CP2DR24, "mac0", m_gte.m_cp2dr[ 24 ].d );
|
||||
state_add( PSXCPU_CP2DR25, "mac1", m_gte.m_cp2dr[ 25 ].d );
|
||||
state_add( PSXCPU_CP2DR26, "mac2", m_gte.m_cp2dr[ 26 ].d );
|
||||
state_add( PSXCPU_CP2DR27, "mac3", m_gte.m_cp2dr[ 27 ].d );
|
||||
state_add( PSXCPU_CP2DR28, "irgb", m_gte.m_cp2dr[ 28 ].d );
|
||||
state_add( PSXCPU_CP2DR29, "orgb", m_gte.m_cp2dr[ 29 ].d );
|
||||
state_add( PSXCPU_CP2DR30, "lzcs", m_gte.m_cp2dr[ 30 ].d );
|
||||
state_add( PSXCPU_CP2DR31, "lzcr", m_gte.m_cp2dr[ 31 ].d );
|
||||
state_add( PSXCPU_CP2CR0, "r11r12", m_gte.m_cp2cr[ 0 ].d );
|
||||
state_add( PSXCPU_CP2CR1, "r13r21", m_gte.m_cp2cr[ 1 ].d );
|
||||
state_add( PSXCPU_CP2CR2, "r22r23", m_gte.m_cp2cr[ 2 ].d );
|
||||
state_add( PSXCPU_CP2CR3, "r31r32", m_gte.m_cp2cr[ 3 ].d );
|
||||
state_add( PSXCPU_CP2CR4, "r33", m_gte.m_cp2cr[ 4 ].d );
|
||||
state_add( PSXCPU_CP2CR5, "trx", m_gte.m_cp2cr[ 5 ].d );
|
||||
state_add( PSXCPU_CP2CR6, "try", m_gte.m_cp2cr[ 6 ].d );
|
||||
state_add( PSXCPU_CP2CR7, "trz", m_gte.m_cp2cr[ 7 ].d );
|
||||
state_add( PSXCPU_CP2CR8, "l11l12", m_gte.m_cp2cr[ 8 ].d );
|
||||
state_add( PSXCPU_CP2CR9, "l13l21", m_gte.m_cp2cr[ 9 ].d );
|
||||
state_add( PSXCPU_CP2CR10, "l22l23", m_gte.m_cp2cr[ 10 ].d );
|
||||
state_add( PSXCPU_CP2CR11, "l31l32", m_gte.m_cp2cr[ 11 ].d );
|
||||
state_add( PSXCPU_CP2CR12, "l33", m_gte.m_cp2cr[ 12 ].d );
|
||||
state_add( PSXCPU_CP2CR13, "rbk", m_gte.m_cp2cr[ 13 ].d );
|
||||
state_add( PSXCPU_CP2CR14, "gbk", m_gte.m_cp2cr[ 14 ].d );
|
||||
state_add( PSXCPU_CP2CR15, "bbk", m_gte.m_cp2cr[ 15 ].d );
|
||||
state_add( PSXCPU_CP2CR16, "lr1lr2", m_gte.m_cp2cr[ 16 ].d );
|
||||
state_add( PSXCPU_CP2CR17, "lr31g1", m_gte.m_cp2cr[ 17 ].d );
|
||||
state_add( PSXCPU_CP2CR18, "lg2lg3", m_gte.m_cp2cr[ 18 ].d );
|
||||
state_add( PSXCPU_CP2CR19, "lb1lb2", m_gte.m_cp2cr[ 19 ].d );
|
||||
state_add( PSXCPU_CP2CR20, "lb3", m_gte.m_cp2cr[ 20 ].d );
|
||||
state_add( PSXCPU_CP2CR21, "rfc", m_gte.m_cp2cr[ 21 ].d );
|
||||
state_add( PSXCPU_CP2CR22, "gfc", m_gte.m_cp2cr[ 22 ].d );
|
||||
state_add( PSXCPU_CP2CR23, "bfc", m_gte.m_cp2cr[ 23 ].d );
|
||||
state_add( PSXCPU_CP2CR24, "ofx", m_gte.m_cp2cr[ 24 ].d );
|
||||
state_add( PSXCPU_CP2CR25, "ofy", m_gte.m_cp2cr[ 25 ].d );
|
||||
state_add( PSXCPU_CP2CR26, "h", m_gte.m_cp2cr[ 26 ].d );
|
||||
state_add( PSXCPU_CP2CR27, "dqa", m_gte.m_cp2cr[ 27 ].d );
|
||||
state_add( PSXCPU_CP2CR28, "dqb", m_gte.m_cp2cr[ 28 ].d );
|
||||
state_add( PSXCPU_CP2CR29, "zsf3", m_gte.m_cp2cr[ 29 ].d );
|
||||
state_add( PSXCPU_CP2CR30, "zsf4", m_gte.m_cp2cr[ 30 ].d );
|
||||
state_add( PSXCPU_CP2CR31, "flag", m_gte.m_cp2cr[ 31 ].d );
|
||||
|
||||
// set our instruction counter
|
||||
m_icountptr = &m_icount;
|
||||
@ -1914,7 +1917,7 @@ void psxcpu_device::lwc( int cop, int sr_cu )
|
||||
break;
|
||||
|
||||
case 2:
|
||||
setcp2dr( reg, data );
|
||||
m_gte.setcp2dr( m_pc, reg, data );
|
||||
break;
|
||||
|
||||
case 3:
|
||||
@ -1985,7 +1988,7 @@ void psxcpu_device::swc( int cop, int sr_cu )
|
||||
break;
|
||||
|
||||
case 2:
|
||||
data = getcp2dr( INS_RT( m_op ) );
|
||||
data = m_gte.getcp2dr( m_pc, INS_RT( m_op ) );
|
||||
break;
|
||||
|
||||
case 3:
|
||||
@ -2507,20 +2510,20 @@ void psxcpu_device::execute_run()
|
||||
switch( INS_RS( m_op ) )
|
||||
{
|
||||
case RS_MFC:
|
||||
delayed_load( INS_RT( m_op ), getcp2dr( INS_RD( m_op ) ) );
|
||||
delayed_load( INS_RT( m_op ), m_gte.getcp2dr( m_pc, INS_RD( m_op ) ) );
|
||||
break;
|
||||
|
||||
case RS_CFC:
|
||||
delayed_load( INS_RT( m_op ), getcp2cr( INS_RD( m_op ) ) );
|
||||
delayed_load( INS_RT( m_op ), m_gte.getcp2cr( m_pc, INS_RD( m_op ) ) );
|
||||
break;
|
||||
|
||||
case RS_MTC:
|
||||
setcp2dr( INS_RD( m_op ), m_r[ INS_RT( m_op ) ] );
|
||||
m_gte.setcp2dr( m_pc, INS_RD( m_op ), m_r[ INS_RT( m_op ) ] );
|
||||
advance_pc();
|
||||
break;
|
||||
|
||||
case RS_CTC:
|
||||
setcp2cr( INS_RD( m_op ), m_r[ INS_RT( m_op ) ] );
|
||||
m_gte.setcp2cr( m_pc, INS_RD( m_op ), m_r[ INS_RT( m_op ) ] );
|
||||
advance_pc();
|
||||
break;
|
||||
|
||||
@ -2542,7 +2545,11 @@ void psxcpu_device::execute_run()
|
||||
switch( INS_CO( m_op ) )
|
||||
{
|
||||
case 1:
|
||||
docop2( INS_COFUN( m_op ) );
|
||||
if( !m_gte.docop2( m_pc, INS_COFUN( m_op ) ) )
|
||||
{
|
||||
stop();
|
||||
}
|
||||
|
||||
advance_pc();
|
||||
break;
|
||||
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
#ifndef __PSXCPU_H__
|
||||
#define __PSXCPU_H__
|
||||
|
||||
#include "gte.h"
|
||||
|
||||
//**************************************************************************
|
||||
// CONSTANTS
|
||||
@ -158,8 +159,6 @@ protected:
|
||||
UINT32 m_pc;
|
||||
UINT32 m_r[ 32 ];
|
||||
UINT32 m_cp0r[ 16 ];
|
||||
PAIR m_cp2cr[ 32 ];
|
||||
PAIR m_cp2dr[ 32 ];
|
||||
UINT32 m_hi;
|
||||
UINT32 m_lo;
|
||||
|
||||
@ -256,14 +255,8 @@ protected:
|
||||
void setcp3dr( int reg, UINT32 value );
|
||||
UINT32 getcp3cr( int reg );
|
||||
void setcp3cr( int reg, UINT32 value );
|
||||
INT32 LIM( INT32 value, INT32 max, INT32 min, UINT32 flag );
|
||||
UINT32 getcp2dr( int reg );
|
||||
void setcp2dr( int reg, UINT32 value );
|
||||
UINT32 getcp2cr( int reg );
|
||||
void setcp2cr( int reg, UINT32 value );
|
||||
INT64 BOUNDS( INT64 n_value, INT64 n_max, int n_maxflag, INT64 n_min, int n_minflag );
|
||||
UINT32 Lm_E( UINT32 result );
|
||||
void docop2( int gteop );
|
||||
|
||||
gte m_gte;
|
||||
};
|
||||
|
||||
class cxd8530aq_device : public psxcpu_device
|
||||
|
||||
Loading…
Reference in New Issue
Block a user