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Memory handler normalization, part 2. Change legacy

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read/write handlers to take an address_space & instead
of an address_space *. Also update pretty much all other
functions to take a reference where appropriate.
[Aaron Giles]
This commit is contained in:
Aaron Giles 2012-09-17 08:22:16 +00:00
parent 22b4739ade
commit 3cce7e019e
728 changed files with 9469 additions and 9497 deletions
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8
src/emu/cpu/dsp56k/dsp56mem.c
View File

@ -485,20 +485,20 @@ void dsp56k_io_reset(dsp56k_core* cpustate)
READ16_HANDLER( program_r )
{
dsp56k_core* cpustate = get_safe_token(&space->device());
dsp56k_core* cpustate = get_safe_token(&space.device());
return cpustate->program_ram[offset];
}
WRITE16_HANDLER( program_w )
{
dsp56k_core* cpustate = get_safe_token(&space->device());
dsp56k_core* cpustate = get_safe_token(&space.device());
cpustate->program_ram[offset] = data;
}
/* Work */
READ16_HANDLER( peripheral_register_r )
{
dsp56k_core* cpustate = get_safe_token(&space->device());
dsp56k_core* cpustate = get_safe_token(&space.device());
// (printf) logerror("Peripheral read 0x%04x\n", O2A(offset));
switch (O2A(offset))
@ -633,7 +633,7 @@ READ16_HANDLER( peripheral_register_r )
WRITE16_HANDLER( peripheral_register_w )
{
dsp56k_core* cpustate = get_safe_token(&space->device());
dsp56k_core* cpustate = get_safe_token(&space.device());
// Its primary behavior is RAM
// COMBINE_DATA(&cpustate->peripheral_ram[offset]);

20
src/emu/cpu/g65816/g65816.c
View File

@ -585,14 +585,14 @@ Triforce pieces in Zelda 3 intro) */
static WRITE8_HANDLER( wrmpya_w )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
cpustate->wrmpya = data;
}
static WRITE8_HANDLER( wrmpyb_w )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
cpustate->wrmpyb = data;
cpustate->rdmpy = cpustate->wrmpya * cpustate->wrmpyb;
@ -601,21 +601,21 @@ static WRITE8_HANDLER( wrmpyb_w )
static WRITE8_HANDLER( wrdivl_w )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
cpustate->wrdiv = (data) | (cpustate->wrdiv & 0xff00);
}
static WRITE8_HANDLER( wrdivh_w )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
cpustate->wrdiv = (data << 8) | (cpustate->wrdiv & 0xff);
}
static WRITE8_HANDLER( wrdvdd_w )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
UINT16 quotient, remainder;
cpustate->dvdd = data;
@ -629,31 +629,31 @@ static WRITE8_HANDLER( wrdvdd_w )
static WRITE8_HANDLER( memsel_w )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
cpustate->fastROM = data & 1;
}
static READ8_HANDLER( rddivl_r )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
return cpustate->rddiv & 0xff;
}
static READ8_HANDLER( rddivh_r )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
return cpustate->rddiv >> 8;
}
static READ8_HANDLER( rdmpyl_r )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
return cpustate->rdmpy & 0xff;
}
static READ8_HANDLER( rdmpyh_r )
{
g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
return cpustate->rdmpy >> 8;
}

2
src/emu/cpu/g65816/g65816op.h
View File

@ -85,7 +85,7 @@ INLINE uint g65816i_read_8_direct(g65816i_cpu_struct *cpustate, uint address)
INLINE uint g65816i_read_8_vector(g65816i_cpu_struct *cpustate, uint address)
{
if (READ_VECTOR)
return READ_VECTOR(cpustate->program, address);
return READ_VECTOR(*cpustate->program, address);
else
return g65816i_read_8_normal(cpustate, address);
}

8
src/emu/cpu/h6280/h6280.c
View File

@ -288,7 +288,7 @@ static void set_irq_line(h6280_Regs* cpustate, int irqline, int state)
READ8_HANDLER( h6280_irq_status_r )
{
int status;
h6280_Regs *cpustate = get_safe_token(&space->device());
h6280_Regs *cpustate = get_safe_token(&space.device());
switch (offset&3)
{
@ -307,7 +307,7 @@ READ8_HANDLER( h6280_irq_status_r )
WRITE8_HANDLER( h6280_irq_status_w )
{
h6280_Regs *cpustate = get_safe_token(&space->device());
h6280_Regs *cpustate = get_safe_token(&space.device());
cpustate->io_buffer=data;
switch (offset&3)
{
@ -326,13 +326,13 @@ WRITE8_HANDLER( h6280_irq_status_w )
READ8_HANDLER( h6280_timer_r )
{
/* only returns countdown */
h6280_Regs *cpustate = get_safe_token(&space->device());
h6280_Regs *cpustate = get_safe_token(&space.device());
return ((cpustate->timer_value >> 10)&0x7F)|(cpustate->io_buffer&0x80);
}
WRITE8_HANDLER( h6280_timer_w )
{
h6280_Regs *cpustate = get_safe_token(&space->device());
h6280_Regs *cpustate = get_safe_token(&space.device());
cpustate->io_buffer=data;
switch (offset & 1) {
case 0: /* Counter preload */

28
src/emu/cpu/h83002/h8_16.c
View File

@ -536,7 +536,7 @@ static CPU_SET_INFO( h8s_2394 )
static READ16_HANDLER( h8_itu_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
@ -557,7 +557,7 @@ static READ16_HANDLER( h8_itu_r )
static WRITE16_HANDLER( h8_itu_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
@ -577,7 +577,7 @@ static WRITE16_HANDLER( h8_itu_w )
static READ16_HANDLER( h8_3007_itu_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
@ -597,7 +597,7 @@ static READ16_HANDLER( h8_3007_itu_r )
}
static WRITE16_HANDLER( h8_3007_itu_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
@ -617,7 +617,7 @@ static WRITE16_HANDLER( h8_3007_itu_w )
static READ16_HANDLER( h8_3007_itu1_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
@ -637,7 +637,7 @@ static READ16_HANDLER( h8_3007_itu1_r )
}
static WRITE16_HANDLER( h8_3007_itu1_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
@ -657,7 +657,7 @@ static WRITE16_HANDLER( h8_3007_itu1_w )
static WRITE16_HANDLER( h8s2241_per_regs_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
h8s2241_per_regs_write_16(h8, (offset << 1), data);
@ -674,7 +674,7 @@ static WRITE16_HANDLER( h8s2241_per_regs_w )
static WRITE16_HANDLER( h8s2246_per_regs_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
h8s2246_per_regs_write_16(h8, (offset << 1), data);
@ -691,7 +691,7 @@ static WRITE16_HANDLER( h8s2246_per_regs_w )
static WRITE16_HANDLER( h8s2323_per_regs_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
h8s2323_per_regs_write_16(h8, (offset << 1), data);
@ -708,7 +708,7 @@ static WRITE16_HANDLER( h8s2323_per_regs_w )
static WRITE16_HANDLER( h8s2394_per_regs_w )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
h8s2394_per_regs_write_16(h8, (offset << 1), data);
@ -725,7 +725,7 @@ static WRITE16_HANDLER( h8s2394_per_regs_w )
static READ16_HANDLER( h8s2241_per_regs_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
return h8s2241_per_regs_read_16(h8, (offset << 1));
@ -743,7 +743,7 @@ static READ16_HANDLER( h8s2241_per_regs_r )
static READ16_HANDLER( h8s2246_per_regs_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
return h8s2246_per_regs_read_16(h8, (offset << 1));
@ -761,7 +761,7 @@ static READ16_HANDLER( h8s2246_per_regs_r )
static READ16_HANDLER( h8s2323_per_regs_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
return h8s2323_per_regs_read_16(h8, (offset << 1));
@ -779,7 +779,7 @@ static READ16_HANDLER( h8s2323_per_regs_r )
static READ16_HANDLER( h8s2394_per_regs_r )
{
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
if (mem_mask == 0xffff)
{
return h8s2394_per_regs_read_16(h8, (offset << 1));

4
src/emu/cpu/h83002/h8_8.c
View File

@ -515,7 +515,7 @@ static READ8_HANDLER( h8330_itu_r )
UINT8 reg;
UINT64 frc;
static const UINT64 divider[4] = { 2, 8, 32, 1 };
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
reg = (offset + 0x88) & 0xff;
@ -603,7 +603,7 @@ static READ8_HANDLER( h8330_itu_r )
static WRITE8_HANDLER( h8330_itu_w )
{
UINT8 reg;
h83xx_state *h8 = get_safe_token(&space->device());
h83xx_state *h8 = get_safe_token(&space.device());
reg = (offset + 0x88) & 0xff;

86
src/emu/cpu/lh5801/5801tbl.c
View File

@ -35,10 +35,10 @@ INLINE void lh5801_adc(lh5801_state *cpustate, UINT8 data)
cpustate->a=lh5801_add_generic(cpustate,cpustate->a,data,cpustate->t&C);
}
INLINE void lh5801_add_mem(lh5801_state *cpustate, address_space *space, int addr, UINT8 data)
INLINE void lh5801_add_mem(lh5801_state *cpustate, address_space &space, int addr, UINT8 data)
{
int v=lh5801_add_generic(cpustate, space->read_byte(addr),data,0);
space->write_byte(addr,v);
int v=lh5801_add_generic(cpustate, space.read_byte(addr),data,0);
space.write_byte(addr,v);
}
INLINE void lh5801_adr(lh5801_state *cpustate, PAIR *reg)
@ -95,12 +95,12 @@ INLINE void lh5801_and(lh5801_state *cpustate, UINT8 data)
if (!cpustate->a) cpustate->t|=Z;
}
INLINE void lh5801_and_mem(lh5801_state *cpustate, address_space *space, int addr, UINT8 data)
INLINE void lh5801_and_mem(lh5801_state *cpustate, address_space &space, int addr, UINT8 data)
{
data&=space->read_byte(addr);
data&=space.read_byte(addr);
cpustate->t&=~Z;
if (!data) cpustate->t|=Z;
space->write_byte(addr,data);
space.write_byte(addr,data);
}
INLINE void lh5801_bit(lh5801_state *cpustate, UINT8 a, UINT8 b)
@ -123,12 +123,12 @@ INLINE void lh5801_ora(lh5801_state *cpustate, UINT8 data)
if (!cpustate->a) cpustate->t|=Z;
}
INLINE void lh5801_ora_mem(lh5801_state *cpustate, address_space *space, int addr, UINT8 data)
INLINE void lh5801_ora_mem(lh5801_state *cpustate, address_space &space, int addr, UINT8 data)
{
data|=space->read_byte(addr);
data|=space.read_byte(addr);
cpustate->t&=~Z;
if (!data) cpustate->t|=Z;
space->write_byte(addr,data);
space.write_byte(addr,data);
}
INLINE void lh5801_lda(lh5801_state *cpustate, UINT8 data)
@ -270,20 +270,20 @@ INLINE void lh5801_aex(lh5801_state *cpustate)
// flags?
}
INLINE void lh5801_drl(lh5801_state *cpustate, address_space *space, int adr)
INLINE void lh5801_drl(lh5801_state *cpustate, address_space &space, int adr)
{
UINT16 t=cpustate->a|(space->read_byte(adr)<<8);
UINT16 t=cpustate->a|(space.read_byte(adr)<<8);
cpustate->a=t>>8;
space->write_byte(adr,t>>4);
space.write_byte(adr,t>>4);
}
INLINE void lh5801_drr(lh5801_state *cpustate, address_space *space, int adr)
INLINE void lh5801_drr(lh5801_state *cpustate, address_space &space, int adr)
{
UINT16 t=space->read_byte(adr)|(cpustate->a<<8);
UINT16 t=space.read_byte(adr)|(cpustate->a<<8);
cpustate->a=t;
space->write_byte(adr,t>>4);
space.write_byte(adr,t>>4);
}
INLINE void lh5801_rol(lh5801_state *cpustate)
@ -398,29 +398,29 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
case 0x40: lh5801_inc(cpustate,&XH);cpustate->icount-=9;break;
case 0x42: lh5801_dec(cpustate,&XH);cpustate->icount-=9;break;
case 0x48: X=S;cpustate->icount-=11;break;
case 0x49: lh5801_and_mem(cpustate, cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x49: lh5801_and_mem(cpustate, *cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x4a: X=X;cpustate->icount-=11;break; //!!!
case 0x4b: lh5801_ora_mem(cpustate, cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x4b: lh5801_ora_mem(cpustate, *cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x4c: cpustate->bf=0;/*off !*/ cpustate->icount-=8;break;
case 0x4d: lh5801_bit(cpustate,cpustate->io->read_byte(X), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=14;break;
case 0x4e: S=X;cpustate->icount-=11;break;
case 0x4f: lh5801_add_mem(cpustate, cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x4f: lh5801_add_mem(cpustate, *cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x50: lh5801_inc(cpustate,&YH);cpustate->icount-=9;break;
case 0x52: lh5801_dec(cpustate,&YH);cpustate->icount-=9;break;
case 0x58: X=P;cpustate->icount-=11;break;
case 0x59: lh5801_and_mem(cpustate, cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x59: lh5801_and_mem(cpustate, *cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x5a: Y=X;cpustate->icount-=11;break;
case 0x5b: lh5801_ora_mem(cpustate, cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x5b: lh5801_ora_mem(cpustate, *cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x5d: lh5801_bit(cpustate,cpustate->io->read_byte(Y), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=14;break;
case 0x5e: lh5801_jmp(cpustate,X);cpustate->icount-=11;break; // P=X
case 0x5f: lh5801_add_mem(cpustate, cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x5f: lh5801_add_mem(cpustate, *cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x60: lh5801_inc(cpustate,&UH);cpustate->icount-=9;break;
case 0x62: lh5801_dec(cpustate,&UH);cpustate->icount-=9;break;
case 0x69: lh5801_and_mem(cpustate, cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x69: lh5801_and_mem(cpustate, *cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x6a: U=X;cpustate->icount-=11;break;
case 0x6b: lh5801_ora_mem(cpustate, cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x6b: lh5801_ora_mem(cpustate, *cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x6d: lh5801_bit(cpustate,cpustate->io->read_byte(X), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=14;break;
case 0x6f: lh5801_add_mem(cpustate, cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x6f: lh5801_add_mem(cpustate, *cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
case 0x81: cpustate->t|=IE; /*sie !*/cpustate->icount-=8;break;
case 0x88: lh5801_push_word(cpustate,X); cpustate->icount-=14;break;
case 0x8a: lh5801_pop(cpustate); cpustate->icount-=12; break;
@ -449,18 +449,18 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
case 0xca: lh5801_adr(cpustate,&cpustate->x);cpustate->icount-=11;break;
case 0xcc: /*atp sends a to data bus*/cpustate->icount-=9;break;
case 0xce: lh5801_am(cpustate,cpustate->a); cpustate->icount-=9; break;
case 0xd3: lh5801_drr(cpustate, cpustate->io, X); cpustate->icount-=16; break;
case 0xd7: lh5801_drl(cpustate, cpustate->io, X); cpustate->icount-=16; break;
case 0xd3: lh5801_drr(cpustate, *cpustate->io, X); cpustate->icount-=16; break;
case 0xd7: lh5801_drl(cpustate, *cpustate->io, X); cpustate->icount-=16; break;
case 0xda: lh5801_adr(cpustate,&cpustate->y);cpustate->icount-=11;break;
case 0xde: lh5801_am(cpustate,cpustate->a|0x100); cpustate->icount-=9; break;
case 0xea: lh5801_adr(cpustate,&cpustate->u);cpustate->icount-=11;break;
case 0xe9:
adr=lh5801_readop_word(cpustate);
lh5801_and_mem(cpustate, cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
lh5801_and_mem(cpustate, *cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
break;
case 0xeb:
adr=lh5801_readop_word(cpustate);
lh5801_ora_mem(cpustate, cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
lh5801_ora_mem(cpustate, *cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
break;
case 0xec: cpustate->t=cpustate->a; cpustate->icount-=9;break;
case 0xed:
@ -469,7 +469,7 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
cpustate->icount-=20;break;
case 0xef:
adr=lh5801_readop_word(cpustate);
lh5801_add_mem(cpustate, cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
lh5801_add_mem(cpustate, *cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
break;
default:
@ -542,13 +542,13 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x46: X--;cpustate->icount-=5;break;
case 0x47: lh5801_lde(cpustate,&cpustate->x);cpustate->icount-=6;break;
case 0x48: XH=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
case 0x49: lh5801_and_mem(cpustate, cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x49: lh5801_and_mem(cpustate, *cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x4a: XL=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
case 0x4b: lh5801_ora_mem(cpustate, cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x4b: lh5801_ora_mem(cpustate, *cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x4c: lh5801_cpa(cpustate,XH, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0x4d: lh5801_bit(cpustate,cpustate->program->read_byte(X), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=10;break;
case 0x4e: lh5801_cpa(cpustate,XL, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0x4f: lh5801_add_mem(cpustate, cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x4f: lh5801_add_mem(cpustate, *cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x50: lh5801_inc(cpustate,&YL);cpustate->icount-=5;break;
case 0x51: lh5801_sin(cpustate,&cpustate->y); cpustate->icount-=6;break;
case 0x52: lh5801_dec(cpustate,&YL);cpustate->icount-=5;break;
@ -558,13 +558,13 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x56: Y--;cpustate->icount-=5;break;
case 0x57: lh5801_lde(cpustate,&cpustate->y);cpustate->icount-=6;break;
case 0x58: YH=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
case 0x59: lh5801_and_mem(cpustate, cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x59: lh5801_and_mem(cpustate, *cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x5a: YL=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
case 0x5b: lh5801_ora_mem(cpustate, cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x5b: lh5801_ora_mem(cpustate, *cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x5c: lh5801_cpa(cpustate,YH, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0x5d: lh5801_bit(cpustate,cpustate->program->read_byte(Y), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=10;break;
case 0x5e: lh5801_cpa(cpustate,YL, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0x5f: lh5801_add_mem(cpustate, cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x5f: lh5801_add_mem(cpustate, *cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x60: lh5801_inc(cpustate,&UL);cpustate->icount-=5;break;
case 0x61: lh5801_sin(cpustate,&cpustate->u); cpustate->icount-=6;break;
case 0x62: lh5801_dec(cpustate,&UL);cpustate->icount-=5;break;
@ -574,13 +574,13 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x66: U--;cpustate->icount-=5;break;
case 0x67: lh5801_lde(cpustate,&cpustate->u);cpustate->icount-=6;break;
case 0x68: UH=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
case 0x69: lh5801_and_mem(cpustate, cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x69: lh5801_and_mem(cpustate, *cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x6a: UL=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
case 0x6b: lh5801_ora_mem(cpustate, cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x6b: lh5801_ora_mem(cpustate, *cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x6c: lh5801_cpa(cpustate,UH, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0x6d: lh5801_bit(cpustate,cpustate->program->read_byte(U), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=10;break;
case 0x6e: lh5801_cpa(cpustate,UL, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0x6f: lh5801_add_mem(cpustate, cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x6f: lh5801_add_mem(cpustate, *cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
case 0x80: lh5801_sbc(cpustate,XH); cpustate->icount-=6;break;
case 0x81: lh5801_branch_plus(cpustate,!(cpustate->t&C)); cpustate->icount-=8; break;
case 0x82: lh5801_adc(cpustate,XH); cpustate->icount-=6;break;
@ -648,9 +648,9 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0xcd: lh5801_vector(cpustate,1, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
case 0xcf: lh5801_vector(cpustate,cpustate->t&V, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=8;break;
case 0xd1: lh5801_ror(cpustate); cpustate->icount-=6; break;
case 0xd3: lh5801_drr(cpustate, cpustate->program, X); cpustate->icount-=12; break;
case 0xd3: lh5801_drr(cpustate, *cpustate->program, X); cpustate->icount-=12; break;
case 0xd5: lh5801_shr(cpustate); cpustate->icount-=6; break;
case 0xd7: lh5801_drl(cpustate, cpustate->program, X); cpustate->icount-=12; break;
case 0xd7: lh5801_drl(cpustate, *cpustate->program, X); cpustate->icount-=12; break;
case 0xd9: lh5801_shl(cpustate); cpustate->icount-=6; break;
case 0xdb: lh5801_rol(cpustate); cpustate->icount-=6; break;
case 0xdd: lh5801_inc(cpustate,&cpustate->a);cpustate->icount-=5;break;
@ -658,17 +658,17 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0xe1: cpustate->pu=1;/*spu!*/ cpustate->icount-=4; break;
case 0xe3: cpustate->pu=0;/*rpu!*/ cpustate->icount-=4; break;
case 0xe9:
adr=lh5801_readop_word(cpustate);lh5801_and_mem(cpustate, cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
adr=lh5801_readop_word(cpustate);lh5801_and_mem(cpustate, *cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
cpustate->icount-=19;break;
case 0xeb:
adr=lh5801_readop_word(cpustate);lh5801_ora_mem(cpustate, cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
adr=lh5801_readop_word(cpustate);lh5801_ora_mem(cpustate, *cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
cpustate->icount-=19;break;
case 0xed:
adr=lh5801_readop_word(cpustate);lh5801_bit(cpustate,cpustate->program->read_byte(adr), cpustate->direct->read_decrypted_byte(P++));
cpustate->icount-=16;break;
case 0xef:
adr=lh5801_readop_word(cpustate);
lh5801_add_mem(cpustate, cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=19;
lh5801_add_mem(cpustate, *cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=19;
break;
case 0xf1: lh5801_aex(cpustate); cpustate->icount-=6; break;
case 0xf5: cpustate->program->write_byte(Y++, cpustate->program->read_byte(X++)); cpustate->icount-=7; break; //tin

4
src/emu/cpu/m37710/m37710.c
View File

@ -599,7 +599,7 @@ static void m37710_internal_w(m37710i_cpu_struct *cpustate, int offset, UINT8 da
static READ16_HANDLER( m37710_internal_word_r )
{
m37710i_cpu_struct *cpustate = get_safe_token(&space->device());
m37710i_cpu_struct *cpustate = get_safe_token(&space.device());
UINT16 ret = 0;
if (mem_mask & 0x00ff)
@ -612,7 +612,7 @@ static READ16_HANDLER( m37710_internal_word_r )
static WRITE16_HANDLER( m37710_internal_word_w )
{
m37710i_cpu_struct *cpustate = get_safe_token(&space->device());
m37710i_cpu_struct *cpustate = get_safe_token(&space.device());
if (mem_mask & 0x00ff)
m37710_internal_w(cpustate, offset*2, data & 0xff);

6
src/emu/cpu/m6502/m4510.c
View File

@ -346,7 +346,7 @@ UINT8 m4510_get_port(legacy_cpu_device *device)
static READ8_HANDLER( m4510_read_0000 )
{
UINT8 result = 0x00;
m4510_Regs *cpustate = get_safe_token(&space->device());
m4510_Regs *cpustate = get_safe_token(&space.device());
switch(offset)
{
@ -363,7 +363,7 @@ static READ8_HANDLER( m4510_read_0000 )
static WRITE8_HANDLER( m4510_write_0000 )
{
m4510_Regs *cpustate = get_safe_token(&space->device());
m4510_Regs *cpustate = get_safe_token(&space.device());
switch(offset)
{
@ -375,7 +375,7 @@ static WRITE8_HANDLER( m4510_write_0000 )
break;
}
cpustate->out_port_func(0, m4510_get_port(downcast<legacy_cpu_device *>(&space->device())));
cpustate->out_port_func(0, m4510_get_port(downcast<legacy_cpu_device *>(&space.device())));
}
static ADDRESS_MAP_START(m4510_mem, AS_PROGRAM, 8, legacy_cpu_device)

4
src/emu/cpu/m6502/m6502.c
View File

@ -374,7 +374,7 @@ UINT8 m6510_get_port(legacy_cpu_device *device)
static READ8_HANDLER( m6510_read_0000 )
{
m6502_Regs *cpustate = get_safe_token(&space->device());
m6502_Regs *cpustate = get_safe_token(&space.device());
UINT8 result = 0x00;
switch(offset)
@ -400,7 +400,7 @@ static READ8_HANDLER( m6510_read_0000 )
static WRITE8_HANDLER( m6510_write_0000 )
{
m6502_Regs *cpustate = get_safe_token(&space->device());
m6502_Regs *cpustate = get_safe_token(&space.device());
switch(offset)
{

8
src/emu/cpu/m6502/m6509.c
View File

@ -102,21 +102,21 @@ INLINE m6509_Regs *get_safe_token(device_t *device)
static READ8_HANDLER( m6509_read_00000 )
{
m6509_Regs *cpustate = get_safe_token(&space->device());
m6509_Regs *cpustate = get_safe_token(&space.device());
return cpustate->pc_bank.b.h2;
}
static READ8_HANDLER( m6509_read_00001 )
{
m6509_Regs *cpustate = get_safe_token(&space->device());
m6509_Regs *cpustate = get_safe_token(&space.device());
return cpustate->ind_bank.b.h2;
}
static WRITE8_HANDLER( m6509_write_00000 )
{
m6509_Regs *cpustate = get_safe_token(&space->device());
m6509_Regs *cpustate = get_safe_token(&space.device());
cpustate->pc_bank.b.h2=data&0xf;
cpustate->pc.w.h=cpustate->pc_bank.w.h;
@ -124,7 +124,7 @@ static WRITE8_HANDLER( m6509_write_00000 )
static WRITE8_HANDLER( m6509_write_00001 )
{
m6509_Regs *cpustate = get_safe_token(&space->device());
m6509_Regs *cpustate = get_safe_token(&space.device());
cpustate->ind_bank.b.h2=data&0xf;
}

4
src/emu/cpu/m6502/mincce02.h
View File

@ -47,8 +47,8 @@
#define PPC cpustate->ppc.d
#define RDMEM_ID(a) cpustate->rdmem_id(cpustate->space, a)
#define WRMEM_ID(a,d) cpustate->wrmem_id(cpustate->space, a, d)
#define RDMEM_ID(a) cpustate->rdmem_id(*cpustate->space, a)
#define WRMEM_ID(a,d) cpustate->wrmem_id(*cpustate->space, a, d)
#define IRQ_STATE cpustate->irq_state
#define AFTER_CLI cpustate->after_cli

76
src/emu/cpu/m6800/m6800.c
View File

@ -1396,7 +1396,7 @@ INLINE void set_os3(m6800_state *cpustate, int state)
READ8_HANDLER( m6801_io_r )
{
m6800_state *cpustate = get_safe_token(&space->device());
m6800_state *cpustate = get_safe_token(&space.device());
UINT8 data = 0;
@ -1427,7 +1427,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_P3DDR:
logerror("M6801 '%s' Port 3 DDR is a write-only register\n", space->device().tag());
logerror("M6801 '%s' Port 3 DDR is a write-only register\n", space.device().tag());
break;
case IO_P4DDR:
@ -1435,11 +1435,11 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_P3DATA:
if (!space->debugger_access())
if (!space.debugger_access())
{
if (cpustate->p3csr_is3_flag_read)
{
//logerror("M6801 '%s' Cleared IS3\n", space->device().tag());
//logerror("M6801 '%s' Cleared IS3\n", space.device().tag());
cpustate->p3csr &= ~M6801_P3CSR_IS3_FLAG;
cpustate->p3csr_is3_flag_read = 0;
}
@ -1456,7 +1456,7 @@ READ8_HANDLER( m6801_io_r )
data = (cpustate->io->read_byte(M6801_PORT3) & (cpustate->port3_ddr ^ 0xff))
| (cpustate->port3_data & cpustate->port3_ddr);
if (!space->debugger_access())
if (!space.debugger_access())
{
cpustate->port3_latched = 0;
@ -1481,7 +1481,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_CH:
if(!(cpustate->pending_tcsr&TCSR_TOF) && !space->debugger_access())
if(!(cpustate->pending_tcsr&TCSR_TOF) && !space.debugger_access())
{
cpustate->tcsr &= ~TCSR_TOF;
MODIFIED_tcsr;
@ -1494,7 +1494,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_OCRH:
if(!(cpustate->pending_tcsr&TCSR_OCF) && !space->debugger_access())
if(!(cpustate->pending_tcsr&TCSR_OCF) && !space.debugger_access())
{
cpustate->tcsr &= ~TCSR_OCF;
MODIFIED_tcsr;
@ -1503,7 +1503,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_OCRL:
if(!(cpustate->pending_tcsr&TCSR_OCF) && !space->debugger_access())
if(!(cpustate->pending_tcsr&TCSR_OCF) && !space.debugger_access())
{
cpustate->tcsr &= ~TCSR_OCF;
MODIFIED_tcsr;
@ -1512,7 +1512,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_ICRH:
if(!(cpustate->pending_tcsr&TCSR_ICF) && !space->debugger_access())
if(!(cpustate->pending_tcsr&TCSR_ICF) && !space.debugger_access())
{
cpustate->tcsr &= ~TCSR_ICF;
MODIFIED_tcsr;
@ -1525,7 +1525,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_P3CSR:
if ((cpustate->p3csr & M6801_P3CSR_IS3_FLAG) && !space->debugger_access())
if ((cpustate->p3csr & M6801_P3CSR_IS3_FLAG) && !space.debugger_access())
{
cpustate->p3csr_is3_flag_read = 1;
}
@ -1538,7 +1538,7 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_TRCSR:
if (!space->debugger_access())
if (!space.debugger_access())
{
if (cpustate->trcsr & M6800_TRCSR_TDRE)
{
@ -1560,18 +1560,18 @@ READ8_HANDLER( m6801_io_r )
break;
case IO_RDR:
if (!space->debugger_access())
if (!space.debugger_access())
{
if (cpustate->trcsr_read_orfe)
{
//logerror("M6801 '%s' Cleared ORFE\n", space->device().tag());
//logerror("M6801 '%s' Cleared ORFE\n", space.device().tag());
cpustate->trcsr_read_orfe = 0;
cpustate->trcsr &= ~M6800_TRCSR_ORFE;
}
if (cpustate->trcsr_read_rdrf)
{
//logerror("M6801 '%s' Cleared RDRF\n", space->device().tag());
//logerror("M6801 '%s' Cleared RDRF\n", space.device().tag());
cpustate->trcsr_read_rdrf = 0;
cpustate->trcsr &= ~M6800_TRCSR_RDRF;
}
@ -1600,7 +1600,7 @@ READ8_HANDLER( m6801_io_r )
case IO_ICR2H:
case IO_ICR2L:
default:
logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),offset);
logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space.device().tag(),space.device().safe_pc(),offset);
}
return data;
@ -1608,12 +1608,12 @@ READ8_HANDLER( m6801_io_r )
WRITE8_HANDLER( m6801_io_w )
{
m6800_state *cpustate = get_safe_token(&space->device());
m6800_state *cpustate = get_safe_token(&space.device());
switch (offset)
{
case IO_P1DDR:
//logerror("M6801 '%s' Port 1 Data Direction Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 1 Data Direction Register: %02x\n", space.device().tag(), data);
if (cpustate->port1_ddr != data)
{
@ -1626,7 +1626,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_P2DDR:
//logerror("M6801 '%s' Port 2 Data Direction Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 2 Data Direction Register: %02x\n", space.device().tag(), data);
if (cpustate->port2_ddr != data)
{
@ -1634,12 +1634,12 @@ WRITE8_HANDLER( m6801_io_w )
write_port2(cpustate);
if (cpustate->port2_ddr & 2)
logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->device().tag(),space->device().safe_pc());
logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space.device().tag(),space.device().safe_pc());
}
break;
case IO_P1DATA:
//logerror("M6801 '%s' Port 1 Data Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 1 Data Register: %02x\n", space.device().tag(), data);
cpustate->port1_data = data;
if(cpustate->port1_ddr == 0xff)
@ -1649,7 +1649,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_P2DATA:
//logerror("M6801 '%s' Port 2 Data Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 2 Data Register: %02x\n", space.device().tag(), data);
cpustate->port2_data = data;
cpustate->port2_written = 1;
@ -1657,7 +1657,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_P3DDR:
//logerror("M6801 '%s' Port 3 Data Direction Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 3 Data Direction Register: %02x\n", space.device().tag(), data);
if (cpustate->port3_ddr != data)
{
@ -1670,7 +1670,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_P4DDR:
//logerror("M6801 '%s' Port 4 Data Direction Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 4 Data Direction Register: %02x\n", space.device().tag(), data);
if (cpustate->port4_ddr != data)
{
@ -1683,11 +1683,11 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_P3DATA:
//logerror("M6801 '%s' Port 3 Data Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 3 Data Register: %02x\n", space.device().tag(), data);
if (cpustate->p3csr_is3_flag_read)
{
//logerror("M6801 '%s' Cleared IS3\n", space->device().tag());
//logerror("M6801 '%s' Cleared IS3\n", space.device().tag());
cpustate->p3csr &= ~M6801_P3CSR_IS3_FLAG;
cpustate->p3csr_is3_flag_read = 0;
}
@ -1710,7 +1710,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_P4DATA:
//logerror("M6801 '%s' Port 4 Data Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 4 Data Register: %02x\n", space.device().tag(), data);
cpustate->port4_data = data;
if(cpustate->port4_ddr == 0xff)
@ -1720,7 +1720,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_TCSR:
//logerror("M6801 '%s' Timer Control and Status Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Timer Control and Status Register: %02x\n", space.device().tag(), data);
cpustate->tcsr = data;
cpustate->pending_tcsr &= cpustate->tcsr;
@ -1730,7 +1730,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_CH:
//logerror("M6801 '%s' Counter High Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Counter High Register: %02x\n", space.device().tag(), data);
cpustate->latch09 = data & 0xff; /* 6301 only */
CT = 0xfff8;
@ -1739,7 +1739,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_CL: /* 6301 only */
//logerror("M6801 '%s' Counter Low Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Counter Low Register: %02x\n", space.device().tag(), data);
CT = (cpustate->latch09 << 8) | (data & 0xff);
TOH = CTH;
@ -1747,7 +1747,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_OCRH:
//logerror("M6801 '%s' Output Compare High Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Output Compare High Register: %02x\n", space.device().tag(), data);
if( cpustate->output_compare.b.h != data)
{
@ -1757,7 +1757,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_OCRL:
//logerror("M6801 '%s' Output Compare Low Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Output Compare Low Register: %02x\n", space.device().tag(), data);
if( cpustate->output_compare.b.l != data)
{
@ -1769,23 +1769,23 @@ WRITE8_HANDLER( m6801_io_w )
case IO_ICRH:
case IO_ICRL:
case IO_RDR:
//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space.device().tag(),space.device().safe_pc(),data,offset);
break;
case IO_P3CSR:
//logerror("M6801 '%s' Port 3 Control and Status Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Port 3 Control and Status Register: %02x\n", space.device().tag(), data);
cpustate->p3csr = data;
break;
case IO_RMCR:
//logerror("M6801 '%s' Rate and Mode Control Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Rate and Mode Control Register: %02x\n", space.device().tag(), data);
set_rmcr(cpustate, data);
break;
case IO_TRCSR:
//logerror("M6801 '%s' Transmit/Receive Control and Status Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' Transmit/Receive Control and Status Register: %02x\n", space.device().tag(), data);
if ((data & M6800_TRCSR_TE) && !(cpustate->trcsr & M6800_TRCSR_TE))
{
@ -1803,7 +1803,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_TDR:
//logerror("M6800 '%s' Transmit Data Register: %02x\n", space->device().tag(), data);
//logerror("M6800 '%s' Transmit Data Register: %02x\n", space.device().tag(), data);
if (cpustate->trcsr_read_tdre)
{
@ -1814,7 +1814,7 @@ WRITE8_HANDLER( m6801_io_w )
break;
case IO_RCR:
//logerror("M6801 '%s' RAM Control Register: %02x\n", space->device().tag(), data);
//logerror("M6801 '%s' RAM Control Register: %02x\n", space.device().tag(), data);
cpustate->ram_ctrl = data;
break;
@ -1831,7 +1831,7 @@ WRITE8_HANDLER( m6801_io_w )
case IO_ICR2H:
case IO_ICR2L:
default:
logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space.device().tag(),space.device().safe_pc(),data,offset);
break;
}
}

16
src/emu/cpu/m68000/68307bus.c
View File

@ -7,29 +7,29 @@
READ8_HANDLER( m68307_internal_mbus_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_mbus* mbus = m68k->m68307MBUS;
assert(mbus != NULL);
UINT8 retval;
if (mbus)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset)
{
case m68307BUS_MADR:
logerror("%08x m68307_internal_mbus_r %08x (MADR - M-Bus Address Register)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68307BUS_MFDR:
logerror("%08x m68307_internal_mbus_r %08x (MFDR - M-Bus Frequency Divider Register)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68307BUS_MBCR:
logerror("%08x m68307_internal_mbus_r %08x (MFCR - M-Bus Control Register)\n", pc, offset);
return mbus->m_MFCR;//space->machine().rand();
return mbus->m_MFCR;//space.machine().rand();
case m68307BUS_MBSR:
logerror("%08x m68307_internal_mbus_r %08x (MBSR - M-Bus Status Register)\n", pc, offset);
@ -42,7 +42,7 @@ READ8_HANDLER( m68307_internal_mbus_r )
case m68307BUS_MBDR:
logerror("%08x m68307_internal_mbus_r %08x (MBDR - M-Bus Data I/O Register)\n", pc, offset);
mbus->m_intpend = true;
return 0xff;//space->machine().rand();
return 0xff;//space.machine().rand();
default:
logerror("%08x m68307_internal_mbus_r %08x (UNKNOWN / ILLEGAL)\n", pc, offset);
@ -55,13 +55,13 @@ READ8_HANDLER( m68307_internal_mbus_r )
WRITE8_HANDLER( m68307_internal_mbus_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_mbus* mbus = m68k->m68307MBUS;
assert(mbus != NULL);
if (mbus)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset)
{

32
src/emu/cpu/m68000/68307ser.c
View File

@ -15,7 +15,7 @@
READ8_HANDLER( m68307_internal_serial_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_serial* serial = m68k->m68307SERIAL;
assert(serial != NULL);
@ -29,57 +29,57 @@ READ8_HANDLER( m68307_internal_serial_r )
else
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset)
{
case m68307SER_UMR1_UMR2:
logerror("%08x m68307_internal_serial_r %08x (UMR1, UMR2 - UART Mode Register)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68307SER_USR_UCSR:
logerror("%08x m68307_internal_serial_r %08x (USR, UCSR - UART Status/Clock Select Register)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68307SER_UCR:
logerror("%08x m68307_internal_serial_r %08x (UCR - UART Command Register)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68307SER_URB_UTB:
logerror("%08x m68307_internal_serial_r %08x (URB, UTB - UART Recieve/Transmit Buffer)\n", pc, offset);
return 0xff;//space->machine().rand();
return 0xff;//space.machine().rand();
case m68307SER_UIPCR_UACR:
logerror("%08x m68307_internal_serial_r %08x (UIPCR, UACR - UART Input Port Change Register / UART Control Register)\n", pc, offset);
return 0xff;//space->machine().rand();
return 0xff;//space.machine().rand();
case m68307SER_UISR_UIMR:
logerror("%08x m68307_internal_serial_r %08x (UISR, UIMR - UART Interrupt Status Register / UART Interrupt Mask Register)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
case m68307SER_UBG1:
logerror("%08x m68307_internal_serial_r %08x (UBG1 - UART Baud Rate Gen. Precaler MSB)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
case m68307SER_UBG2:
logerror("%08x m68307_internal_serial_r %08x (UBG1 - UART Baud Rate Gen. Precaler LSB)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
case m68307SER_UIVR:
logerror("%08x m68307_internal_serial_r %08x (UIVR - UART Interrupt Vector Register)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
case m68307SER_UIP:
logerror("%08x m68307_internal_serial_r %08x (UIP - UART Register Input Port)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
case m68307SER_UOP1:
logerror("%08x m68307_internal_serial_r %08x (UOP1 - UART Output Port Bit Set Cmd)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
case m68307SER_UOP0:
logerror("%08x m68307_internal_serial_r %08x (UOP0 - UART Output Port Bit Reset Cmd)\n", pc, offset);
return space->machine().rand() & 0x87;
return space.machine().rand() & 0x87;
default:
logerror("%08x m68307_internal_serial_r %08x (UNKNOWN / ILLEGAL)\n", pc, offset);
@ -93,11 +93,11 @@ READ8_HANDLER( m68307_internal_serial_r )
WRITE8_HANDLER( m68307_internal_serial_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_serial* serial = m68k->m68307SERIAL;
assert(serial != NULL);
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
if (serial)
{

32
src/emu/cpu/m68000/68307sim.c
View File

@ -6,11 +6,11 @@
READ16_HANDLER( m68307_internal_sim_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_sim* sim = m68k->m68307SIM;
assert(sim != NULL);
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
if (sim)
{
@ -43,11 +43,11 @@ READ16_HANDLER( m68307_internal_sim_r )
WRITE16_HANDLER( m68307_internal_sim_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_sim* sim = m68k->m68307SIM;
assert(sim != NULL);
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
if (sim)
{
@ -150,10 +150,10 @@ void m68307_sim::write_paddr(UINT16 data, UINT16 mem_mask)
}
UINT16 m68307_sim::read_padat(address_space *space, UINT16 mem_mask)
UINT16 m68307_sim::read_padat(address_space &space, UINT16 mem_mask)
{
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = space.device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
if (m68k->m_m68307_porta_r)
{
@ -177,10 +177,10 @@ UINT16 m68307_sim::read_padat(address_space *space, UINT16 mem_mask)
}
void m68307_sim::write_padat(address_space *space, UINT16 data, UINT16 mem_mask)
void m68307_sim::write_padat(address_space &space, UINT16 data, UINT16 mem_mask)
{
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = space.device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
COMBINE_DATA(&m_padat);
if (m68k->m_m68307_porta_w)
@ -203,10 +203,10 @@ void m68307_sim::write_pbddr(UINT16 data, UINT16 mem_mask)
COMBINE_DATA(&m_pbddr);
}
UINT16 m68307_sim::read_pbdat(address_space *space, UINT16 mem_mask)
UINT16 m68307_sim::read_pbdat(address_space &space, UINT16 mem_mask)
{
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = space.device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
if (m68k->m_m68307_portb_r)
{
@ -230,10 +230,10 @@ UINT16 m68307_sim::read_pbdat(address_space *space, UINT16 mem_mask)
}
void m68307_sim::write_pbdat(address_space *space, UINT16 data, UINT16 mem_mask)
void m68307_sim::write_pbdat(address_space &space, UINT16 data, UINT16 mem_mask)
{
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = space.device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
COMBINE_DATA(&m_pbdat);
if (m68k->m_m68307_portb_w)

8
src/emu/cpu/m68000/68307sim.h
View File

@ -51,13 +51,13 @@ class m68307_sim
void write_pacnt(UINT16 data, UINT16 mem_mask);
void write_paddr(UINT16 data, UINT16 mem_mask);
UINT16 read_padat(address_space *space, UINT16 mem_mask);
void write_padat(address_space *space, UINT16 data, UINT16 mem_mask);
UINT16 read_padat(address_space &space, UINT16 mem_mask);
void write_padat(address_space &space, UINT16 data, UINT16 mem_mask);
void write_pbcnt(UINT16 data, UINT16 mem_mask);
void write_pbddr(UINT16 data, UINT16 mem_mask);
UINT16 read_pbdat(address_space *space, UINT16 mem_mask);
void write_pbdat(address_space *space, UINT16 data, UINT16 mem_mask);
UINT16 read_pbdat(address_space &space, UINT16 mem_mask);
void write_pbdat(address_space &space, UINT16 data, UINT16 mem_mask);

8
src/emu/cpu/m68000/68307tmu.c
View File

@ -6,13 +6,13 @@
READ16_HANDLER( m68307_internal_timer_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_timer* timer = m68k->m68307TIMER;
assert(timer != NULL);
if (timer)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
int which = offset & 0x8;
switch (offset&0x7)
@ -34,13 +34,13 @@ READ16_HANDLER( m68307_internal_timer_r )
WRITE16_HANDLER( m68307_internal_timer_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68307_timer* timer = m68k->m68307TIMER;
assert(timer != NULL);
if (timer)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
int which = offset & 0x8;
switch (offset&0x7)

8
src/emu/cpu/m68000/68340dma.c
View File

@ -6,13 +6,13 @@
READ32_HANDLER( m68340_internal_dma_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_dma* dma = m68k->m68340DMA;
assert(dma != NULL);
if (dma)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask);
}
@ -21,13 +21,13 @@ READ32_HANDLER( m68340_internal_dma_r )
WRITE32_HANDLER( m68340_internal_dma_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_dma* dma = m68k->m68340DMA;
assert(dma != NULL);
if (dma)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
}
}

8
src/emu/cpu/m68000/68340ser.c
View File

@ -6,13 +6,13 @@
READ32_HANDLER( m68340_internal_serial_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_serial* serial = m68k->m68340SERIAL;
assert(serial != NULL);
if (serial)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_serial_r %08x, (%08x)\n", pc, offset*4,mem_mask);
}
@ -21,13 +21,13 @@ READ32_HANDLER( m68340_internal_serial_r )
WRITE32_HANDLER( m68340_internal_serial_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_serial* serial = m68k->m68340SERIAL;
assert(serial != NULL);
if (serial)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_serial_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
}

56
src/emu/cpu/m68000/68340sim.c
View File

@ -6,43 +6,43 @@
READ16_HANDLER( m68340_internal_sim_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
if (sim)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset<<1)
{
case m68340SIM_MCR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_SYNCR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_AVR_RSR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_SWIV_SYPCR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PICR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PITR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_SWSR:
logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWSR - Software Service)\n", pc, offset*2,mem_mask);
return space->machine().rand();
return space.machine().rand();
default:
logerror("%08x m68340_internal_sim_r %04x, (%04x)\n", pc, offset*2,mem_mask);
@ -57,51 +57,51 @@ READ16_HANDLER( m68340_internal_sim_r )
READ8_HANDLER( m68340_internal_sim_ports_r )
{
offset += 0x10;
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
if (sim)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset)
{
case m68340SIM_PORTA:
logerror("%08x m68340_internal_sim_r %04x (PORTA - Port A Data)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_DDRA:
logerror("%08x m68340_internal_sim_r %04x (DDRA - Port A Data Direction)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PPRA1:
logerror("%08x m68340_internal_sim_r %04x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PPRA2:
logerror("%08x m68340_internal_sim_r %04x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PORTB:
logerror("%08x m68340_internal_sim_r %04x (PORTB - Port B Data 0)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PORTB1:
logerror("%08x m68340_internal_sim_r %04x (PORTB1 - Port B Data 1)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_DDRB:
logerror("%08x m68340_internal_sim_r %04x (DDR - Port B Data Direction)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
case m68340SIM_PPARB:
logerror("%08x m68340_internal_sim_r %04x (PPARB - Port B Pin Assignment)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
default:
logerror("%08x m68340_internal_sim_r %04x (ILLEGAL?)\n", pc, offset);
return space->machine().rand();
return space.machine().rand();
}
}
@ -113,13 +113,13 @@ READ32_HANDLER( m68340_internal_sim_cs_r )
{
offset += m68340SIM_AM_CS0>>2;
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
if (sim)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset<<2)
{
@ -143,13 +143,13 @@ READ32_HANDLER( m68340_internal_sim_cs_r )
WRITE16_HANDLER( m68340_internal_sim_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
if (sim)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset<<1)
{
@ -193,13 +193,13 @@ WRITE16_HANDLER( m68340_internal_sim_w )
WRITE8_HANDLER( m68340_internal_sim_ports_w )
{
offset += 0x10;
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
if (sim)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset)
{
@ -246,13 +246,13 @@ WRITE8_HANDLER( m68340_internal_sim_ports_w )
WRITE32_HANDLER( m68340_internal_sim_cs_w )
{
offset += m68340SIM_AM_CS0>>2;
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
if (sim)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
switch (offset<<2)
{

8
src/emu/cpu/m68000/68340tmu.c
View File

@ -7,13 +7,13 @@
READ32_HANDLER( m68340_internal_timer_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_timer* timer = m68k->m68340TIMER;
assert(timer != NULL);
if (timer)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_timer_r %08x, (%08x)\n", pc, offset*4,mem_mask);
}
@ -22,13 +22,13 @@ READ32_HANDLER( m68340_internal_timer_r )
WRITE32_HANDLER( m68340_internal_timer_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
m68340_timer* timer = m68k->m68340TIMER;
assert(timer != NULL);
if (timer)
{
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_timer_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
}
}

8
src/emu/cpu/m68000/m68000.h
View File

@ -101,10 +101,10 @@ typedef void (*m68k_cmpild_func)(device_t *device, UINT32 data, UINT8 reg);
typedef void (*m68k_rte_func)(device_t *device);
typedef int (*m68k_tas_func)(device_t *device);
typedef UINT8 (*m68307_porta_read_callback)(address_space *space, bool dedicated, UINT8 line_mask);
typedef void (*m68307_porta_write_callback)(address_space *space, bool dedicated, UINT8 data, UINT8 line_mask);
typedef UINT16 (*m68307_portb_read_callback)(address_space *space, bool dedicated, UINT16 line_mask);
typedef void (*m68307_portb_write_callback)(address_space *space, bool dedicated, UINT16 data, UINT16 line_mask);
typedef UINT8 (*m68307_porta_read_callback)(address_space &space, bool dedicated, UINT8 line_mask);
typedef void (*m68307_porta_write_callback)(address_space &space, bool dedicated, UINT8 data, UINT8 line_mask);
typedef UINT16 (*m68307_portb_read_callback)(address_space &space, bool dedicated, UINT16 line_mask);
typedef void (*m68307_portb_write_callback)(address_space &space, bool dedicated, UINT16 data, UINT16 line_mask);

16
src/emu/cpu/m68000/m68kcpu.c
View File

@ -2075,9 +2075,9 @@ static CPU_INIT( m68307 )
static READ16_HANDLER( m68307_internal_base_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask);
switch (offset<<1)
@ -2094,9 +2094,9 @@ static READ16_HANDLER( m68307_internal_base_r )
static WRITE16_HANDLER( m68307_internal_base_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask);
int base = 0;
//int mask = 0;
@ -2763,17 +2763,17 @@ CPU_GET_INFO( scc68070 )
static READ32_HANDLER( m68340_internal_base_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask);
return m68k->m68340_base;
}
static WRITE32_HANDLER( m68340_internal_base_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
int pc = space->device().safe_pc();
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
// other conditions?

84
src/emu/cpu/mips/r3000.c
View File

@ -98,13 +98,13 @@ CPU_DISASSEMBLE( r3000le );
#define SETPC(R,x) do { (R)->nextpc = (x); } while (0)
#define SETPCL(R,x,l) do { (R)->nextpc = (x); (R)->r[l] = (R)->pc + 4; } while (0)
#define RBYTE(R,x) (*(R)->cur.read_byte)((R)->program, x)
#define RWORD(R,x) (*(R)->cur.read_word)((R)->program, x)
#define RLONG(R,x) (*(R)->cur.read_dword)((R)->program, x)
#define RBYTE(R,x) (*(R)->cur.read_byte)(*(R)->program, x)
#define RWORD(R,x) (*(R)->cur.read_word)(*(R)->program, x)
#define RLONG(R,x) (*(R)->cur.read_dword)(*(R)->program, x)
#define WBYTE(R,x,v) (*(R)->cur.write_byte)((R)->program, x, v)
#define WWORD(R,x,v) (*(R)->cur.write_word)((R)->program, x, v)
#define WLONG(R,x,v) (*(R)->cur.write_dword)((R)->program, x, v)
#define WBYTE(R,x,v) (*(R)->cur.write_byte)(*(R)->program, x, v)
#define WWORD(R,x,v) (*(R)->cur.write_word)(*(R)->program, x, v)
#define WLONG(R,x,v) (*(R)->cur.write_dword)(*(R)->program, x, v)
#define SR cpr[0][COP0_Status]
#define CAUSE cpr[0][COP0_Cause]
@ -187,19 +187,19 @@ static void lwr_le(r3000_state *r3000, UINT32 op);
static void swl_le(r3000_state *r3000, UINT32 op);
static void swr_le(r3000_state *r3000, UINT32 op);
static UINT8 readcache_be(address_space *space, offs_t offset);
static UINT16 readcache_be_word(address_space *space, offs_t offset);
static UINT32 readcache_be_dword(address_space *space, offs_t offset);
static void writecache_be(address_space *space, offs_t offset, UINT8 data);
static void writecache_be_word(address_space *space, offs_t offset, UINT16 data);
static void writecache_be_dword(address_space *space, offs_t offset, UINT32 data);
static UINT8 readcache_be(address_space &space, offs_t offset);
static UINT16 readcache_be_word(address_space &space, offs_t offset);
static UINT32 readcache_be_dword(address_space &space, offs_t offset);
static void writecache_be(address_space &space, offs_t offset, UINT8 data);
static void writecache_be_word(address_space &space, offs_t offset, UINT16 data);
static void writecache_be_dword(address_space &space, offs_t offset, UINT32 data);
static UINT8 readcache_le(address_space *space, offs_t offset);
static UINT16 readcache_le_word(address_space *space, offs_t offset);
static UINT32 readcache_le_dword(address_space *space, offs_t offset);
static void writecache_le(address_space *space, offs_t offset, UINT8 data);
static void writecache_le_word(address_space *space, offs_t offset, UINT16 data);
static void writecache_le_dword(address_space *space, offs_t offset, UINT32 data);
static UINT8 readcache_le(address_space &space, offs_t offset);
static UINT16 readcache_le_word(address_space &space, offs_t offset);
static UINT32 readcache_le_dword(address_space &space, offs_t offset);
static void writecache_le(address_space &space, offs_t offset, UINT8 data);
static void writecache_le_word(address_space &space, offs_t offset, UINT16 data);
static void writecache_le_dword(address_space &space, offs_t offset, UINT32 data);
@ -892,86 +892,86 @@ static CPU_EXECUTE( r3000 )
CACHE I/O
***************************************************************************/
static UINT8 readcache_be(address_space *space, offs_t offset)
static UINT8 readcache_be(address_space &space, offs_t offset)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_BE(offset)] : 0xff;
}
static UINT16 readcache_be_word(address_space *space, offs_t offset)
static UINT16 readcache_be_word(address_space &space, offs_t offset)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] : 0xffff;
}
static UINT32 readcache_be_dword(address_space *space, offs_t offset)
static UINT32 readcache_be_dword(address_space &space, offs_t offset)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
}
static void writecache_be(address_space *space, offs_t offset, UINT8 data)
static void writecache_be(address_space &space, offs_t offset, UINT8 data)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_BE(offset)] = data;
}
static void writecache_be_word(address_space *space, offs_t offset, UINT16 data)
static void writecache_be_word(address_space &space, offs_t offset, UINT16 data)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] = data;
}
static void writecache_be_dword(address_space *space, offs_t offset, UINT32 data)
static void writecache_be_dword(address_space &space, offs_t offset, UINT32 data)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
}
static UINT8 readcache_le(address_space *space, offs_t offset)
static UINT8 readcache_le(address_space &space, offs_t offset)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_LE(offset)] : 0xff;
}
static UINT16 readcache_le_word(address_space *space, offs_t offset)
static UINT16 readcache_le_word(address_space &space, offs_t offset)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] : 0xffff;
}
static UINT32 readcache_le_dword(address_space *space, offs_t offset)
static UINT32 readcache_le_dword(address_space &space, offs_t offset)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
}
static void writecache_le(address_space *space, offs_t offset, UINT8 data)
static void writecache_le(address_space &space, offs_t offset, UINT8 data)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_LE(offset)] = data;
}
static void writecache_le_word(address_space *space, offs_t offset, UINT16 data)
static void writecache_le_word(address_space &space, offs_t offset, UINT16 data)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] = data;
}
static void writecache_le_dword(address_space *space, offs_t offset, UINT32 data)
static void writecache_le_dword(address_space &space, offs_t offset, UINT32 data)
{
r3000_state *r3000 = get_safe_token(&space->device());
r3000_state *r3000 = get_safe_token(&space.device());
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
}

44
src/emu/cpu/powerpc/ppc.c
View File

@ -330,20 +330,20 @@ struct PPC_REGS {
/* PowerPC function pointers for memory accesses/exceptions */
jmp_buf exception_jmpbuf;
UINT8 (*read8)(address_space *space, offs_t address);
UINT16 (*read16)(address_space *space, offs_t address);
UINT32 (*read32)(address_space *space, offs_t address);
UINT64 (*read64)(address_space *space, offs_t address);
void (*write8)(address_space *space, offs_t address, UINT8 data);
void (*write16)(address_space *space, offs_t address, UINT16 data);
void (*write32)(address_space *space, offs_t address, UINT32 data);
void (*write64)(address_space *space, offs_t address, UINT64 data);
UINT16 (*read16_unaligned)(address_space *space, offs_t address);
UINT32 (*read32_unaligned)(address_space *space, offs_t address);
UINT64 (*read64_unaligned)(address_space *space, offs_t address);
void (*write16_unaligned)(address_space *space, offs_t address, UINT16 data);
void (*write32_unaligned)(address_space *space, offs_t address, UINT32 data);
void (*write64_unaligned)(address_space *space, offs_t address, UINT64 data);
UINT8 (*read8)(address_space &space, offs_t address);
UINT16 (*read16)(address_space &space, offs_t address);
UINT32 (*read32)(address_space &space, offs_t address);
UINT64 (*read64)(address_space &space, offs_t address);
void (*write8)(address_space &space, offs_t address, UINT8 data);
void (*write16)(address_space &space, offs_t address, UINT16 data);
void (*write32)(address_space &space, offs_t address, UINT32 data);
void (*write64)(address_space &space, offs_t address, UINT64 data);
UINT16 (*read16_unaligned)(address_space &space, offs_t address);
UINT32 (*read32_unaligned)(address_space &space, offs_t address);
UINT64 (*read64_unaligned)(address_space &space, offs_t address);
void (*write16_unaligned)(address_space &space, offs_t address, UINT16 data);
void (*write32_unaligned)(address_space &space, offs_t address, UINT32 data);
void (*write64_unaligned)(address_space &space, offs_t address, UINT64 data);
void (* optable19[1024])(UINT32);
void (* optable31[1024])(UINT32);
@ -786,14 +786,14 @@ INLINE UINT32 ppc_get_spr(int spr)
return 0;
}
static UINT8 ppc_read8_translated(address_space *space, offs_t address);
static UINT16 ppc_read16_translated(address_space *space, offs_t address);
static UINT32 ppc_read32_translated(address_space *space, offs_t address);
static UINT64 ppc_read64_translated(address_space *space, offs_t address);
static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data);
static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data);
static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data);
static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data);
static UINT8 ppc_read8_translated(address_space &space, offs_t address);
static UINT16 ppc_read16_translated(address_space &space, offs_t address);
static UINT32 ppc_read32_translated(address_space &space, offs_t address);
static UINT64 ppc_read64_translated(address_space &space, offs_t address);
static void ppc_write8_translated(address_space &space, offs_t address, UINT8 data);
static void ppc_write16_translated(address_space &space, offs_t address, UINT16 data);
static void ppc_write32_translated(address_space &space, offs_t address, UINT32 data);
static void ppc_write64_translated(address_space &space, offs_t address, UINT64 data);
INLINE void ppc_set_msr(UINT32 value)
{

16
src/emu/cpu/powerpc/ppc403.c
View File

@ -906,47 +906,47 @@ static void ppc403_dma_exec(int ch)
/*********************************************************************************/
static UINT8 ppc403_read8(address_space *space, UINT32 a)
static UINT8 ppc403_read8(address_space &space, UINT32 a)
{
if(a >= 0x40000000 && a <= 0x4000000f) /* Serial Port */
return ppc403_spu_r(a);
return space->read_byte(a);
return space.read_byte(a);
}
#define ppc403_read16 memory_read_word_32be
#define ppc403_read32 memory_read_dword_32be
static void ppc403_write8(address_space *space, UINT32 a, UINT8 d)
static void ppc403_write8(address_space &space, UINT32 a, UINT8 d)
{
if( a >= 0x40000000 && a <= 0x4000000f ) /* Serial Port */
{
ppc403_spu_w(a, d);
return;
}
space->write_byte(a, d);
space.write_byte(a, d);
}
#define ppc403_write16 memory_write_word_32be
#define ppc403_write32 memory_write_dword_32be
static UINT16 ppc403_read16_unaligned(address_space *space, UINT32 a)
static UINT16 ppc403_read16_unaligned(address_space &space, UINT32 a)
{
fatalerror("ppc: Unaligned read16 %08X at %08X\n", a, ppc.pc);
return 0;
}
static UINT32 ppc403_read32_unaligned(address_space *space, UINT32 a)
static UINT32 ppc403_read32_unaligned(address_space &space, UINT32 a)
{
fatalerror("ppc: Unaligned read32 %08X at %08X\n", a, ppc.pc);
return 0;
}
static void ppc403_write16_unaligned(address_space *space, UINT32 a, UINT16 d)
static void ppc403_write16_unaligned(address_space &space, UINT32 a, UINT16 d)
{
fatalerror("ppc: Unaligned write16 %08X, %04X at %08X\n", a, d, ppc.pc);
}
static void ppc403_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
static void ppc403_write32_unaligned(address_space &space, UINT32 a, UINT32 d)
{
fatalerror("ppc: Unaligned write32 %08X, %08X at %08X\n", a, d, ppc.pc);
}

48
src/emu/cpu/powerpc/ppc_mem.c
View File

@ -66,29 +66,29 @@ INLINE void WRITE64(UINT32 a, UINT64 d)
/***********************************************************************/
static UINT16 ppc_read16_unaligned(address_space *space, UINT32 a)
static UINT16 ppc_read16_unaligned(address_space &space, UINT32 a)
{
return ((UINT16)ppc.read8(space, a+0) << 8) | ((UINT16)ppc.read8(space, a+1) << 0);
}
static UINT32 ppc_read32_unaligned(address_space *space, UINT32 a)
static UINT32 ppc_read32_unaligned(address_space &space, UINT32 a)
{
return ((UINT32)ppc.read8(space, a+0) << 24) | ((UINT32)ppc.read8(space, a+1) << 16) |
((UINT32)ppc.read8(space, a+2) << 8) | ((UINT32)ppc.read8(space, a+3) << 0);
}
static UINT64 ppc_read64_unaligned(address_space *space, UINT32 a)
static UINT64 ppc_read64_unaligned(address_space &space, UINT32 a)
{
return ((UINT64)READ32(space, a+0) << 32) | (UINT64)(READ32(space, a+4));
}
static void ppc_write16_unaligned(address_space *space, UINT32 a, UINT16 d)
static void ppc_write16_unaligned(address_space &space, UINT32 a, UINT16 d)
{
ppc.write8(space, a+0, (UINT8)(d >> 8));
ppc.write8(space, a+1, (UINT8)(d));
}
static void ppc_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
static void ppc_write32_unaligned(address_space &space, UINT32 a, UINT32 d)
{
ppc.write8(space, a+0, (UINT8)(d >> 24));
ppc.write8(space, a+1, (UINT8)(d >> 16));
@ -96,7 +96,7 @@ static void ppc_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
ppc.write8(space, a+3, (UINT8)(d >> 0));
}
static void ppc_write64_unaligned(address_space *space, UINT32 a, UINT64 d)
static void ppc_write64_unaligned(address_space &space, UINT32 a, UINT64 d)
{
ppc.write32(space, a+0, (UINT32)(d >> 32));
ppc.write32(space, a+4, (UINT32)(d));
@ -289,59 +289,59 @@ static int ppc_translate_address_cb(address_spacenum space, offs_t *addr)
return success;
}
static UINT8 ppc_read8_translated(address_space *space, offs_t address)
static UINT8 ppc_read8_translated(address_space &space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return space->read_byte(address);
return space.read_byte(address);
}
static UINT16 ppc_read16_translated(address_space *space, offs_t address)
static UINT16 ppc_read16_translated(address_space &space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return space->read_word(address);
return space.read_word(address);
}
static UINT32 ppc_read32_translated(address_space *space, offs_t address)
static UINT32 ppc_read32_translated(address_space &space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return space->read_dword(address);
return space.read_dword(address);
}
static UINT64 ppc_read64_translated(address_space *space, offs_t address)
static UINT64 ppc_read64_translated(address_space &space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return space->read_qword(address);
return space.read_qword(address);
}
static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data)
static void ppc_write8_translated(address_space &space, offs_t address, UINT8 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
space->write_byte(address, data);
space.write_byte(address, data);
}
static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data)
static void ppc_write16_translated(address_space &space, offs_t address, UINT16 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
space->write_word(address, data);
space.write_word(address, data);
}
static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data)
static void ppc_write32_translated(address_space &space, offs_t address, UINT32 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
space->write_dword(address, data);
space.write_dword(address, data);
}
static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data)
static void ppc_write64_translated(address_space &space, offs_t address, UINT64 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
space->write_qword(address, data);
space.write_qword(address, data);
}
#ifndef PPC_DRC
static UINT32 ppc_readop_translated(address_space *space, offs_t address)
static UINT32 ppc_readop_translated(address_space &space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_CODE | PPC_TRANSLATE_READ);
return space->read_dword(address);
return space.read_dword(address);
}
#endif

4
src/emu/cpu/powerpc/ppccom.c
View File

@ -2337,7 +2337,7 @@ updateirq:
static READ8_HANDLER( ppc4xx_spu_r )
{
powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space->device())->token();
powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space.device())->token();
UINT8 result = 0xff;
switch (offset)
@ -2364,7 +2364,7 @@ static READ8_HANDLER( ppc4xx_spu_r )
static WRITE8_HANDLER( ppc4xx_spu_w )
{
powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space->device())->token();
powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space.device())->token();
UINT8 oldstate, newstate;
if (PRINTF_SPU)

40
src/emu/cpu/se3208/se3208.c
View File

@ -65,47 +65,47 @@ INLINE se3208_state_t *get_safe_token(device_t *device)
return (se3208_state_t *)downcast<legacy_cpu_device *>(device)->token();
}
INLINE UINT32 read_dword_unaligned(address_space *space, UINT32 address)
INLINE UINT32 read_dword_unaligned(address_space &space, UINT32 address)
{
if (address & 3)
return space->read_byte(address) | space->read_byte(address+1)<<8 | space->read_byte(address+2)<<16 | space->read_byte(address+3)<<24;
return space.read_byte(address) | space.read_byte(address+1)<<8 | space.read_byte(address+2)<<16 | space.read_byte(address+3)<<24;
else
return space->read_dword(address);
return space.read_dword(address);
}
INLINE UINT16 read_word_unaligned(address_space *space, UINT32 address)
INLINE UINT16 read_word_unaligned(address_space &space, UINT32 address)
{
if (address & 1)
return space->read_byte(address) | space->read_byte(address+1)<<8;
return space.read_byte(address) | space.read_byte(address+1)<<8;
else
return space->read_word(address);
return space.read_word(address);
}
INLINE void write_dword_unaligned(address_space *space, UINT32 address, UINT32 data)
INLINE void write_dword_unaligned(address_space &space, UINT32 address, UINT32 data)
{
if (address & 3)
{
space->write_byte(address, data & 0xff);
space->write_byte(address+1, (data>>8)&0xff);
space->write_byte(address+2, (data>>16)&0xff);
space->write_byte(address+3, (data>>24)&0xff);
space.write_byte(address, data & 0xff);
space.write_byte(address+1, (data>>8)&0xff);
space.write_byte(address+2, (data>>16)&0xff);
space.write_byte(address+3, (data>>24)&0xff);
}
else
{
space->write_dword(address, data);
space.write_dword(address, data);
}
}
INLINE void write_word_unaligned(address_space *space, UINT32 address, UINT16 data)
INLINE void write_word_unaligned(address_space &space, UINT32 address, UINT16 data)
{
if (address & 1)
{
space->write_byte(address, data & 0xff);
space->write_byte(address+1, (data>>8)&0xff);
space.write_byte(address, data & 0xff);
space.write_byte(address+1, (data>>8)&0xff);
}
else
{
space->write_word(address, data);
space.write_word(address, data);
}
}
@ -117,12 +117,12 @@ INLINE UINT8 SE3208_Read8(se3208_state_t *se3208_state, UINT32 addr)
INLINE UINT16 SE3208_Read16(se3208_state_t *se3208_state, UINT32 addr)
{
return read_word_unaligned(se3208_state->program,addr);
return read_word_unaligned(*se3208_state->program,addr);
}
INLINE UINT32 SE3208_Read32(se3208_state_t *se3208_state, UINT32 addr)
{
return read_dword_unaligned(se3208_state->program,addr);
return read_dword_unaligned(*se3208_state->program,addr);
}
INLINE void SE3208_Write8(se3208_state_t *se3208_state, UINT32 addr,UINT8 val)
@ -132,12 +132,12 @@ INLINE void SE3208_Write8(se3208_state_t *se3208_state, UINT32 addr,UINT8 val)
INLINE void SE3208_Write16(se3208_state_t *se3208_state, UINT32 addr,UINT16 val)
{
write_word_unaligned(se3208_state->program,addr,val);
write_word_unaligned(*se3208_state->program,addr,val);
}
INLINE void SE3208_Write32(se3208_state_t *se3208_state, UINT32 addr,UINT32 val)
{
write_dword_unaligned(se3208_state->program,addr,val);
write_dword_unaligned(*se3208_state->program,addr,val);
}

10
src/emu/cpu/sh2/sh2comn.c
View File

@ -27,7 +27,7 @@ static const int div_tab[4] = { 3, 5, 7, 0 };
INLINE UINT32 RL(sh2_state *sh2, offs_t A)
{
if (A >= 0xe0000000)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
if (A >= 0xc0000000)
return sh2->program->read_dword(A);
@ -42,7 +42,7 @@ INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
{
if (A >= 0xe0000000)
{
sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);
sh2_internal_w(*sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);
return;
}
@ -508,7 +508,7 @@ static void sh2_dmac_check(sh2_state *sh2, int dma)
WRITE32_HANDLER( sh2_internal_w )
{
sh2_state *sh2 = GET_SH2(&space->device());
sh2_state *sh2 = GET_SH2(&space.device());
UINT32 old;
#ifdef USE_SH2DRC
@ -522,7 +522,7 @@ WRITE32_HANDLER( sh2_internal_w )
// logerror("sh2_internal_w: Write %08x (%x), %08x @ %08x\n", 0xfffffe00+offset*4, offset, data, mem_mask);
// if(offset != 0x20)
// printf("sh2_internal_w: Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, space->device().safe_pc());
// printf("sh2_internal_w: Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, space.device().safe_pc());
switch( offset )
{
@ -688,7 +688,7 @@ WRITE32_HANDLER( sh2_internal_w )
READ32_HANDLER( sh2_internal_r )
{
sh2_state *sh2 = GET_SH2(&space->device());
sh2_state *sh2 = GET_SH2(&space.device());
#ifdef USE_SH2DRC
offset &= 0x7f;

4
src/emu/cpu/sh2/sh2drc.c
View File

@ -149,7 +149,7 @@ INLINE sh2_state *get_safe_token(device_t *device)
INLINE UINT16 RW(sh2_state *sh2, offs_t A)
{
if (A >= 0xe0000000)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
if (A >= 0xc0000000)
return sh2->program->read_word(A);
@ -160,7 +160,7 @@ INLINE UINT16 RW(sh2_state *sh2, offs_t A)
INLINE UINT32 RL(sh2_state *sh2, offs_t A)
{
if (A >= 0xe0000000)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
if (A >= 0xc0000000)
return sh2->program->read_dword(A);

8
src/emu/cpu/sh4/sh3comn.c
View File

@ -12,7 +12,7 @@
WRITE32_HANDLER( sh3_internal_high_w )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
COMBINE_DATA(&sh4->m_sh3internal_upper[offset]);
switch (offset)
@ -75,7 +75,7 @@ WRITE32_HANDLER( sh3_internal_high_w )
READ32_HANDLER( sh3_internal_high_r )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
UINT32 ret = 0;
@ -140,7 +140,7 @@ READ32_HANDLER( sh3_internal_high_r )
READ32_HANDLER( sh3_internal_r )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
if (offset<0x1000)
{
@ -385,7 +385,7 @@ READ32_HANDLER( sh3_internal_r )
WRITE32_HANDLER( sh3_internal_w )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());

8
src/emu/cpu/sh4/sh4comn.c
View File

@ -669,7 +669,7 @@ void sh4_handler_ipra_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
WRITE32_HANDLER( sh4_internal_w )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
int a;
UINT32 addr = (offset << 2) + 0xfe000000;
offset = ((addr & 0xfc) >> 2) | ((addr & 0x1fe0000) >> 11);
@ -897,7 +897,7 @@ WRITE32_HANDLER( sh4_internal_w )
READ32_HANDLER( sh4_internal_r )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
if (sh4->cpu_type != CPU_TYPE_SH4)
fatalerror("sh4_internal_r uses sh4->m[] with SH3\n");
@ -1247,7 +1247,7 @@ UINT32 sh4_getsqremap(sh4_state *sh4, UINT32 address)
READ64_HANDLER( sh4_tlb_r )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
int offs = offset*8;
@ -1265,7 +1265,7 @@ READ64_HANDLER( sh4_tlb_r )
WRITE64_HANDLER( sh4_tlb_w )
{
sh4_state *sh4 = get_safe_token(&space->device());
sh4_state *sh4 = get_safe_token(&space.device());
int offs = offset*8;

4
src/emu/cpu/tlcs90/tlcs90.c
View File

@ -2283,7 +2283,7 @@ FFED BX R/W Reset Description
static READ8_HANDLER( t90_internal_registers_r )
{
t90_Regs *cpustate = get_safe_token(&space->device());
t90_Regs *cpustate = get_safe_token(&space.device());
#define RIO cpustate->io->read_byte( T90_IOBASE+offset )
@ -2498,7 +2498,7 @@ static WRITE8_HANDLER( t90_internal_registers_w )
{
#define WIO cpustate->io->write_byte( T90_IOBASE+offset, data )
t90_Regs *cpustate = get_safe_token(&space->device());
t90_Regs *cpustate = get_safe_token(&space.device());
UINT8 out_mask;
UINT8 old = cpustate->internal_registers[offset];
switch ( T90_IOBASE + offset )

8
src/emu/cpu/tlcs900/tlcs900.c
View File

@ -983,7 +983,7 @@ static void tlcs900_input_level_change( tlcs900_state *cpustate, int input, int
static READ8_HANDLER( tlcs900_internal_r )
{
tlcs900_state *cpustate = get_safe_token( &space->device() );
tlcs900_state *cpustate = get_safe_token( &space.device() );
return cpustate->reg[ offset ];
}
@ -991,7 +991,7 @@ static READ8_HANDLER( tlcs900_internal_r )
static WRITE8_HANDLER( tlcs900_internal_w )
{
tlcs900_state *cpustate = get_safe_token( &space->device() );
tlcs900_state *cpustate = get_safe_token( &space.device() );
switch ( offset )
{
@ -1767,7 +1767,7 @@ static CPU_RESET( tmp95c063 )
static READ8_HANDLER( tmp95c063_internal_r )
{
tlcs900_state *cpustate = get_safe_token( &space->device() );
tlcs900_state *cpustate = get_safe_token( &space.device() );
if (!cpustate->port_read.isnull())
{
@ -1794,7 +1794,7 @@ static READ8_HANDLER( tmp95c063_internal_r )
static WRITE8_HANDLER( tmp95c063_internal_w )
{
tlcs900_state *cpustate = get_safe_token( &space->device() );
tlcs900_state *cpustate = get_safe_token( &space.device() );
switch ( offset )
{

8
src/emu/cpu/tms32051/tms32051.c
View File

@ -413,7 +413,7 @@ static CPU_EXECUTE( tms )
static READ16_HANDLER( cpuregs_r )
{
tms32051_state *cpustate = get_safe_token(&space->device());
tms32051_state *cpustate = get_safe_token(&space.device());
switch (offset)
{
@ -458,7 +458,7 @@ static READ16_HANDLER( cpuregs_r )
case 0x28: return 0; // PDWSR
default:
if(!space->debugger_access())
if(!space.debugger_access())
fatalerror("32051: cpuregs_r: unimplemented memory-mapped register %02X at %04X\n", offset, cpustate->pc-1);
}
@ -467,7 +467,7 @@ static READ16_HANDLER( cpuregs_r )
static WRITE16_HANDLER( cpuregs_w )
{
tms32051_state *cpustate = get_safe_token(&space->device());
tms32051_state *cpustate = get_safe_token(&space.device());
switch (offset)
{
@ -536,7 +536,7 @@ static WRITE16_HANDLER( cpuregs_w )
case 0x28: break; // PDWSR
default:
if(!space->debugger_access())
if(!space.debugger_access())
fatalerror("32051: cpuregs_w: unimplemented memory-mapped register %02X, data %04X at %04X\n", offset, data, cpustate->pc-1);
}
}

122
src/emu/cpu/tms34010/34010gfx.c
View File

@ -201,28 +201,28 @@ static int compute_pixblt_b_cycles(int left_partials, int right_partials, int fu
/* Shift register handling */
static void memory_w(address_space *space, offs_t offset,UINT16 data)
static void memory_w(address_space &space, offs_t offset,UINT16 data)
{
space->write_word(offset, data);
space.write_word(offset, data);
}
static UINT16 memory_r(address_space *space, offs_t offset)
static UINT16 memory_r(address_space &space, offs_t offset)
{
return space->read_word(offset);
return space.read_word(offset);
}
static void shiftreg_w(address_space *space, offs_t offset,UINT16 data)
static void shiftreg_w(address_space &space, offs_t offset,UINT16 data)
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
if (tms->config->from_shiftreg)
(*tms->config->from_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]);
else
logerror("From ShiftReg function not set. PC = %08X\n", tms->pc);
}
static UINT16 shiftreg_r(address_space *space, offs_t offset)
static UINT16 shiftreg_r(address_space &space, offs_t offset)
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
if (tms->config->to_shiftreg)
(*tms->config->to_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]);
else
@ -230,9 +230,9 @@ static UINT16 shiftreg_r(address_space *space, offs_t offset)
return tms->shiftreg[0];
}
static UINT16 dummy_shiftreg_r(address_space *space, offs_t offset)
static UINT16 dummy_shiftreg_r(address_space &space, offs_t offset)
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
return tms->shiftreg[0];
}
@ -1038,8 +1038,8 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
if (!P_FLAG(tms))
{
int dx, dy, x, y, /*words,*/ yreverse;
void (*word_write)(address_space *space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space *space,offs_t address);
void (*word_write)(address_space &space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space &space,offs_t address);
UINT32 readwrites = 0;
UINT32 saddr, daddr;
XY dstxy = { 0 };
@ -1113,13 +1113,13 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
UINT32 srcword, dstword = 0;
/* fetch the initial source word */
srcword = (*word_read)(tms->program, srcwordaddr++ << 1);
srcword = (*word_read)(*tms->program, srcwordaddr++ << 1);
readwrites++;
/* fetch the initial dest word */
if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY || (daddr & 0x0f) != 0)
{
dstword = (*word_read)(tms->program, dstwordaddr << 1);
dstword = (*word_read)(*tms->program, dstwordaddr << 1);
readwrites++;
}
@ -1132,7 +1132,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
/* fetch more words if necessary */
if (srcbit + BITS_PER_PIXEL > 16)
{
srcword |= (*word_read)(tms->program, srcwordaddr++ << 1) << 16;
srcword |= (*word_read)(*tms->program, srcwordaddr++ << 1) << 16;
readwrites++;
}
@ -1149,7 +1149,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
if (dstbit + BITS_PER_PIXEL > 16)
{
dstword |= (*word_read)(tms->program, (dstwordaddr + 1) << 1) << 16;
dstword |= (*word_read)(*tms->program, (dstwordaddr + 1) << 1) << 16;
readwrites++;
}
@ -1164,7 +1164,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
dstbit += BITS_PER_PIXEL;
if (dstbit > 16)
{
(*word_write)(tms->program, dstwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dstwordaddr++ << 1, dstword);
readwrites++;
dstbit -= 16;
dstword >>= 16;
@ -1177,13 +1177,13 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
/* if we're right-partial, read and mask the remaining bits */
if (dstbit != 16)
{
UINT16 origdst = (*word_read)(tms->program, dstwordaddr << 1);
UINT16 origdst = (*word_read)(*tms->program, dstwordaddr << 1);
UINT16 mask = 0xffff << dstbit;
dstword = (dstword & ~mask) | (origdst & mask);
readwrites++;
}
(*word_write)(tms->program, dstwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dstwordaddr++ << 1, dstword);
readwrites++;
}
@ -1215,14 +1215,14 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
dwordaddr = daddr >> 4;
/* fetch the initial source word */
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = PIXEL_MASK << (saddr & 15);
/* handle the left partial word */
if (left_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
dstmask = PIXEL_MASK << (daddr & 15);
/* loop over partials */
@ -1231,7 +1231,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
/* fetch another word if necessary */
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = PIXEL_MASK;
}
@ -1253,7 +1253,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* loop over full words */
@ -1261,7 +1261,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
{
/* fetch the destination word (if necessary) */
if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
else
dstword = 0;
dstmask = PIXEL_MASK;
@ -1272,7 +1272,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
/* fetch another word if necessary */
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = PIXEL_MASK;
}
@ -1294,14 +1294,14 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* handle the right partial word */
if (right_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
dstmask = PIXEL_MASK;
/* loop over partials */
@ -1311,7 +1311,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
if (srcmask == 0)
{
LOGGFX((" right fetch @ %08x\n", swordaddr));
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = PIXEL_MASK;
}
@ -1333,7 +1333,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
#endif
@ -1385,8 +1385,8 @@ static void FUNCTION_NAME(pixblt_r)(tms34010_state *tms, int src_is_linear, int
if (!P_FLAG(tms))
{
int dx, dy, x, y, words, yreverse;
void (*word_write)(address_space *space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space *space,offs_t address);
void (*word_write)(address_space &space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space &space,offs_t address);
UINT32 saddr, daddr;
XY dstxy = { 0 };
@ -1484,14 +1484,14 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
dwordaddr = (daddr + 15) >> 4;
/* fetch the initial source word */
srcword = (*word_read)(tms->program, --swordaddr << 1);
srcword = (*word_read)(*tms->program, --swordaddr << 1);
srcmask = PIXEL_MASK << ((saddr - BITS_PER_PIXEL) & 15);
/* handle the right partial word */
if (right_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, --dwordaddr << 1);
dstword = (*word_read)(*tms->program, --dwordaddr << 1);
dstmask = PIXEL_MASK << ((daddr - BITS_PER_PIXEL) & 15);
/* loop over partials */
@ -1500,7 +1500,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
/* fetch source pixel if necessary */
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, --swordaddr << 1);
srcword = (*word_read)(*tms->program, --swordaddr << 1);
srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
}
@ -1522,7 +1522,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
}
/* write the result */
(*word_write)(tms->program, dwordaddr << 1, dstword);
(*word_write)(*tms->program, dwordaddr << 1, dstword);
}
/* loop over full words */
@ -1531,7 +1531,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
/* fetch the destination word (if necessary) */
dwordaddr--;
if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
else
dstword = 0;
dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
@ -1542,7 +1542,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
/* fetch source pixel if necessary */
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, --swordaddr << 1);
srcword = (*word_read)(*tms->program, --swordaddr << 1);
srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
}
@ -1564,14 +1564,14 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
}
/* write the result */
(*word_write)(tms->program, dwordaddr << 1, dstword);
(*word_write)(*tms->program, dwordaddr << 1, dstword);
}
/* handle the left partial word */
if (left_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, --dwordaddr << 1);
dstword = (*word_read)(*tms->program, --dwordaddr << 1);
dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
/* loop over partials */
@ -1580,7 +1580,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
/* fetch the source pixel if necessary */
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, --swordaddr << 1);
srcword = (*word_read)(*tms->program, --swordaddr << 1);
srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
}
@ -1602,7 +1602,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
}
/* write the result */
(*word_write)(tms->program, dwordaddr << 1, dstword);
(*word_write)(*tms->program, dwordaddr << 1, dstword);
}
/* update for next row */
@ -1650,8 +1650,8 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
if (!P_FLAG(tms))
{
int dx, dy, x, y, words, left_partials, right_partials, full_words;
void (*word_write)(address_space *space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space *space,offs_t address);
void (*word_write)(address_space &space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space &space,offs_t address);
UINT32 saddr, daddr;
XY dstxy = { 0 };
@ -1727,14 +1727,14 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
dwordaddr = daddr >> 4;
/* fetch the initial source word */
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = 1 << (saddr & 15);
/* handle the left partial word */
if (left_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
dstmask = PIXEL_MASK << (daddr & 15);
/* loop over partials */
@ -1751,7 +1751,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
srcmask <<= 1;
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = 0x0001;
}
@ -1760,7 +1760,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* loop over full words */
@ -1768,7 +1768,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
{
/* fetch the destination word (if necessary) */
if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
else
dstword = 0;
dstmask = PIXEL_MASK;
@ -1787,7 +1787,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
srcmask <<= 1;
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = 0x0001;
}
@ -1796,14 +1796,14 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* handle the right partial word */
if (right_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
dstmask = PIXEL_MASK;
/* loop over partials */
@ -1820,7 +1820,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
srcmask <<= 1;
if (srcmask == 0)
{
srcword = (*word_read)(tms->program, swordaddr++ << 1);
srcword = (*word_read)(*tms->program, swordaddr++ << 1);
srcmask = 0x0001;
}
@ -1829,7 +1829,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* update for next row */
@ -1864,8 +1864,8 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
if (!P_FLAG(tms))
{
int dx, dy, x, y, words, left_partials, right_partials, full_words;
void (*word_write)(address_space *space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space *space,offs_t address);
void (*word_write)(address_space &space,offs_t address,UINT16 data);
UINT16 (*word_read)(address_space &space,offs_t address);
UINT32 daddr;
XY dstxy = { 0 };
@ -1943,7 +1943,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
if (left_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
dstmask = PIXEL_MASK << (daddr & 15);
/* loop over partials */
@ -1960,7 +1960,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* loop over full words */
@ -1968,7 +1968,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
{
/* fetch the destination word (if necessary) */
if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
else
dstword = 0;
dstmask = PIXEL_MASK;
@ -1987,14 +1987,14 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* handle the right partial word */
if (right_partials != 0)
{
/* fetch the destination word */
dstword = (*word_read)(tms->program, dwordaddr << 1);
dstword = (*word_read)(*tms->program, dwordaddr << 1);
dstmask = PIXEL_MASK;
/* loop over partials */
@ -2011,7 +2011,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
}
/* write the result */
(*word_write)(tms->program, dwordaddr++ << 1, dstword);
(*word_write)(*tms->program, dwordaddr++ << 1, dstword);
}
/* update for next row */

31
src/emu/cpu/tms34010/tms34010.c
View File

@ -316,7 +316,7 @@ static UINT32 read_pixel_32(tms34010_state *tms, offs_t offset)
static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset)
{
if (tms->config->to_shiftreg)
tms->config->to_shiftreg(tms->program, offset, &tms->shiftreg[0]);
tms->config->to_shiftreg(*tms->program, offset, &tms->shiftreg[0]);
else
fatalerror("To ShiftReg function not set. PC = %08X\n", tms->pc);
return tms->shiftreg[0];
@ -460,7 +460,7 @@ static void write_pixel_r_t_32(tms34010_state *tms, offs_t offset, UINT32 data)
static void write_pixel_shiftreg(tms34010_state *tms, offs_t offset, UINT32 data)
{
if (tms->config->from_shiftreg)
tms->config->from_shiftreg(tms->program, offset, &tms->shiftreg[0]);
tms->config->from_shiftreg(*tms->program, offset, &tms->shiftreg[0]);
else
fatalerror("From ShiftReg function not set. PC = %08X\n", tms->pc);
}
@ -699,7 +699,7 @@ static CPU_RESET( tms34010 )
/* the first time we are run */
tms->reset_deferred = tms->config->halt_on_reset;
if (tms->config->halt_on_reset)
tms34010_io_register_w(device->space(AS_PROGRAM), REG_HSTCTLH, 0x8000, 0xffff);
tms34010_io_register_w(*device->space(AS_PROGRAM), REG_HSTCTLH, 0x8000, 0xffff);
}
@ -1193,7 +1193,7 @@ static const char *const ioreg_name[] =
WRITE16_HANDLER( tms34010_io_register_w )
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
int oldreg, newreg;
/* Set register */
@ -1222,7 +1222,7 @@ WRITE16_HANDLER( tms34010_io_register_w )
break;
case REG_PMASK:
if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
if (data) logerror("Plane masking not supported. PC=%08X\n", space.device().safe_pc());
break;
case REG_DPYCTL:
@ -1262,12 +1262,12 @@ WRITE16_HANDLER( tms34010_io_register_w )
if (!(oldreg & 0x0080) && (newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space->device(), 1);
(*tms->config->output_int)(&space.device(), 1);
}
else if ((oldreg & 0x0080) && !(newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space->device(), 0);
(*tms->config->output_int)(&space.device(), 0);
}
/* input interrupt? (should really be state-based, but the functions don't exist!) */
@ -1336,7 +1336,7 @@ static const char *const ioreg020_name[] =
WRITE16_HANDLER( tms34020_io_register_w )
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
int oldreg, newreg;
/* Set register */
@ -1373,7 +1373,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
case REG020_PMASKL:
case REG020_PMASKH:
if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
if (data) logerror("Plane masking not supported. PC=%08X\n", space.device().safe_pc());
break;
case REG020_DPYCTL:
@ -1413,12 +1413,12 @@ WRITE16_HANDLER( tms34020_io_register_w )
if (!(oldreg & 0x0080) && (newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space->device(), 1);
(*tms->config->output_int)(&space.device(), 1);
}
else if ((oldreg & 0x0080) && !(newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space->device(), 0);
(*tms->config->output_int)(&space.device(), 0);
}
/* input interrupt? (should really be state-based, but the functions don't exist!) */
@ -1499,7 +1499,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
READ16_HANDLER( tms34010_io_register_r )
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
int result, total;
// if (LOG_CONTROL_REGS)
@ -1542,7 +1542,7 @@ READ16_HANDLER( tms34010_io_register_r )
READ16_HANDLER( tms34020_io_register_r )
{
tms34010_state *tms = get_safe_token(&space->device());
tms34010_state *tms = get_safe_token(&space.device());
int result, total;
// if (LOG_CONTROL_REGS)
@ -1595,7 +1595,6 @@ static void tms34010_state_postload(tms34010_state *tms)
void tms34010_host_w(device_t *cpu, int reg, int data)
{
address_space *space;
tms34010_state *tms = get_safe_token(cpu);
unsigned int addr;
@ -1629,12 +1628,14 @@ void tms34010_host_w(device_t *cpu, int reg, int data)
/* control register */
case TMS34010_HOST_CONTROL:
{
tms->external_host_access = TRUE;
space = tms->device->space(AS_PROGRAM);
address_space &space = *tms->device->space(AS_PROGRAM);
tms34010_io_register_w(space, REG_HSTCTLH, data & 0xff00, 0xffff);
tms34010_io_register_w(space, REG_HSTCTLL, data & 0x00ff, 0xffff);
tms->external_host_access = FALSE;
break;
}
/* error case */
default:

4
src/emu/cpu/tms34010/tms34010.h
View File

@ -197,8 +197,8 @@ struct tms34010_config
void (*scanline_callback_ind16)(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
void (*scanline_callback_rgb32)(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
void (*output_int)(device_t *device, int state); /* output interrupt callback */
void (*to_shiftreg)(address_space *space, offs_t, UINT16 *); /* shift register write */
void (*from_shiftreg)(address_space *space, offs_t, UINT16 *); /* shift register read */
void (*to_shiftreg)(address_space &space, offs_t, UINT16 *); /* shift register write */
void (*from_shiftreg)(address_space &space, offs_t, UINT16 *); /* shift register read */
};

8
src/emu/cpu/tms7000/tms7000.c
View File

@ -557,7 +557,7 @@ static void tms7000_service_timer1( device_t *device )
static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
{
tms7000_state *cpustate = get_safe_token(&space->device());
tms7000_state *cpustate = get_safe_token(&space.device());
UINT8 temp1, temp2, temp3;
switch( offset )
@ -626,7 +626,7 @@ static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
{
tms7000_state *cpustate = get_safe_token(&space->device());
tms7000_state *cpustate = get_safe_token(&space.device());
UINT8 result;
UINT8 temp1, temp2, temp3;
@ -719,12 +719,12 @@ static UINT16 bcd_sub( UINT16 a, UINT16 b)
}
static WRITE8_HANDLER( tms7000_internal_w ) {
tms7000_state *cpustate = get_safe_token(&space->device());
tms7000_state *cpustate = get_safe_token(&space.device());
cpustate->rf[ offset ] = data;
}
static READ8_HANDLER( tms7000_internal_r ) {
tms7000_state *cpustate = get_safe_token(&space->device());
tms7000_state *cpustate = get_safe_token(&space.device());
return cpustate->rf[ offset ];
}

18
src/emu/cpu/tms9900/99xxcore.h
View File

@ -529,7 +529,7 @@ static void reset_decrementer(tms99xx_state *cpustate);
READ16_HANDLER(ti990_10_internal_r)
{
//return cpustate->ROM[offset];
return space->read_word(0x1ffc00+offset);
return space.read_word(0x1ffc00+offset);
}
#endif
@ -541,13 +541,13 @@ READ16_HANDLER(ti990_10_internal_r)
*/
READ8_HANDLER(tms9995_internal1_r)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
return cpustate->RAM[offset];
}
WRITE8_HANDLER(tms9995_internal1_w)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
cpustate->RAM[offset]=data;
}
@ -556,13 +556,13 @@ WRITE8_HANDLER(tms9995_internal1_w)
*/
READ8_HANDLER(tms9995_internal2_r)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
return cpustate->RAM[offset+0xfc];
}
WRITE8_HANDLER(tms9995_internal2_w)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
cpustate->RAM[offset+0xfc]=data;
}
@ -1076,7 +1076,7 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
#if (TMS99XX_MODEL == TI990_10_ID)
READ8_HANDLER(ti990_10_mapper_cru_r)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
int reply = 0;
switch(cpustate->mapper_cru_read_register)
@ -1115,7 +1115,7 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
WRITE8_HANDLER(ti990_10_mapper_cru_w)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
switch (offset)
{
case 0:
@ -1157,13 +1157,13 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
READ8_HANDLER(ti990_10_eir_cru_r)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
return (offset == 1) ? (cpustate->error_interrupt_register & 0xff) : 0;
}
WRITE8_HANDLER(ti990_10_eir_cru_w)
{
tms99xx_state *cpustate = get_safe_token(&space->device());
tms99xx_state *cpustate = get_safe_token(&space.device());
if (offset < 4) /* does not work for EIR_MAPERR */
{
cpustate->error_interrupt_register &= ~ (1 << offset);

82
src/emu/debug/debugcmd.c
View File

@ -159,9 +159,9 @@ static void execute_unmount(running_machine &machine, int ref, int params, const
given address is valid for cheating
-------------------------------------------------*/
INLINE int cheat_address_is_valid(address_space *space, offs_t address)
INLINE int cheat_address_is_valid(address_space &space, offs_t address)
{
return debug_cpu_translate(space, TRANSLATE_READ, &address) && (space->get_write_ptr(address) != NULL);
return debug_cpu_translate(space, TRANSLATE_READ, &address) && (space.get_write_ptr(address) != NULL);
}
@ -208,7 +208,7 @@ INLINE UINT64 cheat_byte_swap(const cheat_system *cheatsys, UINT64 value)
and swapping if necessary
-------------------------------------------------*/
INLINE UINT64 cheat_read_extended(const cheat_system *cheatsys, address_space *space, offs_t address)
INLINE UINT64 cheat_read_extended(const cheat_system *cheatsys, address_space &space, offs_t address)
{
return cheat_sign_extend(cheatsys, cheat_byte_swap(cheatsys, debug_read_memory(space, address, cheatsys->width, TRUE)));
}
@ -557,7 +557,7 @@ int debug_command_parameter_cpu(running_machine &machine, const char *param, dev
address space
-------------------------------------------------*/
int debug_command_parameter_cpu_space(running_machine &machine, const char *param, int spacenum, address_space **result)
int debug_command_parameter_cpu_space(running_machine &machine, const char *param, int spacenum, address_space *&result)
{
device_t *cpu;
@ -566,8 +566,8 @@ int debug_command_parameter_cpu_space(running_machine &machine, const char *para
return FALSE;
/* fetch the space pointer */
*result = cpu->memory().space(spacenum);
if (*result == NULL)
result = cpu->memory().space(spacenum);
if (result == NULL)
{
debug_console_printf(machine, "No matching memory space found for CPU '%s'\n", cpu->tag());
return FALSE;
@ -1321,7 +1321,7 @@ static void execute_wpset(running_machine &machine, int ref, int params, const c
int wpnum;
/* CPU is implicit */
if (!debug_command_parameter_cpu_space(machine, NULL, ref, &space))
if (!debug_command_parameter_cpu_space(machine, NULL, ref, space))
return;
/* param 1 is the address */
@ -1536,7 +1536,7 @@ static void execute_save(running_machine &machine, int ref, int params, const ch
return;
if (!debug_command_parameter_number(machine, param[2], &length))
return;
if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, &space))
if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, space))
return;
/* determine the addresses to write */
@ -1554,7 +1554,7 @@ static void execute_save(running_machine &machine, int ref, int params, const ch
/* now write the data out */
for (i = offset; i <= endoffset; i++)
{
UINT8 byte = debug_read_byte(space, i, TRUE);
UINT8 byte = debug_read_byte(*space, i, TRUE);
fwrite(&byte, 1, 1, f);
}
@ -1580,7 +1580,7 @@ static void execute_load(running_machine &machine, int ref, int params, const ch
return;
if (!debug_command_parameter_number(machine, param[2], &length))
return;
if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, &space))
if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, space))
return;
/* determine the addresses to read */
@ -1603,7 +1603,7 @@ static void execute_load(running_machine &machine, int ref, int params, const ch
/* check if end of file has been reached and stop loading if it has */
if (feof(f))
break;
debug_write_byte(space, i, byte, TRUE);
debug_write_byte(*space, i, byte, TRUE);
}
/* close the file */
fclose(f);
@ -1634,7 +1634,7 @@ static void execute_dump(running_machine &machine, int ref, int params, const ch
return;
if (!debug_command_parameter_number(machine, param[4], &ascii))
return;
if (!debug_command_parameter_cpu_space(machine, (params > 5) ? param[5] : NULL, ref, &space))
if (!debug_command_parameter_cpu_space(machine, (params > 5) ? param[5] : NULL, ref, space))
return;
/* further validation */
@ -1673,9 +1673,9 @@ static void execute_dump(running_machine &machine, int ref, int params, const ch
if (i + j <= endoffset)
{
offs_t curaddr = i + j;
if (debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &curaddr))
if (debug_cpu_translate(*space, TRANSLATE_READ_DEBUG, &curaddr))
{
UINT64 value = debug_read_memory(space, i + j, width, TRUE);
UINT64 value = debug_read_memory(*space, i + j, width, TRUE);
outdex += sprintf(&output[outdex], " %s", core_i64_hex_format(value, width * 2));
}
else
@ -1692,9 +1692,9 @@ static void execute_dump(running_machine &machine, int ref, int params, const ch
for (j = 0; j < 16 && (i + j) <= endoffset; j++)
{
offs_t curaddr = i + j;
if (debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &curaddr))
if (debug_cpu_translate(*space, TRANSLATE_READ_DEBUG, &curaddr))
{
UINT8 byte = debug_read_byte(space, i + j, TRUE);
UINT8 byte = debug_read_byte(*space, i + j, TRUE);
outdex += sprintf(&output[outdex], "%c", (byte >= 32 && byte < 127) ? byte : '.');
}
else
@ -1730,7 +1730,7 @@ static void execute_cheatinit(running_machine &machine, int ref, int params, con
memset(cheat_region, 0, sizeof(cheat_region));
/* validate parameters */
if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, AS_PROGRAM, &space))
if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, AS_PROGRAM, space))
return;
if (ref == 0)
@ -1815,7 +1815,7 @@ static void execute_cheatinit(running_machine &machine, int ref, int params, con
for (i = 0; i <= region_count; i++)
if (!cheat_region[i].disabled)
for (curaddr = cheat_region[i].offset; curaddr <= cheat_region[i].endoffset; curaddr += cheat.width)
if (cheat_address_is_valid(space, curaddr))
if (cheat_address_is_valid(*space, curaddr))
real_length++;
if (real_length == 0)
@ -1844,7 +1844,7 @@ static void execute_cheatinit(running_machine &machine, int ref, int params, con
return;
}
if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, &space))
if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, space))
return;
cheat_map *newmap = auto_alloc_array(machine, cheat_map, cheat.length + real_length);
@ -1861,9 +1861,9 @@ static void execute_cheatinit(running_machine &machine, int ref, int params, con
for (i = 0; i < region_count; i++)
if (!cheat_region[i].disabled)
for (curaddr = cheat_region[i].offset; curaddr <= cheat_region[i].endoffset; curaddr += cheat.width)
if (cheat_address_is_valid(space, curaddr))
if (cheat_address_is_valid(*space, curaddr))
{
cheat.cheatmap[active_cheat].previous_value = cheat_read_extended(&cheat, space, curaddr);
cheat.cheatmap[active_cheat].previous_value = cheat_read_extended(&cheat, *space, curaddr);
cheat.cheatmap[active_cheat].first_value = cheat.cheatmap[active_cheat].previous_value;
cheat.cheatmap[active_cheat].offset = curaddr;
cheat.cheatmap[active_cheat].state = 1;
@ -1911,7 +1911,7 @@ static void execute_cheatnext(running_machine &machine, int ref, int params, con
return;
}
if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, &space))
if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, space))
return;
if (params > 1 && !debug_command_parameter_number(machine, param[1], &comp_value))
@ -1951,7 +1951,7 @@ static void execute_cheatnext(running_machine &machine, int ref, int params, con
for (cheatindex = 0; cheatindex < cheat.length; cheatindex += 1)
if (cheat.cheatmap[cheatindex].state == 1)
{
UINT64 cheat_value = cheat_read_extended(&cheat, space, cheat.cheatmap[cheatindex].offset);
UINT64 cheat_value = cheat_read_extended(&cheat, *space, cheat.cheatmap[cheatindex].offset);
UINT64 comp_byte = (ref == 0) ? cheat.cheatmap[cheatindex].previous_value : cheat.cheatmap[cheatindex].first_value;
UINT8 disable_byte = FALSE;
@ -2066,7 +2066,7 @@ static void execute_cheatlist(running_machine &machine, int ref, int params, con
UINT64 sizemask;
FILE *f = NULL;
if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, &space))
if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, space))
return;
if (!debug_command_parameter_cpu(machine, &cheat.cpu, &cpu))
@ -2097,7 +2097,7 @@ static void execute_cheatlist(running_machine &machine, int ref, int params, con
{
if (cheat.cheatmap[cheatindex].state == 1)
{
UINT64 value = cheat_byte_swap(&cheat, cheat_read_extended(&cheat, space, cheat.cheatmap[cheatindex].offset)) & sizemask;
UINT64 value = cheat_byte_swap(&cheat, cheat_read_extended(&cheat, *space, cheat.cheatmap[cheatindex].offset)) & sizemask;
offs_t address = space->byte_to_address(cheat.cheatmap[cheatindex].offset);
if (params > 0)
@ -2167,7 +2167,7 @@ static void execute_find(running_machine &machine, int ref, int params, const ch
return;
if (!debug_command_parameter_number(machine, param[1], &length))
return;
if (!debug_command_parameter_cpu_space(machine, NULL, ref, &space))
if (!debug_command_parameter_cpu_space(machine, NULL, ref, space))
return;
/* further validation */
@ -2223,10 +2223,10 @@ static void execute_find(running_machine &machine, int ref, int params, const ch
{
switch (data_size[j])
{
case 1: match = ((UINT8)debug_read_byte(space, i + suboffset, TRUE) == (UINT8)data_to_find[j]); break;
case 2: match = ((UINT16)debug_read_word(space, i + suboffset, TRUE) == (UINT16)data_to_find[j]); break;
case 4: match = ((UINT32)debug_read_dword(space, i + suboffset, TRUE) == (UINT32)data_to_find[j]); break;
case 8: match = ((UINT64)debug_read_qword(space, i + suboffset, TRUE) == (UINT64)data_to_find[j]); break;
case 1: match = ((UINT8)debug_read_byte(*space, i + suboffset, TRUE) == (UINT8)data_to_find[j]); break;
case 2: match = ((UINT16)debug_read_word(*space, i + suboffset, TRUE) == (UINT16)data_to_find[j]); break;
case 4: match = ((UINT32)debug_read_dword(*space, i + suboffset, TRUE) == (UINT32)data_to_find[j]); break;
case 8: match = ((UINT64)debug_read_qword(*space, i + suboffset, TRUE) == (UINT64)data_to_find[j]); break;
default: /* all other cases are wildcards */ break;
}
suboffset += data_size[j] & 0x0f;
@ -2265,7 +2265,7 @@ static void execute_dasm(running_machine &machine, int ref, int params, const ch
return;
if (!debug_command_parameter_number(machine, param[3], &bytes))
return;
if (!debug_command_parameter_cpu_space(machine, (params > 4) ? param[4] : NULL, AS_PROGRAM, &space))
if (!debug_command_parameter_cpu_space(machine, (params > 4) ? param[4] : NULL, AS_PROGRAM, space))
return;
/* determine the width of the bytes */
@ -2302,15 +2302,15 @@ static void execute_dasm(running_machine &machine, int ref, int params, const ch
/* make sure we can translate the address */
tempaddr = pcbyte;
if (debug_cpu_translate(space, TRANSLATE_FETCH_DEBUG, &tempaddr))
if (debug_cpu_translate(*space, TRANSLATE_FETCH_DEBUG, &tempaddr))
{
UINT8 opbuf[64], argbuf[64];
/* fetch the bytes up to the maximum */
for (numbytes = 0; numbytes < maxbytes; numbytes++)
{
opbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, FALSE);
argbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, TRUE);
opbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, FALSE);
argbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, TRUE);
}
/* disassemble the result */
@ -2323,7 +2323,7 @@ static void execute_dasm(running_machine &machine, int ref, int params, const ch
int startdex = outdex;
numbytes = space->address_to_byte(numbytes);
for (j = 0; j < numbytes; j += minbytes)
outdex += sprintf(&output[outdex], "%s ", core_i64_hex_format(debug_read_opcode(space, pcbyte + j, minbytes, FALSE), minbytes * 2));
outdex += sprintf(&output[outdex], "%s ", core_i64_hex_format(debug_read_opcode(*space, pcbyte + j, minbytes, FALSE), minbytes * 2));
if (outdex - startdex < byteswidth)
outdex += sprintf(&output[outdex], "%*s", byteswidth - (outdex - startdex), "");
outdex += sprintf(&output[outdex], " ");
@ -2449,7 +2449,7 @@ static void execute_history(running_machine &machine, int ref, int params, const
{
/* validate parameters */
address_space *space;
if (!debug_command_parameter_cpu_space(machine, (params > 0) ? param[0] : NULL, AS_PROGRAM, &space))
if (!debug_command_parameter_cpu_space(machine, (params > 0) ? param[0] : NULL, AS_PROGRAM, space))
return;
UINT64 count = device_debug::HISTORY_SIZE;
@ -2473,8 +2473,8 @@ static void execute_history(running_machine &machine, int ref, int params, const
UINT8 opbuf[64], argbuf[64];
for (int numbytes = 0; numbytes < maxbytes; numbytes++)
{
opbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, false);
argbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, true);
opbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, false);
argbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, true);
}
char buffer[200];
@ -2557,7 +2557,7 @@ static void execute_map(running_machine &machine, int ref, int params, const cha
return;
/* CPU is implicit */
if (!debug_command_parameter_cpu_space(machine, NULL, ref, &space))
if (!debug_command_parameter_cpu_space(machine, NULL, ref, space))
return;
/* do the translation first */
@ -2565,9 +2565,9 @@ static void execute_map(running_machine &machine, int ref, int params, const cha
{
static const char *const intnames[] = { "Read", "Write", "Fetch" };
taddress = space->address_to_byte(address) & space->bytemask();
if (debug_cpu_translate(space, intention, &taddress))
if (debug_cpu_translate(*space, intention, &taddress))
{
const char *mapname = const_cast<address_space *>(space)->get_handler_string((intention == TRANSLATE_WRITE_DEBUG) ? ROW_WRITE : ROW_READ, taddress);
const char *mapname = space->get_handler_string((intention == TRANSLATE_WRITE_DEBUG) ? ROW_WRITE : ROW_READ, taddress);
debug_console_printf(machine, "%7s: %s logical == %s physical -> %s\n", intnames[intention & 3], core_i64_hex_format(address, space->logaddrchars()), core_i64_hex_format(space->byte_to_address(taddress), space->addrchars()), mapname);
}
else

410
src/emu/debug/debugcpu.c
View File

@ -115,10 +115,10 @@ static void process_source_file(running_machine &machine);
/* expression handlers */
static UINT64 expression_read_memory(void *param, const char *name, expression_space space, UINT32 address, int size);
static UINT64 expression_read_program_direct(address_space *space, int opcode, offs_t address, int size);
static UINT64 expression_read_program_direct(address_space &space, int opcode, offs_t address, int size);
static UINT64 expression_read_memory_region(running_machine &machine, const char *rgntag, offs_t address, int size);
static void expression_write_memory(void *param, const char *name, expression_space space, UINT32 address, int size, UINT64 data);
static void expression_write_program_direct(address_space *space, int opcode, offs_t address, int size, UINT64 data);
static void expression_write_program_direct(address_space &space, int opcode, offs_t address, int size, UINT64 data);
static void expression_write_memory_region(running_machine &machine, const char *rgntag, offs_t address, int size, UINT64 data);
static expression_error::error_code expression_validate(void *param, const char *name, expression_space space);
@ -448,11 +448,11 @@ bool debug_comment_load(running_machine &machine)
address
-------------------------------------------------*/
int debug_cpu_translate(address_space *space, int intention, offs_t *address)
int debug_cpu_translate(address_space &space, int intention, offs_t *address)
{
device_memory_interface *memory;
if (space->device().interface(memory))
return memory->translate(space->spacenum(), intention, *address);
if (space.device().interface(memory))
return memory->translate(space.spacenum(), intention, *address);
return true;
}
@ -466,33 +466,32 @@ int debug_cpu_translate(address_space *space, int intention, offs_t *address)
the specified memory space
-------------------------------------------------*/
UINT8 debug_read_byte(address_space *_space, offs_t address, int apply_translation)
UINT8 debug_read_byte(address_space &space, offs_t address, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
UINT64 custom;
UINT8 result;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, return 0xff */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
result = 0xff;
/* if there is a custom read handler, and it returns true, use that value */
else if (space->device().memory().read(space->spacenum(), address, 1, custom))
else if (space.device().memory().read(space.spacenum(), address, 1, custom))
result = custom;
/* otherwise, call the byte reading function for the translated address */
else
result = space->read_byte(address);
result = space.read_byte(address);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
return result;
}
@ -502,14 +501,13 @@ UINT8 debug_read_byte(address_space *_space, offs_t address, int apply_translati
specified memory space
-------------------------------------------------*/
UINT16 debug_read_word(address_space *_space, offs_t address, int apply_translation)
UINT16 debug_read_word(address_space &space, offs_t address, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
UINT16 result;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* if this is misaligned read, or if there are no word readers, just read two bytes */
if ((address & 1) != 0)
@ -518,7 +516,7 @@ UINT16 debug_read_word(address_space *_space, offs_t address, int apply_translat
UINT8 byte1 = debug_read_byte(space, address + 1, apply_translation);
/* based on the endianness, the result is assembled differently */
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
result = byte0 | (byte1 << 8);
else
result = byte1 | (byte0 << 8);
@ -530,22 +528,22 @@ UINT16 debug_read_word(address_space *_space, offs_t address, int apply_translat
UINT64 custom;
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, return 0xffff */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
result = 0xffff;
/* if there is a custom read handler, and it returns true, use that value */
else if (space->device().memory().read(space->spacenum(), address, 2, custom))
else if (space.device().memory().read(space.spacenum(), address, 2, custom))
result = custom;
/* otherwise, call the byte reading function for the translated address */
else
result = space->read_word(address);
result = space.read_word(address);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
}
return result;
@ -557,14 +555,13 @@ UINT16 debug_read_word(address_space *_space, offs_t address, int apply_translat
specified memory space
-------------------------------------------------*/
UINT32 debug_read_dword(address_space *_space, offs_t address, int apply_translation)
UINT32 debug_read_dword(address_space &space, offs_t address, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
UINT32 result;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* if this is misaligned read, or if there are no dword readers, just read two words */
if ((address & 3) != 0)
@ -573,7 +570,7 @@ UINT32 debug_read_dword(address_space *_space, offs_t address, int apply_transla
UINT16 word1 = debug_read_word(space, address + 2, apply_translation);
/* based on the endianness, the result is assembled differently */
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
result = word0 | (word1 << 16);
else
result = word1 | (word0 << 16);
@ -585,22 +582,22 @@ UINT32 debug_read_dword(address_space *_space, offs_t address, int apply_transla
UINT64 custom;
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, return 0xffffffff */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
result = 0xffffffff;
/* if there is a custom read handler, and it returns true, use that value */
else if (space->device().memory().read(space->spacenum(), address, 4, custom))
else if (space.device().memory().read(space.spacenum(), address, 4, custom))
result = custom;
/* otherwise, call the byte reading function for the translated address */
else
result = space->read_dword(address);
result = space.read_dword(address);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
}
return result;
@ -612,14 +609,13 @@ UINT32 debug_read_dword(address_space *_space, offs_t address, int apply_transla
specified memory space
-------------------------------------------------*/
UINT64 debug_read_qword(address_space *_space, offs_t address, int apply_translation)
UINT64 debug_read_qword(address_space &space, offs_t address, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
UINT64 result;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* if this is misaligned read, or if there are no qword readers, just read two dwords */
if ((address & 7) != 0)
@ -628,7 +624,7 @@ UINT64 debug_read_qword(address_space *_space, offs_t address, int apply_transla
UINT32 dword1 = debug_read_dword(space, address + 4, apply_translation);
/* based on the endianness, the result is assembled differently */
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
result = dword0 | ((UINT64)dword1 << 32);
else
result = dword1 | ((UINT64)dword0 << 32);
@ -640,22 +636,22 @@ UINT64 debug_read_qword(address_space *_space, offs_t address, int apply_transla
UINT64 custom;
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, return 0xffffffffffffffff */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
result = ~(UINT64)0;
/* if there is a custom read handler, and it returns true, use that value */
else if (space->device().memory().read(space->spacenum(), address, 8, custom))
else if (space.device().memory().read(space.spacenum(), address, 8, custom))
result = custom;
/* otherwise, call the byte reading function for the translated address */
else
result = space->read_qword(address);
result = space.read_qword(address);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
}
return result;
@ -667,7 +663,7 @@ UINT64 debug_read_qword(address_space *_space, offs_t address, int apply_transla
from the specified memory space
-------------------------------------------------*/
UINT64 debug_read_memory(address_space *space, offs_t address, int size, int apply_translation)
UINT64 debug_read_memory(address_space &space, offs_t address, int size, int apply_translation)
{
UINT64 result = ~(UINT64)0 >> (64 - 8*size);
switch (size)
@ -686,31 +682,30 @@ UINT64 debug_read_memory(address_space *space, offs_t address, int size, int app
specified memory space
-------------------------------------------------*/
void debug_write_byte(address_space *_space, offs_t address, UINT8 data, int apply_translation)
void debug_write_byte(address_space &space, offs_t address, UINT8 data, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, we're done */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
;
/* if there is a custom write handler, and it returns true, use that */
else if (space->device().memory().write(space->spacenum(), address, 1, data))
else if (space.device().memory().write(space.spacenum(), address, 1, data))
;
/* otherwise, call the byte reading function for the translated address */
else
space->write_byte(address, data);
space.write_byte(address, data);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
global->memory_modified = true;
}
@ -720,18 +715,17 @@ void debug_write_byte(address_space *_space, offs_t address, UINT8 data, int app
specified memory space
-------------------------------------------------*/
void debug_write_word(address_space *_space, offs_t address, UINT16 data, int apply_translation)
void debug_write_word(address_space &space, offs_t address, UINT16 data, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* if this is a misaligned write, or if there are no word writers, just read two bytes */
if ((address & 1) != 0)
{
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
{
debug_write_byte(space, address + 0, data >> 0, apply_translation);
debug_write_byte(space, address + 1, data >> 8, apply_translation);
@ -747,22 +741,22 @@ void debug_write_word(address_space *_space, offs_t address, UINT16 data, int ap
else
{
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, we're done */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
;
/* if there is a custom write handler, and it returns true, use that */
else if (space->device().memory().write(space->spacenum(), address, 2, data))
else if (space.device().memory().write(space.spacenum(), address, 2, data))
;
/* otherwise, call the byte reading function for the translated address */
else
space->write_word(address, data);
space.write_word(address, data);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
global->memory_modified = true;
}
}
@ -773,18 +767,17 @@ void debug_write_word(address_space *_space, offs_t address, UINT16 data, int ap
specified memory space
-------------------------------------------------*/
void debug_write_dword(address_space *_space, offs_t address, UINT32 data, int apply_translation)
void debug_write_dword(address_space &space, offs_t address, UINT32 data, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* if this is a misaligned write, or if there are no dword writers, just read two words */
if ((address & 3) != 0)
{
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
{
debug_write_word(space, address + 0, data >> 0, apply_translation);
debug_write_word(space, address + 2, data >> 16, apply_translation);
@ -800,22 +793,22 @@ void debug_write_dword(address_space *_space, offs_t address, UINT32 data, int a
else
{
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, we're done */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
;
/* if there is a custom write handler, and it returns true, use that */
else if (space->device().memory().write(space->spacenum(), address, 4, data))
else if (space.device().memory().write(space.spacenum(), address, 4, data))
;
/* otherwise, call the byte reading function for the translated address */
else
space->write_dword(address, data);
space.write_dword(address, data);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
global->memory_modified = true;
}
}
@ -826,18 +819,17 @@ void debug_write_dword(address_space *_space, offs_t address, UINT32 data, int a
specified memory space
-------------------------------------------------*/
void debug_write_qword(address_space *_space, offs_t address, UINT64 data, int apply_translation)
void debug_write_qword(address_space &space, offs_t address, UINT64 data, int apply_translation)
{
address_space *space = const_cast<address_space *>(_space);
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
/* mask against the logical byte mask */
address &= space->logbytemask();
address &= space.logbytemask();
/* if this is a misaligned write, or if there are no qword writers, just read two dwords */
if ((address & 7) != 0)
{
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
{
debug_write_dword(space, address + 0, data >> 0, apply_translation);
debug_write_dword(space, address + 4, data >> 32, apply_translation);
@ -853,22 +845,22 @@ void debug_write_qword(address_space *_space, offs_t address, UINT64 data, int a
else
{
/* all accesses from this point on are for the debugger */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* translate if necessary; if not mapped, we're done */
if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
;
/* if there is a custom write handler, and it returns true, use that */
else if (space->device().memory().write(space->spacenum(), address, 8, data))
else if (space.device().memory().write(space.spacenum(), address, 8, data))
;
/* otherwise, call the byte reading function for the translated address */
else
space->write_qword(address, data);
space.write_qword(address, data);
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
global->memory_modified = true;
}
}
@ -879,7 +871,7 @@ void debug_write_qword(address_space *_space, offs_t address, UINT64 data, int a
to the specified memory space
-------------------------------------------------*/
void debug_write_memory(address_space *space, offs_t address, UINT64 data, int size, int apply_translation)
void debug_write_memory(address_space &space, offs_t address, UINT64 data, int size, int apply_translation)
{
switch (size)
{
@ -896,32 +888,31 @@ void debug_write_memory(address_space *space, offs_t address, UINT64 data, int s
the given offset from opcode space
-------------------------------------------------*/
UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int arg)
UINT64 debug_read_opcode(address_space &space, offs_t address, int size, int arg)
{
address_space *space = const_cast<address_space *>(_space);
UINT64 result = ~(UINT64)0 & (~(UINT64)0 >> (64 - 8*size)), result2;
debugcpu_private *global = space->machine().debugcpu_data;
debugcpu_private *global = space.machine().debugcpu_data;
/* keep in logical range */
address &= space->logbytemask();
address &= space.logbytemask();
/* return early if we got the result directly */
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
device_memory_interface *memory;
if (space->device().interface(memory) && memory->readop(address, size, result2))
if (space.device().interface(memory) && memory->readop(address, size, result2))
{
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
return result2;
}
/* if we're bigger than the address bus, break into smaller pieces */
if (size > space->data_width() / 8)
if (size > space.data_width() / 8)
{
int halfsize = size / 2;
UINT64 r0 = debug_read_opcode(space, address + 0, halfsize, arg);
UINT64 r1 = debug_read_opcode(space, address + halfsize, halfsize, arg);
if (space->endianness() == ENDIANNESS_LITTLE)
if (space.endianness() == ENDIANNESS_LITTLE)
return r0 | (r1 << (8 * halfsize));
else
return r1 | (r0 << (8 * halfsize));
@ -932,9 +923,9 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
return result;
/* keep in physical range */
address &= space->bytemask();
address &= space.bytemask();
offs_t addrxor = 0;
switch (space->data_width() / 8 * 10 + size)
switch (space.data_width() / 8 * 10 + size)
{
/* dump opcodes in bytes from a byte-sized bus */
case 11:
@ -942,7 +933,7 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
/* dump opcodes in bytes from a word-sized bus */
case 21:
addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? BYTE_XOR_LE(0) : BYTE_XOR_BE(0);
addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? BYTE_XOR_LE(0) : BYTE_XOR_BE(0);
break;
/* dump opcodes in words from a word-sized bus */
@ -951,12 +942,12 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
/* dump opcodes in bytes from a dword-sized bus */
case 41:
addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? BYTE4_XOR_LE(0) : BYTE4_XOR_BE(0);
addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? BYTE4_XOR_LE(0) : BYTE4_XOR_BE(0);
break;
/* dump opcodes in words from a dword-sized bus */
case 42:
addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? WORD_XOR_LE(0) : WORD_XOR_BE(0);
addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? WORD_XOR_LE(0) : WORD_XOR_BE(0);
break;
/* dump opcodes in dwords from a dword-sized bus */
@ -965,17 +956,17 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
/* dump opcodes in bytes from a qword-sized bus */
case 81:
addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? BYTE8_XOR_LE(0) : BYTE8_XOR_BE(0);
addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? BYTE8_XOR_LE(0) : BYTE8_XOR_BE(0);
break;
/* dump opcodes in words from a qword-sized bus */
case 82:
addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? WORD2_XOR_LE(0) : WORD2_XOR_BE(0);
addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? WORD2_XOR_LE(0) : WORD2_XOR_BE(0);
break;
/* dump opcodes in dwords from a qword-sized bus */
case 84:
addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? DWORD_XOR_LE(0) : DWORD_XOR_BE(0);
addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? DWORD_XOR_LE(0) : DWORD_XOR_BE(0);
break;
/* dump opcodes in qwords from a qword-sized bus */
@ -983,27 +974,27 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
break;
default:
fatalerror("debug_read_opcode: unknown type = %d\n", space->data_width() / 8 * 10 + size);
fatalerror("debug_read_opcode: unknown type = %d\n", space.data_width() / 8 * 10 + size);
break;
}
/* turn on debugger access */
if (!global->debugger_access)
space->set_debugger_access(global->debugger_access = true);
space.set_debugger_access(global->debugger_access = true);
/* switch off the size and handle unaligned accesses */
switch (size)
{
case 1:
result = (arg) ? space->direct().read_raw_byte(address, addrxor) : space->direct().read_decrypted_byte(address, addrxor);
result = (arg) ? space.direct().read_raw_byte(address, addrxor) : space.direct().read_decrypted_byte(address, addrxor);
break;
case 2:
result = (arg) ? space->direct().read_raw_word(address & ~1, addrxor) : space->direct().read_decrypted_word(address & ~1, addrxor);
result = (arg) ? space.direct().read_raw_word(address & ~1, addrxor) : space.direct().read_decrypted_word(address & ~1, addrxor);
if ((address & 1) != 0)
{
result2 = (arg) ? space->direct().read_raw_word((address & ~1) + 2, addrxor) : space->direct().read_decrypted_word((address & ~1) + 2, addrxor);
if (space->endianness() == ENDIANNESS_LITTLE)
result2 = (arg) ? space.direct().read_raw_word((address & ~1) + 2, addrxor) : space.direct().read_decrypted_word((address & ~1) + 2, addrxor);
if (space.endianness() == ENDIANNESS_LITTLE)
result = (result >> (8 * (address & 1))) | (result2 << (16 - 8 * (address & 1)));
else
result = (result << (8 * (address & 1))) | (result2 >> (16 - 8 * (address & 1)));
@ -1012,11 +1003,11 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
break;
case 4:
result = (arg) ? space->direct().read_raw_dword(address & ~3, addrxor) : space->direct().read_decrypted_dword(address & ~3, addrxor);
result = (arg) ? space.direct().read_raw_dword(address & ~3, addrxor) : space.direct().read_decrypted_dword(address & ~3, addrxor);
if ((address & 3) != 0)
{
result2 = (arg) ? space->direct().read_raw_dword((address & ~3) + 4, addrxor) : space->direct().read_decrypted_dword((address & ~3) + 4, addrxor);
if (space->endianness() == ENDIANNESS_LITTLE)
result2 = (arg) ? space.direct().read_raw_dword((address & ~3) + 4, addrxor) : space.direct().read_decrypted_dword((address & ~3) + 4, addrxor);
if (space.endianness() == ENDIANNESS_LITTLE)
result = (result >> (8 * (address & 3))) | (result2 << (32 - 8 * (address & 3)));
else
result = (result << (8 * (address & 3))) | (result2 >> (32 - 8 * (address & 3)));
@ -1025,11 +1016,11 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
break;
case 8:
result = (arg) ? space->direct().read_raw_qword(address & ~7, addrxor) : space->direct().read_decrypted_qword(address & ~7, addrxor);
result = (arg) ? space.direct().read_raw_qword(address & ~7, addrxor) : space.direct().read_decrypted_qword(address & ~7, addrxor);
if ((address & 7) != 0)
{
result2 = (arg) ? space->direct().read_raw_qword((address & ~7) + 8, addrxor) : space->direct().read_decrypted_qword((address & ~7) + 8, addrxor);
if (space->endianness() == ENDIANNESS_LITTLE)
result2 = (arg) ? space.direct().read_raw_qword((address & ~7) + 8, addrxor) : space.direct().read_decrypted_qword((address & ~7) + 8, addrxor);
if (space.endianness() == ENDIANNESS_LITTLE)
result = (result >> (8 * (address & 7))) | (result2 << (64 - 8 * (address & 7)));
else
result = (result << (8 * (address & 7))) | (result2 >> (64 - 8 * (address & 7)));
@ -1038,7 +1029,7 @@ UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int ar
}
/* no longer accessing via the debugger */
space->set_debugger_access(global->debugger_access = false);
space.set_debugger_access(global->debugger_access = false);
return result;
}
@ -1178,7 +1169,7 @@ static UINT64 expression_read_memory(void *param, const char *name, expression_s
device = debug_cpu_get_visible_cpu(machine);
space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL));
if (space != NULL)
result = debug_read_memory(space, space->address_to_byte(address), size, true);
result = debug_read_memory(*space, space->address_to_byte(address), size, true);
break;
case EXPSPACE_PROGRAM_PHYSICAL:
@ -1191,7 +1182,7 @@ static UINT64 expression_read_memory(void *param, const char *name, expression_s
device = debug_cpu_get_visible_cpu(machine);
space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL));
if (space != NULL)
result = debug_read_memory(space, space->address_to_byte(address), size, false);
result = debug_read_memory(*space, space->address_to_byte(address), size, false);
break;
case EXPSPACE_OPCODE:
@ -1200,7 +1191,7 @@ static UINT64 expression_read_memory(void *param, const char *name, expression_s
device = expression_get_device(machine, name);
if (device == NULL)
device = debug_cpu_get_visible_cpu(machine);
result = expression_read_program_direct(device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size);
result = expression_read_program_direct(*device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size);
break;
case EXPSPACE_REGION:
@ -1221,56 +1212,51 @@ static UINT64 expression_read_memory(void *param, const char *name, expression_s
directly from an opcode or RAM pointer
-------------------------------------------------*/
static UINT64 expression_read_program_direct(address_space *_space, int opcode, offs_t address, int size)
static UINT64 expression_read_program_direct(address_space &space, int opcode, offs_t address, int size)
{
address_space *space = const_cast<address_space *>(_space);
UINT64 result = ~(UINT64)0 >> (64 - 8*size);
UINT8 *base;
if (space != NULL)
/* adjust the address into a byte address, but not if being called recursively */
if ((opcode & 2) == 0)
address = space.address_to_byte(address);
/* call ourself recursively until we are byte-sized */
if (size > 1)
{
UINT8 *base;
int halfsize = size / 2;
UINT64 r0, r1;
/* adjust the address into a byte address, but not if being called recursively */
if ((opcode & 2) == 0)
address = space->address_to_byte(address);
/* read each half, from lower address to upper address */
r0 = expression_read_program_direct(space, opcode | 2, address + 0, halfsize);
r1 = expression_read_program_direct(space, opcode | 2, address + halfsize, halfsize);
/* call ourself recursively until we are byte-sized */
if (size > 1)
{
int halfsize = size / 2;
UINT64 r0, r1;
/* read each half, from lower address to upper address */
r0 = expression_read_program_direct(space, opcode | 2, address + 0, halfsize);
r1 = expression_read_program_direct(space, opcode | 2, address + halfsize, halfsize);
/* assemble based on the target endianness */
if (space->endianness() == ENDIANNESS_LITTLE)
result = r0 | (r1 << (8 * halfsize));
else
result = r1 | (r0 << (8 * halfsize));
}
/* handle the byte-sized final requests */
/* assemble based on the target endianness */
if (space.endianness() == ENDIANNESS_LITTLE)
result = r0 | (r1 << (8 * halfsize));
else
result = r1 | (r0 << (8 * halfsize));
}
/* handle the byte-sized final requests */
else
{
/* lowmask specified which address bits are within the databus width */
offs_t lowmask = space.data_width() / 8 - 1;
/* get the base of memory, aligned to the address minus the lowbits */
if (opcode & 1)
base = (UINT8 *)space.direct().read_decrypted_ptr(address & ~lowmask);
else
base = (UINT8 *)space.get_read_ptr(address & ~lowmask);
/* if we have a valid base, return the appropriate byte */
if (base != NULL)
{
/* lowmask specified which address bits are within the databus width */
offs_t lowmask = space->data_width() / 8 - 1;
/* get the base of memory, aligned to the address minus the lowbits */
if (opcode & 1)
base = (UINT8 *)space->direct().read_decrypted_ptr(address & ~lowmask);
if (space.endianness() == ENDIANNESS_LITTLE)
result = base[BYTE8_XOR_LE(address) & lowmask];
else
base = (UINT8 *)space->get_read_ptr(address & ~lowmask);
/* if we have a valid base, return the appropriate byte */
if (base != NULL)
{
if (space->endianness() == ENDIANNESS_LITTLE)
result = base[BYTE8_XOR_LE(address) & lowmask];
else
result = base[BYTE8_XOR_BE(address) & lowmask];
}
result = base[BYTE8_XOR_BE(address) & lowmask];
}
}
return result;
@ -1349,7 +1335,7 @@ static void expression_write_memory(void *param, const char *name, expression_sp
device = debug_cpu_get_visible_cpu(machine);
space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL));
if (space != NULL)
debug_write_memory(space, space->address_to_byte(address), data, size, true);
debug_write_memory(*space, space->address_to_byte(address), data, size, true);
break;
case EXPSPACE_PROGRAM_PHYSICAL:
@ -1362,7 +1348,7 @@ static void expression_write_memory(void *param, const char *name, expression_sp
device = debug_cpu_get_visible_cpu(machine);
space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL));
if (space != NULL)
debug_write_memory(space, space->address_to_byte(address), data, size, false);
debug_write_memory(*space, space->address_to_byte(address), data, size, false);
break;
case EXPSPACE_OPCODE:
@ -1371,7 +1357,7 @@ static void expression_write_memory(void *param, const char *name, expression_sp
device = expression_get_device(machine, name);
if (device == NULL)
device = debug_cpu_get_visible_cpu(machine);
expression_write_program_direct(device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size, data);
expression_write_program_direct(*device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size, data);
break;
case EXPSPACE_REGION:
@ -1391,63 +1377,59 @@ static void expression_write_memory(void *param, const char *name, expression_sp
directly to an opcode or RAM pointer
-------------------------------------------------*/
static void expression_write_program_direct(address_space *_space, int opcode, offs_t address, int size, UINT64 data)
static void expression_write_program_direct(address_space &space, int opcode, offs_t address, int size, UINT64 data)
{
address_space *space = const_cast<address_space *>(_space);
if (space != NULL)
debugcpu_private *global = space.machine().debugcpu_data;
UINT8 *base;
/* adjust the address into a byte address, but not if being called recursively */
if ((opcode & 2) == 0)
address = space.address_to_byte(address);
/* call ourself recursively until we are byte-sized */
if (size > 1)
{
debugcpu_private *global = space->machine().debugcpu_data;
UINT8 *base;
int halfsize = size / 2;
UINT64 r0, r1, halfmask;
/* adjust the address into a byte address, but not if being called recursively */
if ((opcode & 2) == 0)
address = space->address_to_byte(address);
/* call ourself recursively until we are byte-sized */
if (size > 1)
/* break apart based on the target endianness */
halfmask = ~(UINT64)0 >> (64 - 8 * halfsize);
if (space.endianness() == ENDIANNESS_LITTLE)
{
int halfsize = size / 2;
UINT64 r0, r1, halfmask;
/* break apart based on the target endianness */
halfmask = ~(UINT64)0 >> (64 - 8 * halfsize);
if (space->endianness() == ENDIANNESS_LITTLE)
{
r0 = data & halfmask;
r1 = (data >> (8 * halfsize)) & halfmask;
}
else
{
r0 = (data >> (8 * halfsize)) & halfmask;
r1 = data & halfmask;
}
/* write each half, from lower address to upper address */
expression_write_program_direct(space, opcode | 2, address + 0, halfsize, r0);
expression_write_program_direct(space, opcode | 2, address + halfsize, halfsize, r1);
r0 = data & halfmask;
r1 = (data >> (8 * halfsize)) & halfmask;
}
/* handle the byte-sized final case */
else
{
/* lowmask specified which address bits are within the databus width */
offs_t lowmask = space->data_width() / 8 - 1;
r0 = (data >> (8 * halfsize)) & halfmask;
r1 = data & halfmask;
}
/* get the base of memory, aligned to the address minus the lowbits */
if (opcode & 1)
base = (UINT8 *)space->direct().read_decrypted_ptr(address & ~lowmask);
/* write each half, from lower address to upper address */
expression_write_program_direct(space, opcode | 2, address + 0, halfsize, r0);
expression_write_program_direct(space, opcode | 2, address + halfsize, halfsize, r1);
}
/* handle the byte-sized final case */
else
{
/* lowmask specified which address bits are within the databus width */
offs_t lowmask = space.data_width() / 8 - 1;
/* get the base of memory, aligned to the address minus the lowbits */
if (opcode & 1)
base = (UINT8 *)space.direct().read_decrypted_ptr(address & ~lowmask);
else
base = (UINT8 *)space.get_read_ptr(address & ~lowmask);
/* if we have a valid base, write the appropriate byte */
if (base != NULL)
{
if (space.endianness() == ENDIANNESS_LITTLE)
base[BYTE8_XOR_LE(address) & lowmask] = data;
else
base = (UINT8 *)space->get_read_ptr(address & ~lowmask);
/* if we have a valid base, write the appropriate byte */
if (base != NULL)
{
if (space->endianness() == ENDIANNESS_LITTLE)
base[BYTE8_XOR_LE(address) & lowmask] = data;
else
base[BYTE8_XOR_BE(address) & lowmask] = data;
global->memory_modified = true;
}
base[BYTE8_XOR_BE(address) & lowmask] = data;
global->memory_modified = true;
}
}
}
@ -2057,8 +2039,8 @@ offs_t device_debug::disassemble(char *buffer, offs_t pc, const UINT8 *oprom, co
#ifdef MAME_DEBUG
if (m_memory != NULL && m_disasm != NULL)
{
address_space *space = m_memory->space(AS_PROGRAM);
int bytes = space->address_to_byte(result & DASMFLAG_LENGTHMASK);
address_space &space = *m_memory->space(AS_PROGRAM);
int bytes = space.address_to_byte(result & DASMFLAG_LENGTHMASK);
assert(bytes >= m_disasm->min_opcode_bytes());
assert(bytes <= m_disasm->max_opcode_bytes());
(void) bytes; // appease compiler
@ -2684,9 +2666,7 @@ UINT32 device_debug::compute_opcode_crc32(offs_t address) const
return 0;
// no program interface, just fail
address_space *space = m_memory->space(AS_PROGRAM);
if (space == NULL)
return 0;
address_space &space = *m_memory->space(AS_PROGRAM);
// zero out the buffers
UINT8 opbuf[64], argbuf[64];
@ -2703,8 +2683,8 @@ UINT32 device_debug::compute_opcode_crc32(offs_t address) const
// disassemble and then convert to bytes
char buff[256];
int numbytes = disassemble(buff, address & space->logaddrmask(), opbuf, argbuf) & DASMFLAG_LENGTHMASK;
numbytes = space->address_to_byte(numbytes);
int numbytes = disassemble(buff, address & space.logaddrmask(), opbuf, argbuf) & DASMFLAG_LENGTHMASK;
numbytes = space.address_to_byte(numbytes);
// return a CRC of the resulting bytes
return crc32(0, argbuf, numbytes);
@ -3036,8 +3016,8 @@ UINT32 device_debug::dasm_wrapped(astring &buffer, offs_t pc)
assert(m_memory != NULL && m_disasm != NULL);
// determine the adjusted PC
address_space *space = m_memory->space(AS_PROGRAM);
offs_t pcbyte = space->address_to_byte(pc) & space->bytemask();
address_space &space = *m_memory->space(AS_PROGRAM);
offs_t pcbyte = space.address_to_byte(pc) & space.bytemask();
// fetch the bytes up to the maximum
UINT8 opbuf[64], argbuf[64];
@ -3100,8 +3080,8 @@ UINT64 device_debug::get_totalcycles(symbol_table &table, void *ref)
UINT64 device_debug::get_logunmap(symbol_table &table, void *ref)
{
address_space *space = reinterpret_cast<address_space *>(table.globalref());
return space->log_unmap();
address_space &space = *reinterpret_cast<address_space *>(table.globalref());
return space.log_unmap();
}
@ -3112,8 +3092,8 @@ UINT64 device_debug::get_logunmap(symbol_table &table, void *ref)
void device_debug::set_logunmap(symbol_table &table, void *ref, UINT64 value)
{
address_space *space = reinterpret_cast<address_space *>(table.globalref());
space->set_log_unmap(value ? true : false);
address_space &space = *reinterpret_cast<address_space *>(table.globalref());
space.set_log_unmap(value ? true : false);
}

24
src/emu/debug/debugcpu.h
View File

@ -422,40 +422,40 @@ bool debug_comment_load(running_machine &machine);
/* ----- debugger memory accessors ----- */
/* return the physical address corresponding to the given logical address */
int debug_cpu_translate(address_space *space, int intention, offs_t *address);
int debug_cpu_translate(address_space &space, int intention, offs_t *address);
/* return a byte from the the specified memory space */
UINT8 debug_read_byte(address_space *space, offs_t address, int apply_translation);
UINT8 debug_read_byte(address_space &space, offs_t address, int apply_translation);
/* return a word from the the specified memory space */
UINT16 debug_read_word(address_space *space, offs_t address, int apply_translation);
UINT16 debug_read_word(address_space &space, offs_t address, int apply_translation);
/* return a dword from the the specified memory space */
UINT32 debug_read_dword(address_space *space, offs_t address, int apply_translation);
UINT32 debug_read_dword(address_space &space, offs_t address, int apply_translation);
/* return a qword from the the specified memory space */
UINT64 debug_read_qword(address_space *space, offs_t address, int apply_translation);
UINT64 debug_read_qword(address_space &space, offs_t address, int apply_translation);
/* return 1,2,4 or 8 bytes from the specified memory space */
UINT64 debug_read_memory(address_space *space, offs_t address, int size, int apply_translation);
UINT64 debug_read_memory(address_space &space, offs_t address, int size, int apply_translation);
/* write a byte to the specified memory space */
void debug_write_byte(address_space *space, offs_t address, UINT8 data, int apply_translation);
void debug_write_byte(address_space &space, offs_t address, UINT8 data, int apply_translation);
/* write a word to the specified memory space */
void debug_write_word(address_space *space, offs_t address, UINT16 data, int apply_translation);
void debug_write_word(address_space &space, offs_t address, UINT16 data, int apply_translation);
/* write a dword to the specified memory space */
void debug_write_dword(address_space *space, offs_t address, UINT32 data, int apply_translation);
void debug_write_dword(address_space &space, offs_t address, UINT32 data, int apply_translation);
/* write a qword to the specified memory space */
void debug_write_qword(address_space *space, offs_t address, UINT64 data, int apply_translation);
void debug_write_qword(address_space &space, offs_t address, UINT64 data, int apply_translation);
/* write 1,2,4 or 8 bytes to the specified memory space */
void debug_write_memory(address_space *space, offs_t address, UINT64 data, int size, int apply_translation);
void debug_write_memory(address_space &space, offs_t address, UINT64 data, int size, int apply_translation);
/* read 1,2,4 or 8 bytes at the given offset from opcode space */
UINT64 debug_read_opcode(address_space *space, offs_t offset, int size, int arg);
UINT64 debug_read_opcode(address_space &space, offs_t offset, int size, int arg);
#endif

16
src/emu/debug/dvdisasm.c
View File

@ -263,8 +263,8 @@ offs_t debug_view_disasm::find_pc_backwards(offs_t targetpc, int numinstrs)
while (curpcbyte < fillpcbyte)
{
fillpcbyte--;
opbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(source.m_space, fillpcbyte, 1, FALSE);
argbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(source.m_space, fillpcbyte, 1, TRUE);
opbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(*source.m_space, fillpcbyte, 1, FALSE);
argbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(*source.m_space, fillpcbyte, 1, TRUE);
}
// loop until we get past the target instruction
@ -278,7 +278,7 @@ offs_t debug_view_disasm::find_pc_backwards(offs_t targetpc, int numinstrs)
// get the disassembly, but only if mapped
instlen = 1;
if (debug_cpu_translate(source.m_space, TRANSLATE_FETCH, &physpcbyte))
if (debug_cpu_translate(*source.m_space, TRANSLATE_FETCH, &physpcbyte))
{
char dasmbuffer[100];
instlen = source.m_device.debug()->disassemble(dasmbuffer, scanpc, &opbuf[1000 + scanpcbyte - targetpcbyte], &argbuf[1000 + scanpcbyte - targetpcbyte]) & DASMFLAG_LENGTHMASK;
@ -322,12 +322,12 @@ void debug_view_disasm::generate_bytes(offs_t pcbyte, int numbytes, int minbytes
// output the first value
int offset = 0;
if (maxchars >= char_num * minbytes)
offset = sprintf(string, "%s", core_i64_format(debug_read_opcode(source.m_space, pcbyte, minbytes, FALSE), minbytes * char_num, source.is_octal()));
offset = sprintf(string, "%s", core_i64_format(debug_read_opcode(*source.m_space, pcbyte, minbytes, FALSE), minbytes * char_num, source.is_octal()));
// output subsequent values
int byte;
for (byte = minbytes; byte < numbytes && offset + 1 + char_num * minbytes < maxchars; byte += minbytes)
offset += sprintf(&string[offset], " %s", core_i64_format(debug_read_opcode(source.m_space, pcbyte + byte, minbytes, encrypted), minbytes * char_num, source.is_octal()));
offset += sprintf(&string[offset], " %s", core_i64_format(debug_read_opcode(*source.m_space, pcbyte + byte, minbytes, encrypted), minbytes * char_num, source.is_octal()));
// if we ran out of room, indicate more
string[maxchars - 1] = 0;
@ -407,15 +407,15 @@ bool debug_view_disasm::recompute(offs_t pc, int startline, int lines)
char buffer[100];
int numbytes = 0;
offs_t physpcbyte = pcbyte;
if (debug_cpu_translate(source.m_space, TRANSLATE_FETCH_DEBUG, &physpcbyte))
if (debug_cpu_translate(*source.m_space, TRANSLATE_FETCH_DEBUG, &physpcbyte))
{
UINT8 opbuf[64], argbuf[64];
// fetch the bytes up to the maximum
for (numbytes = 0; numbytes < maxbytes; numbytes++)
{
opbuf[numbytes] = debug_read_opcode(source.m_space, pcbyte + numbytes, 1, FALSE);
argbuf[numbytes] = debug_read_opcode(source.m_space, pcbyte + numbytes, 1, TRUE);
opbuf[numbytes] = debug_read_opcode(*source.m_space, pcbyte + numbytes, 1, FALSE);
argbuf[numbytes] = debug_read_opcode(*source.m_space, pcbyte + numbytes, 1, TRUE);
}
// disassemble the result

16
src/emu/debug/dvmemory.c
View File

@ -627,10 +627,10 @@ bool debug_view_memory::read(UINT8 size, offs_t offs, UINT64 &data)
{
switch (size)
{
case 1: data = debug_read_byte(source.m_space, offs, !m_no_translation); break;
case 2: data = debug_read_word(source.m_space, offs, !m_no_translation); break;
case 4: data = debug_read_dword(source.m_space, offs, !m_no_translation); break;
case 8: data = debug_read_qword(source.m_space, offs, !m_no_translation); break;
case 1: data = debug_read_byte(*source.m_space, offs, !m_no_translation); break;
case 2: data = debug_read_word(*source.m_space, offs, !m_no_translation); break;
case 4: data = debug_read_dword(*source.m_space, offs, !m_no_translation); break;
case 8: data = debug_read_qword(*source.m_space, offs, !m_no_translation); break;
}
}
return ismapped;
@ -674,10 +674,10 @@ void debug_view_memory::write(UINT8 size, offs_t offs, UINT64 data)
{
switch (size)
{
case 1: debug_write_byte(source.m_space, offs, data, !m_no_translation); break;
case 2: debug_write_word(source.m_space, offs, data, !m_no_translation); break;
case 4: debug_write_dword(source.m_space, offs, data, !m_no_translation); break;
case 8: debug_write_qword(source.m_space, offs, data, !m_no_translation); break;
case 1: debug_write_byte(*source.m_space, offs, data, !m_no_translation); break;
case 2: debug_write_word(*source.m_space, offs, data, !m_no_translation); break;
case 4: debug_write_dword(*source.m_space, offs, data, !m_no_translation); break;
case 8: debug_write_qword(*source.m_space, offs, data, !m_no_translation); break;
}
return;
}

18
src/emu/devcb.c
View File

@ -66,7 +66,7 @@ public:
static ioport_port *resolve_port(const char *tag, device_t &current);
static device_t *resolve_device(int index, const char *tag, device_t &current);
static device_execute_interface *resolve_execute_interface(const char *tag, device_t &current);
static address_space *resolve_space(int index, const char *tag, device_t &current);
static address_space &resolve_space(int index, const char *tag, device_t &current);
};
@ -131,7 +131,7 @@ device_execute_interface *devcb_resolver::resolve_execute_interface(const char *
// given a device tag and a space index
//-------------------------------------------------
address_space *devcb_resolver::resolve_space(int index, const char *tag, device_t &current)
address_space &devcb_resolver::resolve_space(int index, const char *tag, device_t &current)
{
// find our target device
device_t *targetdev = current.siblingdevice(tag);
@ -148,7 +148,7 @@ address_space *devcb_resolver::resolve_space(int index, const char *tag, device_
if (result == NULL)
throw emu_fatalerror("Unable to find device '%s' space %d (requested by %s '%s')", tag, index, current.name(), current.tag());
return result;
return *result;
}
@ -201,7 +201,7 @@ void devcb_resolved_read_line::resolve(const devcb_read_line &desc, device_t &de
break;
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_helper.read8_space = desc.readspace;
*static_cast<devcb_read_line_delegate *>(this) = devcb_read_line_delegate(&devcb_resolved_read_line::from_read8, desc.name, this);
break;
@ -295,7 +295,7 @@ void devcb_resolved_write_line::resolve(const devcb_write_line &desc, device_t &
break;
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_helper.write8_space = desc.writespace;
*static_cast<devcb_write_line_delegate *>(this) = devcb_write_line_delegate(&devcb_resolved_write_line::to_write8, desc.name, this);
break;
@ -403,7 +403,7 @@ void devcb_resolved_read8::resolve(const devcb_read8 &desc, device_t &device)
break;
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(desc.readspace, desc.name, m_object.space);
break;
@ -510,7 +510,7 @@ void devcb_resolved_write8::resolve(const devcb_write8 &desc, device_t &device)
break;
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(desc.writespace, desc.name, m_object.space);
break;
@ -628,7 +628,7 @@ void devcb_resolved_read16::resolve(const devcb_read16 &desc, device_t &device)
break;
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
*static_cast<devcb_read16_delegate *>(this) = devcb_read16_delegate(desc.readspace, desc.name, m_object.space);
break;
@ -735,7 +735,7 @@ void devcb_resolved_write16::resolve(const devcb_write16 &desc, device_t &device
break;
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
*static_cast<devcb_write16_delegate *>(this) = devcb_write16_delegate(desc.writespace, desc.name, m_object.space);
break;

4
src/emu/machine/53c810.c
View File

@ -393,7 +393,7 @@ void lsi53c810_device::dma_exec()
UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
{
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space->device().safe_pc());
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space.device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */
@ -476,7 +476,7 @@ UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
{
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space->device().safe_pc());
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space.device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */

30
src/emu/machine/8042kbdc.c
View File

@ -370,7 +370,7 @@ READ8_HANDLER(kbdc8042_8_r)
/* at386 self test doesn't like this */
at_8042_clear_keyboard_received();
}
at_8042_check_keyboard(space->machine());
at_8042_check_keyboard(space.machine());
break;
case 1:
@ -398,14 +398,14 @@ READ8_HANDLER(kbdc8042_8_r)
break;
case 2:
if (kbdc8042.get_out2(space->machine()))
if (kbdc8042.get_out2(space.machine()))
data |= 0x20;
else
data &= ~0x20;
break;
case 4:
at_8042_check_keyboard(space->machine());
at_8042_check_keyboard(space.machine());
if (kbdc8042.keyboard.received || kbdc8042.mouse.received)
data |= 1;
@ -451,7 +451,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
/* normal case */
kbdc8042.data = data;
kbdc8042.sending=1;
at_keyboard_write(space->machine(), data);
at_keyboard_write(space.machine(), data);
break;
case 1:
@ -465,14 +465,14 @@ WRITE8_HANDLER(kbdc8042_8_w)
* | `----------- keyboard clock (output)
* `------------ keyboard data (output)
*/
at_8042_set_outport(space->machine(), data, 0);
at_8042_set_outport(space.machine(), data, 0);
break;
case 2:
/* preceded by writing 0xD2 to port 60h */
kbdc8042.data = data;
kbdc8042.sending=1;
at_keyboard_write(space->machine(), data);
at_keyboard_write(space.machine(), data);
break;
case 3:
@ -496,7 +496,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
case 1:
kbdc8042.speaker = data;
if (kbdc8042.set_spkr)
kbdc8042.set_spkr(space->machine(), kbdc8042.speaker);
kbdc8042.set_spkr(space.machine(), kbdc8042.speaker);
break;
@ -519,13 +519,13 @@ WRITE8_HANDLER(kbdc8042_8_w)
kbdc8042.mouse.on = 1;
break;
case 0xa9: /* test mouse */
at_8042_receive(space->machine(), PS2_MOUSE_ON ? 0x00 : 0xff);
at_8042_receive(space.machine(), PS2_MOUSE_ON ? 0x00 : 0xff);
break;
case 0xaa: /* selftest */
at_8042_receive(space->machine(), 0x55);
at_8042_receive(space.machine(), 0x55);
break;
case 0xab: /* test keyboard */
at_8042_receive(space->machine(), KEYBOARD_ON ? 0x00 : 0xff);
at_8042_receive(space.machine(), KEYBOARD_ON ? 0x00 : 0xff);
break;
case 0xad: /* disable keyboard interface */
kbdc8042.keyboard.on = 0;
@ -543,7 +543,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
* | `----------- 1=primary display is MDA, 0=CGA
* `------------ 1=keyboard not inhibited; 0=inhibited
*/
at_8042_receive(space->machine(), kbdc8042.inport);
at_8042_receive(space.machine(), kbdc8042.inport);
break;
case 0xc1: /* read input port 3..0 until write to 0x60 */
kbdc8042.status_read_mode = 1;
@ -552,7 +552,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
kbdc8042.status_read_mode = 2;
break;
case 0xd0: /* read output port */
at_8042_receive(space->machine(), kbdc8042.outport);
at_8042_receive(space.machine(), kbdc8042.outport);
break;
case 0xd1:
/* write output port; next byte written to port 60h is placed on
@ -581,7 +581,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
break;
case 0xe0:
/* read test inputs; read T1/T0 test inputs into bit 1/0 */
at_8042_receive(space->machine(), 0x00);
at_8042_receive(space.machine(), 0x00);
break;
case 0xf0:
@ -597,8 +597,8 @@ WRITE8_HANDLER(kbdc8042_8_w)
* the bits low set in the command byte. The only pulse that has
* an effect currently is bit 0, which pulses the CPU's reset line
*/
space->machine().firstcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
at_8042_set_outport(space->machine(), kbdc8042.outport | 0x02, 0);
space.machine().firstcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
at_8042_set_outport(space.machine(), kbdc8042.outport | 0x02, 0);
break;
}
kbdc8042.sending = 1;

4
src/emu/machine/amigafdc.c
View File

@ -96,7 +96,7 @@ void amiga_fdc::device_reset()
void amiga_fdc::dma_done()
{
dma_state = DMA_IDLE;
address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
amiga_custom_w(space, REG_INTREQ, 0x8000 | INTENA_DSKBLK, 0xffff);
}
@ -233,7 +233,7 @@ void amiga_fdc::live_run(attotime limit)
cur_live.bit_counter = 0;
}
dskbyt |= 0x1000;
address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
amiga_custom_w(space, REG_INTREQ, 0x8000 | INTENA_DSKSYN, 0xffff);
} else
dskbyt &= ~0x1000;

8
src/emu/machine/k056230.c
View File

@ -82,7 +82,7 @@ READ8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_r)
}
}
// mame_printf_debug("k056230_r: %d at %08X\n", offset, space->device().safe_pc());
// mame_printf_debug("k056230_r: %d at %08X\n", offset, space.device().safe_pc());
return 0;
}
@ -132,17 +132,17 @@ WRITE8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_w)
break;
}
}
// mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, space->device().safe_pc());
// mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, space.device().safe_pc());
}
READ32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_r)
{
//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
return m_ram[offset & 0x7ff];
}
WRITE32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_w)
{
//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
COMBINE_DATA(m_ram + (offset & 0x7ff));
}

2
src/emu/machine/latch8.c
View File

@ -81,7 +81,7 @@ READ8_DEVICE_HANDLER( latch8_r )
if (latch8->has_read)
{
/* temporary hack until all relevant systems are devices */
address_space *space = &device->machine().driver_data()->generic_space();
address_space &space = device->machine().driver_data()->generic_space();
int i;
for (i=0; i<8; i++)
{

8
src/emu/machine/pc16552d.c
View File

@ -420,20 +420,20 @@ void pc16552d_rx_data(running_machine &machine, int chip, int channel, UINT8 dat
READ8_HANDLER(pc16552d_0_r)
{
return duart_r(space->machine(), 0, offset);
return duart_r(space.machine(), 0, offset);
}
WRITE8_HANDLER(pc16552d_0_w)
{
duart_w(space->machine(), 0, offset, data);
duart_w(space.machine(), 0, offset, data);
}
READ8_HANDLER(pc16552d_1_r)
{
return duart_r(space->machine(), 1, offset);
return duart_r(space.machine(), 1, offset);
}
WRITE8_HANDLER(pc16552d_1_w)
{
duart_w(space->machine(), 1, offset, data);
duart_w(space.machine(), 1, offset, data);
}

46
src/emu/machine/s3c2400.c
View File

@ -38,30 +38,30 @@ UINT32 s3c2400_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap
DEVICE_START( s3c2400 )
{
address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
DEVICE_START_CALL(s3c24xx);
space->install_legacy_readwrite_handler( *device, 0x14000000, 0x1400003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
space->install_legacy_readwrite_handler( *device, 0x14200000, 0x1420005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
space->install_legacy_readwrite_handler( *device, 0x14400000, 0x14400017, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
space->install_legacy_readwrite_handler( *device, 0x14600000, 0x1460001b, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
space->install_legacy_readwrite_handler( *device, 0x14600020, 0x1460003b, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
space->install_legacy_readwrite_handler( *device, 0x14600040, 0x1460005b, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
space->install_legacy_readwrite_handler( *device, 0x14600060, 0x1460007b, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
space->install_legacy_readwrite_handler( *device, 0x14800000, 0x14800017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
space->install_legacy_readwrite_handler( *device, 0x14a00000, 0x14a003ff, FUNC(s3c2400_lcd_r), FUNC(s3c24xx_lcd_w));
space->install_legacy_readwrite_handler( *device, 0x14a00400, 0x14a007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
space->install_legacy_readwrite_handler( *device, 0x15000000, 0x1500002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
space->install_legacy_readwrite_handler( *device, 0x15004000, 0x1500402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
space->install_legacy_readwrite_handler( *device, 0x15100000, 0x15100043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
space->install_legacy_readwrite_handler( *device, 0x15200140, 0x152001fb, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
space->install_legacy_readwrite_handler( *device, 0x15300000, 0x1530000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
space->install_legacy_readwrite_handler( *device, 0x15400000, 0x1540000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
space->install_legacy_readwrite_handler( *device, 0x15508000, 0x15508013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
space->install_legacy_readwrite_handler( *device, 0x15600000, 0x1560005b, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
space->install_legacy_readwrite_handler( *device, 0x15700040, 0x1570008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
space->install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space->install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space->install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
space.install_legacy_readwrite_handler( *device, 0x14000000, 0x1400003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
space.install_legacy_readwrite_handler( *device, 0x14200000, 0x1420005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
space.install_legacy_readwrite_handler( *device, 0x14400000, 0x14400017, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
space.install_legacy_readwrite_handler( *device, 0x14600000, 0x1460001b, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
space.install_legacy_readwrite_handler( *device, 0x14600020, 0x1460003b, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
space.install_legacy_readwrite_handler( *device, 0x14600040, 0x1460005b, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
space.install_legacy_readwrite_handler( *device, 0x14600060, 0x1460007b, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
space.install_legacy_readwrite_handler( *device, 0x14800000, 0x14800017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
space.install_legacy_readwrite_handler( *device, 0x14a00000, 0x14a003ff, FUNC(s3c2400_lcd_r), FUNC(s3c24xx_lcd_w));
space.install_legacy_readwrite_handler( *device, 0x14a00400, 0x14a007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
space.install_legacy_readwrite_handler( *device, 0x15000000, 0x1500002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
space.install_legacy_readwrite_handler( *device, 0x15004000, 0x1500402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
space.install_legacy_readwrite_handler( *device, 0x15100000, 0x15100043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
space.install_legacy_readwrite_handler( *device, 0x15200140, 0x152001fb, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
space.install_legacy_readwrite_handler( *device, 0x15300000, 0x1530000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
space.install_legacy_readwrite_handler( *device, 0x15400000, 0x1540000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
space.install_legacy_readwrite_handler( *device, 0x15508000, 0x15508013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
space.install_legacy_readwrite_handler( *device, 0x15600000, 0x1560005b, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
space.install_legacy_readwrite_handler( *device, 0x15700040, 0x1570008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
space.install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space.install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
s3c24xx_video_start( device, device->machine());
}

52
src/emu/machine/s3c2410.c
View File

@ -38,33 +38,33 @@ UINT32 s3c2410_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap
DEVICE_START( s3c2410 )
{
address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
DEVICE_START_CALL(s3c24xx);
space->install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
space->install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
space->install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
space->install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
space->install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
space->install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
space->install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
space->install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c000017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
space->install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2410_lcd_r), FUNC(s3c24xx_lcd_w));
space->install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
space->install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e000017, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
space->install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
space->install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
space->install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
space->install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
space->install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
space->install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
space->install_legacy_readwrite_handler( *device, 0x54000000, 0x5400000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
space->install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
space->install_legacy_readwrite_handler( *device, 0x56000000, 0x560000bf, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
space->install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
space->install_legacy_readwrite_handler( *device, 0x58000000, 0x58000013, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space->install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space->install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space->install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
space.install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
space.install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
space.install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
space.install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
space.install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
space.install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
space.install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
space.install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c000017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
space.install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2410_lcd_r), FUNC(s3c24xx_lcd_w));
space.install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
space.install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e000017, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
space.install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
space.install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
space.install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
space.install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
space.install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
space.install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
space.install_legacy_readwrite_handler( *device, 0x54000000, 0x5400000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
space.install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
space.install_legacy_readwrite_handler( *device, 0x56000000, 0x560000bf, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
space.install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
space.install_legacy_readwrite_handler( *device, 0x58000000, 0x58000013, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
s3c24xx_video_start( device, device->machine());
}

56
src/emu/machine/s3c2440.c
View File

@ -38,34 +38,34 @@ UINT32 s3c2440_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap
DEVICE_START( s3c2440 )
{
address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
space->install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
space->install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
space->install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
space->install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
space->install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
space->install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
space->install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
space->install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c00001b, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
space->install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2440_lcd_r), FUNC(s3c24xx_lcd_w));
space->install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
space->install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e00003f, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
space->install_legacy_readwrite_handler( *device, 0x4f000000, 0x4f0000a3, FUNC(s3c24xx_cam_r), FUNC(s3c24xx_cam_w));
space->install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
space->install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
space->install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
space->install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
space->install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
space->install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
space->install_legacy_readwrite_handler( *device, 0x54000000, 0x54000013, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
space->install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
space->install_legacy_readwrite_handler( *device, 0x56000000, 0x560000df, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
space->install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
space->install_legacy_readwrite_handler( *device, 0x58000000, 0x58000017, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space->install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space->install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space->install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
space->install_legacy_readwrite_handler( *device, 0x5b000000, 0x5b00001f, FUNC(s3c24xx_ac97_r), FUNC(s3c24xx_ac97_w));
address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
space.install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
space.install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
space.install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
space.install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
space.install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
space.install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
space.install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
space.install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c00001b, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
space.install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2440_lcd_r), FUNC(s3c24xx_lcd_w));
space.install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
space.install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e00003f, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
space.install_legacy_readwrite_handler( *device, 0x4f000000, 0x4f0000a3, FUNC(s3c24xx_cam_r), FUNC(s3c24xx_cam_w));
space.install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
space.install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
space.install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
space.install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
space.install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
space.install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
space.install_legacy_readwrite_handler( *device, 0x54000000, 0x54000013, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
space.install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
space.install_legacy_readwrite_handler( *device, 0x56000000, 0x560000df, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
space.install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
space.install_legacy_readwrite_handler( *device, 0x58000000, 0x58000017, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
space.install_legacy_readwrite_handler( *device, 0x5b000000, 0x5b00001f, FUNC(s3c24xx_ac97_r), FUNC(s3c24xx_ac97_w));
DEVICE_START_CALL(s3c24xx);
s3c24xx_video_start( device, device->machine());

26
src/emu/machine/s3c24xx.c
View File

@ -301,9 +301,9 @@ static void s3c24xx_lcd_dma_init( device_t *device)
static UINT32 s3c24xx_lcd_dma_read( device_t *device)
{
s3c24xx_t *s3c24xx = get_token( device);
address_space* space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
address_space& space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
UINT8 *vram, data[4];
vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
for (int i = 0; i < 2; i++)
{
data[i*2+0] = *vram++;
@ -314,7 +314,7 @@ static UINT32 s3c24xx_lcd_dma_read( device_t *device)
{
s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
s3c24xx->lcd.pagewidth_cur = 0;
vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
}
}
if (s3c24xx->lcd.hwswp == 0)
@ -345,9 +345,9 @@ static UINT32 s3c24xx_lcd_dma_read( device_t *device)
static UINT32 s3c24xx_lcd_dma_read( device_t *device)
{
s3c24xx_t *s3c24xx = get_token( device);
address_space* space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
address_space& space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
UINT8 *vram, data[4];
vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
for (int i = 0; i < 2; i++)
{
if (s3c24xx->lcd.hwswp == 0)
@ -398,7 +398,7 @@ static UINT32 s3c24xx_lcd_dma_read( device_t *device)
{
s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
s3c24xx->lcd.pagewidth_cur = 0;
vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
}
else
{
@ -1611,7 +1611,7 @@ static void s3c24xx_dma_trigger( device_t *device, int ch)
s3c24xx_t *s3c24xx = get_token( device);
s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
UINT32 curr_tc, curr_src, curr_dst;
address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
int dsz, inc_src, inc_dst, servmode, tsz;
const UINT32 ch_int[] = { S3C24XX_INT_DMA0, S3C24XX_INT_DMA1, S3C24XX_INT_DMA2, S3C24XX_INT_DMA3};
verboselog( device->machine(), 5, "DMA %d trigger\n", ch);
@ -1636,9 +1636,9 @@ static void s3c24xx_dma_trigger( device_t *device, int ch)
{
switch (dsz)
{
case 0 : space->write_byte( curr_dst, space->read_byte( curr_src)); break;
case 1 : space->write_word( curr_dst, space->read_word( curr_src)); break;
case 2 : space->write_dword( curr_dst, space->read_dword( curr_src)); break;
case 0 : space.write_byte( curr_dst, space.read_byte( curr_src)); break;
case 1 : space.write_word( curr_dst, space.read_word( curr_src)); break;
case 2 : space.write_dword( curr_dst, space.read_dword( curr_src)); break;
}
if (inc_src == 0) curr_src += (1 << dsz);
if (inc_dst == 0) curr_dst += (1 << dsz);
@ -3701,9 +3701,9 @@ static DEVICE_START( s3c24xx )
int om1 = iface_core_pin_r( device, S3C24XX_CORE_PIN_OM1);
if ((om0 == 0) && (om1 == 0))
{
address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
space->install_ram( 0x00000000, 0x00000fff, s3c24xx->steppingstone);
space->install_ram( 0x40000000, 0x40000fff, s3c24xx->steppingstone);
address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
space.install_ram( 0x00000000, 0x00000fff, s3c24xx->steppingstone);
space.install_ram( 0x40000000, 0x40000fff, s3c24xx->steppingstone);
}
#endif
}

4
src/emu/machine/tmp68301.c
View File

@ -166,7 +166,7 @@ WRITE16_HANDLER( tmp68301_regs_w )
if (!ACCESSING_BITS_0_7) return;
// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space->device().safe_pc(),offset*2,data,mem_mask^0xffff);
// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space.device().safe_pc(),offset*2,data,mem_mask^0xffff);
switch( offset * 2 )
{
@ -177,7 +177,7 @@ WRITE16_HANDLER( tmp68301_regs_w )
{
int i = ((offset*2) >> 5) & 3;
tmp68301_update_timer( space->machine(), i );
tmp68301_update_timer( space.machine(), i );
}
break;
}

2
src/emu/machine/v3021.c
View File

@ -176,7 +176,7 @@ WRITE8_MEMBER( v3021_device::write )
break;
case 0xf: //Load Date
//space->machine().base_datetime(m_systime);
//space.machine().base_datetime(m_systime);
break;
}
}

72
src/emu/memconv.h
View File

@ -85,7 +85,7 @@
*
*************************************/
INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT16 mem_mask)
INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT16 mem_mask)
{
UINT16 result = 0;
if (ACCESSING_BITS_8_15)
@ -96,7 +96,7 @@ INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_spac
}
INLINE void write16be_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask)
INLINE void write16be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
{
if (ACCESSING_BITS_8_15)
(*handler)(space, offset * 2 + 0, data >> 8);
@ -111,7 +111,7 @@ INLINE void write16be_with_write8_handler(write8_space_func handler, address_spa
*
*************************************/
INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT16 mem_mask)
INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT16 mem_mask)
{
UINT16 result = 0;
if (ACCESSING_BITS_0_7)
@ -122,7 +122,7 @@ INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_spac
}
INLINE void write16le_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask)
INLINE void write16le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
{
if (ACCESSING_BITS_0_7)
(*handler)(space, offset * 2 + 0, data >> 0);
@ -137,7 +137,7 @@ INLINE void write16le_with_write8_handler(write8_space_func handler, address_spa
*
*************************************/
INLINE UINT32 read32be_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
INLINE UINT32 read32be_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
{
UINT32 result = 0;
if (ACCESSING_BITS_16_31)
@ -148,7 +148,7 @@ INLINE UINT32 read32be_with_read8_handler(read8_space_func handler, address_spac
}
INLINE void write32be_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
INLINE void write32be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
{
if (ACCESSING_BITS_16_31)
write16be_with_write8_handler(handler, space, offset * 2 + 0, data >> 16, mem_mask >> 16);
@ -163,7 +163,7 @@ INLINE void write32be_with_write8_handler(write8_space_func handler, address_spa
*
*************************************/
INLINE UINT32 read32le_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
INLINE UINT32 read32le_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
{
UINT32 result = 0;
if (ACCESSING_BITS_0_15)
@ -174,7 +174,7 @@ INLINE UINT32 read32le_with_read8_handler(read8_space_func handler, address_spac
}
INLINE void write32le_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
INLINE void write32le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
{
if (ACCESSING_BITS_0_15)
write16le_with_write8_handler(handler, space, offset * 2 + 0, data, mem_mask);
@ -189,7 +189,7 @@ INLINE void write32le_with_write8_handler(write8_space_func handler, address_spa
*
*************************************/
INLINE UINT32 read32be_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
INLINE UINT32 read32be_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
{
UINT32 result = 0;
if (ACCESSING_BITS_16_31)
@ -200,7 +200,7 @@ INLINE UINT32 read32be_with_16be_handler(read16_space_func handler, address_spac
}
INLINE void write32be_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
INLINE void write32be_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
{
if (ACCESSING_BITS_16_31)
(*handler)(space, offset * 2 + 0, data >> 16, mem_mask >> 16);
@ -215,7 +215,7 @@ INLINE void write32be_with_16be_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT32 read32le_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
INLINE UINT32 read32le_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
{
UINT32 result = 0;
if (ACCESSING_BITS_0_15)
@ -226,7 +226,7 @@ INLINE UINT32 read32le_with_16le_handler(read16_space_func handler, address_spac
}
INLINE void write32le_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
INLINE void write32le_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
{
if (ACCESSING_BITS_0_15)
(*handler)(space, offset * 2 + 0, data, mem_mask);
@ -241,7 +241,7 @@ INLINE void write32le_with_16le_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT32 read32be_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
INLINE UINT32 read32be_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
{
UINT32 result = 0;
mem_mask = FLIPENDIAN_INT32(mem_mask);
@ -250,7 +250,7 @@ INLINE UINT32 read32be_with_16le_handler(read16_space_func handler, address_spac
}
INLINE void write32be_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
INLINE void write32be_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
{
data = FLIPENDIAN_INT32(data);
mem_mask = FLIPENDIAN_INT32(mem_mask);
@ -264,7 +264,7 @@ INLINE void write32be_with_16le_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT32 read32le_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
INLINE UINT32 read32le_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
{
UINT32 result = 0;
mem_mask = FLIPENDIAN_INT32(mem_mask);
@ -273,7 +273,7 @@ INLINE UINT32 read32le_with_16be_handler(read16_space_func handler, address_spac
}
INLINE void write32le_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
INLINE void write32le_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
{
data = FLIPENDIAN_INT32(data);
mem_mask = FLIPENDIAN_INT32(mem_mask);
@ -287,7 +287,7 @@ INLINE void write32le_with_16be_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT64 read64be_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT64 read64be_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_32_63)
@ -298,7 +298,7 @@ INLINE UINT64 read64be_with_read8_handler(read8_space_func handler, address_spac
}
INLINE void write64be_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_32_63)
write32be_with_write8_handler(handler, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
@ -313,7 +313,7 @@ INLINE void write64be_with_write8_handler(write8_space_func handler, address_spa
*
*************************************/
INLINE UINT64 read64le_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT64 read64le_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_0_31)
@ -324,7 +324,7 @@ INLINE UINT64 read64le_with_read8_handler(read8_space_func handler, address_spac
}
INLINE void write64le_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_0_31)
write32le_with_write8_handler(handler, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
@ -339,7 +339,7 @@ INLINE void write64le_with_write8_handler(write8_space_func handler, address_spa
*
*************************************/
INLINE UINT32 read64be_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT32 read64be_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_32_63)
@ -350,7 +350,7 @@ INLINE UINT32 read64be_with_16be_handler(read16_space_func handler, address_spac
}
INLINE void write64be_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64be_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_32_63)
write32be_with_16be_handler(handler, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
@ -365,7 +365,7 @@ INLINE void write64be_with_16be_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT32 read64le_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT32 read64le_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_0_31)
@ -376,7 +376,7 @@ INLINE UINT32 read64le_with_16le_handler(read16_space_func handler, address_spac
}
INLINE void write64le_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64le_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_0_31)
write32le_with_16le_handler(handler, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
@ -391,7 +391,7 @@ INLINE void write64le_with_16le_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT32 read64be_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT32 read64be_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_32_63)
@ -402,7 +402,7 @@ INLINE UINT32 read64be_with_16le_handler(read16_space_func handler, address_spac
}
INLINE void write64be_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64be_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_32_63)
write32be_with_16le_handler(handler, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
@ -417,7 +417,7 @@ INLINE void write64be_with_16le_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT32 read64le_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT32 read64le_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_0_31)
@ -428,7 +428,7 @@ INLINE UINT32 read64le_with_16be_handler(read16_space_func handler, address_spac
}
INLINE void write64le_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64le_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_0_31)
write32le_with_16be_handler(handler, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
@ -443,7 +443,7 @@ INLINE void write64le_with_16be_handler(write16_space_func handler, address_spac
*
*************************************/
INLINE UINT64 read64be_with_32be_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT64 read64be_with_32be_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_32_63)
@ -454,7 +454,7 @@ INLINE UINT64 read64be_with_32be_handler(read32_space_func handler, address_spac
}
INLINE void write64be_with_32be_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64be_with_32be_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_32_63)
(*handler)(space, offset * 2 + 0, data >> 32, mem_mask >> 32);
@ -469,7 +469,7 @@ INLINE void write64be_with_32be_handler(write32_space_func handler, address_spac
*
*************************************/
INLINE UINT64 read64le_with_32le_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT64 read64le_with_32le_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result = 0;
if (ACCESSING_BITS_0_31)
@ -480,7 +480,7 @@ INLINE UINT64 read64le_with_32le_handler(read32_space_func handler, address_spac
}
INLINE void write64le_with_32le_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64le_with_32le_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
if (ACCESSING_BITS_0_31)
(*handler)(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
@ -495,7 +495,7 @@ INLINE void write64le_with_32le_handler(write32_space_func handler, address_spac
*
*************************************/
INLINE UINT64 read64be_with_32le_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT64 read64be_with_32le_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result;
mem_mask = FLIPENDIAN_INT64(mem_mask);
@ -504,7 +504,7 @@ INLINE UINT64 read64be_with_32le_handler(read32_space_func handler, address_spac
}
INLINE void write64be_with_32le_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64be_with_32le_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
data = FLIPENDIAN_INT64(data);
mem_mask = FLIPENDIAN_INT64(mem_mask);
@ -518,7 +518,7 @@ INLINE void write64be_with_32le_handler(write32_space_func handler, address_spac
*
*************************************/
INLINE UINT64 read64le_with_32be_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
INLINE UINT64 read64le_with_32be_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
{
UINT64 result;
mem_mask = FLIPENDIAN_INT64(mem_mask);
@ -527,7 +527,7 @@ INLINE UINT64 read64le_with_32be_handler(read32_space_func handler, address_spac
}
INLINE void write64le_with_32be_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
INLINE void write64le_with_32be_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
{
data = FLIPENDIAN_INT64(data);
mem_mask = FLIPENDIAN_INT64(mem_mask);

96
src/emu/memory.c
View File

@ -1022,20 +1022,20 @@ public:
// generate accessor table
virtual void accessors(data_accessors &accessors) const
{
accessors.read_byte = reinterpret_cast<UINT8 (*)(address_space *, offs_t)>(&read_byte_static);
accessors.read_word = reinterpret_cast<UINT16 (*)(address_space *, offs_t)>(&read_word_static);
accessors.read_word_masked = reinterpret_cast<UINT16 (*)(address_space *, offs_t, UINT16)>(&read_word_masked_static);
accessors.read_dword = reinterpret_cast<UINT32 (*)(address_space *, offs_t)>(&read_dword_static);
accessors.read_dword_masked = reinterpret_cast<UINT32 (*)(address_space *, offs_t, UINT32)>(&read_dword_masked_static);
accessors.read_qword = reinterpret_cast<UINT64 (*)(address_space *, offs_t)>(&read_qword_static);
accessors.read_qword_masked = reinterpret_cast<UINT64 (*)(address_space *, offs_t, UINT64)>(&read_qword_masked_static);
accessors.write_byte = reinterpret_cast<void (*)(address_space *, offs_t, UINT8)>(&write_byte_static);
accessors.write_word = reinterpret_cast<void (*)(address_space *, offs_t, UINT16)>(&write_word_static);
accessors.write_word_masked = reinterpret_cast<void (*)(address_space *, offs_t, UINT16, UINT16)>(&write_word_masked_static);
accessors.write_dword = reinterpret_cast<void (*)(address_space *, offs_t, UINT32)>(&write_dword_static);
accessors.write_dword_masked = reinterpret_cast<void (*)(address_space *, offs_t, UINT32, UINT32)>(&write_dword_masked_static);
accessors.write_qword = reinterpret_cast<void (*)(address_space *, offs_t, UINT64)>(&write_qword_static);
accessors.write_qword_masked = reinterpret_cast<void (*)(address_space *, offs_t, UINT64, UINT64)>(&write_qword_masked_static);
accessors.read_byte = reinterpret_cast<UINT8 (*)(address_space &, offs_t)>(&read_byte_static);
accessors.read_word = reinterpret_cast<UINT16 (*)(address_space &, offs_t)>(&read_word_static);
accessors.read_word_masked = reinterpret_cast<UINT16 (*)(address_space &, offs_t, UINT16)>(&read_word_masked_static);
accessors.read_dword = reinterpret_cast<UINT32 (*)(address_space &, offs_t)>(&read_dword_static);
accessors.read_dword_masked = reinterpret_cast<UINT32 (*)(address_space &, offs_t, UINT32)>(&read_dword_masked_static);
accessors.read_qword = reinterpret_cast<UINT64 (*)(address_space &, offs_t)>(&read_qword_static);
accessors.read_qword_masked = reinterpret_cast<UINT64 (*)(address_space &, offs_t, UINT64)>(&read_qword_masked_static);
accessors.write_byte = reinterpret_cast<void (*)(address_space &, offs_t, UINT8)>(&write_byte_static);
accessors.write_word = reinterpret_cast<void (*)(address_space &, offs_t, UINT16)>(&write_word_static);
accessors.write_word_masked = reinterpret_cast<void (*)(address_space &, offs_t, UINT16, UINT16)>(&write_word_masked_static);
accessors.write_dword = reinterpret_cast<void (*)(address_space &, offs_t, UINT32)>(&write_dword_static);
accessors.write_dword_masked = reinterpret_cast<void (*)(address_space &, offs_t, UINT32, UINT32)>(&write_dword_masked_static);
accessors.write_qword = reinterpret_cast<void (*)(address_space &, offs_t, UINT64)>(&write_qword_static);
accessors.write_qword_masked = reinterpret_cast<void (*)(address_space &, offs_t, UINT64, UINT64)>(&write_qword_masked_static);
}
// return a pointer to the read bank, or NULL if none
@ -1441,20 +1441,20 @@ public:
void write_qword_unaligned(offs_t address, UINT64 data, UINT64 mask) { write_direct<UINT64, false>(address, data, mask); }
// static access to these functions
static UINT8 read_byte_static(this_type *space, offs_t address) { return (NATIVE_BITS == 8) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT8, true>(address, 0xff); }
static UINT16 read_word_static(this_type *space, offs_t address) { return (NATIVE_BITS == 16) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT16, true>(address, 0xffff); }
static UINT16 read_word_masked_static(this_type *space, offs_t address, UINT16 mask) { return space->read_direct<UINT16, true>(address, mask); }
static UINT32 read_dword_static(this_type *space, offs_t address) { return (NATIVE_BITS == 32) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT32, true>(address, 0xffffffff); }
static UINT32 read_dword_masked_static(this_type *space, offs_t address, UINT32 mask) { return space->read_direct<UINT32, true>(address, mask); }
static UINT64 read_qword_static(this_type *space, offs_t address) { return (NATIVE_BITS == 64) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT64, true>(address, U64(0xffffffffffffffff)); }
static UINT64 read_qword_masked_static(this_type *space, offs_t address, UINT64 mask) { return space->read_direct<UINT64, true>(address, mask); }
static void write_byte_static(this_type *space, offs_t address, UINT8 data) { if (NATIVE_BITS == 8) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT8, true>(address, data, 0xff); }
static void write_word_static(this_type *space, offs_t address, UINT16 data) { if (NATIVE_BITS == 16) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT16, true>(address, data, 0xffff); }
static void write_word_masked_static(this_type *space, offs_t address, UINT16 data, UINT16 mask) { space->write_direct<UINT16, true>(address, data, mask); }
static void write_dword_static(this_type *space, offs_t address, UINT32 data) { if (NATIVE_BITS == 32) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT32, true>(address, data, 0xffffffff); }
static void write_dword_masked_static(this_type *space, offs_t address, UINT32 data, UINT32 mask) { space->write_direct<UINT32, true>(address, data, mask); }
static void write_qword_static(this_type *space, offs_t address, UINT64 data) { if (NATIVE_BITS == 64) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT64, true>(address, data, U64(0xffffffffffffffff)); }
static void write_qword_masked_static(this_type *space, offs_t address, UINT64 data, UINT64 mask) { space->write_direct<UINT64, true>(address, data, mask); }
static UINT8 read_byte_static(this_type &space, offs_t address) { return (NATIVE_BITS == 8) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT8, true>(address, 0xff); }
static UINT16 read_word_static(this_type &space, offs_t address) { return (NATIVE_BITS == 16) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT16, true>(address, 0xffff); }
static UINT16 read_word_masked_static(this_type &space, offs_t address, UINT16 mask) { return space.read_direct<UINT16, true>(address, mask); }
static UINT32 read_dword_static(this_type &space, offs_t address) { return (NATIVE_BITS == 32) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT32, true>(address, 0xffffffff); }
static UINT32 read_dword_masked_static(this_type &space, offs_t address, UINT32 mask) { return space.read_direct<UINT32, true>(address, mask); }
static UINT64 read_qword_static(this_type &space, offs_t address) { return (NATIVE_BITS == 64) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT64, true>(address, U64(0xffffffffffffffff)); }
static UINT64 read_qword_masked_static(this_type &space, offs_t address, UINT64 mask) { return space.read_direct<UINT64, true>(address, mask); }
static void write_byte_static(this_type &space, offs_t address, UINT8 data) { if (NATIVE_BITS == 8) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT8, true>(address, data, 0xff); }
static void write_word_static(this_type &space, offs_t address, UINT16 data) { if (NATIVE_BITS == 16) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT16, true>(address, data, 0xffff); }
static void write_word_masked_static(this_type &space, offs_t address, UINT16 data, UINT16 mask) { space.write_direct<UINT16, true>(address, data, mask); }
static void write_dword_static(this_type &space, offs_t address, UINT32 data) { if (NATIVE_BITS == 32) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT32, true>(address, data, 0xffffffff); }
static void write_dword_masked_static(this_type &space, offs_t address, UINT32 data, UINT32 mask) { space.write_direct<UINT32, true>(address, data, mask); }
static void write_qword_static(this_type &space, offs_t address, UINT64 data) { if (NATIVE_BITS == 64) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT64, true>(address, data, U64(0xffffffffffffffff)); }
static void write_qword_masked_static(this_type &space, offs_t address, UINT64 data, UINT64 mask) { space.write_direct<UINT64, true>(address, data, mask); }
address_table_read m_read; // memory read lookup table
address_table_write m_write; // memory write lookup table
@ -4984,7 +4984,7 @@ UINT16 handler_entry_read::read_stub_16(address_space &space, offs_t offset, UIN
offs_t aoffset = offset * si.m_multiplier + si.m_offset;
UINT8 val;
if (m_sub_is_legacy[index])
val = m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset);
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
else
val = m_subread[index].r8(space, aoffset, submask);
result |= val << si.m_shift;
@ -5015,10 +5015,10 @@ UINT32 handler_entry_read::read_stub_32(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
val = m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset);
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
break;
case 16:
val = m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, submask);
val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
break;
}
}
@ -5062,13 +5062,13 @@ UINT64 handler_entry_read::read_stub_64(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
val = m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset);
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
break;
case 16:
val = m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, submask);
val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
break;
case 32:
val = m_sublegacy_info[index].handler.space32(m_sublegacy_info[index].object.space, aoffset, submask);
val = m_sublegacy_info[index].handler.space32(*m_sublegacy_info[index].object.space, aoffset, submask);
break;
}
}
@ -5101,22 +5101,22 @@ UINT64 handler_entry_read::read_stub_64(address_space &space, offs_t offset, UIN
UINT8 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT8 mask)
{
return m_legacy_info.handler.space8(m_legacy_info.object.space, offset);
return m_legacy_info.handler.space8(*m_legacy_info.object.space, offset);
}
UINT16 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT16 mask)
{
return m_legacy_info.handler.space16(m_legacy_info.object.space, offset, mask);
return m_legacy_info.handler.space16(*m_legacy_info.object.space, offset, mask);
}
UINT32 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT32 mask)
{
return m_legacy_info.handler.space32(m_legacy_info.object.space, offset, mask);
return m_legacy_info.handler.space32(*m_legacy_info.object.space, offset, mask);
}
UINT64 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT64 mask)
{
return m_legacy_info.handler.space64(m_legacy_info.object.space, offset, mask);
return m_legacy_info.handler.space64(*m_legacy_info.object.space, offset, mask);
}
@ -5438,7 +5438,7 @@ void handler_entry_write::write_stub_16(address_space &space, offs_t offset, UIN
offs_t aoffset = offset * si.m_multiplier + si.m_offset;
UINT8 adata = data >> si.m_shift;
if (m_sub_is_legacy[index])
m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset, adata);
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
else
m_subwrite[index].w8(space, aoffset, adata, submask);
}
@ -5466,10 +5466,10 @@ void handler_entry_write::write_stub_32(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset, adata);
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
break;
case 16:
m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, adata, submask);
m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
break;
}
}
@ -5510,13 +5510,13 @@ void handler_entry_write::write_stub_64(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset, adata);
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
break;
case 16:
m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, adata, submask);
m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
break;
case 32:
m_sublegacy_info[index].handler.space32(m_sublegacy_info[index].object.space, aoffset, adata, submask);
m_sublegacy_info[index].handler.space32(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
break;
}
}
@ -5547,20 +5547,20 @@ void handler_entry_write::write_stub_64(address_space &space, offs_t offset, UIN
void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT8 data, UINT8 mask)
{
m_legacy_info.handler.space8(m_legacy_info.object.space, offset, data);
m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, data);
}
void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT16 data, UINT16 mask)
{
m_legacy_info.handler.space16(m_legacy_info.object.space, offset, data, mask);
m_legacy_info.handler.space16(*m_legacy_info.object.space, offset, data, mask);
}
void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT32 data, UINT32 mask)
{
m_legacy_info.handler.space32(m_legacy_info.object.space, offset, data, mask);
m_legacy_info.handler.space32(*m_legacy_info.object.space, offset, data, mask);
}
void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT64 data, UINT64 mask)
{
m_legacy_info.handler.space64(m_legacy_info.object.space, offset, data, mask);
m_legacy_info.handler.space64(*m_legacy_info.object.space, offset, data, mask);
}

60
src/emu/memory.h
View File

@ -112,14 +112,14 @@ typedef delegate<void (address_map &, const device_t &)> address_map_delegate;
// legacy space read/write handlers
typedef UINT8 (*read8_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset);
typedef void (*write8_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
typedef UINT16 (*read16_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
typedef void (*write16_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
typedef UINT32 (*read32_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
typedef void (*write32_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
typedef UINT64 (*read64_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
typedef void (*write64_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
typedef UINT8 (*read8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset);
typedef void (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
typedef UINT16 (*read16_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
typedef void (*write16_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
typedef UINT32 (*read32_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
typedef void (*write32_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
typedef UINT64 (*read64_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
typedef void (*write64_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
// legacy device read/write handlers
typedef UINT8 (*read8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
@ -135,21 +135,21 @@ typedef void (*write64_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED ad
// struct with function pointers for accessors; use is generally discouraged unless necessary
struct data_accessors
{
UINT8 (*read_byte)(address_space *space, offs_t byteaddress);
UINT16 (*read_word)(address_space *space, offs_t byteaddress);
UINT16 (*read_word_masked)(address_space *space, offs_t byteaddress, UINT16 mask);
UINT32 (*read_dword)(address_space *space, offs_t byteaddress);
UINT32 (*read_dword_masked)(address_space *space, offs_t byteaddress, UINT32 mask);
UINT64 (*read_qword)(address_space *space, offs_t byteaddress);
UINT64 (*read_qword_masked)(address_space *space, offs_t byteaddress, UINT64 mask);
UINT8 (*read_byte)(address_space &space, offs_t byteaddress);
UINT16 (*read_word)(address_space &space, offs_t byteaddress);
UINT16 (*read_word_masked)(address_space &space, offs_t byteaddress, UINT16 mask);
UINT32 (*read_dword)(address_space &space, offs_t byteaddress);
UINT32 (*read_dword_masked)(address_space &space, offs_t byteaddress, UINT32 mask);
UINT64 (*read_qword)(address_space &space, offs_t byteaddress);
UINT64 (*read_qword_masked)(address_space &space, offs_t byteaddress, UINT64 mask);
void (*write_byte)(address_space *space, offs_t byteaddress, UINT8 data);
void (*write_word)(address_space *space, offs_t byteaddress, UINT16 data);
void (*write_word_masked)(address_space *space, offs_t byteaddress, UINT16 data, UINT16 mask);
void (*write_dword)(address_space *space, offs_t byteaddress, UINT32 data);
void (*write_dword_masked)(address_space *space, offs_t byteaddress, UINT32 data, UINT32 mask);
void (*write_qword)(address_space *space, offs_t byteaddress, UINT64 data);
void (*write_qword_masked)(address_space *space, offs_t byteaddress, UINT64 data, UINT64 mask);
void (*write_byte)(address_space &space, offs_t byteaddress, UINT8 data);
void (*write_word)(address_space &space, offs_t byteaddress, UINT16 data);
void (*write_word_masked)(address_space &space, offs_t byteaddress, UINT16 data, UINT16 mask);
void (*write_dword)(address_space &space, offs_t byteaddress, UINT32 data);
void (*write_dword_masked)(address_space &space, offs_t byteaddress, UINT32 data, UINT32 mask);
void (*write_qword)(address_space &space, offs_t byteaddress, UINT64 data);
void (*write_qword_masked)(address_space &space, offs_t byteaddress, UINT64 data, UINT64 mask);
};
@ -876,14 +876,14 @@ private:
// space read/write handler function macros
#define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset)
#define WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
#define READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
#define WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
#define READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
#define WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
#define READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
#define WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
#define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset)
#define WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
#define READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
#define WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
#define READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
#define WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
#define READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
#define WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
// device read/write handler function macros

4
src/emu/sound/awacs.c
View File

@ -166,9 +166,9 @@ WRITE8_MEMBER( awacs_device::write )
m_regs[offset] = data;
}
void awacs_device::set_dma_base(address_space *space, int offset0, int offset1)
void awacs_device::set_dma_base(address_space &space, int offset0, int offset1)
{
m_dma_space = space;
m_dma_space = &space;
m_dma_offset_0 = offset0;
m_dma_offset_1 = offset1;
}

2
src/emu/sound/awacs.h
View File

@ -43,7 +43,7 @@ public:
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
void set_dma_base(address_space *space, int offset0, int offset1);
void set_dma_base(address_space &space, int offset0, int offset1);
sound_stream *m_stream;

4
src/emu/sound/nile.c
View File

@ -77,7 +77,7 @@ WRITE16_DEVICE_HANDLER( nile_sndctrl_w )
COMBINE_DATA(&info->ctrl);
// printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, space->device().safe_pc());
// printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, space.device().safe_pc());
ctrl^=info->ctrl;
}
@ -132,7 +132,7 @@ WRITE16_DEVICE_HANDLER( nile_snd_w )
info->vpos[v] = info->frac[v] = info->lponce[v] = 0;
}
//printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, space->device().safe_pc());
//printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, space.device().safe_pc());
}
static STREAM_UPDATE( nile_update )

4
src/emu/sound/pokey.c
View File

@ -1296,7 +1296,7 @@ READ8_HANDLER( quad_pokeyn_r )
int pokey_num = (offset >> 3) & ~0x04;
int control = (offset & 0x20) >> 2;
int pokey_reg = (offset % 8) | control;
pokey_device *pokey = space->machine().device<pokey_device>(devname[pokey_num]);
pokey_device *pokey = space.machine().device<pokey_device>(devname[pokey_num]);
return pokey->read(pokey_reg);
}
@ -1307,7 +1307,7 @@ WRITE8_HANDLER( quad_pokeyn_w )
int pokey_num = (offset >> 3) & ~0x04;
int control = (offset & 0x20) >> 2;
int pokey_reg = (offset % 8) | control;
pokey_device *pokey = space->machine().device<pokey_device>(devname[pokey_num]);
pokey_device *pokey = space.machine().device<pokey_device>(devname[pokey_num]);
pokey->write(pokey_reg, data);
}

4
src/emu/sound/spu.c
View File

@ -3106,7 +3106,7 @@ void spu_device::dma_write( UINT32 n_address, INT32 n_size )
READ16_HANDLER( spu_r )
{
spu_device *spu = space->machine().device<spu_device>("spu");
spu_device *spu = space.machine().device<spu_device>("spu");
if (spu == NULL )
{
@ -3118,7 +3118,7 @@ READ16_HANDLER( spu_r )
WRITE16_HANDLER( spu_w )
{
spu_device *spu = space->machine().device<spu_device>("spu");
spu_device *spu = space.machine().device<spu_device>("spu");
if (spu == NULL)
{

4
src/emu/sound/vrender0.c
View File

@ -83,8 +83,8 @@ static const unsigned short ULawTo16[]=
#define ENVVOL(chan) (VR0->SOUNDREGS[(0x20/4)*chan+0x04/4]&0xffffff)
/*
#define GETSOUNDREG16(Chan,Offs) space->read_word(VR0->Intf.reg_base+0x20*Chan+Offs)
#define GETSOUNDREG32(Chan,Offs) space->read_dword(VR0->Intf.reg_base+0x20*Chan+Offs)
#define GETSOUNDREG16(Chan,Offs) space.read_word(VR0->Intf.reg_base+0x20*Chan+Offs)
#define GETSOUNDREG32(Chan,Offs) space.read_dword(VR0->Intf.reg_base+0x20*Chan+Offs)
#define CURSADDR(chan) GETSOUNDREG32(chan,0x00)
#define DSADDR(chan) GETSOUNDREG16(chan,0x08)

10
src/emu/video/hd63484.c
View File

@ -1467,8 +1467,8 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
READ16_DEVICE_HANDLER( hd63484_status_r )
{
// if (space->device().safe_pc() != 0xfced6 && space->device().safe_pc() != 0xfe1d6)
// logerror("%05x: HD63484 status read\n",space->device().safe_pc());
// if (space.device().safe_pc() != 0xfced6 && space.device().safe_pc() != 0xfe1d6)
// logerror("%05x: HD63484 status read\n",space.device().safe_pc());
return 0xff22 | (device->machine().rand() & 0x0004); /* write FIFO ready + command end + (read FIFO ready or read FIFO not ready) */
}
@ -1495,7 +1495,7 @@ WRITE16_DEVICE_HANDLER( hd63484_data_w )
hd63484->regno += 2; /* autoincrement */
#if LOG_COMMANDS
// logerror("PC %05x: HD63484 register %02x write %04x\n", space->device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
// logerror("PC %05x: HD63484 register %02x write %04x\n", space.device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
#endif
if (hd63484->regno == 0) /* FIFO */
@ -1512,14 +1512,14 @@ READ16_DEVICE_HANDLER( hd63484_data_r )
else if (hd63484->regno == 0)
{
#if LOG_COMMANDS
// logerror("%05x: HD63484 read FIFO\n", space->device().safe_pc());
// logerror("%05x: HD63484 read FIFO\n", space.device().safe_pc());
#endif
res = hd63484->readfifo;
}
else
{
#if LOG_COMMANDS
// logerror("%05x: HD63484 read register %02x\n", space->device().safe_pc(), hd63484->regno);
// logerror("%05x: HD63484 read register %02x\n", space.device().safe_pc(), hd63484->regno);
#endif
res = 0;
}

50
src/emu/video/pc_cga.c
View File

@ -329,10 +329,10 @@ static int internal_pc_cga_video_start(running_machine &machine)
static VIDEO_START( pc_cga )
{
int buswidth;
address_space *space = machine.firstcpu->space(AS_PROGRAM);
address_space &space = *machine.firstcpu->space(AS_PROGRAM);
address_space *spaceio = machine.firstcpu->space(AS_IO);
space->install_readwrite_bank(0xb8000, 0xbbfff, 0, 0x04000, "bank11" );
space.install_readwrite_bank(0xb8000, 0xbbfff, 0, 0x04000, "bank11" );
buswidth = machine.firstcpu->space_config(AS_PROGRAM)->m_databus_width;
UINT64 mask = 0;
switch(buswidth)
@ -370,11 +370,11 @@ static VIDEO_START( pc_cga )
static VIDEO_START( pc_cga32k )
{
int buswidth;
address_space *space = machine.firstcpu->space(AS_PROGRAM);
address_space &space = *machine.firstcpu->space(AS_PROGRAM);
address_space *spaceio = machine.firstcpu->space(AS_IO);
space->install_readwrite_bank(0xb8000, 0xbffff, "bank11" );
space.install_readwrite_bank(0xb8000, 0xbffff, "bank11" );
buswidth = machine.firstcpu->space_config(AS_PROGRAM)->m_databus_width;
UINT64 mask = 0;
switch(buswidth)
@ -1136,7 +1136,7 @@ static void pc_cga_plantronics_w(running_machine &machine, int data)
static WRITE8_HANDLER ( char_ram_w )
{
UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base();
UINT8 *gfx = space.machine().root_device().memregion("gfx1")->base();
offset ^= BIT(offset, 12);
logerror("write char ram %04x %02x\n",offset,data);
gfx[offset + 0x0000] = data;
@ -1147,14 +1147,14 @@ static WRITE8_HANDLER ( char_ram_w )
static READ8_HANDLER ( char_ram_r )
{
UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base();
UINT8 *gfx = space.machine().root_device().memregion("gfx1")->base();
offset ^= BIT(offset, 12);
return gfx[offset];
}
static READ8_HANDLER( pc_cga8_r )
{
mc6845_device *mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
mc6845_device *mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
int data = 0xff;
switch( offset )
{
@ -1162,7 +1162,7 @@ static READ8_HANDLER( pc_cga8_r )
/* return last written mc6845 address value here? */
break;
case 1: case 3: case 5: case 7:
data = mc6845->register_r( *space, offset );
data = mc6845->register_r( space, offset );
break;
case 10:
data = cga.vsync | ( ( data & 0x40 ) >> 4 ) | cga.hsync;
@ -1182,27 +1182,27 @@ static WRITE8_HANDLER( pc_cga8_w )
switch(offset) {
case 0: case 2: case 4: case 6:
mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
mc6845->address_w( *space, offset, data );
mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
mc6845->address_w( space, offset, data );
break;
case 1: case 3: case 5: case 7:
mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
mc6845->register_w( *space, offset, data );
mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
mc6845->register_w( space, offset, data );
break;
case 8:
pc_cga_mode_control_w(space->machine(), data);
pc_cga_mode_control_w(space.machine(), data);
break;
case 9:
pc_cga_color_select_w(space->machine(), data);
pc_cga_color_select_w(space.machine(), data);
break;
case 0x0d:
pc_cga_plantronics_w(space->machine(), data);
pc_cga_plantronics_w(space.machine(), data);
break;
case 0x0f:
// Not sure if some all CGA cards have ability to upload char definition
// The original CGA card had a char rom
UINT8 buswidth = space->machine().firstcpu->space_config(AS_PROGRAM)->m_databus_width;
address_space *space_prg = space->machine().firstcpu->space(AS_PROGRAM);
UINT8 buswidth = space.machine().firstcpu->space_config(AS_PROGRAM)->m_databus_width;
address_space *space_prg = space.machine().firstcpu->space(AS_PROGRAM);
cga.p3df = data;
if (data & 1) {
UINT64 mask = 0;
@ -1485,20 +1485,20 @@ static MC6845_UPDATE_ROW( pc1512_gfx_4bpp_update_row )
static WRITE8_HANDLER ( pc1512_w )
{
UINT8 *videoram = cga.videoram;
mc6845_device *mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
mc6845_device *mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
switch (offset)
{
case 0: case 2: case 4: case 6:
data &= 0x1F;
mc6845->address_w( *space, offset, data );
mc6845->address_w( space, offset, data );
pc1512.mc6845_address = data;
break;
case 1: case 3: case 5: case 7:
if ( ! pc1512.mc6845_locked_register[pc1512.mc6845_address] )
{
mc6845->register_w( *space, offset, data );
mc6845->register_w( space, offset, data );
if ( mc6845_writeonce_register[pc1512.mc6845_address] )
{
pc1512.mc6845_locked_register[pc1512.mc6845_address] = 1;
@ -1514,7 +1514,7 @@ static WRITE8_HANDLER ( pc1512_w )
}
else
{
space->machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[0]);
space.machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[0]);
}
cga.mode_control = data;
switch( cga.mode_control & 0x3F )
@ -1572,7 +1572,7 @@ static WRITE8_HANDLER ( pc1512_w )
pc1512.read = data;
if ( ( cga.mode_control & 0x12 ) == 0x12 )
{
space->machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[data & 3]);
space.machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[data & 3]);
}
break;
@ -1635,12 +1635,12 @@ static VIDEO_START( pc1512 )
cga.videoram_size = 0x10000;
cga.videoram = auto_alloc_array(machine, UINT8, 0x10000 );
address_space *space = machine.firstcpu->space( AS_PROGRAM );
address_space &space = *machine.firstcpu->space( AS_PROGRAM );
address_space *io_space = machine.firstcpu->space( AS_IO );
space->install_read_bank( 0xb8000, 0xbbfff, 0, 0x0C000, "bank1" );
space.install_read_bank( 0xb8000, 0xbbfff, 0, 0x0C000, "bank1" );
machine.root_device().membank("bank1")->set_base(cga.videoram + videoram_offset[0]);
space->install_legacy_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, FUNC(pc1512_videoram_w), 0xffff);
space.install_legacy_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, FUNC(pc1512_videoram_w), 0xffff);
io_space->install_legacy_readwrite_handler( 0x3d0, 0x3df, FUNC(pc1512_r), FUNC(pc1512_w), 0xffff);

90
src/emu/video/pc_vga.c
View File

@ -1462,8 +1462,8 @@ static READ8_HANDLER(vga_crtc_r)
vga.attribute.state = 0;
data = 0;
hsync = space->machine().primary_screen->hblank() & 1;
vsync = vga_vblank(space->machine()); //space->machine().primary_screen->vblank() & 1;
hsync = space.machine().primary_screen->hblank() & 1;
vsync = vga_vblank(space.machine()); //space.machine().primary_screen->vblank() & 1;
data |= (hsync | vsync) & 1; // DD - display disable register
data |= (vsync & 1) << 3; // VRetrace register
@ -1513,11 +1513,11 @@ static WRITE8_HANDLER(vga_crtc_w)
data);
}
crtc_reg_write(space->machine(),vga.crtc.index,data);
//space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
crtc_reg_write(space.machine(),vga.crtc.index,data);
//space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
#if 0
if((vga.crtc.index & 0xfe) != 0x0e)
printf("%02x %02x %d\n",vga.crtc.index,data,space->machine().primary_screen->vpos());
printf("%02x %02x %d\n",vga.crtc.index,data,space.machine().primary_screen->vpos());
#endif
break;
@ -1687,7 +1687,7 @@ READ8_HANDLER( vga_port_03c0_r )
break;
case 0xf:
data = gc_reg_read(space->machine(),vga.gc.index);
data = gc_reg_read(space.machine(),vga.gc.index);
break;
}
return data;
@ -1700,7 +1700,7 @@ READ8_HANDLER(vga_port_03d0_r)
data = vga_crtc_r(space, offset);
if(offset == 8)
{
logerror("VGA: 0x3d8 read at %08x\n",space->device().safe_pc());
logerror("VGA: 0x3d8 read at %08x\n",space.device().safe_pc());
data = 0; // TODO: PC-200 reads back CGA register here, everything else returns open bus OR CGA emulation of register 0x3d8
}
@ -1801,7 +1801,7 @@ WRITE8_HANDLER(vga_port_03c0_w)
break;
case 2:
vga.miscellaneous_output=data;
recompute_params(space->machine());
recompute_params(space.machine());
break;
case 3:
vga.oak.reg = data;
@ -1822,8 +1822,8 @@ WRITE8_HANDLER(vga_port_03c0_w)
vga.sequencer.data[vga.sequencer.index] = data;
}
seq_reg_write(space->machine(),vga.sequencer.index,data);
recompute_params(space->machine());
seq_reg_write(space.machine(),vga.sequencer.index,data);
recompute_params(space.machine());
break;
case 6:
vga.dac.mask=data;
@ -1863,7 +1863,7 @@ WRITE8_HANDLER(vga_port_03c0_w)
vga.gc.index=data;
break;
case 0xf:
gc_reg_write(space->machine(),vga.gc.index,data);
gc_reg_write(space.machine(),vga.gc.index,data);
break;
}
}
@ -1920,7 +1920,7 @@ READ8_HANDLER(vga_mem_r)
if(vga.sequencer.data[4] & 4)
{
int data;
if (!space->debugger_access())
if (!space.debugger_access())
{
vga.gc.latch[0]=vga.memory[(offset)];
vga.gc.latch[1]=vga.memory[(offset)+0x10000];
@ -2043,7 +2043,7 @@ void pc_vga_init(running_machine &machine, read8_space_func read_dipswitch, cons
}
void pc_vga_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset)
void pc_vga_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset)
{
int buswidth;
UINT64 mask = 0;
@ -2071,11 +2071,11 @@ void pc_vga_io_init(running_machine &machine, address_space *mem_space, offs_t m
fatalerror("VGA: Bus width %d not supported\n", buswidth);
break;
}
io_space->install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
io_space->install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_03c0_r), FUNC(vga_port_03c0_w), mask);
io_space->install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_03d0_r), FUNC(vga_port_03d0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_03c0_r), FUNC(vga_port_03c0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_03d0_r), FUNC(vga_port_03d0_w), mask);
mem_space->install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_mem_r), FUNC(vga_mem_w), mask);
mem_space.install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_mem_r), FUNC(vga_mem_w), mask);
}
VIDEO_START( vga )
@ -2313,7 +2313,7 @@ READ8_HANDLER(tseng_et4k_03b0_r)
switch(offset)
{
case 5:
res = tseng_crtc_reg_read(space->machine(),vga.crtc.index);
res = tseng_crtc_reg_read(space.machine(),vga.crtc.index);
break;
case 8:
res = et4k.reg_3d8;
@ -2335,7 +2335,7 @@ WRITE8_HANDLER(tseng_et4k_03b0_w)
{
case 5:
vga.crtc.data[vga.crtc.index] = data;
tseng_crtc_reg_write(space->machine(),vga.crtc.index,data);
tseng_crtc_reg_write(space.machine(),vga.crtc.index,data);
break;
case 8:
et4k.reg_3d8 = data;
@ -2349,7 +2349,7 @@ WRITE8_HANDLER(tseng_et4k_03b0_w)
break;
}
}
tseng_define_video_mode(space->machine());
tseng_define_video_mode(space.machine());
}
@ -2360,7 +2360,7 @@ READ8_HANDLER(tseng_et4k_03c0_r)
switch(offset)
{
case 0x05:
res = tseng_seq_reg_read(space->machine(),vga.sequencer.index);
res = tseng_seq_reg_read(space.machine(),vga.sequencer.index);
break;
case 0x0d:
res = svga.bank_w & 0xf;
@ -2392,7 +2392,7 @@ WRITE8_HANDLER(tseng_et4k_03c0_w)
switch(offset)
{
case 0x05:
tseng_seq_reg_write(space->machine(),vga.sequencer.index,data);
tseng_seq_reg_write(space.machine(),vga.sequencer.index,data);
break;
case 0x0d:
svga.bank_w = data & 0xf;
@ -2408,7 +2408,7 @@ WRITE8_HANDLER(tseng_et4k_03c0_w)
vga_port_03c0_w(space,offset,data);
break;
}
tseng_define_video_mode(space->machine());
tseng_define_video_mode(space.machine());
}
READ8_HANDLER(tseng_et4k_03d0_r)
@ -2420,7 +2420,7 @@ READ8_HANDLER(tseng_et4k_03d0_r)
switch(offset)
{
case 5:
res = tseng_crtc_reg_read(space->machine(),vga.crtc.index);
res = tseng_crtc_reg_read(space.machine(),vga.crtc.index);
break;
case 8:
res = et4k.reg_3d8;
@ -2442,9 +2442,9 @@ WRITE8_HANDLER(tseng_et4k_03d0_w)
{
case 5:
vga.crtc.data[vga.crtc.index] = data;
tseng_crtc_reg_write(space->machine(),vga.crtc.index,data);
tseng_crtc_reg_write(space.machine(),vga.crtc.index,data);
//if((vga.crtc.index & 0xfe) != 0x0e)
// printf("%02x %02x %d\n",vga.crtc.index,data,space->machine().primary_screen->vpos());
// printf("%02x %02x %d\n",vga.crtc.index,data,space.machine().primary_screen->vpos());
break;
case 8:
et4k.reg_3d8 = data;
@ -2458,7 +2458,7 @@ WRITE8_HANDLER(tseng_et4k_03d0_w)
break;
}
}
tseng_define_video_mode(space->machine());
tseng_define_video_mode(space.machine());
}
READ8_HANDLER( tseng_mem_r )
@ -2489,7 +2489,7 @@ Trident implementation
******************************************/
void pc_svga_trident_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset)
void pc_svga_trident_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset)
{
int buswidth;
UINT64 mask = 0;
@ -2517,11 +2517,11 @@ void pc_svga_trident_io_init(running_machine &machine, address_space *mem_space,
fatalerror("VGA: Bus width %d not supported\n", buswidth);
break;
}
io_space->install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
io_space->install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(trident_03c0_r), FUNC(trident_03c0_w), mask);
io_space->install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(trident_03d0_r), FUNC(trident_03d0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(trident_03c0_r), FUNC(trident_03c0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(trident_03d0_r), FUNC(trident_03d0_w), mask);
mem_space->install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(trident_mem_r), FUNC(trident_mem_w), mask);
mem_space.install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(trident_mem_r), FUNC(trident_mem_w), mask);
// D3h = TGUI9660XGi
svga.id = 0xd3; // TODO: hardcoded for California Chase
@ -2582,7 +2582,7 @@ READ8_HANDLER(trident_03c0_r)
switch(offset)
{
case 0x05:
res = trident_seq_reg_read(space->machine(),vga.sequencer.index);
res = trident_seq_reg_read(space.machine(),vga.sequencer.index);
break;
default:
res = vga_port_03c0_r(space,offset);
@ -2597,7 +2597,7 @@ WRITE8_HANDLER(trident_03c0_w)
switch(offset)
{
case 0x05:
trident_seq_reg_write(space->machine(),vga.sequencer.index,data);
trident_seq_reg_write(space.machine(),vga.sequencer.index,data);
break;
default:
vga_port_03c0_w(space,offset,data);
@ -3014,7 +3014,7 @@ READ8_HANDLER(s3_port_03b0_r)
switch(offset)
{
case 5:
res = s3_crtc_reg_read(space->machine(),vga.crtc.index);
res = s3_crtc_reg_read(space.machine(),vga.crtc.index);
break;
default:
res = vga_port_03b0_r(space,offset);
@ -3033,7 +3033,7 @@ WRITE8_HANDLER(s3_port_03b0_w)
{
case 5:
vga.crtc.data[vga.crtc.index] = data;
s3_crtc_reg_write(space->machine(),vga.crtc.index,data);
s3_crtc_reg_write(space.machine(),vga.crtc.index,data);
break;
default:
vga_port_03b0_w(space,offset,data);
@ -3075,7 +3075,7 @@ READ8_HANDLER(s3_port_03d0_r)
switch(offset)
{
case 5:
res = s3_crtc_reg_read(space->machine(),vga.crtc.index);
res = s3_crtc_reg_read(space.machine(),vga.crtc.index);
break;
default:
res = vga_port_03d0_r(space,offset);
@ -3094,7 +3094,7 @@ WRITE8_HANDLER(s3_port_03d0_w)
{
case 5:
vga.crtc.data[vga.crtc.index] = data;
s3_crtc_reg_write(space->machine(),vga.crtc.index,data);
s3_crtc_reg_write(space.machine(),vga.crtc.index,data);
break;
default:
vga_port_03d0_w(space,offset,data);
@ -4835,7 +4835,7 @@ WRITE8_HANDLER(vga_port_gamtor_03d0_w)
}
}
void pc_vga_gamtor_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset)
void pc_vga_gamtor_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset)
{
int buswidth;
UINT64 mask = 0;
@ -4863,11 +4863,11 @@ void pc_vga_gamtor_io_init(running_machine &machine, address_space *mem_space, o
fatalerror("VGA: Bus width %d not supported\n", buswidth);
break;
}
io_space->install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_gamtor_03b0_r), FUNC(vga_port_gamtor_03b0_w), mask);
io_space->install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_gamtor_03c0_r), FUNC(vga_port_gamtor_03c0_w), mask);
io_space->install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_gamtor_03d0_r), FUNC(vga_port_gamtor_03d0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_gamtor_03b0_r), FUNC(vga_port_gamtor_03b0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_gamtor_03c0_r), FUNC(vga_port_gamtor_03c0_w), mask);
io_space.install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_gamtor_03d0_r), FUNC(vga_port_gamtor_03d0_w), mask);
mem_space->install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_gamtor_mem_r), FUNC(vga_gamtor_mem_w), mask);
mem_space.install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_gamtor_mem_r), FUNC(vga_gamtor_mem_w), mask);
}
static void ati_define_video_mode(running_machine &machine)
@ -5079,7 +5079,7 @@ bit 0 SENSE is the result of a wired-OR of 3 comparators, one
*/
READ16_HANDLER(mach8_status_r)
{
return vga_vblank(space->machine()) << 1;
return vga_vblank(space.machine()) << 1;
}
WRITE16_HANDLER(mach8_htotal_w)
@ -5112,7 +5112,7 @@ bit 0-3 Interrupt requests. These bits show the state of internal interrupt
READ16_HANDLER(mach8_substatus_r)
{
// TODO:
if(vga_vblank(space->machine()) != 0) // not correct, but will do for now
if(vga_vblank(space.machine()) != 0) // not correct, but will do for now
ibm8514.substatus |= 0x01;
return ibm8514.substatus;
}

6
src/emu/video/pc_vga.h
View File

@ -26,9 +26,9 @@ struct pc_svga_interface
};
void pc_vga_init(running_machine &machine, read8_space_func read_dipswitch, const struct pc_svga_interface *svga_intf);
void pc_vga_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset);
void pc_vga_gamtor_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset);
void pc_svga_trident_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset);
void pc_vga_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset);
void pc_vga_gamtor_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset);
void pc_svga_trident_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset);
void pc_vga_reset(running_machine &machine);
void *pc_vga_memory(void);
size_t pc_vga_memory_size(void);

28
src/emu/video/tms34061.c
View File

@ -164,7 +164,7 @@ static TIMER_CALLBACK( tms34061_interrupt )
*
*************************************/
static void register_w(address_space *space, offs_t offset, UINT8 data)
static void register_w(address_space &space, offs_t offset, UINT8 data)
{
int scanline;
int regnum = offset >> 2;
@ -184,7 +184,7 @@ static void register_w(address_space *space, offs_t offset, UINT8 data)
}
/* log it */
if (VERBOSE) logerror("%s:tms34061 %s = %04x\n", space->machine().describe_context(), regnames[regnum], tms34061.regs[regnum]);
if (VERBOSE) logerror("%s:tms34061 %s = %04x\n", space.machine().describe_context(), regnames[regnum], tms34061.regs[regnum]);
/* update the state of things */
switch (regnum)
@ -235,7 +235,7 @@ static void register_w(address_space *space, offs_t offset, UINT8 data)
*
*************************************/
static UINT8 register_r(address_space *space, offs_t offset)
static UINT8 register_r(address_space &space, offs_t offset)
{
int regnum = offset >> 2;
UINT16 result;
@ -262,7 +262,7 @@ static UINT8 register_r(address_space *space, offs_t offset)
}
/* log it */
if (VERBOSE) logerror("%s:tms34061 %s read = %04X\n", space->machine().describe_context(), regnames[regnum], result);
if (VERBOSE) logerror("%s:tms34061 %s read = %04X\n", space.machine().describe_context(), regnames[regnum], result);
return (offset & 0x02) ? (result >> 8) : result;
}
@ -357,7 +357,7 @@ INLINE void adjust_xyaddress(int offset)
}
static void xypixel_w(address_space *space, int offset, UINT8 data)
static void xypixel_w(address_space &space, int offset, UINT8 data)
{
/* determine the offset, then adjust it */
offs_t pixeloffs = tms34061.regs[TMS34061_XYADDRESS];
@ -369,7 +369,7 @@ static void xypixel_w(address_space *space, int offset, UINT8 data)
/* mask to the VRAM size */
pixeloffs &= tms34061.vrammask;
if (VERBOSE) logerror("%s:tms34061 xy (%04x) = %02x/%02x\n", space->machine().describe_context(), pixeloffs, data, tms34061.latchdata);
if (VERBOSE) logerror("%s:tms34061 xy (%04x) = %02x/%02x\n", space.machine().describe_context(), pixeloffs, data, tms34061.latchdata);
/* set the pixel data */
tms34061.vram[pixeloffs] = data;
@ -377,7 +377,7 @@ static void xypixel_w(address_space *space, int offset, UINT8 data)
}
static UINT8 xypixel_r(address_space *space, int offset)
static UINT8 xypixel_r(address_space &space, int offset)
{
/* determine the offset, then adjust it */
offs_t pixeloffs = tms34061.regs[TMS34061_XYADDRESS];
@ -402,7 +402,7 @@ static UINT8 xypixel_r(address_space *space, int offset)
*
*************************************/
void tms34061_w(address_space *space, int col, int row, int func, UINT8 data)
void tms34061_w(address_space &space, int col, int row, int func, UINT8 data)
{
offs_t offs;
@ -425,7 +425,7 @@ void tms34061_w(address_space *space, int col, int row, int func, UINT8 data)
offs = ((row << tms34061.intf.rowshift) | col) & tms34061.vrammask;
if (tms34061.regs[TMS34061_CONTROL2] & 0x0040)
offs |= (tms34061.regs[TMS34061_CONTROL2] & 3) << 16;
if (VERBOSE) logerror("%s:tms34061 direct (%04x) = %02x/%02x\n", space->machine().describe_context(), offs, data, tms34061.latchdata);
if (VERBOSE) logerror("%s:tms34061 direct (%04x) = %02x/%02x\n", space.machine().describe_context(), offs, data, tms34061.latchdata);
if (tms34061.vram[offs] != data || tms34061.latchram[offs] != tms34061.latchdata)
{
tms34061.vram[offs] = data;
@ -439,7 +439,7 @@ void tms34061_w(address_space *space, int col, int row, int func, UINT8 data)
if (tms34061.regs[TMS34061_CONTROL2] & 0x0040)
offs |= (tms34061.regs[TMS34061_CONTROL2] & 3) << 16;
offs &= tms34061.vrammask;
if (VERBOSE) logerror("%s:tms34061 shiftreg write (%04x)\n", space->machine().describe_context(), offs);
if (VERBOSE) logerror("%s:tms34061 shiftreg write (%04x)\n", space.machine().describe_context(), offs);
memcpy(&tms34061.vram[offs], tms34061.shiftreg, (size_t)1 << tms34061.intf.rowshift);
memset(&tms34061.latchram[offs], tms34061.latchdata, (size_t)1 << tms34061.intf.rowshift);
@ -451,20 +451,20 @@ void tms34061_w(address_space *space, int col, int row, int func, UINT8 data)
if (tms34061.regs[TMS34061_CONTROL2] & 0x0040)
offs |= (tms34061.regs[TMS34061_CONTROL2] & 3) << 16;
offs &= tms34061.vrammask;
if (VERBOSE) logerror("%s:tms34061 shiftreg read (%04x)\n", space->machine().describe_context(), offs);
if (VERBOSE) logerror("%s:tms34061 shiftreg read (%04x)\n", space.machine().describe_context(), offs);
tms34061.shiftreg = &tms34061.vram[offs];
break;
/* log anything else */
default:
logerror("%s:Unsupported TMS34061 function %d\n", space->machine().describe_context(), func);
logerror("%s:Unsupported TMS34061 function %d\n", space.machine().describe_context(), func);
break;
}
}
UINT8 tms34061_r(address_space *space, int col, int row, int func)
UINT8 tms34061_r(address_space &space, int col, int row, int func)
{
int result = 0;
offs_t offs;
@ -512,7 +512,7 @@ UINT8 tms34061_r(address_space *space, int col, int row, int func)
/* log anything else */
default:
logerror("%s:Unsupported TMS34061 function %d\n", space->machine().describe_context(),
logerror("%s:Unsupported TMS34061 function %d\n", space.machine().describe_context(),
func);
break;
}

4
src/emu/video/tms34061.h
View File

@ -62,8 +62,8 @@ struct tms34061_display
void tms34061_start(running_machine &machine, const struct tms34061_interface *interface);
/* reads/writes to the 34061 */
UINT8 tms34061_r(address_space *space, int col, int row, int func);
void tms34061_w(address_space *space, int col, int row, int func, UINT8 data);
UINT8 tms34061_r(address_space &space, int col, int row, int func);
void tms34061_w(address_space &space, int col, int row, int func, UINT8 data);
/* latch settings */
READ8_HANDLER( tms34061_latch_r );

10
src/mame/audio/8080bw.c
View File

@ -897,9 +897,9 @@ static TIMER_CALLBACK( schaser_effect_555_cb )
static void schaser_reinit_555_time_remain(_8080bw_state *state)
{
address_space *space = state->m_maincpu->space(AS_PROGRAM);
address_space &space = *state->m_maincpu->space(AS_PROGRAM);
state->m_schaser_effect_555_time_remain = attotime::from_double(state->m_schaser_effect_555_time_remain_savable);
state->schaser_sh_port_2_w(*space, 0, state->m_port_2_last_extra);
state->schaser_sh_port_2_w(space, 0, state->m_port_2_last_extra);
}
@ -918,12 +918,12 @@ MACHINE_START_MEMBER(_8080bw_state,schaser_sh)
MACHINE_RESET_MEMBER(_8080bw_state,schaser_sh)
{
address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
m_schaser_effect_555_is_low = 0;
m_schaser_effect_555_timer->adjust(attotime::never);
schaser_sh_port_1_w(*space, 0, 0);
schaser_sh_port_2_w(*space, 0, 0);
schaser_sh_port_1_w(space, 0, 0);
schaser_sh_port_2_w(space, 0, 0);
m_schaser_effect_555_time_remain = attotime::zero;
m_schaser_effect_555_time_remain_savable = m_schaser_effect_555_time_remain.as_double();
}

2
src/mame/audio/amiga.c
View File

@ -76,7 +76,7 @@ INLINE amiga_audio *get_safe_token( device_t *device )
static TIMER_CALLBACK( signal_irq )
{
amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
}

84
src/mame/audio/atarijsa.c
View File

@ -203,7 +203,7 @@ void atarijsa_reset(void)
static READ8_HANDLER( jsa1_io_r )
{
atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
int result = 0xff;
switch (offset & 0x206)
@ -227,8 +227,8 @@ static READ8_HANDLER( jsa1_io_r )
0x02 = coin 2
0x01 = coin 1
*/
result = space->machine().root_device().ioport("JSAI")->read();
if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
result = space.machine().root_device().ioport("JSAI")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
if ((tms5220 != NULL) && (tms5220_readyq_r(tms5220) == 0))
@ -269,7 +269,7 @@ static WRITE8_HANDLER( jsa1_io_w )
case 0x200: /* /VOICE */
if (tms5220 != NULL)
tms5220_data_w(tms5220, *space, 0, data);
tms5220_data_w(tms5220, space, 0, data);
break;
case 0x202: /* /WRP */
@ -298,11 +298,11 @@ static WRITE8_HANDLER( jsa1_io_w )
}
/* reset the YM2151 if needed */
if ((data&1) == 0) space->machine().device("ymsnd")->reset();
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
/* coin counters */
coin_counter_w(space->machine(), 1, (data >> 5) & 1);
coin_counter_w(space->machine(), 0, (data >> 4) & 1);
coin_counter_w(space.machine(), 1, (data >> 5) & 1);
coin_counter_w(space.machine(), 0, (data >> 4) & 1);
/* update the bank */
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
@ -318,7 +318,7 @@ static WRITE8_HANDLER( jsa1_io_w )
tms5220_volume = ((data >> 6) & 3) * 100 / 3;
pokey_volume = ((data >> 4) & 3) * 100 / 3;
ym2151_volume = ((data >> 1) & 7) * 100 / 7;
update_all_volumes(space->machine());
update_all_volumes(space.machine());
break;
}
}
@ -333,14 +333,14 @@ static WRITE8_HANDLER( jsa1_io_w )
static READ8_HANDLER( jsa2_io_r )
{
atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
int result = 0xff;
switch (offset & 0x206)
{
case 0x000: /* /RDV */
if (oki6295 != NULL)
result = oki6295->read(*space, offset);
result = oki6295->read(space, offset);
else
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
@ -360,8 +360,8 @@ static READ8_HANDLER( jsa2_io_r )
0x02 = coin 2
0x01 = coin 1
*/
result = space->machine().root_device().ioport("JSAII")->read();
if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
result = space.machine().root_device().ioport("JSAII")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
break;
@ -398,7 +398,7 @@ static WRITE8_HANDLER( jsa2_io_w )
case 0x200: /* /WRV */
if (oki6295 != NULL)
oki6295->write(*space, offset, data);
oki6295->write(space, offset, data);
else
logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
@ -419,14 +419,14 @@ static WRITE8_HANDLER( jsa2_io_w )
*/
/* reset the YM2151 if needed */
if ((data&1) == 0) space->machine().device("ymsnd")->reset();
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
/* update the bank */
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
/* coin counters */
coin_counter_w(space->machine(), 1, (data >> 5) & 1);
coin_counter_w(space->machine(), 0, (data >> 4) & 1);
coin_counter_w(space.machine(), 1, (data >> 5) & 1);
coin_counter_w(space.machine(), 0, (data >> 4) & 1);
/* update the OKI frequency */
if (oki6295 != NULL)
@ -443,7 +443,7 @@ static WRITE8_HANDLER( jsa2_io_w )
*/
ym2151_volume = ((data >> 1) & 7) * 100 / 7;
oki6295_volume = 50 + (data & 1) * 50;
update_all_volumes(space->machine());
update_all_volumes(space.machine());
break;
}
}
@ -458,14 +458,14 @@ static WRITE8_HANDLER( jsa2_io_w )
static READ8_HANDLER( jsa3_io_r )
{
atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
int result = 0xff;
switch (offset & 0x206)
{
case 0x000: /* /RDV */
if (oki6295 != NULL)
result = oki6295->read(*space, offset);
result = oki6295->read(space, offset);
break;
case 0x002: /* /RDP */
@ -483,8 +483,8 @@ static READ8_HANDLER( jsa3_io_r )
0x02 = coin L (active high)
0x01 = coin R (active high)
*/
result = space->machine().root_device().ioport("JSAIII")->read();
if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
result = space.machine().root_device().ioport("JSAIII")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
break;
@ -511,7 +511,7 @@ static WRITE8_HANDLER( jsa3_io_w )
{
case 0x000: /* /RDV */
overall_volume = data * 100 / 127;
update_all_volumes(space->machine());
update_all_volumes(space.machine());
break;
case 0x002: /* /RDP */
@ -525,7 +525,7 @@ static WRITE8_HANDLER( jsa3_io_w )
case 0x200: /* /WRV */
if (oki6295 != NULL)
oki6295->write(*space, offset, data);
oki6295->write(space, offset, data);
break;
case 0x202: /* /WRP */
@ -544,18 +544,18 @@ static WRITE8_HANDLER( jsa3_io_w )
*/
/* reset the YM2151 if needed */
if ((data&1) == 0) space->machine().device("ymsnd")->reset();
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
/* update the OKI bank */
if (oki6295 != NULL)
space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
/* update the bank */
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
/* coin counters */
coin_counter_w(space->machine(), 1, (data >> 5) & 1);
coin_counter_w(space->machine(), 0, (data >> 4) & 1);
coin_counter_w(space.machine(), 1, (data >> 5) & 1);
coin_counter_w(space.machine(), 0, (data >> 4) & 1);
/* update the OKI frequency */
if (oki6295 != NULL) oki6295->set_pin7(data & 8);
@ -572,12 +572,12 @@ static WRITE8_HANDLER( jsa3_io_w )
/* update the OKI bank */
if (oki6295 != NULL)
space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
/* update the volumes */
ym2151_volume = ((data >> 1) & 7) * 100 / 7;
oki6295_volume = 50 + (data & 1) * 50;
update_all_volumes(space->machine());
update_all_volumes(space.machine());
break;
}
}
@ -592,14 +592,14 @@ static WRITE8_HANDLER( jsa3_io_w )
static READ8_HANDLER( jsa3s_io_r )
{
atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
int result = 0xff;
switch (offset & 0x206)
{
case 0x000: /* /RDV */
if (oki6295_l != NULL)
result = ((offset & 1) ? oki6295_r : oki6295_l)->read(*space, offset);
result = ((offset & 1) ? oki6295_r : oki6295_l)->read(space, offset);
break;
case 0x002: /* /RDP */
@ -617,8 +617,8 @@ static READ8_HANDLER( jsa3s_io_r )
0x02 = coin L (active high)
0x01 = coin R (active high)
*/
result = space->machine().root_device().ioport("JSAIII")->read();
if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
result = space.machine().root_device().ioport("JSAIII")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
break;
@ -645,7 +645,7 @@ static WRITE8_HANDLER( jsa3s_io_w )
{
case 0x000: /* /RDV */
overall_volume = data * 100 / 127;
update_all_volumes(space->machine());
update_all_volumes(space.machine());
break;
case 0x002: /* /RDP */
@ -659,7 +659,7 @@ static WRITE8_HANDLER( jsa3s_io_w )
case 0x200: /* /WRV */
if (oki6295_l != NULL)
((offset & 1) ? oki6295_r : oki6295_l)->write(*space, 0, data);
((offset & 1) ? oki6295_r : oki6295_l)->write(space, 0, data);
break;
case 0x202: /* /WRP */
@ -678,17 +678,17 @@ static WRITE8_HANDLER( jsa3s_io_w )
*/
/* reset the YM2151 if needed */
if ((data&1) == 0) space->machine().device("ymsnd")->reset();
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
/* update the OKI bank */
space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
/* update the bank */
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
/* coin counters */
coin_counter_w(space->machine(), 1, (data >> 5) & 1);
coin_counter_w(space->machine(), 0, (data >> 4) & 1);
coin_counter_w(space.machine(), 1, (data >> 5) & 1);
coin_counter_w(space.machine(), 0, (data >> 4) & 1);
/* update the OKI frequency */
oki6295_l->set_pin7(data & 8);
@ -705,13 +705,13 @@ static WRITE8_HANDLER( jsa3s_io_w )
*/
/* update the OKI bank */
space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
space->machine().root_device().membank("bank14")->set_entry(data >> 6);
space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
space.machine().root_device().membank("bank14")->set_entry(data >> 6);
/* update the volumes */
ym2151_volume = ((data >> 1) & 7) * 100 / 7;
oki6295_volume = 50 + (data & 1) * 50;
update_all_volumes(space->machine());
update_all_volumes(space.machine());
break;
}
}

46
src/mame/audio/cage.c
View File

@ -204,11 +204,11 @@ void cage_set_irq_handler(void (*irqhandler)(running_machine &, int))
}
void cage_reset_w(address_space *space, int state)
void cage_reset_w(address_space &space, int state)
{
cage_t *sndstate = &cage;
if (state)
cage_control_w(space->machine(), 0);
cage_control_w(space.machine(), 0);
sndstate->cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -246,7 +246,7 @@ static TIMER_DEVICE_CALLBACK( dma_timer_callback )
}
static void update_dma_state(address_space *space)
static void update_dma_state(address_space &space)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
@ -272,7 +272,7 @@ static void update_dma_state(address_space *space)
inc = (tms32031_io_regs[DMA_GLOBAL_CTL] >> 4) & 1;
for (i = 0; i < tms32031_io_regs[DMA_TRANSFER_COUNT]; i++)
{
sound_data[i % STACK_SOUND_BUFSIZE] = space->read_dword(addr * 4);
sound_data[i % STACK_SOUND_BUFSIZE] = space.read_dword(addr * 4);
addr += inc;
if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1)
dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
@ -410,7 +410,7 @@ static READ32_HANDLER( tms32031_io_r )
}
if (LOG_32031_IOPORTS)
logerror("CAGE:%06X:%s read -> %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], result);
logerror("CAGE:%06X:%s read -> %08X\n", space.device().safe_pc(), register_names[offset & 0x7f], result);
return result;
}
@ -423,7 +423,7 @@ static WRITE32_HANDLER( tms32031_io_w )
COMBINE_DATA(&tms32031_io_regs[offset]);
if (LOG_32031_IOPORTS)
logerror("CAGE:%06X:%s write = %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
logerror("CAGE:%06X:%s write = %08X\n", space.device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
switch (offset)
{
@ -462,7 +462,7 @@ static WRITE32_HANDLER( tms32031_io_w )
case SPORT_GLOBAL_CTL:
case SPORT_TIMER_CTL:
case SPORT_TIMER_PERIOD:
update_serial(space->machine());
update_serial(space.machine());
break;
}
}
@ -506,9 +506,9 @@ static READ32_HANDLER( cage_from_main_r )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:CAGE read command = %04X\n", space->device().safe_pc(), state->from_main);
logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), state->from_main);
state->cpu_to_cage_ready = 0;
update_control_lines(space->machine());
update_control_lines(space.machine());
state->cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE);
return state->from_main;
}
@ -519,7 +519,7 @@ static WRITE32_HANDLER( cage_from_main_ack_w )
if (LOG_COMM)
{
cage_t *state = &cage;
logerror("%06X:CAGE ack command = %04X\n", space->device().safe_pc(), state->from_main);
logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), state->from_main);
}
}
@ -528,11 +528,11 @@ static WRITE32_HANDLER( cage_to_main_w )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:Data from CAGE = %04X\n", space->device().safe_pc(), data);
driver_device *drvstate = space->machine().driver_data<driver_device>();
drvstate->soundlatch_word_w(*space, 0, data, mem_mask);
logerror("%06X:Data from CAGE = %04X\n", space.device().safe_pc(), data);
driver_device *drvstate = space.machine().driver_data<driver_device>();
drvstate->soundlatch_word_w(space, 0, data, mem_mask);
state->cage_to_cpu_ready = 1;
update_control_lines(space->machine());
update_control_lines(space.machine());
}
@ -548,15 +548,15 @@ static READ32_HANDLER( cage_io_status_r )
}
UINT16 cage_main_r(address_space *space)
UINT16 cage_main_r(address_space &space)
{
cage_t *state = &cage;
driver_device *drvstate = space->machine().driver_data<driver_device>();
driver_device *drvstate = space.machine().driver_data<driver_device>();
if (LOG_COMM)
logerror("%s:main read data = %04X\n", space->machine().describe_context(), drvstate->soundlatch_word_r(*space, 0, 0));
logerror("%s:main read data = %04X\n", space.machine().describe_context(), drvstate->soundlatch_word_r(space, 0, 0));
state->cage_to_cpu_ready = 0;
update_control_lines(space->machine());
return drvstate->soundlatch_word_r(*space, 0, 0xffff);
update_control_lines(space.machine());
return drvstate->soundlatch_word_r(space, 0, 0xffff);
}
@ -570,11 +570,11 @@ static TIMER_CALLBACK( cage_deferred_w )
}
void cage_main_w(address_space *space, UINT16 data)
void cage_main_w(address_space &space, UINT16 data)
{
if (LOG_COMM)
logerror("%s:Command to CAGE = %04X\n", space->machine().describe_context(), data);
space->machine().scheduler().synchronize(FUNC(cage_deferred_w), data);
logerror("%s:Command to CAGE = %04X\n", space.machine().describe_context(), data);
space.machine().scheduler().synchronize(FUNC(cage_deferred_w), data);
}
@ -637,7 +637,7 @@ static WRITE32_HANDLER( speedup_w )
{
cage_t *state = &cage;
space->device().execute().eat_cycles(100);
space.device().execute().eat_cycles(100);
COMBINE_DATA(&state->speedup_ram[offset]);
}

6
src/mame/audio/cage.h
View File

@ -12,10 +12,10 @@ MACHINE_CONFIG_EXTERN( cage_seattle );
void cage_init(running_machine &machine, offs_t speedup);
void cage_set_irq_handler(void (*irqhandler)(running_machine &, int));
void cage_reset_w(address_space *space, int state);
void cage_reset_w(address_space &space, int state);
UINT16 cage_main_r(address_space *space);
void cage_main_w(address_space *space, UINT16 data);
UINT16 cage_main_r(address_space &space);
void cage_main_w(address_space &space, UINT16 data);
UINT16 cage_control_r(running_machine &machine);
void cage_control_w(running_machine &machine, UINT16 data);

6
src/mame/audio/carnival.c
View File

@ -127,7 +127,7 @@ static int psgData = 0;
WRITE8_HANDLER( carnival_audio_1_w )
{
static int port1State = 0;
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
int bitsChanged;
int bitsGoneHigh;
int bitsGoneLow;
@ -206,7 +206,7 @@ WRITE8_HANDLER( carnival_audio_1_w )
WRITE8_HANDLER( carnival_audio_2_w )
{
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
int bitsChanged;
int bitsGoneHigh;
int bitsGoneLow;
@ -236,7 +236,7 @@ WRITE8_HANDLER( carnival_audio_2_w )
if ( bitsGoneHigh & OUT_PORT_2_MUSIC_RESET )
/* reset output is no longer asserted active low */
space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE );
space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE );
}

2
src/mame/audio/cclimber.c
View File

@ -74,7 +74,7 @@ WRITE8_HANDLER( cclimber_sample_trigger_w )
if (data == 0)
return;
cclimber_play_sample(space->machine(), 32 * sample_num,sample_freq,sample_volume);
cclimber_play_sample(space.machine(), 32 * sample_num,sample_freq,sample_volume);
}

66
src/mame/audio/dcs.c
View File

@ -1081,11 +1081,11 @@ static WRITE16_HANDLER( dcs_dataram_w )
static WRITE16_HANDLER( dcs_data_bank_select_w )
{
dcs.sounddata_bank = data & 0x7ff;
space->machine().root_device().membank("databank")->set_entry(dcs.sounddata_bank % dcs.sounddata_banks);
space.machine().root_device().membank("databank")->set_entry(dcs.sounddata_bank % dcs.sounddata_banks);
/* bit 11 = sound board led */
#if 0
set_led_status(space->machine(), 2, data & 0x800);
set_led_status(space.machine(), 2, data & 0x800);
#endif
}
@ -1253,9 +1253,9 @@ static WRITE16_HANDLER( sdrc_w )
case 0:
sdrc.reg[0] = data;
if (diff & 0x1833)
sdrc_remap_memory(space->machine());
sdrc_remap_memory(space.machine());
if (diff & 0x0380)
sdrc_update_bank_pointers(space->machine());
sdrc_update_bank_pointers(space.machine());
break;
/* offset 1 controls RAM mapping */
@ -1263,14 +1263,14 @@ static WRITE16_HANDLER( sdrc_w )
sdrc.reg[1] = data;
//dmadac_enable(&dcs.dmadac[0], dcs.channels, SDRC_MUTE);
if (diff & 0x0003)
sdrc_remap_memory(space->machine());
sdrc_remap_memory(space.machine());
break;
/* offset 2 controls paging */
case 2:
sdrc.reg[2] = data;
if (diff & 0x1fff)
sdrc_update_bank_pointers(space->machine());
sdrc_update_bank_pointers(space.machine());
break;
/* offset 3 controls security */
@ -1352,13 +1352,13 @@ static WRITE16_HANDLER( dsio_w )
dmadac_enable(&dcs.dmadac[0], dcs.channels, DSIO_MUTE);
/* bit 0 resets the FIFO */
midway_ioasic_fifo_reset_w(space->machine(), DSIO_EMPTY_FIFO ^ 1);
midway_ioasic_fifo_reset_w(space.machine(), DSIO_EMPTY_FIFO ^ 1);
break;
/* offset 2 controls RAM pages */
case 2:
dsio.reg[2] = data;
space->machine().root_device().membank("databank")->set_entry(DSIO_DM_PG % dcs.sounddata_banks);
space.machine().root_device().membank("databank")->set_entry(DSIO_DM_PG % dcs.sounddata_banks);
break;
}
}
@ -1413,24 +1413,24 @@ static WRITE16_HANDLER( denver_w )
{
char buffer[10];
sprintf(buffer, "dac%d", chan + 1);
dcs.dmadac[chan] = space->machine().device<dmadac_sound_device>(buffer);
dcs.dmadac[chan] = space.machine().device<dmadac_sound_device>(buffer);
}
dmadac_enable(&dcs.dmadac[0], dcs.channels, enable);
if (dcs.channels < 6)
dmadac_enable(&dcs.dmadac[dcs.channels], 6 - dcs.channels, FALSE);
recompute_sample_rate(space->machine());
recompute_sample_rate(space.machine());
}
break;
/* offset 2 controls RAM pages */
case 2:
dsio.reg[2] = data;
space->machine().root_device().membank("databank")->set_entry(DENV_DM_PG % dcs.sounddata_bank);
space.machine().root_device().membank("databank")->set_entry(DENV_DM_PG % dcs.sounddata_bank);
break;
/* offset 3 controls FIFO reset */
case 3:
midway_ioasic_fifo_reset_w(space->machine(), 1);
midway_ioasic_fifo_reset_w(space.machine(), 1);
break;
}
}
@ -1447,7 +1447,7 @@ WRITE32_HANDLER( dsio_idma_addr_w )
{
dsio_state &dsio = dcs.dsio;
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_addr = %04X\n", space->device().safe_pc(), data);
logerror("%08X:IDMA_addr = %04X\n", space.device().safe_pc(), data);
downcast<adsp2181_device *>(dcs.cpu)->idma_addr_w(data);
if (data == 0)
dsio.start_on_next_write = 2;
@ -1457,7 +1457,7 @@ WRITE32_HANDLER( dsio_idma_addr_w )
WRITE32_HANDLER( dsio_idma_data_w )
{
dsio_state &dsio = dcs.dsio;
UINT32 pc = space->device().safe_pc();
UINT32 pc = space.device().safe_pc();
if (ACCESSING_BITS_0_15)
{
if (LOG_DCS_TRANSFERS)
@ -1483,7 +1483,7 @@ READ32_HANDLER( dsio_idma_data_r )
UINT32 result;
result = downcast<adsp2181_device *>(dcs.cpu)->idma_data_r();
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_data_r(%04X) = %04X\n", space->device().safe_pc(), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
logerror("%08X:IDMA_data_r(%04X) = %04X\n", space.device().safe_pc(), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
return result;
}
@ -1607,7 +1607,7 @@ void dcs_data_w(running_machine &machine, int data)
static WRITE16_HANDLER( input_latch_ack_w )
{
if (!dcs.last_input_empty && dcs.input_empty_cb)
(*dcs.input_empty_cb)(space->machine(), dcs.last_input_empty = 1);
(*dcs.input_empty_cb)(space.machine(), dcs.last_input_empty = 1);
SET_INPUT_EMPTY();
dcs.cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE);
}
@ -1618,7 +1618,7 @@ static READ16_HANDLER( input_latch_r )
if (dcs.auto_ack)
input_latch_ack_w(space,0,0,0xffff);
if (LOG_DCS_IO)
logerror("%08X:input_latch_r(%04X)\n", space->device().safe_pc(), dcs.input_data);
logerror("%08X:input_latch_r(%04X)\n", space.device().safe_pc(), dcs.input_data);
return dcs.input_data;
}
@ -1640,8 +1640,8 @@ static TIMER_CALLBACK( latch_delayed_w )
static WRITE16_HANDLER( output_latch_w )
{
if (LOG_DCS_IO)
logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space->device().safe_pc(), data, IS_OUTPUT_EMPTY());
space->machine().scheduler().synchronize(FUNC(latch_delayed_w), data);
logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space.device().safe_pc(), data, IS_OUTPUT_EMPTY());
space.machine().scheduler().synchronize(FUNC(latch_delayed_w), data);
}
@ -1694,8 +1694,8 @@ static TIMER_CALLBACK( output_control_delayed_w )
static WRITE16_HANDLER( output_control_w )
{
if (LOG_DCS_IO)
logerror("%04X:output_control = %04X\n", space->device().safe_pc(), data);
space->machine().scheduler().synchronize(FUNC(output_control_delayed_w), data);
logerror("%04X:output_control = %04X\n", space.device().safe_pc(), data);
space.machine().scheduler().synchronize(FUNC(output_control_delayed_w), data);
}
@ -1858,7 +1858,7 @@ static READ16_HANDLER( adsp_control_r )
break;
case TIMER_COUNT_REG:
update_timer_count(space->machine());
update_timer_count(space.machine());
result = dcs.control_regs[offset];
break;
@ -1880,9 +1880,9 @@ static WRITE16_HANDLER( adsp_control_w )
/* bit 9 forces a reset */
if (data & 0x0200)
{
logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space->device().safe_pc());
logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space.device().safe_pc());
dcs.cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
dcs_boot(space->machine());
dcs_boot(space.machine());
dcs.control_regs[SYSCONTROL_REG] = 0;
}
@ -1914,23 +1914,23 @@ static WRITE16_HANDLER( adsp_control_w )
data = (data & 0xff) + 1;
if (data != dcs.timer_scale)
{
update_timer_count(space->machine());
update_timer_count(space.machine());
dcs.timer_scale = data;
reset_timer(space->machine());
reset_timer(space.machine());
}
break;
case TIMER_COUNT_REG:
dcs.timer_start_count = data;
reset_timer(space->machine());
reset_timer(space.machine());
break;
case TIMER_PERIOD_REG:
if (data != dcs.timer_period)
{
update_timer_count(space->machine());
update_timer_count(space.machine());
dcs.timer_period = data;
reset_timer(space->machine());
reset_timer(space.machine());
}
break;
@ -2076,7 +2076,7 @@ static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data)
static READ16_HANDLER( dcs_polling_r )
{
if (dcs.polling_count++ > 5)
space->device().execute().eat_cycles(10000);
space.device().execute().eat_cycles(10000);
return *dcs.polling_base;
}
@ -2137,7 +2137,7 @@ static TIMER_CALLBACK( s1_ack_callback2 )
machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback2), param);
return;
}
output_latch_w(dcs.cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff);
output_latch_w(*dcs.cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff);
}
@ -2149,7 +2149,7 @@ static TIMER_CALLBACK( s1_ack_callback1 )
machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback1), param);
return;
}
output_latch_w(dcs.cpu->space(AS_PROGRAM), 0, param, 0xffff);
output_latch_w(*dcs.cpu->space(AS_PROGRAM), 0, param, 0xffff);
/* chain to the next word we need to write back */
machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback2));
@ -2281,7 +2281,7 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data)
static TIMER_CALLBACK( s2_ack_callback )
{
address_space *space = dcs.cpu->space(AS_PROGRAM);
address_space &space = *dcs.cpu->space(AS_PROGRAM);
/* if the output is full, stall for a usec */
if (IS_OUTPUT_FULL())

2
src/mame/audio/depthch.c
View File

@ -55,7 +55,7 @@ enum
WRITE8_HANDLER( depthch_audio_w )
{
static int port1State = 0;
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
int bitsChanged;
int bitsGoneHigh;
int bitsGoneLow;

10
src/mame/audio/gorf.c
View File

@ -114,8 +114,8 @@ READ8_HANDLER( gorf_speech_r )
{
UINT8 data = offset >> 8;
#if USE_FAKE_VOTRAX
astrocde_state *state = space->machine().driver_data<astrocde_state>();
samples_device *samples = space->machine().device<samples_device>("samples");
astrocde_state *state = space.machine().driver_data<astrocde_state>();
samples_device *samples = space.machine().device<samples_device>("samples");
int Phoneme, Intonation;
int i = 0;
offset &= 0xff;
@ -172,9 +172,9 @@ READ8_HANDLER( gorf_speech_r )
}
}
#else
votrax_sc01_device *votrax = space->machine().device<votrax_sc01_device>("votrax");
votrax->inflection_w(*space, 0, data >> 6);
votrax->write(*space, 0, data);
votrax_sc01_device *votrax = space.machine().device<votrax_sc01_device>("votrax");
votrax->inflection_w(space, 0, data >> 6);
votrax->write(space, 0, data);
#endif
/* Note : We should really also use volume in this as well as frequency */

4
src/mame/audio/invinco.c
View File

@ -65,7 +65,7 @@ enum
WRITE8_HANDLER( invinco_audio_w )
{
static int port2State = 0;
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
int bitsChanged;
//int bitsGoneHigh;
int bitsGoneLow;
@ -108,6 +108,6 @@ WRITE8_HANDLER( invinco_audio_w )
}
#if 0
logerror("Went LO: %02X %04X\n", bitsGoneLow, space->device().safe_pc());
logerror("Went LO: %02X %04X\n", bitsGoneLow, space.device().safe_pc());
#endif
}

8
src/mame/audio/irem.c
View File

@ -63,11 +63,11 @@ static DEVICE_START( irem_audio )
WRITE8_HANDLER( irem_sound_cmd_w )
{
driver_device *drvstate = space->machine().driver_data<driver_device>();
driver_device *drvstate = space.machine().driver_data<driver_device>();
if ((data & 0x80) == 0)
drvstate->soundlatch_byte_w(*space, 0, data & 0x7f);
drvstate->soundlatch_byte_w(space, 0, data & 0x7f);
else
space->machine().device("iremsound")->execute().set_input_line(0, ASSERT_LINE);
space.machine().device("iremsound")->execute().set_input_line(0, ASSERT_LINE);
}
@ -181,7 +181,7 @@ static WRITE8_DEVICE_HANDLER( ay8910_1_porta_w )
static WRITE8_HANDLER( sound_irq_ack_w )
{
space->machine().device("iremsound")->execute().set_input_line(0, CLEAR_LINE);
space.machine().device("iremsound")->execute().set_input_line(0, CLEAR_LINE);
}

14
src/mame/audio/mario.c
View File

@ -437,19 +437,19 @@ static SOUND_START( mario )
static SOUND_RESET( mario )
{
mario_state *state = machine.driver_data<mario_state>();
address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
address_space &space = *machine.device("audiocpu")->memory().space(AS_PROGRAM);
#if USE_8039
set_ea(machine, 1);
#endif
/* FIXME: convert to latch8 */
state->soundlatch_clear_byte_w(*space, 0, 0);
state->soundlatch2_clear_byte_w(*space, 0, 0);
state->soundlatch3_clear_byte_w(*space, 0, 0);
state->soundlatch4_clear_byte_w(*space, 0, 0);
state->I8035_P1_W(*space, 0x00); /* Input port */
I8035_P2_W(*space, 0xff); /* Port is in high impedance state after reset */
state->soundlatch_clear_byte_w(space, 0, 0);
state->soundlatch2_clear_byte_w(space, 0, 0);
state->soundlatch3_clear_byte_w(space, 0, 0);
state->soundlatch4_clear_byte_w(space, 0, 0);
state->I8035_P1_W(space, 0x00); /* Input port */
I8035_P2_W(space, 0xff); /* Port is in high impedance state after reset */
state->m_last = 0;
}

18
src/mame/audio/namco52.c
View File

@ -78,50 +78,50 @@ static TIMER_CALLBACK( namco_52xx_latch_callback )
static READ8_HANDLER( namco_52xx_K_r )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
return state->m_latched_cmd & 0x0f;
}
static READ8_HANDLER( namco_52xx_SI_r )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
return state->m_si(0) ? 1 : 0;
}
static READ8_HANDLER( namco_52xx_R0_r )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
return state->m_romread(state->m_address) & 0x0f;
}
static READ8_HANDLER( namco_52xx_R1_r )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
return state->m_romread(state->m_address) >> 4;
}
static WRITE8_HANDLER( namco_52xx_P_w )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
discrete_sound_w(state->m_discrete, *space, NAMCO_52XX_P_DATA(state->m_basenode), data & 0x0f);
namco_52xx_state *state = get_safe_token(space.device().owner());
discrete_sound_w(state->m_discrete, space, NAMCO_52XX_P_DATA(state->m_basenode), data & 0x0f);
}
static WRITE8_HANDLER( namco_52xx_R2_w )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
state->m_address = (state->m_address & 0xfff0) | ((data & 0xf) << 0);
}
static WRITE8_HANDLER( namco_52xx_R3_w )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
state->m_address = (state->m_address & 0xff0f) | ((data & 0xf) << 4);
}
static WRITE8_HANDLER( namco_52xx_O_w )
{
namco_52xx_state *state = get_safe_token(space->device().owner());
namco_52xx_state *state = get_safe_token(space.device().owner());
if (data & 0x10)
state->m_address = (state->m_address & 0x0fff) | ((data & 0xf) << 12);
else

14
src/mame/audio/namco54.c
View File

@ -77,33 +77,33 @@ static TIMER_CALLBACK( namco_54xx_latch_callback )
static READ8_HANDLER( namco_54xx_K_r )
{
namco_54xx_state *state = get_safe_token(space->device().owner());
namco_54xx_state *state = get_safe_token(space.device().owner());
return state->m_latched_cmd >> 4;
}
static READ8_HANDLER( namco_54xx_R0_r )
{
namco_54xx_state *state = get_safe_token(space->device().owner());
namco_54xx_state *state = get_safe_token(space.device().owner());
return state->m_latched_cmd & 0x0f;
}
static WRITE8_HANDLER( namco_54xx_O_w )
{
namco_54xx_state *state = get_safe_token(space->device().owner());
namco_54xx_state *state = get_safe_token(space.device().owner());
UINT8 out = (data & 0x0f);
if (data & 0x10)
discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_1_DATA(state->m_basenode), out);
discrete_sound_w(state->m_discrete, space, NAMCO_54XX_1_DATA(state->m_basenode), out);
else
discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_0_DATA(state->m_basenode), out);
discrete_sound_w(state->m_discrete, space, NAMCO_54XX_0_DATA(state->m_basenode), out);
}
static WRITE8_HANDLER( namco_54xx_R1_w )
{
namco_54xx_state *state = get_safe_token(space->device().owner());
namco_54xx_state *state = get_safe_token(space.device().owner());
UINT8 out = (data & 0x0f);
discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_2_DATA(state->m_basenode), out);
discrete_sound_w(state->m_discrete, space, NAMCO_54XX_2_DATA(state->m_basenode), out);
}

4
src/mame/audio/pulsar.c
View File

@ -87,7 +87,7 @@ static int port1State = 0;
WRITE8_HANDLER( pulsar_audio_1_w )
{
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
int bitsChanged;
//int bitsGoneHigh;
int bitsGoneLow;
@ -138,7 +138,7 @@ WRITE8_HANDLER( pulsar_audio_1_w )
WRITE8_HANDLER( pulsar_audio_2_w )
{
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
static int port2State = 0;
int bitsChanged;
int bitsGoneHigh;

26
src/mame/audio/seibu.c
View File

@ -104,12 +104,12 @@ static UINT8 decrypt_opcode(int a,int src)
void seibu_sound_decrypt(running_machine &machine,const char *cpu,int length)
{
address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
address_space &space = *machine.device(cpu)->memory().space(AS_PROGRAM);
UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
UINT8 *rom = machine.root_device().memregion(cpu)->base();
int i;
space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
space.set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
for (i = 0;i < length;i++)
{
@ -296,7 +296,7 @@ static void update_irq_lines(running_machine &machine, int param)
WRITE8_HANDLER( seibu_irq_clear_w )
{
/* Denjin Makai and SD Gundam doesn't like this, it's tied to the rst18 ack ONLY so it could be related to it. */
//update_irq_lines(space->machine(), VECTOR_INIT);
//update_irq_lines(space.machine(), VECTOR_INIT);
}
WRITE8_HANDLER( seibu_rst10_ack_w )
@ -306,7 +306,7 @@ WRITE8_HANDLER( seibu_rst10_ack_w )
WRITE8_HANDLER( seibu_rst18_ack_w )
{
update_irq_lines(space->machine(), RST18_CLEAR);
update_irq_lines(space.machine(), RST18_CLEAR);
}
void seibu_ym3812_irqhandler(device_t *device, int linestate)
@ -349,13 +349,13 @@ static int main2sub_pending,sub2main_pending;
WRITE8_HANDLER( seibu_bank_w )
{
space->machine().root_device().membank("bank1")->set_entry(data & 1);
space.machine().root_device().membank("bank1")->set_entry(data & 1);
}
WRITE8_HANDLER( seibu_coin_w )
{
coin_counter_w(space->machine(), 0,data & 1);
coin_counter_w(space->machine(), 1,data & 2);
coin_counter_w(space.machine(), 0,data & 1);
coin_counter_w(space.machine(), 1,data & 2);
}
READ8_HANDLER( seibu_soundlatch_r )
@ -382,7 +382,7 @@ static WRITE8_HANDLER( seibu_pending_w )
READ16_HANDLER( seibu_main_word_r )
{
//logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
//logerror("%06x: seibu_main_word_r(%x)\n",space.device().safe_pc(),offset);
switch (offset)
{
case 2:
@ -391,14 +391,14 @@ READ16_HANDLER( seibu_main_word_r )
case 5:
return main2sub_pending ? 1 : 0;
default:
//logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
//logerror("%06x: seibu_main_word_r(%x)\n",space.device().safe_pc(),offset);
return 0xffff;
}
}
WRITE16_HANDLER( seibu_main_word_w )
{
//printf("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
//printf("%06x: seibu_main_word_w(%x,%02x)\n",space.device().safe_pc(),offset,data);
if (ACCESSING_BITS_0_7)
{
switch (offset)
@ -408,7 +408,7 @@ WRITE16_HANDLER( seibu_main_word_w )
main2sub[offset] = data;
break;
case 4:
update_irq_lines(space->machine(), RST18_ASSERT);
update_irq_lines(space.machine(), RST18_ASSERT);
break;
case 2: //Sengoku Mahjong writes here
case 6:
@ -417,7 +417,7 @@ WRITE16_HANDLER( seibu_main_word_w )
main2sub_pending = 1;
break;
default:
//logerror("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
//logerror("%06x: seibu_main_word_w(%x,%02x)\n",space.device().safe_pc(),offset,data);
break;
}
}
@ -440,7 +440,7 @@ WRITE16_HANDLER( seibu_main_mustb_w )
// logerror("seibu_main_mustb_w: %x -> %x %x\n", data, main2sub[0], main2sub[1]);
update_irq_lines(space->machine(), RST18_ASSERT);
update_irq_lines(space.machine(), RST18_ASSERT);
}
/***************************************************************************/

4
src/mame/audio/snes_snd.c
View File

@ -1125,7 +1125,7 @@ READ8_DEVICE_HANDLER( spc_io_r )
case 0x5: /* Port 1 */
case 0x6: /* Port 2 */
case 0x7: /* Port 3 */
// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space->device().safe_pc());
// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space.device().safe_pc());
return spc700->port_in[offset - 4];
case 0x8: //normal RAM, can be read even if the ram disabled flag ($f0 bit 1) is active
case 0x9:
@ -1194,7 +1194,7 @@ WRITE8_DEVICE_HANDLER( spc_io_w )
case 0x5: /* Port 1 */
case 0x6: /* Port 2 */
case 0x7: /* Port 3 */
// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space->device().safe_pc());
// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space.device().safe_pc());
spc700->port_out[offset - 4] = data;
device->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
break;

20
src/mame/audio/snk6502.c
View File

@ -676,7 +676,7 @@ int snk6502_music0_playing(running_machine &machine)
WRITE8_HANDLER( sasuke_sound_w )
{
device_t *device = space->machine().device("snk6502");
device_t *device = space.machine().device("snk6502");
snk6502_sound_state *state = get_safe_token(device);
samples_device *samples = state->m_samples;
TONE *tone_channels = state->m_tone_channels;
@ -746,7 +746,7 @@ WRITE8_HANDLER( sasuke_sound_w )
WRITE8_HANDLER( satansat_sound_w )
{
device_t *device = space->machine().device("snk6502");
device_t *device = space.machine().device("snk6502");
snk6502_sound_state *state = get_safe_token(device);
samples_device *samples = state->m_samples;
TONE *tone_channels = state->m_tone_channels;
@ -813,7 +813,7 @@ WRITE8_HANDLER( satansat_sound_w )
WRITE8_HANDLER( vanguard_sound_w )
{
device_t *device = space->machine().device("snk6502");
device_t *device = space.machine().device("snk6502");
snk6502_sound_state *state = get_safe_token(device);
samples_device *samples = state->m_samples;
TONE *tone_channels = state->m_tone_channels;
@ -863,7 +863,7 @@ WRITE8_HANDLER( vanguard_sound_w )
}
/* SHOT B */
sn76477_enable_w(space->machine().device("sn76477.2"), (data & 0x40) ? 0 : 1);
sn76477_enable_w(space.machine().device("sn76477.2"), (data & 0x40) ? 0 : 1);
state->m_LastPort1 = data;
break;
@ -914,7 +914,7 @@ WRITE8_HANDLER( vanguard_sound_w )
WRITE8_HANDLER( fantasy_sound_w )
{
device_t *device = space->machine().device("snk6502");
device_t *device = space.machine().device("snk6502");
snk6502_sound_state *state = get_safe_token(device);
TONE *tone_channels = state->m_tone_channels;
@ -957,7 +957,7 @@ WRITE8_HANDLER( fantasy_sound_w )
}
/* BOMB */
discrete_sound_w(space->machine().device("discrete"), *space, FANTASY_BOMB_EN, data & 0x80);
discrete_sound_w(space.machine().device("discrete"), space, FANTASY_BOMB_EN, data & 0x80);
state->m_LastPort1 = data;
break;
@ -1021,8 +1021,8 @@ WRITE8_HANDLER( fantasy_sound_w )
/* select tune in ROM based on sound command byte */
tone_channels[2].base = 0x1000 + ((data & 0x70) << 4);
tone_channels[2].mask = 0xff;
snk6502_state *state = space->machine().driver_data<snk6502_state>();
state->snk6502_flipscreen_w(*space, 0, data);
snk6502_state *state = space.machine().driver_data<snk6502_state>();
state->snk6502_flipscreen_w(space, 0, data);
break;
}
}
@ -1220,7 +1220,7 @@ WRITE8_HANDLER( vanguard_speech_w )
0x054ce
};
snk6502_speech_w(space->machine(), data, vanguard_table, 2);
snk6502_speech_w(space.machine(), data, vanguard_table, 2);
}
WRITE8_HANDLER( fantasy_speech_w )
@ -1245,7 +1245,7 @@ WRITE8_HANDLER( fantasy_speech_w )
0
};
snk6502_speech_w(space->machine(), data, fantasy_table, 0);
snk6502_speech_w(space.machine(), data, fantasy_table, 0);
}

6
src/mame/audio/t5182.c
View File

@ -219,17 +219,17 @@ static TIMER_CALLBACK( setirq_callback )
WRITE8_HANDLER( t5182_sound_irq_w )
{
space->machine().scheduler().synchronize(FUNC(setirq_callback), CPU_ASSERT);
space.machine().scheduler().synchronize(FUNC(setirq_callback), CPU_ASSERT);
}
static WRITE8_HANDLER( t5182_ym2151_irq_ack_w )
{
space->machine().scheduler().synchronize(FUNC(setirq_callback), YM2151_ACK);
space.machine().scheduler().synchronize(FUNC(setirq_callback), YM2151_ACK);
}
static WRITE8_HANDLER( t5182_cpu_irq_ack_w )
{
space->machine().scheduler().synchronize(FUNC(setirq_callback), CPU_CLEAR);
space.machine().scheduler().synchronize(FUNC(setirq_callback), CPU_CLEAR);
}
static void t5182_ym2151_irq_handler(device_t *device, int irq)

14
src/mame/audio/taito_en.c
View File

@ -64,7 +64,7 @@ static WRITE16_HANDLER( en_68000_share_w )
static WRITE16_HANDLER( en_es5505_bank_w )
{
UINT32 max_banks_this_game = (space->machine().root_device().memregion("ensoniq.0")->bytes()/0x200000)-1;
UINT32 max_banks_this_game = (space.machine().root_device().memregion("ensoniq.0")->bytes()/0x200000)-1;
#if 0
{
@ -76,13 +76,13 @@ static WRITE16_HANDLER( en_es5505_bank_w )
/* mask out unused bits */
data &= max_banks_this_game;
es5505_voice_bank_w(space->machine().device("ensoniq"),offset,data<<20);
es5505_voice_bank_w(space.machine().device("ensoniq"),offset,data<<20);
}
static WRITE16_HANDLER( en_volume_w )
{
if (ACCESSING_BITS_8_15)
mb87078_data_w(space->machine().device("mb87078"), data >> 8, offset ^ 1);
mb87078_data_w(space.machine().device("mb87078"), data >> 8, offset ^ 1);
}
@ -94,7 +94,7 @@ static WRITE16_HANDLER( en_volume_w )
static READ16_HANDLER( es5510_dsp_r )
{
// logerror("%06x: DSP read offset %04x (data is %04x)\n",space->device().safe_pc(),offset,es5510_dsp_ram[offset]);
// logerror("%06x: DSP read offset %04x (data is %04x)\n",space.device().safe_pc(),offset,es5510_dsp_ram[offset]);
// if (es_tmp) return es5510_dsp_ram[offset];
/*
switch (offset) {
@ -106,7 +106,7 @@ static READ16_HANDLER( es5510_dsp_r )
*/
// offset<<=1;
//if (offset<7 && es5510_dsp_ram[0]!=0xff) return space->machine().rand()%0xffff;
//if (offset<7 && es5510_dsp_ram[0]!=0xff) return space.machine().rand()%0xffff;
switch(offset)
{
@ -125,10 +125,10 @@ static READ16_HANDLER( es5510_dsp_r )
static WRITE16_HANDLER( es5510_dsp_w )
{
UINT8 *snd_mem = (UINT8 *)space->machine().root_device().memregion("ensoniq.0")->base();
UINT8 *snd_mem = (UINT8 *)space.machine().root_device().memregion("ensoniq.0")->base();
// if (offset>4 && offset!=0x80 && offset!=0xa0 && offset!=0xc0 && offset!=0xe0)
// logerror("%06x: DSP write offset %04x %04x\n",space->device().safe_pc(),offset,data);
// logerror("%06x: DSP write offset %04x %04x\n",space.device().safe_pc(),offset,data);
COMBINE_DATA(&es5510_dsp_ram[offset]);

4
src/mame/audio/taitosnd.c
View File

@ -109,7 +109,7 @@ WRITE8_DEVICE_HANDLER( tc0140syt_comm_w )
break;
case 0x04: // port status
//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space->device().safe_pc() );
//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space.device().safe_pc() );
/* this does a hi-lo transition to reset the sound cpu */
if (data)
tc0140syt->slavecpu->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
@ -240,7 +240,7 @@ READ8_DEVICE_HANDLER( tc0140syt_slave_comm_r )
break;
case 0x01: // mode #1
//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space->device().safe_pc());
//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space.device().safe_pc());
tc0140syt->status &= ~TC0140SYT_PORT01_FULL;
res = tc0140syt->slavedata[tc0140syt->submode ++];
break;

10
src/mame/audio/targ.c
View File

@ -61,11 +61,11 @@ static void adjust_sample(samples_device *samples, UINT8 freq)
WRITE8_HANDLER( targ_audio_1_w )
{
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
/* CPU music */
if ((data & 0x01) != (port_1_last & 0x01))
space->machine().device<dac_device>("dac")->write_unsigned8((data & 0x01) * 0xff);
space.machine().device<dac_device>("dac")->write_unsigned8((data & 0x01) * 0xff);
/* shot */
if (FALLING_EDGE(0x02) && !samples->playing(0)) samples->start(0,1);
@ -114,8 +114,8 @@ WRITE8_HANDLER( targ_audio_2_w )
{
if ((data & 0x01) && !(port_2_last & 0x01))
{
samples_device *samples = space->machine().device<samples_device>("samples");
UINT8 *prom = space->machine().root_device().memregion("targ")->base();
samples_device *samples = space.machine().device<samples_device>("samples");
UINT8 *prom = space.machine().root_device().memregion("targ")->base();
tone_pointer = (tone_pointer + 1) & 0x0f;
@ -128,7 +128,7 @@ WRITE8_HANDLER( targ_audio_2_w )
WRITE8_HANDLER( spectar_audio_2_w )
{
samples_device *samples = space->machine().device<samples_device>("samples");
samples_device *samples = space.machine().device<samples_device>("samples");
adjust_sample(samples, data);
}

2
src/mame/audio/timeplt.c
View File

@ -144,7 +144,7 @@ static WRITE8_DEVICE_HANDLER( timeplt_filter_w )
WRITE8_HANDLER( timeplt_sh_irqtrigger_w )
{
device_t *audio = space->machine().device("timeplt_audio");
device_t *audio = space.machine().device("timeplt_audio");
timeplt_audio_state *state = get_safe_token(audio);
if (state->m_last_irq_state == 0 && data)

6
src/mame/audio/trackfld.c
View File

@ -71,7 +71,7 @@ static DEVICE_RESET( trackfld_audio )
READ8_HANDLER( trackfld_sh_timer_r )
{
UINT32 clock = space->machine().device<cpu_device>("audiocpu")->total_cycles() / TIMER_RATE;
UINT32 clock = space.machine().device<cpu_device>("audiocpu")->total_cycles() / TIMER_RATE;
return clock & 0xF;
}
@ -104,7 +104,7 @@ WRITE8_DEVICE_HANDLER( trackfld_sound_w )
READ8_HANDLER( hyperspt_sh_timer_r )
{
device_t *audio = space->machine().device("trackfld_audio");
device_t *audio = space.machine().device("trackfld_audio");
trackfld_audio_state *state = get_safe_token(audio);
UINT32 clock = state->m_audiocpu->total_cycles() / TIMER_RATE;
@ -142,7 +142,7 @@ WRITE8_DEVICE_HANDLER( hyperspt_sound_w )
WRITE8_HANDLER( konami_sh_irqtrigger_w )
{
device_t *audio = space->machine().device("trackfld_audio");
device_t *audio = space.machine().device("trackfld_audio");
trackfld_audio_state *state = get_safe_token(audio);
if (state->m_last_irq == 0 && data)
{

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