Separate TLCS-90 external IRQ line state from internal request register (fixes tenkai slowdowns)

This commit is contained in:
AJR 2018-03-17 23:38:46 -04:00
parent 82985bbd9e
commit 3cfe01ed6c
3 changed files with 37 additions and 21 deletions

View File

@ -1268,9 +1268,20 @@ void tlcs90_device::leave_halt()
} }
} }
void tlcs90_device::take_interrupt(tlcs90_e_irq irq) void tlcs90_device::raise_irq(int irq)
{
m_irq_state |= 1 << irq;
}
void tlcs90_device::clear_irq(int irq)
{ {
m_irq_state &= ~(1 << irq); m_irq_state &= ~(1 << irq);
}
void tlcs90_device::take_interrupt(tlcs90_e_irq irq)
{
if (irq != INT0 || (m_p8cr & 1) == 1)
clear_irq(irq);
leave_halt(); leave_halt();
@ -1296,7 +1307,7 @@ void tlcs90_device::check_interrupts()
{ {
mask = (1 << irq); mask = (1 << irq);
if(irq >= INT0) mask &= m_irq_mask; if(irq >= INT0) mask &= m_irq_mask;
if ( m_irq_state & mask ) if (m_irq_state & mask)
{ {
take_interrupt( irq ); take_interrupt( irq );
return; return;
@ -1324,16 +1335,18 @@ void tlcs90_device::execute_set_input(int inputnum, int state)
void tlcs90_device::set_irq_line(int irq, int state) void tlcs90_device::set_irq_line(int irq, int state)
{ {
if ( ((m_irq_state >> irq)&1) == state ) return; if ( ((m_irq_line_state >> irq)&1) == state ) return;
if (state) if (state)
{ {
m_irq_state |= 1 << irq; raise_irq(irq);
check_interrupts(); m_irq_line_state |= 1 << irq;
} }
else else
{ {
m_irq_state &= ~(1 << irq); if (irq == INT0 && (m_p8cr & 1) == 0)
clear_irq(irq);
m_irq_line_state &= ~(1 << irq);
} }
} }
@ -2458,12 +2471,12 @@ TIMER_CALLBACK_MEMBER( tlcs90_device::t90_timer_callback )
break; break;
case 0x01: // 16bit, only can happen for i=0,2 case 0x01: // 16bit, only can happen for i=0,2
m_timer_value[i+1] = 0; m_timer_value[i+1] = 0;
set_irq_line(INTT0 + i+1, 1); raise_irq(INTT0 + i+1);
break; break;
} }
// regular handling // regular handling
m_timer_value[i] = 0; m_timer_value[i] = 0;
set_irq_line(INTT0 + i, 1); raise_irq(INTT0 + i);
} }
} }
@ -2478,12 +2491,12 @@ TIMER_CALLBACK_MEMBER( tlcs90_device::t90_timer4_callback )
if ( m_timer4_value == m_treg_16bit[0] ) if ( m_timer4_value == m_treg_16bit[0] )
{ {
// logerror("CPU Timer 4 matches TREG4\n"); // logerror("CPU Timer 4 matches TREG4\n");
set_irq_line(INTT4, 1); raise_irq(INTT4);
} }
if ( m_timer4_value == m_treg_16bit[1] ) if ( m_timer4_value == m_treg_16bit[1] )
{ {
// logerror("CPU Timer 4 matches TREG5\n"); // logerror("CPU Timer 4 matches TREG5\n");
set_irq_line(INTT5, 1); raise_irq(INTT5);
if (m_t4mod & 0x04) if (m_t4mod & 0x04)
m_timer4_value = 0; m_timer4_value = 0;
} }
@ -2606,7 +2619,7 @@ WRITE8_MEMBER( tlcs90_device::t90_internal_registers_w )
case T90_IRFH: case T90_IRFH:
if (data >= int(INTSWI) + 2 && data < int(INTMAX) + 2) if (data >= int(INTSWI) + 2 && data < int(INTMAX) + 2)
m_irq_state &= ~(1 << (data - 2)); clear_irq(data - 2);
break; break;
case T90_P3: case T90_P3:
@ -2730,6 +2743,7 @@ void tlcs90_device::device_start()
save_item(NAME(m_halt)); save_item(NAME(m_halt));
save_item(NAME(m_after_EI)); save_item(NAME(m_after_EI));
save_item(NAME(m_irq_state)); save_item(NAME(m_irq_state));
save_item(NAME(m_irq_line_state));
save_item(NAME(m_irq_mask)); save_item(NAME(m_irq_mask));
save_item(NAME(m_extra_cycles)); save_item(NAME(m_extra_cycles));
@ -2790,7 +2804,7 @@ void tlcs90_device::device_start()
m_prvpc.d = m_pc.d = m_sp.d = m_af.d = m_bc.d = m_de.d = m_hl.d = m_ix.d = m_iy.d = 0; m_prvpc.d = m_pc.d = m_sp.d = m_af.d = m_bc.d = m_de.d = m_hl.d = m_ix.d = m_iy.d = 0;
m_af2.d = m_bc2.d = m_de2.d = m_hl2.d = 0; m_af2.d = m_bc2.d = m_de2.d = m_hl2.d = 0;
m_halt = m_after_EI = 0; m_halt = m_after_EI = 0;
m_irq_state = m_irq_mask = 0; m_irq_state = m_irq_line_state = m_irq_mask = 0;
m_extra_cycles = 0; m_extra_cycles = 0;
m_ixbase = m_iybase = 0; m_ixbase = m_iybase = 0;
m_timer_value[0] = m_timer_value[1] = m_timer_value[2] = m_timer_value[3] = 0; m_timer_value[0] = m_timer_value[1] = m_timer_value[2] = m_timer_value[3] = 0;

View File

@ -143,7 +143,7 @@ private:
PAIR m_prvpc,m_pc,m_sp,m_af,m_bc,m_de,m_hl,m_ix,m_iy; PAIR m_prvpc,m_pc,m_sp,m_af,m_bc,m_de,m_hl,m_ix,m_iy;
PAIR m_af2,m_bc2,m_de2,m_hl2; PAIR m_af2,m_bc2,m_de2,m_hl2;
uint8_t m_halt, m_after_EI; uint8_t m_halt, m_after_EI;
uint16_t m_irq_state, m_irq_mask; uint16_t m_irq_state, m_irq_line_state, m_irq_mask;
address_space *m_program; address_space *m_program;
int m_icount; int m_icount;
int m_extra_cycles; // extra cycles for interrupts int m_extra_cycles; // extra cycles for interrupts
@ -209,6 +209,8 @@ private:
inline void Push( uint16_t rr ); inline void Push( uint16_t rr );
inline void Pop( uint16_t rr ); inline void Pop( uint16_t rr );
inline void leave_halt(); inline void leave_halt();
inline void raise_irq(int irq);
inline void clear_irq(int irq);
void take_interrupt(tlcs90_e_irq irq); void take_interrupt(tlcs90_e_irq irq);
void check_interrupts(); void check_interrupts();
inline void Cyc(); inline void Cyc();

View File

@ -75,9 +75,6 @@ TODO:
- neruton / majxtal7: girls are behind the background in demo mode. - neruton / majxtal7: girls are behind the background in demo mode.
- tenkai: Interrupts are not quite right; "RAM ERROR" at startup and music slows
down while dealing tiles in attract mode.
*********************************************************************************************************************/ *********************************************************************************************************************/
#include "emu.h" #include "emu.h"
@ -4823,18 +4820,21 @@ MACHINE_CONFIG_END
void dynax_state::tenkai_update_irq() void dynax_state::tenkai_update_irq()
{ {
m_maincpu->set_input_line(INPUT_LINE_IRQ0, m_blitter_irq); if (m_blitter_irq_mask)
m_maincpu->set_input_line(INPUT_LINE_IRQ0, m_blitter_irq);
} }
WRITE_LINE_MEMBER(dynax_state::tenkai_blitter_ack_w) WRITE_LINE_MEMBER(dynax_state::tenkai_blitter_ack_w)
{ {
m_blitter_irq_mask = state; m_blitter_irq_mask = state;
// this must be acknowledged somewhere else
if (!m_blitter_irq_mask) if (!m_blitter_irq_mask)
{
m_blitter_irq = 0; m_blitter_irq = 0;
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
tenkai_update_irq(); }
else
tenkai_update_irq();
} }
@ -4924,7 +4924,6 @@ MACHINE_CONFIG_START(dynax_state::gekisha)
MCFG_CPU_ADD("maincpu",TMP90841, XTAL(10'000'000) ) // ? MCFG_CPU_ADD("maincpu",TMP90841, XTAL(10'000'000) ) // ?
MCFG_CPU_PROGRAM_MAP(gekisha_map) MCFG_CPU_PROGRAM_MAP(gekisha_map)
MCFG_TLCS90_PORT_P4_WRITE_CB(WRITE8(dynax_state, gekisha_p4_w)) MCFG_TLCS90_PORT_P4_WRITE_CB(WRITE8(dynax_state, gekisha_p4_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", dynax_state, irq0_line_hold)
MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(gekisha_banked_map) MCFG_DEVICE_PROGRAM_MAP(gekisha_banked_map)
@ -4955,6 +4954,7 @@ MACHINE_CONFIG_START(dynax_state::gekisha)
MCFG_SCREEN_VISIBLE_AREA(2, 256-1, 16, 256-1) MCFG_SCREEN_VISIBLE_AREA(2, 256-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_mjdialq2) MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_mjdialq2)
MCFG_SCREEN_PALETTE("palette") MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_PALETTE_ADD("palette", 512) MCFG_PALETTE_ADD("palette", 512)
MCFG_PALETTE_INIT_OWNER(dynax_state,sprtmtch) // static palette MCFG_PALETTE_INIT_OWNER(dynax_state,sprtmtch) // static palette