Cleanups/version bump.

This commit is contained in:
Aaron Giles 2008-06-26 16:05:46 +00:00
parent a31c92792b
commit 3d1376ed97
56 changed files with 321 additions and 321 deletions

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@ -925,7 +925,7 @@ static const int SEARCH_BYTE_STEP[] =
1 /* 1-bit */
};
static const UINT32 BYTE_LOOP_TABLE[] =
static const UINT32 BYTE_LOOP_TABLE[] =
{
1, /* 8-bit (1 byte) */
3, /* 16-bit (2 bytes) */
@ -2006,7 +2006,7 @@ void cheat_init(running_machine *machine)
edit_cursor = 0;
cheat_options = DEFAULT_CHEAT_OPTIONS;
driverSpecifiedFlag = 0;
horizontal_key_repeat_speed = 10;
vertical_key_repeat_speed = 10;

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@ -3097,14 +3097,14 @@ static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruct
/* test and branch */
emit_mov_r64_imm(&dst, REG_PARAM1, (FPTR)Machine); // mov param1,pcp
emit_test_m32_imm(&dst, MBD(REG_PARAM1, offsetof(running_machine, debug_flags)), DEBUG_FLAG_CALL_HOOK);
emit_test_m32_imm(&dst, MBD(REG_PARAM1, offsetof(running_machine, debug_flags)), DEBUG_FLAG_CALL_HOOK);
// test [Machine->debug_flags],DEBUG_FLAG_CALL_HOOK
emit_jcc_short_link(&dst, COND_Z, &skip); // jz skip
/* push the parameter */
emit_mov_r32_p32(drcbe, &dst, REG_PARAM2, &pcp); // mov param1,pcp
emit_smart_call_m64(drcbe, &dst, &drcbe->debug_cpu_instruction_hook); // call debug_cpu_instruction_hook
resolve_link(&dst, &skip); // skip:
}

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@ -3217,7 +3217,7 @@ static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruct
if ((Machine->debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
drcuml_parameter pcp;
/* normalize parameters */
param_normalize_1(drcbe, inst, &pcp, PTYPE_MRI);
@ -3229,7 +3229,7 @@ static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruct
emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 4), &pcp); // mov [esp+4],pcp
emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)Machine); // mov [esp],Machine
emit_call(&dst, (x86code *)debug_cpu_instruction_hook); // call debug_cpu_instruction_hook
resolve_link(&dst, &skip); // skip:
}

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@ -72,7 +72,7 @@ INLINE int tlb_entry_is_global(const mips3_tlb_entry *entry)
void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int index, int clock, const mips3_config *config, int (*irqcallback)(int))
{
int tlbindex;
/* initialize based on the config */
memset(mips, 0, sizeof(*mips));
mips->flavor = flavor;
@ -94,7 +94,7 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int in
/* reset the state */
mips3com_reset(mips);
/* register for save states */
state_save_register_item("mips3", index, mips->pc);
state_save_register_item_array("mips3", index, mips->r);

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@ -214,7 +214,7 @@ void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_di
/* reset the state */
ppccom_reset(ppc);
/* register for save states */
state_save_register_item("ppc", index, ppc->pc);
state_save_register_item_array("ppc", index, ppc->r);

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@ -421,7 +421,7 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba
{
const sharc_config *cfg = config;
int saveindex;
sharc.boot_mode = cfg->boot_mode;
sharc.irq_callback = irqcallback;
@ -431,7 +431,7 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba
sharc.internal_ram = auto_malloc(2 * 0x10000 * sizeof(UINT16)); // 2x 128KB
sharc.internal_ram_block0 = &sharc.internal_ram[0];
sharc.internal_ram_block1 = &sharc.internal_ram[0x20000/2];
state_save_register_item("sharc", index, sharc.pc);
state_save_register_item_pointer("sharc", index, (&sharc.r[0].r), ARRAY_LENGTH(sharc.r));
state_save_register_item_pointer("sharc", index, (&sharc.reg_alt[0].r), ARRAY_LENGTH(sharc.reg_alt));
@ -467,7 +467,7 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba
state_save_register_item_array("sharc", index, sharc.dag2_alt.m);
state_save_register_item_array("sharc", index, sharc.dag2_alt.b);
state_save_register_item_array("sharc", index, sharc.dag2_alt.l);
for (saveindex = 0; saveindex < ARRAY_LENGTH(sharc.dma); saveindex++)
{
state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].control);
@ -506,7 +506,7 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba
state_save_register_item("sharc", index, sharc.px);
state_save_register_item_pointer("sharc", index, sharc.internal_ram, 2 * 0x10000);
state_save_register_item("sharc", index, sharc.opcode);
state_save_register_item("sharc", index, sharc.fetch_opcode);
state_save_register_item("sharc", index, sharc.decode_opcode);

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@ -855,7 +855,7 @@ static int tms34010_execute(int cycles)
{
if ((state.screen->machine->debug_flags & DEBUG_FLAG_CALL_HOOK) != 0)
{
state.st = GET_ST();
state.st = GET_ST();
debugger_instruction_hook(Machine, PC);
}
state.op = ROPCODE();

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@ -9,9 +9,9 @@
**********************************************************************
Future work:
- enable history to be enabled/disabled to improve performance
Future work:
- enable history to be enabled/disabled to improve performance
*********************************************************************/
@ -60,7 +60,7 @@ struct _debugger_private
int execution_state;
int memory_hook_cpunum;
UINT32 bpindex;
UINT32 wpindex;
@ -119,7 +119,7 @@ static void set_cpu_reg(UINT32 ref, UINT64 value);
***************************************************************************/
/*-------------------------------------------------
debug_cpu_within_instruction_hook - true if
debug_cpu_within_instruction_hook - true if
the debugger is currently live
-------------------------------------------------*/
@ -293,7 +293,7 @@ static void debug_cpu_exit(running_machine *machine)
for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
/* close any tracefiles */
if (info->trace.file)
fclose(info->trace.file);
@ -345,14 +345,14 @@ static void compute_debug_flags(running_machine *machine, const debug_cpu_info *
/* many of our states require us to be called on each instruction */
if (global.execution_state == EXECUTION_STATE_STOPPED)
machine->debug_flags |= DEBUG_FLAG_CALL_HOOK;
if ((info->flags & (DEBUG_FLAG_HISTORY | DEBUG_FLAG_TRACING_ANY | DEBUG_FLAG_HOOKED |
if ((info->flags & (DEBUG_FLAG_HISTORY | DEBUG_FLAG_TRACING_ANY | DEBUG_FLAG_HOOKED |
DEBUG_FLAG_STEPPING_ANY | DEBUG_FLAG_STOP_PC | DEBUG_FLAG_LIVE_BP)) != 0)
machine->debug_flags |= DEBUG_FLAG_CALL_HOOK;
/* if we are stopping at a particular time and that time is within the current timeslice, we need to be called */
if ((info->flags & DEBUG_FLAG_STOP_TIME) && attotime_compare(info->endexectime, info->stoptime) <= 0)
machine->debug_flags |= DEBUG_FLAG_CALL_HOOK;
/* add in the watchpoint flags */
machine->debug_flags |= (info->flags & DEBUG_FLAG_WATCHPOINT) >> (24 - 4);
}
@ -366,7 +366,7 @@ static void compute_debug_flags(running_machine *machine, const debug_cpu_info *
static void reset_transient_flags(running_machine *machine)
{
int cpunum;
/* loop over CPUs and reset the transient flags */
for (cpunum = 0; cpunum < ARRAY_LENGTH(global.cpuinfo); cpunum++)
global.cpuinfo[cpunum].flags &= ~DEBUG_FLAG_TRANSIENT;
@ -374,8 +374,8 @@ static void reset_transient_flags(running_machine *machine)
/*-------------------------------------------------
debug_cpu_start_hook - the CPU execution
system calls this hook before beginning
debug_cpu_start_hook - the CPU execution
system calls this hook before beginning
execution for the given CPU
-------------------------------------------------*/
@ -391,7 +391,7 @@ void debug_cpu_start_hook(running_machine *machine, int cpunum, attotime endtime
/* update the target execution end time */
info->endexectime = endtime;
/* if a VBLANK occurred, check on things */
if (global.vblank_occurred && global.execution_state != EXECUTION_STATE_STOPPED)
{
@ -403,7 +403,7 @@ void debug_cpu_start_hook(running_machine *machine, int cpunum, attotime endtime
global.execution_state = EXECUTION_STATE_STOPPED;
debug_console_printf("Stopped at VBLANK\n");
}
/* check for debug keypresses */
else if (input_ui_pressed(machine, IPT_UI_DEBUG_BREAK))
{
@ -425,15 +425,15 @@ void debug_cpu_start_hook(running_machine *machine, int cpunum, attotime endtime
/*-------------------------------------------------
debug_cpu_stop_hook - the CPU execution
system calls this hook when ending execution
debug_cpu_stop_hook - the CPU execution
system calls this hook when ending execution
for the given CPU
-------------------------------------------------*/
void debug_cpu_stop_hook(running_machine *machine, int cpunum)
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
assert(global.livecpu == info);
/* if we're stopping on a context switch, handle it now */
@ -449,14 +449,14 @@ void debug_cpu_stop_hook(running_machine *machine, int cpunum)
/*-------------------------------------------------
debug_cpu_interrupt_hook - called when an
debug_cpu_interrupt_hook - called when an
interrupt is acknowledged
-------------------------------------------------*/
void debug_cpu_interrupt_hook(running_machine *machine, int cpunum, int irqline)
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
/* see if this matches a pending interrupt request */
if ((info->flags & DEBUG_FLAG_STOP_INTERRUPT) != 0 && (info->stopirq == -1 || info->stopirq == irqline))
{
@ -468,14 +468,14 @@ void debug_cpu_interrupt_hook(running_machine *machine, int cpunum, int irqline)
/*-------------------------------------------------
debug_cpu_exception_hook - called when an
debug_cpu_exception_hook - called when an
exception is generated
-------------------------------------------------*/
void debug_cpu_exception_hook(running_machine *machine, int cpunum, int exception)
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
/* see if this matches a pending interrupt request */
if ((info->flags & DEBUG_FLAG_STOP_EXCEPTION) != 0 && (info->stopexception == -1 || info->stopexception == exception))
{
@ -487,7 +487,7 @@ void debug_cpu_exception_hook(running_machine *machine, int cpunum, int exceptio
/*-------------------------------------------------
debug_cpu_instruction_hook - called by the
debug_cpu_instruction_hook - called by the
CPU cores before executing each instruction
-------------------------------------------------*/
@ -522,7 +522,7 @@ void debug_cpu_instruction_hook(running_machine *machine, offs_t curpc)
/* if we hit 0, stop */
if (info->stepsleft == 0)
global.execution_state = EXECUTION_STATE_STOPPED;
/* update every 100 steps until we are within 200 of the end */
else if ((info->flags & DEBUG_FLAG_STEPPING_OUT) == 0 && (info->stepsleft < 200 || info->stepsleft % 100 == 0))
{
@ -791,7 +791,7 @@ void debug_cpu_ignore_cpu(int cpunum, int ignore)
info->flags &= ~DEBUG_FLAG_OBSERVING;
else
info->flags |= DEBUG_FLAG_OBSERVING;
if (info == global.livecpu && ignore)
debug_cpu_next_cpu();
}
@ -1108,7 +1108,7 @@ void debug_cpu_get_memory_hooks(int cpunum, debug_hook_read_func *read, debug_ho
void debug_cpu_set_instruction_hook(int cpunum, int (*hook)(offs_t pc))
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
/* set the hook and also the CPU's flag for fast knowledge of the hook */
info->instrhook = hook;
if (hook != NULL)
@ -1144,7 +1144,7 @@ static void breakpoint_update_flags(debug_cpu_info *info)
/*-------------------------------------------------
breakpoint_check - check the breakpoints for
breakpoint_check - check the breakpoints for
a given CPU
-------------------------------------------------*/
@ -1202,7 +1202,7 @@ int debug_cpu_breakpoint_set(int cpunum, offs_t address, parsed_expression *cond
/* hook us in */
bp->next = info->bplist;
info->bplist = bp;
/* ensure the live breakpoint flag is set */
breakpoint_update_flags(info);
return bp->index;
@ -1237,7 +1237,7 @@ int debug_cpu_breakpoint_clear(int bpnum)
if (bp->action != NULL)
free(bp->action);
free(bp);
/* update the flags */
breakpoint_update_flags(info);
return 1;
@ -1453,7 +1453,7 @@ int debug_cpu_watchpoint_clear(int wpnum)
for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
for (spacenum = 0; spacenum < ADDRESS_SPACES; spacenum++)
for (pwp = NULL, wp = info->space[spacenum].wplist; wp != NULL; pwp = wp, wp = wp->next)
if (wp->index == wpnum)
@ -1500,7 +1500,7 @@ int debug_cpu_watchpoint_enable(int wpnum, int enable)
for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
{
debug_cpu_info *info = &global.cpuinfo[cpunum];
for (spacenum = 0; spacenum < ADDRESS_SPACES; spacenum++)
for (wp = info->space[spacenum].wplist; wp; wp = wp->next)
if (wp->index == wpnum)

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@ -38,7 +38,7 @@ void debugger_refresh_display(running_machine *machine);
***************************************************************************/
/*-------------------------------------------------
debugger_instruction_hook - CPU cores call
debugger_instruction_hook - CPU cores call
this once per instruction from CPU cores
-------------------------------------------------*/
@ -50,8 +50,8 @@ INLINE void debugger_instruction_hook(running_machine *machine, offs_t curpc)
/*-------------------------------------------------
debugger_start_cpu_hook - the CPU execution
system calls this hook before beginning
debugger_start_cpu_hook - the CPU execution
system calls this hook before beginning
execution for the given CPU
-------------------------------------------------*/
@ -63,8 +63,8 @@ INLINE void debugger_start_cpu_hook(running_machine *machine, int cpunum, attoti
/*-------------------------------------------------
debugger_stop_cpu_hook - the CPU execution
system calls this hook when ending execution
debugger_stop_cpu_hook - the CPU execution
system calls this hook when ending execution
for the given CPU
-------------------------------------------------*/
@ -88,8 +88,8 @@ INLINE void debugger_break(running_machine *machine)
/*-------------------------------------------------
debugger_within_instruction_hook - call this
to determine if the debugger is currently
debugger_within_instruction_hook - call this
to determine if the debugger is currently
halted within the instruction hook
-------------------------------------------------*/

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@ -325,7 +325,7 @@ WRITE8_DEVICE_HANDLER( dma8257_drq_w )
{
dma8257_t *dma8257 = get_safe_token(device);
int param = (offset << 1) | (data ? 1 : 0);
timer_call_after_resynch(dma8257, param, dma8257_drq_write_callback);
}

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@ -549,7 +549,7 @@ static DEVICE_START( smc91c9x )
static DEVICE_RESET( smc91c9x )
{
smc91c9x_state *smc = get_safe_token(device);
memset(smc->reg, 0, sizeof(smc->reg));
memset(smc->regmask, 0, sizeof(smc->regmask));
smc->irq_state = 0;

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@ -402,7 +402,7 @@ WRITE8_DEVICE_HANDLER( z80dma_rdy_w)
int param;
assert( offset == 0);
param = (data ? 1 : 0);
LOG(("RDY: %d Active High: %d\n", data, READY_ACTIVE_HIGH(z80dma)));
timer_call_after_resynch(z80dma, param, z80dma_rdy_write_callback);

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@ -740,7 +740,7 @@ void mame_schedule_load(running_machine *machine, const char *filename)
/*-------------------------------------------------
mame_is_save_or_load_pending - is a save or
mame_is_save_or_load_pending - is a save or
load pending?
-------------------------------------------------*/

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@ -189,7 +189,7 @@ INLINE UINT32 get_texel_palette16_bilinear(const render_texinfo *texture, INT32
const UINT16 *texbase = texture->base;
rgb_t pix00, pix01, pix10, pix11;
INT32 u0, u1, v0, v1;
u0 = curu >> 16;
u1 = 1;
if (u0 < 0) u0 = u1 = 0;
@ -198,7 +198,7 @@ INLINE UINT32 get_texel_palette16_bilinear(const render_texinfo *texture, INT32
v1 = texture->rowpixels;
if (v0 < 0) v0 = v1 = 0;
else if (v0 + 1 >= texture->height) v0 = texture->height - 1, v1 = 0;
texbase += v0 * texture->rowpixels + u0;
pix00 = texture->palette[texbase[0]];
@ -232,7 +232,7 @@ INLINE UINT32 get_texel_rgb15_bilinear(const render_texinfo *texture, INT32 curu
const UINT16 *texbase = texture->base;
rgb_t pix00, pix01, pix10, pix11, filtered;
INT32 u0, u1, v0, v1;
u0 = curu >> 16;
u1 = 1;
if (u0 < 0) u0 = u1 = 0;
@ -241,7 +241,7 @@ INLINE UINT32 get_texel_rgb15_bilinear(const render_texinfo *texture, INT32 curu
v1 = texture->rowpixels;
if (v0 < 0) v0 = v1 = 0;
else if (v0 + 1 >= texture->height) v0 = texture->height - 1, v1 = 0;
texbase += v0 * texture->rowpixels + u0;
pix00 = texbase[0];
@ -281,7 +281,7 @@ INLINE UINT32 get_texel_yuy16_bilinear(const render_texinfo *texture, INT32 curu
const UINT16 *texbase = texture->base;
rgb_t pix00, pix01, pix10, pix11;
INT32 u0, u1, v0, v1;
u0 = curu >> 16;
u1 = 1;
if (u0 < 0) u0 = u1 = 0;
@ -290,7 +290,7 @@ INLINE UINT32 get_texel_yuy16_bilinear(const render_texinfo *texture, INT32 curu
v1 = texture->rowpixels;
if (v0 < 0) v0 = v1 = 0;
else if (v0 + 1 >= texture->height) v0 = texture->height - 1, v1 = 0;
texbase += v0 * texture->rowpixels + u0;
if ((curu & 0x10000) == 0)
@ -350,7 +350,7 @@ INLINE UINT32 get_texel_rgb32_bilinear(const render_texinfo *texture, INT32 curu
const UINT32 *texbase = texture->base;
rgb_t pix00, pix01, pix10, pix11;
INT32 u0, u1, v0, v1;
u0 = curu >> 16;
u1 = 1;
if (u0 < 0) u0 = u1 = 0;
@ -359,7 +359,7 @@ INLINE UINT32 get_texel_rgb32_bilinear(const render_texinfo *texture, INT32 curu
v1 = texture->rowpixels;
if (v0 < 0) v0 = v1 = 0;
else if (v0 + 1 >= texture->height) v0 = texture->height - 1, v1 = 0;
texbase += v0 * texture->rowpixels + u0;
pix00 = texbase[0];
@ -394,7 +394,7 @@ INLINE UINT32 get_texel_argb32_bilinear(const render_texinfo *texture, INT32 cur
const UINT32 *texbase = texture->base;
rgb_t pix00, pix01, pix10, pix11;
INT32 u0, u1, v0, v1;
u0 = curu >> 16;
u1 = 1;
if (u0 < 0) u0 = u1 = 0;
@ -403,7 +403,7 @@ INLINE UINT32 get_texel_argb32_bilinear(const render_texinfo *texture, INT32 cur
v1 = texture->rowpixels;
if (v0 < 0) v0 = v1 = 0;
else if (v0 + 1 >= texture->height) v0 = texture->height - 1, v1 = 0;
texbase += v0 * texture->rowpixels + u0;
pix00 = texbase[0];
@ -2069,7 +2069,7 @@ static void FUNC_PREFIX(setup_and_draw_textured_quad)(const render_primitive *pr
/* advance U/V to the middle of the first texel */
setup.startu += (setup.dudx + setup.dudy) / 2;
setup.startv += (setup.dvdx + setup.dvdy) / 2;
/* if we're bilinear filtering, we need to offset u/v by half a texel */
if (BILINEAR_FILTER)
{

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@ -37,7 +37,7 @@
#include "streams.h"
#include "multipcm.h"
//¿?¿?
//????
#define MULTIPCM_CLOCKDIV (180.0)
struct _Sample
@ -113,7 +113,7 @@ static signed int LPANTABLE[0x800],RPANTABLE[0x800];
#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
static const int val2chan[] =
{
{
0, 1, 2, 3, 4, 5, 6 , -1,
7, 8, 9, 10,11,12,13, -1,
14,15,16,17,18,19,20, -1,
@ -127,7 +127,7 @@ static const int val2chan[] =
#define MULTIPCM_RATE 44100.0
/*******************************
ENVELOPE SECTION
ENVELOPE SECTION
*******************************/
//Times are based on a 44100Hz timebase. It's adjusted to the actual sampling rate on startup
@ -202,7 +202,7 @@ static void EG_Calc(struct _MultiPCM *ptChip,struct _SLOT *slot)
if(slot->Sample->KRS!=0xf)
rate=(octave+slot->Sample->KRS)*2+((slot->Regs[3]>>3)&1);
else
rate=0;
rate=0;
slot->EG.AR=Get_RATE(ptChip->ARStep,rate,slot->Sample->AR);
slot->EG.D1R=Get_RATE(ptChip->DRStep,rate,slot->Sample->DR1);
@ -213,7 +213,7 @@ static void EG_Calc(struct _MultiPCM *ptChip,struct _SLOT *slot)
}
/*****************************
LFO SECTION
LFO SECTION
*****************************/
#define LFO_SHIFT 8
@ -279,7 +279,7 @@ static void LFO_Init(void)
INLINE signed int PLFO_Step(struct _LFO *LFO)
{
int p;
LFO->phase+=LFO->phase_step;
LFO->phase+=LFO->phase_step;
p=LFO->table[(LFO->phase>>LFO_SHIFT)&0xff];
p=LFO->scale[p+128];
return p<<(SHIFT-LFO_SHIFT);
@ -288,7 +288,7 @@ INLINE signed int PLFO_Step(struct _LFO *LFO)
INLINE signed int ALFO_Step(struct _LFO *LFO)
{
int p;
LFO->phase+=LFO->phase_step;
LFO->phase+=LFO->phase_step;
p=LFO->table[(LFO->phase>>LFO_SHIFT)&0xff];
p=LFO->scale[p];
return p<<(SHIFT-LFO_SHIFT);
@ -357,7 +357,7 @@ void WriteSlot(struct _MultiPCM *ptChip,struct _SLOT *slot,int reg,unsigned char
EG_Calc(ptChip,slot);
slot->EG.state=ATTACK;
slot->EG.volume=0;
if(slot->Base>=0x100000)
{
if(slot->Pan&8)
@ -391,7 +391,7 @@ void WriteSlot(struct _MultiPCM *ptChip,struct _SLOT *slot,int reg,unsigned char
}
else
slot->TL=slot->DstTL<<SHIFT;
}
}
break;
case 6: //LFO freq+PLFO
{
@ -431,7 +431,7 @@ static void MultiPCM_update(void *param, stream_sample_t **inputs, stream_sample
{
signed int smpl=0;
signed int smpr=0;
for(sl=0;sl<28;++sl)
for(sl=0;sl<28;++sl)
{
struct _SLOT *slot=ptChip->Slots+sl;
if(slot->Playing)
@ -483,7 +483,7 @@ static void MultiPCM_update(void *param, stream_sample_t **inputs, stream_sample
unsigned char MultiPCM_reg_r(int chip, int offset)
{
// struct _MultiPCM *ptChip = sndti_token(SOUND_MULTIPCM, chip);
// struct _MultiPCM *ptChip = sndti_token(SOUND_MULTIPCM, chip);
return 0;
}
@ -514,7 +514,7 @@ static void *multipcm_start(int sndindex, int clock, const void *config)
SegaDB=(float) iTL*(-24.0)/(float) 0x40;
TL=pow(10.0,SegaDB/20.0);
if(iPAN==0x8)
{
@ -527,7 +527,7 @@ static void *multipcm_start(int sndindex, int clock, const void *config)
else if(iPAN&0x8)
{
LPAN=1.0;
iPAN=0x10-iPAN;
SegaDB=(float) iPAN*(-12.0)/(float) 0x4;

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@ -7,7 +7,7 @@
00
01 - sptr ?? (always 0)
02 - sptr LO
02 - sptr LO
03 - sptr HI
04
05 - flags? 00000000 0000?L0? - bit 0 loops, other bits appear to be not used by the chip
@ -74,8 +74,8 @@ WRITE16_HANDLER(nile_sndctrl_w)
COMBINE_DATA(&info->ctrl);
// printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, activecpu_get_pc());
// printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, activecpu_get_pc());
ctrl^=info->ctrl;
}
@ -99,7 +99,7 @@ READ16_HANDLER(nile_snd_r)
{
int slot=offset/16;
int sptr = ((nile_sound_regs[slot*16+3]<<16)|nile_sound_regs[slot*16+2])+info->vpos[slot];
if(reg==2)
{
return sptr&0xffff;
@ -129,7 +129,7 @@ WRITE16_HANDLER(nile_snd_w)
info->vpos[v] = info->frac[v] = info->lponce[v] = 0;
}
// printf("v%02d: %04x to reg %02d (PC=%x)\n", v, nile_sound_regs[offset], r, activecpu_get_pc());
// printf("v%02d: %04x to reg %02d (PC=%x)\n", v, nile_sound_regs[offset], r, activecpu_get_pc());
}
static void nile_update(void *param, stream_sample_t **inputs, stream_sample_t **outputs, int length)
@ -142,7 +142,7 @@ static void nile_update(void *param, stream_sample_t **inputs, stream_sample_t *
INT32 *mixp;
INT16 sample;
int sptr, eptr, freq, lsptr, leptr;
lsptr=leptr=0;
memset(mix, 0, sizeof(mix[0])*length*2);
@ -157,7 +157,7 @@ static void nile_update(void *param, stream_sample_t **inputs, stream_sample_t *
sptr = slot[NILE_REG_SPTR_HI]<<16 | slot[NILE_REG_SPTR_LO];
eptr = slot[NILE_REG_EPTR_HI]<<16 | slot[NILE_REG_EPTR_LO];
freq=slot[NILE_REG_FREQ]<<4;
lsptr = slot[NILE_REG_LSPTR_HI]<<16 | slot[NILE_REG_LSPTR_LO];
leptr = slot[NILE_REG_LEPTR_HI]<<16 | slot[NILE_REG_LEPTR_LO];
@ -168,7 +168,7 @@ static void nile_update(void *param, stream_sample_t **inputs, stream_sample_t *
*mixp++ += (sample * (INT32)slot[NILE_REG_VOL_R]) >> 16;
*mixp++ += (sample * (INT32)slot[NILE_REG_VOL_L]) >> 16;
info->frac[v] += freq;
info->vpos[v] += info->frac[v]>>16;
info->frac[v] &= 0xffff;
@ -187,7 +187,7 @@ static void nile_update(void *param, stream_sample_t **inputs, stream_sample_t *
// not looped yet, check sample end
if ((info->vpos[v] + sptr) >= eptr)
{
// code at 11d8c:
// code at 11d8c:
// if bit 2 (0x4) is set, check if loop start = loop end.
// if they are equal, clear bit 0 and don't set the loop start/end
// registers in the NiLe. if they aren't, set bit 0 and set
@ -203,7 +203,7 @@ static void nile_update(void *param, stream_sample_t **inputs, stream_sample_t *
info->vpos[v] = (eptr - sptr);
info->frac[v] = 0;
}
}
}
}

View File

@ -312,29 +312,29 @@ static void rf5c400_init_chip(struct rf5c400_info *info, int sndindex, int clock
info->channels[i].env_step = 0.0;
info->channels[i].env_scale = 1.0;
}
for (i = 0; i < ARRAY_LENGTH(info->channels); i++)
{
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].startH);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].startL);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].freq);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].endL);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].endHloopH);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].loopL);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].pan);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].effect);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].volume);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].attack);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].decay);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].release);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].cutoff);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].pos);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].step);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].keyon);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_phase);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_level);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_step);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_scale);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].startH);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].startL);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].freq);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].endL);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].endHloopH);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].loopL);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].pan);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].effect);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].volume);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].attack);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].decay);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].release);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].cutoff);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].pos);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].step);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].keyon);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_phase);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_level);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_step);
state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_scale);
}
info->stream = stream_create(0, 2, clock/384, info, rf5c400_update);

View File

@ -351,7 +351,7 @@ void video_init(running_machine *machine)
/* create a render target for snapshots */
viewname = options_get_string(mame_options(), OPTION_SNAPVIEW);
global.snap_native = (machine->primary_screen != NULL && (viewname[0] == 0 || strcmp(viewname, "native") == 0));
/* the native target is hard-coded to our internal layout and has all options disabled */
if (global.snap_native)
{
@ -359,7 +359,7 @@ void video_init(running_machine *machine)
assert(global.snap_target != NULL);
render_target_set_layer_config(global.snap_target, 0);
}
/* other targets select the specified view and turn off effects */
else
{

View File

@ -599,7 +599,7 @@ static STATE_POSTLOAD( voodoo_postload )
{
voodoo_state *v = param;
int index, subindex;
v->fbi.clut_dirty = TRUE;
for (index = 0; index < ARRAY_LENGTH(v->tmu); index++)
{
@ -607,7 +607,7 @@ static STATE_POSTLOAD( voodoo_postload )
for (subindex = 0; subindex < ARRAY_LENGTH(v->tmu[index].ncc); subindex++)
v->tmu[index].ncc[subindex].dirty = TRUE;
}
/* recompute video memory to get the FBI FIFO base recomputed */
if (v->type <= VOODOO_2)
recompute_video_memory(v);
@ -630,7 +630,7 @@ static void init_save_state(const device_config *device)
state_save_register_item(unique_tag, 0, v->extra_cycles);
state_save_register_item_pointer(unique_tag, 0, (&v->reg[0].u), ARRAY_LENGTH(v->reg));
state_save_register_item(unique_tag, 0, v->alt_regmap);
/* register states: pci */
state_save_register_item(unique_tag, 0, v->pci.fifo.in);
state_save_register_item(unique_tag, 0, v->pci.fifo.out);
@ -4239,7 +4239,7 @@ static WRITE32_DEVICE_HANDLER( banshee_agp_w )
WRITE32_DEVICE_HANDLER( banshee_w )
{
voodoo_state *v = get_safe_token(device);
/* if we have something pending, flush the FIFOs up to the current time */
if (v->pci.op_pending)
flush_fifos(v, timer_get_time());
@ -4464,10 +4464,10 @@ static DEVICE_START( voodoo )
assert(config->type >= VOODOO_1 && config->type < MAX_VOODOO_TYPES);
assert(config->fbmem > 0);
assert(config->type >= VOODOO_BANSHEE || config->tmumem0 > 0);
/* store a pointer back to the device */
v->device = device;
/* copy config data */
v->freq = config->clock;
v->fbi.vblank_client = config->vblank;
@ -4613,7 +4613,7 @@ static DEVICE_START( voodoo )
/* do a soft reset to reset everything else */
soft_reset(v);
/* register for save states */
init_save_state(device);
}

View File

@ -273,7 +273,7 @@
This is the most famous game from Cal Omega 903 System. In the test mode you can see
the name "Gaming Draw Poker", but in the manual figure as "Casino Poker". Also in some
game lists you can see it with another name: "Arcade Poker".
game lists you can see it with another name: "Arcade Poker".
The game uses the same GFX set that Jack Potten's Poker for cards and has similar
layout, but the game is different and the old discrete pitched sounds were replaced
@ -613,7 +613,7 @@
#include "machine/6850acia.h"
#include "sound/ay8910.h"
#include "deprecat.h"
#include "deprecat.h"
/* UART */
@ -844,7 +844,7 @@ static INPUT_PORTS_START( stand903 )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
// PORT_DIPSETTING( 0x00, "No Conn" )
// PORT_DIPSETTING( 0x00, "No Conn" )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -950,7 +950,7 @@ static INPUT_PORTS_START( stand904 )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
// PORT_DIPSETTING( 0x00, "No Conn" )
// PORT_DIPSETTING( 0x00, "No Conn" )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -1098,7 +1098,7 @@ static INPUT_PORTS_START( gdrawpkr )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
// PORT_DIPSETTING( 0x00, "No Conn" )
// PORT_DIPSETTING( 0x00, "No Conn" )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -1202,7 +1202,7 @@ static INPUT_PORTS_START( comg076 )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
// PORT_DIPSETTING( 0x00, "No Conn" )
// PORT_DIPSETTING( 0x00, "No Conn" )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -1307,7 +1307,7 @@ static INPUT_PORTS_START( comg128 )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
// PORT_DIPSETTING( 0x00, "No Conn" )
// PORT_DIPSETTING( 0x00, "No Conn" )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -1587,12 +1587,12 @@ GFXDECODE_END
Pin | Description | Wired to
-----+----------------+--------------------------
01 | VSS | GND
02 | Port A - bit 0 | U43 (4N23, multiplexer)
03 | Port A - bit 1 | U44 (4N23, multiplexer)
04 | Port A - bit 2 | U45 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U48 (4N23, multiplexer)
02 | Port A - bit 0 | U43 (4N23, multiplexer)
03 | Port A - bit 1 | U44 (4N23, multiplexer)
04 | Port A - bit 2 | U45 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U48 (4N23, multiplexer)
08 | Port A - bit 6 | SW1-5 (settings)
09 | Port A - bit 7 | U80 (4023B)
10 | Port B - bit 0 | U55 (MCT6) ---> L1
@ -1611,14 +1611,14 @@ GFXDECODE_END
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1669,14 +1669,14 @@ static const pia6821_interface sys903_pia0_intf =
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1703,12 +1703,12 @@ static const pia6821_interface sys903_pia1_intf =
Pin | Description | Wired to
-----+----------------+--------------------------
01 | VSS | GND
02 | Port A - bit 0 | U45 (4N23, multiplexer)
03 | Port A - bit 1 | U45 (4N23, multiplexer)
04 | Port A - bit 2 | U46 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U47 (4N23, multiplexer)
02 | Port A - bit 0 | U45 (4N23, multiplexer)
03 | Port A - bit 1 | U45 (4N23, multiplexer)
04 | Port A - bit 2 | U46 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U47 (4N23, multiplexer)
08 | Port A - bit 6 | U61 (4023B) --> U57 (556, pin 5) [50/60]
09 | Port A - bit 7 | U57 (556, pin 2) --> SW to GND [50/60]
10 | Port B - bit 0 | U49 (MCT6) ---> L1
@ -1727,14 +1727,14 @@ static const pia6821_interface sys903_pia1_intf =
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1785,14 +1785,14 @@ static const pia6821_interface sys905_pia0_intf =
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1997,8 +1997,8 @@ ROM_START( comg079 ) /* Cal Omega v7.9 (Arcade Poker) */
ROM_LOAD( "07-91.u5", 0x1800, 0x0800, CRC(da415c27) SHA1(be42f1d36579ff8fafd6df4e30a64a6141a7a2ae) )
ROM_LOAD( "07-92.u6", 0x2000, 0x0800, CRC(31211ed3) SHA1(799bc4ca77ee01a4d45320263e4cc2d066ec26e5) )
/* code jumps to $2e64 where there's an inexistent mnemonic 0x32! (kill).
also writes to $axxx (inexistent) and $08fx-$09xx (supposed to be $0880-$0881).
/* code jumps to $2e64 where there's an inexistent mnemonic 0x32! (kill).
also writes to $axxx (inexistent) and $08fx-$09xx (supposed to be $0880-$0881).
*/
ROM_LOAD( "07-93.u7", 0x2800, 0x0800, BAD_DUMP CRC(52c84b9c) SHA1(569d6384b9084a11fe84e291f1c165bc0df3ab49) )
ROM_LOAD( "07-94.u8", 0x3000, 0x0800, CRC(ed0e7d4a) SHA1(72f512ca2da573e4571ca6f164fb055daa26dd3c) )

View File

@ -358,7 +358,7 @@ static INPUT_PORTS_START( ctribe )
PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
PORT_SERVICE_DIPLOC( 0x1000, IP_ACTIVE_LOW, "SW2:5" )
PORT_DIPNAME( 0x2000, 0x2000, "Stage Clear Energy" ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x2000, "0" ) PORT_CONDITION("IN3",0x0100,PORTCOND_EQUALS,0x0100)
PORT_DIPSETTING( 0x2000, "0" ) PORT_CONDITION("IN3",0x0100,PORTCOND_EQUALS,0x0100)
PORT_DIPSETTING( 0x0000, "50" ) PORT_CONDITION("IN3",0x0100,PORTCOND_EQUALS,0x0100)
PORT_DIPSETTING( 0x2000, "100" ) PORT_CONDITION("IN3",0x0100,PORTCOND_EQUALS,0x0000)
PORT_DIPSETTING( 0x0000, "150" ) PORT_CONDITION("IN3",0x0100,PORTCOND_EQUALS,0x0000)

View File

@ -2867,7 +2867,7 @@ static void drakton_decrypt_rom(running_machine *machine, UINT8 mod, int offs, i
newbyte = (oldbyte & mod) | (~oldbyte & ~mod);
newbyte = BITSWAP8(newbyte, bs[0], bs[1], bs[2], bs[3], bs[4], bs[5], bs[6], bs[7]);
ROM[mem + offs] = newbyte;
}
}
@ -2899,13 +2899,13 @@ static DRIVER_INIT( herodk )
static DRIVER_INIT( drakton )
{
int bs[4][8] = {
int bs[4][8] = {
{7,6,1,3,0,4,2,5},
{7,1,4,3,0,6,2,5},
{7,6,1,0,3,4,2,5},
{7,1,4,0,3,6,2,5},
};
memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0, SMH_BANK1 );
/* While the PAL supports up to 16 decryption methods, only four
@ -2921,7 +2921,7 @@ static DRIVER_INIT( drakton )
static DRIVER_INIT( strtheat )
{
int bs[4][8] = {
int bs[4][8] = {
{0,6,1,7,3,4,2,5},
{0,6,4,1,3,7,2,5},
{6,3,1,7,0,4,2,5},

View File

@ -657,7 +657,7 @@ static MACHINE_DRIVER_START( flstory )
MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_CPU_ADD(Z80,XTAL_8MHz/2) /* verified on pcb */
/* audio CPU */
/* audio CPU */
MDRV_CPU_PROGRAM_MAP(sound_map,0)
MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2) /* IRQ generated by ??? */
/* NMI generated by the main CPU */

View File

@ -318,7 +318,7 @@ READ16_HANDLER ( megaplay_68k_to_z80_r )
if ((offset >= 0x2000) && (offset <= 0x3fff))
{
offset &=0x1fff;
// if(offset == 0) /* this read handler was used around MAME0.82 to read DSWB. Now it's (DSW0 & 0xff) */
// if(offset == 0) /* this read handler was used around MAME0.82 to read DSWB. Now it's (DSW0 & 0xff) */
// return (input_port_read(machine, "DSW0") << 8) ^ 0xff00;
return (ic36_ram[offset] << 8) + ic36_ram[offset+1];
}

View File

@ -676,15 +676,15 @@ static READ8_HANDLER( sysreg_r )
break;
case 3: /* I/O port 3 */
/*
0x80 = JVSINIT (JAMMA I/F SENSE)
0x40 = COMMST
0x20 = GSENSE
0x08 = EEPDO (EEPROM DO)
0x04 = ADEOC (ADC EOC)
0x02 = ADDOR (ADC DOR)
0x01 = ADDO (ADC DO)
*/
/*
0x80 = JVSINIT (JAMMA I/F SENSE)
0x40 = COMMST
0x20 = GSENSE
0x08 = EEPDO (EEPROM DO)
0x04 = ADEOC (ADC EOC)
0x02 = ADDOR (ADC DOR)
0x01 = ADDO (ADC DO)
*/
r = 0xf7 | (eeprom_read_bit() << 3);
break;
@ -706,22 +706,22 @@ static WRITE8_HANDLER( sysreg_w )
case 1: /* LED Register 1 */
led_reg1 = data;
break;
case 2: /* Parallel data register */
mame_printf_debug("Parallel data = %02X\n", data);
break;
case 3: /* System Register 0 */
/*
0x80 = EEPWEN (EEPROM write enable)
0x40 = EEPCS (EEPROM CS)
0x20 = EEPSCL (EEPROM SCL?)
0x10 = EEPDT (EEPROM data)
0x08 = JVSTXEN / LAMP3 (something about JAMMA interface)
0x04 = LAMP2
0x02 = LAMP1
0x01 = LAMP0
*/
/*
0x80 = EEPWEN (EEPROM write enable)
0x40 = EEPCS (EEPROM CS)
0x20 = EEPSCL (EEPROM SCL?)
0x10 = EEPDT (EEPROM data)
0x08 = JVSTXEN / LAMP3 (something about JAMMA interface)
0x04 = LAMP2
0x02 = LAMP1
0x01 = LAMP0
*/
eeprom_write_bit((data & 0x10) ? 1 : 0);
eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
eeprom_set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
@ -729,50 +729,50 @@ static WRITE8_HANDLER( sysreg_w )
break;
case 4: /* System Register 1 */
/*
0x80 = SNDRES (sound reset)
0x40 = COMRES (COM reset)
0x20 = COINRQ2 (EEPROM SCL?)
0x10 = COINRQ1 (EEPROM data)
0x08 = ADCS (ADC CS)
0x04 = ADCONV (ADC CONV)
0x02 = ADDI (ADC DI)
0x01 = ADDSCLK (ADC SCLK)
*/
/*
0x80 = SNDRES (sound reset)
0x40 = COMRES (COM reset)
0x20 = COINRQ2 (EEPROM SCL?)
0x10 = COINRQ1 (EEPROM data)
0x08 = ADCS (ADC CS)
0x04 = ADCONV (ADC CONV)
0x02 = ADDI (ADC DI)
0x01 = ADDSCLK (ADC SCLK)
*/
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
mame_printf_debug("System register 1 = %02X\n", data);
break;
case 5: /* Sound Control Register */
/*
0x80 = MODE1
0x40 = MUTE1
0x20 = DEEN1
0x10 = ATCK1
0x08 = MODE0
0x04 = MUTE0
0x02 = DEEN0
0x01 = ATCK0
*/
0x80 = MODE1
0x40 = MUTE1
0x20 = DEEN1
0x10 = ATCK1
0x08 = MODE0
0x04 = MUTE0
0x02 = DEEN0
0x01 = ATCK0
*/
mame_printf_debug("Sound control register = %02X\n", data);
break;
case 6: /* WDT Register */
/*
0x80 = WDTCLK
*/
0x80 = WDTCLK
*/
if (data & 0x80)
watchdog_reset(machine);
break;
case 7: /* CG Control Register */
/*
0x80 = EXRES1
0x40 = EXRES0
0x20 = EXID1
0x10 = EXID0
0x01 = EXRGB
*/
0x80 = EXRES1
0x40 = EXRES0
0x20 = EXID1
0x10 = EXID0
0x01 = EXRGB
*/
if (data & 0x80)
cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
if (data & 0x40)
@ -1146,7 +1146,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( hornet_2board_v2 )
MDRV_IMPORT_FROM(hornet_2board)
MDRV_3DFX_VOODOO_REMOVE("voodoo0")
MDRV_3DFX_VOODOO_2_ADD("voodoo0", STD_VOODOO_2_CLOCK, 2, "left")
MDRV_3DFX_VOODOO_TMU_MEMORY(0, 4)
@ -1340,7 +1340,7 @@ static void init_hornet_2board(running_machine *machine, const UINT8 *backupdef)
static DRIVER_INIT(gradius4)
{
UINT8 backupdef[0x2000] = { 0 };
/* RTC data */
backupdef[0x00] = 0x47; // 'G'
backupdef[0x01] = 0x58; // 'X'

View File

@ -604,7 +604,7 @@ static READ16_HANDLER( gtmr_wheel_r )
case 0x0000: // 'Both Sides' = 270deg Wheel
return (input_port_read(machine, "WHEEL0"));
break;
case 0x1000: // '1P Side' = 360' Wheel
return (input_port_read(machine, "WHEEL1"));
break;
@ -1417,7 +1417,7 @@ static INPUT_PORTS_START( gtmr2 )
PORT_DIPNAME( 0x1800, 0x1800, DEF_STR( Controls ) ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x1800, DEF_STR( Joystick ) )
PORT_DIPSETTING( 0x0800, "Wheel (360)" ) // Not working correctly in race }
PORT_DIPSETTING( 0x1000, "Wheel (270D)" ) // Not working correctly ! } seems to work ok to me! (minwah)
PORT_DIPSETTING( 0x1000, "Wheel (270D)" ) // Not working correctly ! } seems to work ok to me! (minwah)
PORT_DIPSETTING( 0x0000, "Wheel (270A)" ) // Not working correctly in race }
PORT_DIPNAME( 0x2000, 0x2000, "Optional Mode Of Pedal Function" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x2000, "Microswitch" ) // "This mode also corresponds to the two buttons used with joystick."

View File

@ -1331,9 +1331,9 @@ static MACHINE_DRIVER_START( konamigx )
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
/* These parameters are actual value written to the CCU.
tbyahhoo attract mode desync is caused by another matter. */
tbyahhoo attract mode desync is caused by another matter. */
// MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600))
// MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
MDRV_SCREEN_SIZE(64*8, 32*8)
MDRV_SCREEN_VISIBLE_AREA(24, 24+288-1, 16, 16+224-1)

View File

@ -57,7 +57,7 @@ static READ8_HANDLER( key_matrix_r )
{ "KEY5", "KEY6", "KEY7", "KEY8", "KEY9" },
{ "KEY0", "KEY1", "KEY2", "KEY3", "KEY4" }
};
ret = 0xff;
p = ~input_sel & 0x1f;

View File

@ -139,7 +139,7 @@ static READ16_HANDLER( spyhunt2_port_0_r )
int result = input_port_read(machine, "IN0");
int which = (control_word >> 3) & 3;
int analog = input_port_read(machine, portnames[which]);
return result | ((soundsgood_status_r(machine, 0) & 1) << 5) | (analog << 8);
}

View File

@ -502,7 +502,7 @@ static WRITE32_HANDLER( io20_w )
static READ32_HANDLER( parallel_port_r )
{
UINT32 r = 0;
// static const char *portnames[] = { "IN0", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6", "IN7" };
// static const char *portnames[] = { "IN0", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6", "IN7" };
if (ACCESSING_BITS_8_15)
{

View File

@ -2980,13 +2980,13 @@ INPUT_PORTS_END
static INPUT_PORTS_START( lastfort )
PORT_START_TAG("IN0") /*$c00004*/
COINS
PORT_START_TAG("IN1") /*$c00006*/
JOY_LSB(1, BUTTON1, UNKNOWN, UNKNOWN, UNKNOWN) /* BUTTON2 and BUTTON3 in "test mode" only*/
PORT_START_TAG("IN2") /*$c00008*/
JOY_LSB(2, BUTTON1, UNKNOWN, UNKNOWN, UNKNOWN) /*BUTTON2 and BUTTON3 in "test mode" only*/
PORT_START_TAG("DSW0") /*$c0000a*/
COINAGE_DSW
@ -3027,7 +3027,7 @@ INPUT_PORTS_END
/* Same as 'lastfort' but WORKING "Tiles" Dip Switch */
static INPUT_PORTS_START( lastfero )
PORT_INCLUDE( lastfort )
PORT_MODIFY("DSW1")
PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) // Timer speed
PORT_DIPSETTING( 0x0000, DEF_STR( Easiest ) ) // Slowest

View File

@ -167,7 +167,7 @@ static INPUT_PORTS_START( mexico86 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START_TAG("DSW0")
PORT_START_TAG("DSW0")
/* When Bit 1 is On, the machine waits a signal from another one */
/* Seems like if you can join two cabinets, one as master */
/* and the other as slave, probably to play four players */

View File

@ -742,7 +742,7 @@ static ADDRESS_MAP_START( hostmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x13ffff) AM_ROM /* 68000 Code ROM and Dr. Math object data */
AM_RANGE(0x200000, 0x20ffff) AM_RAM /* Battery-backed SRAM (64kB) & DS1215 */
AM_RANGE(0x800000, 0x83ffff) AM_RAM /* 68000/AM29000 shared RAM (256kB) */
AM_RANGE(0x900000, 0x900001) AM_NOP //WRITE(mystery_w) /* ??????? 16-bit write here. rset? */
AM_RANGE(0x900000, 0x900001) AM_NOP //WRITE(mystery_w) /* ??????? 16-bit write here. rset? */
AM_RANGE(0x920000, 0x920001) AM_READ_PORT("IN1") /* User inputs C and D */
AM_RANGE(0x940000, 0x940001) AM_READ_PORT("IN0") /* User inputs A and B */
AM_RANGE(0x960000, 0x960001) AM_NOP /* Lamps */
@ -761,8 +761,8 @@ static ADDRESS_MAP_START( vgbmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE(&micro3d_sprite_vram) /* 2 Banks */
AM_RANGE(0x00800000, 0x00bfffff) AM_RAM /* 512kB Main DRAM */
AM_RANGE(0x00c00000, 0x00c0000f) AM_READ_PORT("VGB") /* TI Monitor Mode switch */
AM_RANGE(0x00e00000, 0x00e0000f) AM_RAM //WRITE(mystery2_w) /* CREGCLK ??? byte write here. */
AM_RANGE(0x02000000, 0x0200ffff) AM_RAM_WRITE(paletteram16_BBBBBRRRRRGGGGGG_word_w) AM_BASE(&paletteram16) // AM_RANGE(0x02010000, 0x027fffff) AM_RAM /* ??????????? Mirror of VRAM??? */
AM_RANGE(0x00e00000, 0x00e0000f) AM_RAM //WRITE(mystery2_w) /* CREGCLK ??? byte write here. */
AM_RANGE(0x02000000, 0x0200ffff) AM_RAM_WRITE(paletteram16_BBBBBRRRRRGGGGGG_word_w) AM_BASE(&paletteram16) // AM_RANGE(0x02010000, 0x027fffff) AM_RAM /* ??????????? Mirror of VRAM??? */
AM_RANGE(0x02600000, 0x0260000f) AM_RAM /* XFER3dk???? 16-bit write */
AM_RANGE(0x02c00000, 0x02c0003f) AM_READ(ti_uart_r) /* SCN UART */
AM_RANGE(0x02e00000, 0x02e0003f) AM_WRITE(ti_uart_w)

View File

@ -164,7 +164,7 @@ static TIMER_CALLBACK( adc_ready )
static WRITE32_HANDLER( midvunit_adc_w )
{
static const char *adcnames[] = { "WHEEL", "ACCEL", "BRAKE" };
if (!(control_data & 0x20))
{
int which = (data >> adc_shift) - 4;

View File

@ -214,7 +214,7 @@ static READ8_HANDLER( block_input_r )
static int dir[2];
static const char *dialnames[] = { "DIAL1", "DIAL2" };
static const char *portnames[] = { "IN1", "IN2" };
if (dial_selected)
{
int delta;
@ -632,7 +632,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( mgakuen )
PORT_INCLUDE( mj_common )
PORT_START_TAG("DSW1") /* DSW1 */
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )

View File

@ -643,11 +643,11 @@ static READ16_HANDLER( io_r )
{
static const char *analognames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" };
static const char *inputnames[] = { "IN0", "IN1", "IN2" };
if(offset < 0x8)
return input_port_read(machine, analognames[offset]);
if(offset < 0x10)
if(offset < 0x10)
{
offset -= 0x8;
if(offset < 3)

View File

@ -953,7 +953,7 @@ static MACHINE_DRIVER_START( mystwarr )
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
MDRV_SCREEN_ADD("main", RASTER)
// MDRV_SCREEN_REFRESH_RATE(60)
// MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)

View File

@ -204,7 +204,7 @@ static int tmpz84c011_pio_r(running_machine *machine, int offset)
portdata = input_port_read(machine, "KEY4");
break;
default:
portdata = (input_port_read(machine, "KEY0") & input_port_read(machine, "KEY1") & input_port_read(machine, "KEY2")
portdata = (input_port_read(machine, "KEY0") & input_port_read(machine, "KEY1") & input_port_read(machine, "KEY2")
& input_port_read(machine, "KEY3") & input_port_read(machine, "KEY4"));
break;
}
@ -229,7 +229,7 @@ static int tmpz84c011_pio_r(running_machine *machine, int offset)
portdata = input_port_read(machine, "KEY9");
break;
default:
portdata = (input_port_read(machine, "KEY5") & input_port_read(machine, "KEY6") & input_port_read(machine, "KEY7")
portdata = (input_port_read(machine, "KEY5") & input_port_read(machine, "KEY6") & input_port_read(machine, "KEY7")
& input_port_read(machine, "KEY8") & input_port_read(machine, "KEY9"));
break;
}
@ -1756,13 +1756,13 @@ ADDRESS_MAP_END
/********************************************************************************
These Nichibutsu Mahjong games use two different but very similar control ports:
- the 1st type is the common control panel used by many other nbmj* drivers
- the 2nd type also include coins and service bits
- the 1st type is the common control panel used by many other nbmj* drivers
- the 2nd type also include coins and service bits
********************************************************************************/
static INPUT_PORTS_START( nbmjtype2 )
PORT_INCLUDE( nbmjcontrols )
PORT_MODIFY("KEY4")
PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )

View File

@ -281,8 +281,8 @@ static READ16_HANDLER( musobana_inputport_0_r )
case 0x04: portdata = ((input_port_read(machine, "KEY2") << 8) | (input_port_read(machine, "KEY7"))); break;
case 0x08: portdata = ((input_port_read(machine, "KEY3") << 8) | (input_port_read(machine, "KEY8"))); break;
case 0x10: portdata = ((input_port_read(machine, "KEY4") << 8) | (input_port_read(machine, "KEY9"))); break;
default: portdata = (((input_port_read(machine, "KEY0") << 8) | (input_port_read(machine, "KEY5")))) & (((input_port_read(machine, "KEY1") << 8) | (input_port_read(machine, "KEY6"))))
& (((input_port_read(machine, "KEY2") << 8) | (input_port_read(machine, "KEY7")))) & (((input_port_read(machine, "KEY3") << 8) | (input_port_read(machine, "KEY8"))))
default: portdata = (((input_port_read(machine, "KEY0") << 8) | (input_port_read(machine, "KEY5")))) & (((input_port_read(machine, "KEY1") << 8) | (input_port_read(machine, "KEY6"))))
& (((input_port_read(machine, "KEY2") << 8) | (input_port_read(machine, "KEY7")))) & (((input_port_read(machine, "KEY3") << 8) | (input_port_read(machine, "KEY8"))))
& (((input_port_read(machine, "KEY4") << 8) | (input_port_read(machine, "KEY9")))); break;
}

View File

@ -2893,7 +2893,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( stagger1 )
PORT_INCLUDE( afega_common )
PORT_START_TAG("DSW1") // $080004.w
PORT_SERVICE( 0x0001, IP_ACTIVE_LOW )
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Demo_Sounds ) )

View File

@ -1420,7 +1420,7 @@ static INPUT_PORTS_START( tengai )
PSIKYO_PORT_PLAYER1
PORT_START_TAG("COIN") // IN1PORT_START_TAG("DSW1") // IN2 - c00002&3
PORT_START_TAG("COIN") // IN1PORT_START_TAG("DSW1") // IN2 - c00002&3
PSIKYO_PORT_COIN
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )

View File

@ -525,7 +525,7 @@ static MACHINE_START( seattle )
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_END, 0x1fc7ffff);
cpunum_set_info_ptr(0, CPUINFO_PTR_MIPS3_FASTRAM_BASE, rombase);
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_READONLY, 1);
/* register for save states */
state_save_register_global_array(galileo.reg);
state_save_register_global(galileo.dma_active);

View File

@ -718,7 +718,7 @@ static INPUT_PORTS_START( zektor )
PORT_MODIFY("D5D4")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) /* P1.15 */
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* P1.19 */
PORT_MODIFY("FC")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START2 )

View File

@ -291,15 +291,15 @@ static VIDEO_UPDATE(srmp6)
}
memcpy(sprram_old, sprram, 0x80000);
if(input_code_pressed_once(KEYCODE_Q))
{
FILE *p=fopen("tileram.bin","wb");
fwrite(tileram,1,0x100000*16,p);
fclose(p);
}
return 0;
}
@ -561,8 +561,8 @@ static ADDRESS_MAP_START( srmp6, ADDRESS_SPACE_PROGRAM, 16 )
// AM_RANGE(0x5fff00, 0x5fffff) AM_WRITE(dma_w) AM_BASE(&dmaram)
AM_RANGE(0x4c0000, 0x4c006f) AM_READWRITE(video_regs_r, video_regs_w) AM_BASE(&video_regs) // ? gfx regs ST-0026 NiLe
AM_RANGE(0x4e0000, 0x4e00ff) AM_READWRITE(nile_snd_r, nile_snd_w) AM_BASE(&nile_sound_regs)
AM_RANGE(0x4e0100, 0x4e0101) AM_READWRITE(nile_sndctrl_r, nile_sndctrl_w)
AM_RANGE(0x4e0000, 0x4e00ff) AM_READWRITE(nile_snd_r, nile_snd_w) AM_BASE(&nile_sound_regs)
AM_RANGE(0x4e0100, 0x4e0101) AM_READWRITE(nile_sndctrl_r, nile_sndctrl_w)
// AM_RANGE(0x4e0110, 0x4e0111) AM_NOP // ? accessed once ($268dc, written $b.w)
// AM_RANGE(0x5fff00, 0x5fff1f) AM_RAM // ? see routine $5ca8, video_regs related ???

View File

@ -1413,7 +1413,7 @@ static INPUT_PORTS_START( fncywld )
PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) ) // duplicated setting
// PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) ) // duplicated setting
PORT_DIPSETTING( 0xe0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_3C ) )
@ -1909,8 +1909,8 @@ static INPUT_PORTS_START( dquizgo )
PORT_DIPSETTING( 0x02, "Level 7" )
PORT_DIPSETTING( 0x0c, "Level 8" )
PORT_DIPNAME( 0x70, 0x70, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,3,2")
// PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
// PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
// PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
// PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x70, DEF_STR( 1C_1C ) )

View File

@ -559,7 +559,7 @@ static MACHINE_START( vegas )
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_END, 0x1fc7ffff);
cpunum_set_info_ptr(0, CPUINFO_PTR_MIPS3_FASTRAM_BASE, rombase);
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_READONLY, 1);
/* register for save states */
state_save_register_global(nile_irq_state);
state_save_register_global(ide_irq_state);

View File

@ -1305,7 +1305,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( inferno )
PORT_START_TAG("IN0")
PORT_START_TAG("IN0")
PORT_BIT( 0xFF, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(williams_mux_r, "INP1\0INP2")
PORT_START_TAG("IN1")

View File

@ -476,7 +476,7 @@ static MACHINE_DRIVER_START( xexex )
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_BEFORE_VBLANK)
MDRV_SCREEN_ADD("main", RASTER)
// MDRV_SCREEN_REFRESH_RATE(8000000/512/288)
// MDRV_SCREEN_REFRESH_RATE(8000000/512/288)
MDRV_SCREEN_RAW_PARAMS(8000000, 384+33+40+55, 0, 383, 256+12+6+14, 0, 255)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)

View File

@ -306,7 +306,7 @@ static CUSTOM_INPUT( adcdo_r )
static READ8_HANDLER( sysreg_r )
{
UINT32 r = 0;
switch (offset)
{
case 0: /* I/O port 0 */
@ -315,17 +315,17 @@ static READ8_HANDLER( sysreg_r )
case 3: /* System Port 0 */
r = input_port_read_indexed(machine, offset);
break;
case 4: /* System Port 1 */
/*
0x80 = PARAACK
0x40 = unused
0x20 = SARS (A/D busy flag)
0x10 = EEPDO (EEPROM DO)
*/
/*
0x80 = PARAACK
0x40 = unused
0x20 = SARS (A/D busy flag)
0x10 = EEPDO (EEPROM DO)
*/
r = (adc083x_sars_read(0) << 5) | (eeprom_read_bit() << 4);
break;
case 5: /* Parallel data port */
break;
}
@ -339,44 +339,44 @@ static WRITE8_HANDLER( sysreg_w )
case 0: /* LED Register 0 */
led_reg0 = data;
break;
case 1: /* LED Register 1 */
led_reg1 = data;
break;
case 2: /* Parallel data register */
mame_printf_debug("Parallel data = %02X\n", data);
break;
case 3: /* System Register 0 */
/*
0x80 = unused
0x40 = COINREQ1
0x20 = COINREQ2
0x10 = SNDRES
0x08 = unused
0x04 = EEPCS
0x02 = EEPCLK
0x01 = EEPDI
*/
/*
0x80 = unused
0x40 = COINREQ1
0x20 = COINREQ2
0x10 = SNDRES
0x08 = unused
0x04 = EEPCS
0x02 = EEPCLK
0x01 = EEPDI
*/
eeprom_write_bit((data & 0x01) ? 1 : 0);
eeprom_set_clock_line((data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
eeprom_set_cs_line((data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
mame_printf_debug("System register 0 = %02X\n", data);
break;
case 4: /* System Register 1 */
/*
0x80 = EXRES1
0x40 = EXRES0
0x20 = EXID1
0x10 = EXID0
0x08 = unused
0x04 = ADCS (ADC CS)
0x02 = ADDI (ADC DI)
0x01 = ADDSCLK (ADC SCLK)
*/
0x80 = EXRES1
0x40 = EXRES0
0x20 = EXID1
0x10 = EXID0
0x08 = unused
0x04 = ADCS (ADC CS)
0x02 = ADDI (ADC DI)
0x01 = ADDSCLK (ADC SCLK)
*/
if (data & 0x80) /* CG Board 1 IRQ Ack */
cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
if (data & 0x40) /* CG Board 0 IRQ Ack */
@ -390,8 +390,8 @@ static WRITE8_HANDLER( sysreg_w )
case 5: /* System Register 2 */
/*
0x01 = AFE
*/
0x01 = AFE
*/
if (data & 0x01)
watchdog_reset(machine);
break;

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@ -60,7 +60,7 @@ void init_konami_cgboard(int num_boards, int type)
nwk_fifo[i] = auto_malloc(sizeof(UINT32) * 0x800);
nwk_ram[i] = auto_malloc(sizeof(UINT32) * 0x2000);
state_save_register_item_array("konppc", i, dsp_comm_ppc[i]);
state_save_register_item_array("konppc", i, dsp_comm_sharc[i]);
state_save_register_item("konppc", i, dsp_shared_ram_bank[i]);

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@ -180,7 +180,7 @@ WRITE16_HANDLER( midxunit_unknown_w )
READ16_HANDLER( midwunit_io_r )
{
static const char *portnames[] = { "IN0", "IN1", "DSW", "IN2" };
/* apply I/O shuffling */
offset = ioshuffle[offset % 16];

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@ -385,7 +385,7 @@ READ8_HANDLER( nb1413m3_inputport0_r )
case NB1413M3_PASTELG:
return ((input_port_read(machine, "SYSTEM") & 0xfe) | (nb1413m3_busyflag & 0x01));
default:
return ((input_port_read(machine, "SYSTEM") & 0xfc) | ((nb1413m3_outcoin_flag & 0x01) << 1) | (nb1413m3_busyflag & 0x01));
return ((input_port_read(machine, "SYSTEM") & 0xfc) | ((nb1413m3_outcoin_flag & 0x01) << 1) | (nb1413m3_busyflag & 0x01));
}
}
@ -414,7 +414,7 @@ READ8_HANDLER( nb1413m3_inputport1_r )
case 0x04: return input_port_read(machine, "KEY2");
case 0x08: return input_port_read(machine, "KEY3");
case 0x10: return input_port_read(machine, "KEY4");
default: return (input_port_read(machine, "KEY0") & input_port_read(machine, "KEY1") & input_port_read(machine, "KEY2")
default: return (input_port_read(machine, "KEY0") & input_port_read(machine, "KEY1") & input_port_read(machine, "KEY2")
& input_port_read(machine, "KEY3") & input_port_read(machine, "KEY4"));
}
}
@ -432,7 +432,7 @@ READ8_HANDLER( nb1413m3_inputport1_r )
case 0x04: return input_port_read(machine, "KEY2");
case 0x08: return input_port_read(machine, "KEY3");
case 0x10: return input_port_read(machine, "KEY4");
default: return (input_port_read(machine, "KEY0") & input_port_read(machine, "KEY1") & input_port_read(machine, "KEY2")
default: return (input_port_read(machine, "KEY0") & input_port_read(machine, "KEY1") & input_port_read(machine, "KEY2")
& input_port_read(machine, "KEY3") & input_port_read(machine, "KEY4"));
}
break;
@ -464,7 +464,7 @@ READ8_HANDLER( nb1413m3_inputport2_r )
case 0x04: return input_port_read(machine, "KEY7");
case 0x08: return input_port_read(machine, "KEY8");
case 0x10: return input_port_read(machine, "KEY9");
default: return (input_port_read(machine, "KEY5") & input_port_read(machine, "KEY6") & input_port_read(machine, "KEY7")
default: return (input_port_read(machine, "KEY5") & input_port_read(machine, "KEY6") & input_port_read(machine, "KEY7")
& input_port_read(machine, "KEY8") & input_port_read(machine, "KEY9"));
}
}
@ -482,7 +482,7 @@ READ8_HANDLER( nb1413m3_inputport2_r )
case 0x04: return input_port_read(machine, "KEY7");
case 0x08: return input_port_read(machine, "KEY8");
case 0x10: return input_port_read(machine, "KEY9");
default: return (input_port_read(machine, "KEY5") & input_port_read(machine, "KEY6") & input_port_read(machine, "KEY7")
default: return (input_port_read(machine, "KEY5") & input_port_read(machine, "KEY6") & input_port_read(machine, "KEY7")
& input_port_read(machine, "KEY8") & input_port_read(machine, "KEY9"));
}
break;

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@ -559,10 +559,10 @@ CUSTOM_INPUT( williams_mux_r )
{
const char *tag = param;
if (port_select != 0)
if (port_select != 0)
tag += strlen(tag) + 1;
return input_port_read(field->port->machine, tag);
return input_port_read(field->port->machine, tag);
}
/*

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@ -180,7 +180,7 @@ static int FLobjcode2tile( int code )
VIDEO_START( namcofl )
{
credits1 = credits2 = 0;
old_coin_state = 0x00;
old_coin_state = 0x00;
//input_port_read_indexed(machine, 3)&0x30;
namco_tilemap_init( NAMCONB1_TILEGFX, memory_region(machine, NAMCONB1_TILEMASKREGION), TilemapCB );

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@ -322,7 +322,7 @@ CUSTOM_INPUT( pleiads_protection_r )
}
/*
Protection. There is a 14 pin part connected to the 8910 Port B D0 labeled DL57S22
Protection. There is a 14 pin part connected to the 8910 Port B D0 labeled DL57S22
Inputs are demangled at 0x1ae6-0x1b04 using the table at 0x1b26
and bit 0 of the data from the AY8910 port B. The equation is:

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@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.125u6 ("__DATE__")";
const char build_version[] = "0.125u7 ("__DATE__")";