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nes ppu: converted to use inline config + removed some unused config values. nw.

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vsnes/playch10: reduce tagmap lookups at runtime. nw.
This commit is contained in:
Fabio Priuli 2014-04-08 09:28:25 +00:00
parent ec2a8a7690
commit 3d7311706d
14 changed files with 92 additions and 185 deletions
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12
src/mame/drivers/cham24.c
View File

@ -291,15 +291,6 @@ void cham24_state::ppu_irq(int *ppu_regs)
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
/* our ppu interface */
static const ppu2c0x_interface ppu_interface =
{
"maincpu",
0, /* gfxlayout num */
0, /* color base */
PPU_MIRROR_NONE /* mirroring */
};
void cham24_state::video_start()
{
}
@ -362,7 +353,8 @@ static MACHINE_CONFIG_START( cham24, cham24_state )
MCFG_PALETTE_ADD("palette", 8*4*16)
MCFG_PALETTE_INIT_OWNER(cham24_state, cham24)
MCFG_PPU2C04_ADD("ppu", ppu_interface)
MCFG_PPU2C04_ADD("ppu")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(cham24_state, ppu_irq)
/* sound hardware */

13
src/mame/drivers/famibox.c
View File

@ -526,15 +526,6 @@ void famibox_state::ppu_irq(int *ppu_regs)
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
/* our ppu interface */
static const ppu2c0x_interface ppu_interface =
{
"maincpu",
0, /* gfxlayout num */
0, /* color base */
PPU_MIRROR_NONE /* mirroring */
};
void famibox_state::video_start()
{
}
@ -596,8 +587,8 @@ static MACHINE_CONFIG_START( famibox, famibox_state )
MCFG_PALETTE_ADD("palette", 8*4*16)
MCFG_PALETTE_INIT_OWNER(famibox_state, famibox)
MCFG_PPU2C04_ADD("ppu", ppu_interface)
MCFG_PPU2C04_ADD("ppu")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(famibox_state, ppu_irq)
/* sound hardware */

12
src/mame/drivers/multigam.c
View File

@ -1155,15 +1155,6 @@ void multigam_state::ppu_irq(int *ppu_regs)
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
/* our ppu interface */
static const ppu2c0x_interface ppu_interface =
{
"maincpu",
0, /* gfxlayout num */
0, /* color base */
PPU_MIRROR_NONE /* mirroring */
};
void multigam_state::video_start()
{
}
@ -1263,7 +1254,8 @@ static MACHINE_CONFIG_START( multigam, multigam_state )
MCFG_PALETTE_ADD("palette", 8*4*16)
MCFG_PALETTE_INIT_OWNER(multigam_state, multigam)
MCFG_PPU2C04_ADD("ppu", ppu_interface)
MCFG_PPU2C04_ADD("ppu")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(multigam_state, ppu_irq)
/* sound hardware */

6
src/mame/drivers/playch10.c
View File

@ -665,7 +665,6 @@ static const nesapu_interface nes_config =
"cart"
};
static MACHINE_CONFIG_START( playch10, playch10_state )
// basic machine hardware
MCFG_CPU_ADD("maincpu", Z80, 8000000/2) // 4 MHz
@ -697,9 +696,10 @@ static MACHINE_CONFIG_START( playch10, playch10_state )
MCFG_SCREEN_UPDATE_DRIVER(playch10_state, screen_update_playch10_bottom)
MCFG_SCREEN_PALETTE("palette")
MCFG_PPU2C03B_ADD("ppu", playch10_ppu_interface)
MCFG_PPU2C03B_ADD("ppu")
MCFG_PPU2C0X_SET_SCREEN("bottom")
MCFG_PPU2C0X_CPU("cart")
MCFG_PPU2C0X_COLORBASE(256)
MCFG_PPU2C0X_SET_NMI(playch10_state, ppu_irq)
// sound hardware

28
src/mame/drivers/vsnes.c
View File

@ -1728,8 +1728,9 @@ static MACHINE_CONFIG_START( vsnes, vsnes_state )
MCFG_PALETTE_INIT_OWNER(vsnes_state,vsnes)
MCFG_VIDEO_START_OVERRIDE(vsnes_state,vsnes)
MCFG_PPU2C04_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C04_ADD("ppu1")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
/* sound hardware */
@ -1746,32 +1747,36 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( jajamaru, vsnes )
MCFG_DEVICE_REMOVE( "ppu1" )
MCFG_PPU2C05_01_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C05_01_ADD("ppu1")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( mightybj, vsnes )
MCFG_DEVICE_REMOVE( "ppu1" )
MCFG_PPU2C05_02_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C05_02_ADD("ppu1")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( vsgshoe, vsnes )
MCFG_DEVICE_REMOVE( "ppu1" )
MCFG_PPU2C05_03_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C05_03_ADD("ppu1")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( topgun, vsnes )
MCFG_DEVICE_REMOVE( "ppu1" )
MCFG_PPU2C05_04_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C05_04_ADD("ppu1")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
MACHINE_CONFIG_END
@ -1809,11 +1814,15 @@ static MACHINE_CONFIG_START( vsdual, vsnes_state )
MCFG_VIDEO_START_OVERRIDE(vsnes_state,vsdual)
MCFG_PPU2C04_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C04_ADD("ppu1")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
MCFG_PPU2C04_ADD("ppu2", vsnes_ppu_interface_2)
MCFG_PPU2C04_ADD("ppu2")
MCFG_PPU2C0X_SET_SCREEN("screen2")
MCFG_PPU2C0X_CPU("sub")
MCFG_PPU2C0X_COLORBASE(512)
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_2)
/* sound hardware */
@ -1848,8 +1857,6 @@ static MACHINE_CONFIG_START( vsnes_bootleg, vsnes_state )
MCFG_CPU_PROGRAM_MAP(vsnes_bootleg_z80_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen1", vsnes_state, irq0_line_hold)
/* video hardware */
MCFG_SCREEN_ADD("screen1", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -1863,7 +1870,8 @@ static MACHINE_CONFIG_START( vsnes_bootleg, vsnes_state )
MCFG_PALETTE_INIT_OWNER(vsnes_state,vsnes)
MCFG_VIDEO_START_OVERRIDE(vsnes_state,vsnes)
MCFG_PPU2C04_ADD("ppu1", vsnes_ppu_interface_1)
MCFG_PPU2C04_ADD("ppu1")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_SCREEN("screen1")
MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)

3
src/mame/includes/playch10.h
View File

@ -142,6 +142,3 @@ public:
void ppu_irq(int *ppu_regs);
void mapper9_latch(offs_t offset);
};
/*----------- defined in video/playch10.c -----------*/
extern const ppu2c0x_interface playch10_ppu_interface;

4
src/mame/includes/vsnes.h
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@ -128,7 +128,3 @@ public:
DECLARE_READ8_MEMBER( vsnes_bootleg_z80_latch_r );
};
/*----------- defined in video/vsnes.c -----------*/
extern const ppu2c0x_interface vsnes_ppu_interface_1;
extern const ppu2c0x_interface vsnes_ppu_interface_2;

5
src/mame/machine/playch10.c
View File

@ -237,7 +237,6 @@ READ8_MEMBER(playch10_state::pc10_in1_r)
/* do the gun thing */
if (m_pc10_gun_controller)
{
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
int trigger = ioport("P1")->read();
int x = ioport("GUNX")->read();
int y = ioport("GUNY")->read();
@ -247,10 +246,10 @@ READ8_MEMBER(playch10_state::pc10_in1_r)
ret |= 0x08;
/* get the pixel at the gun position */
pix = ppu->get_pixel(x, y);
pix = m_ppu->get_pixel(x, y);
/* get the color base from the ppu */
color_base = ppu->get_colorbase();
color_base = m_ppu->get_colorbase();
/* look at the screen and see if the cursor is over a bright pixel */
if ((pix == color_base + 0x20) || (pix == color_base + 0x30) ||

18
src/mame/machine/vsnes.c
View File

@ -343,8 +343,6 @@ DRIVER_INIT_MEMBER(vsnes_state,vsnormal)
WRITE8_MEMBER(vsnes_state::gun_in0_w)
{
ppu2c0x_device *ppu1 = machine().device<ppu2c0x_device>("ppu1");
if (m_do_vrom_bank)
{
/* switch vrom */
@ -363,10 +361,10 @@ WRITE8_MEMBER(vsnes_state::gun_in0_w)
UINT32 pix, color_base;
/* get the pixel at the gun position */
pix = ppu1->get_pixel(x, y);
pix = m_ppu1->get_pixel(x, y);
/* get the color base from the ppu */
color_base = ppu1->get_colorbase();
color_base = m_ppu1->get_colorbase();
/* look at the screen and see if the cursor is over a bright pixel */
if ((pix == color_base + 0x20 ) || (pix == color_base + 0x30) ||
@ -669,7 +667,6 @@ void vsnes_state::mapper4_irq( int scanline, int vblank, int blanked )
WRITE8_MEMBER(vsnes_state::mapper4_w)
{
ppu2c0x_device *ppu1 = machine().device<ppu2c0x_device>("ppu1");
UINT8 MMC3_helper, cmd;
switch (offset & 0x6001)
@ -718,30 +715,25 @@ WRITE8_MEMBER(vsnes_state::mapper4_w)
case 0x2001: /* $a001 - extra RAM enable/disable */
/* ignored - we always enable it */
break;
case 0x4000: /* $c000 - IRQ scanline counter */
m_IRQ_count = data;
break;
case 0x4001: /* $c001 - IRQ scanline latch */
m_IRQ_count_latch = data;
break;
case 0x6000: /* $e000 - Disable IRQs */
m_IRQ_enable = 0;
m_IRQ_count = m_IRQ_count_latch;
ppu1->set_scanline_callback(ppu2c0x_scanline_delegate());
m_ppu1->set_scanline_callback(ppu2c0x_scanline_delegate());
break;
case 0x6001: /* $e001 - Enable IRQs */
m_IRQ_enable = 1;
ppu1->set_scanline_callback(ppu2c0x_scanline_delegate(FUNC(vsnes_state::mapper4_irq),this));
m_ppu1->set_scanline_callback(ppu2c0x_scanline_delegate(FUNC(vsnes_state::mapper4_irq), this));
break;
default:

27
src/mame/video/playch10.c
View File

@ -17,10 +17,8 @@ WRITE8_MEMBER(playch10_state::playch10_videoram_w)
PALETTE_INIT_MEMBER(playch10_state, playch10)
{
const UINT8 *color_prom = memregion("proms")->base();
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
int i;
for (i = 0; i < 256; i++)
for (int i = 0; i < 256; i++)
{
int bit0, bit1, bit2, bit3, r, g, b;
@ -55,7 +53,7 @@ PALETTE_INIT_MEMBER(playch10_state, playch10)
color_prom++;
}
ppu->init_palette_rgb(palette, 256);
m_ppu->init_palette_rgb(palette, 256);
}
void playch10_state::ppu_irq(int *ppu_regs)
@ -64,18 +62,6 @@ void playch10_state::ppu_irq(int *ppu_regs)
m_pc10_int_detect = 1;
}
/* our ppu interface */
/* things like mirroring and whether to use vrom or vram */
/* can be set by calling 'ppu2c0x_override_hardware_options' */
const ppu2c0x_interface playch10_ppu_interface =
{
"cart",
1, /* gfxlayout num */
256, /* color base */
PPU_MIRROR_NONE /* mirroring */
};
TILE_GET_INFO_MEMBER(playch10_state::get_bg_tile_info)
{
UINT8 *videoram = m_videoram;
@ -112,8 +98,6 @@ VIDEO_START_MEMBER(playch10_state,playch10_hboard)
UINT32 playch10_state::screen_update_playch10_single(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
rectangle top_monitor = screen.visible_area();
top_monitor.max_y = (top_monitor.max_y - top_monitor.min_y) / 2;
@ -128,7 +112,7 @@ UINT32 playch10_state::screen_update_playch10_single(screen_device &screen, bitm
if (m_pc10_game_mode)
/* render the ppu */
ppu->render(bitmap, 0, 0, 0, 0 );
m_ppu->render(bitmap, 0, 0, 0, 0);
else
{
/* When the bios is accessing vram, the video circuitry can't access it */
@ -140,15 +124,13 @@ UINT32 playch10_state::screen_update_playch10_single(screen_device &screen, bitm
UINT32 playch10_state::screen_update_playch10_top(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
/* Single Monitor version */
if (m_pc10_bios != 1)
return screen_update_playch10_single(screen, bitmap, cliprect);
if (!m_pc10_dispmask)
/* render the ppu */
ppu->render(bitmap, 0, 0, 0, 0);
m_ppu->render(bitmap, 0, 0, 0, 0);
else
bitmap.fill(0, cliprect);
@ -162,7 +144,6 @@ UINT32 playch10_state::screen_update_playch10_bottom(screen_device &screen, bitm
return screen_update_playch10_single(screen, bitmap, cliprect);
/* When the bios is accessing vram, the video circuitry can't access it */
if (!m_pc10_sdcs)
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
else

13
src/mame/video/ppu2c0x.c
View File

@ -111,18 +111,11 @@ void ppu2c0x_device::set_nmi_delegate(device_t &device,ppu2c0x_nmi_delegate cb)
void ppu2c0x_device::device_config_complete()
{
const ppu2c0x_interface *config = reinterpret_cast<const ppu2c0x_interface *>(static_config());
assert(config);
/* reset the callbacks */
m_latch = ppu2c0x_latch_delegate();
m_scanline_callback_proc = ppu2c0x_scanline_delegate();
m_hblank_callback_proc = ppu2c0x_hblank_delegate();
m_vidaccess_callback_proc = ppu2c0x_vidaccess_delegate();
m_color_base = config->color_base;
m_cpu_tag = config->cpu_tag;
}
ppu2c0x_device::ppu2c0x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
@ -130,6 +123,7 @@ ppu2c0x_device::ppu2c0x_device(const machine_config &mconfig, device_type type,
device_memory_interface(mconfig, *this),
device_video_interface(mconfig, *this),
m_space_config("videoram", ENDIANNESS_LITTLE, 8, 17, 0, NULL, *ADDRESS_MAP_NAME(ppu2c0x)),
m_cpu(*this),
m_scanline(0), // reset the scanline count
m_refresh_data(0),
m_refresh_latch(0),
@ -142,6 +136,7 @@ ppu2c0x_device::ppu2c0x_device(const machine_config &mconfig, device_type type,
m_tile_page(0),
m_sprite_page(0),
m_back_color(0),
m_color_base(0),
m_scan_scale(1), // set the scan scale (this is for dual monitor vertical setups)
m_tilecount(0),
m_draw_phase(0)
@ -210,10 +205,6 @@ ppu2c05_04_device::ppu2c05_04_device(const machine_config &mconfig, const char *
void ppu2c0x_device::device_start()
{
m_cpu = machine().device<cpu_device>( m_cpu_tag );
assert(m_cpu);
// bind our handler
m_nmi_callback_proc.bind_relative_to(*owner());

67
src/mame/video/ppu2c0x.h
View File

@ -83,32 +83,38 @@ enum
// INTERFACE CONFIGURATION MACROS
///*************************************************************************
#define MCFG_PPU2C0X_ADD(_tag, _type, _intrf) \
MCFG_DEVICE_ADD(_tag, _type, 0) \
MCFG_DEVICE_CONFIG(_intrf)
#define MCFG_PPU2C0X_ADD(_tag, _type) \
MCFG_DEVICE_ADD(_tag, _type, 0)
#define MCFG_PPU2C02_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C02, _intrf)
#define MCFG_PPU2C03B_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C03B, _intrf)
#define MCFG_PPU2C04_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C04, _intrf)
#define MCFG_PPU2C07_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C07, _intrf)
#define MCFG_PPU2C05_01_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_01, _intrf)
#define MCFG_PPU2C05_02_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_02, _intrf)
#define MCFG_PPU2C05_03_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_03, _intrf)
#define MCFG_PPU2C05_04_ADD(_tag, _intrf) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_04, _intrf)
#define MCFG_PPU2C02_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C02)
#define MCFG_PPU2C03B_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C03B)
#define MCFG_PPU2C04_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C04)
#define MCFG_PPU2C07_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C07)
#define MCFG_PPU2C05_01_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_01)
#define MCFG_PPU2C05_02_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_02)
#define MCFG_PPU2C05_03_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_03)
#define MCFG_PPU2C05_04_ADD(_tag) \
MCFG_PPU2C0X_ADD(_tag, PPU_2C05_04)
#define MCFG_PPU2C0X_SET_SCREEN MCFG_VIDEO_SET_SCREEN
#define MCFG_PPU2C0X_CPU(_tag) \
ppu2c0x_device::set_cpu_tag(*device, "^"_tag);
#define MCFG_PPU2C0X_COLORBASE(_color) \
ppu2c0x_device::set_color_base(*device, _color);
#define MCFG_PPU2C0X_SET_NMI(_class, _method) \
ppu2c0x_device::set_nmi_delegate(*device, ppu2c0x_nmi_delegate(&_class::_method, #_class "::" #_method, NULL, (_class *)0));
///*************************************************************************
// TYPE DEFINITIONS
///*************************************************************************
@ -119,23 +125,11 @@ typedef device_delegate<int (int address, int data)> ppu2c0x_vidaccess_delegate;
typedef device_delegate<void (offs_t offset)> ppu2c0x_latch_delegate;
// ======================> ppu2c0x_interface
struct ppu2c0x_interface
{
const char *cpu_tag;
int gfx_layout_number; /* gfx layout number used by each chip */
int color_base; /* color base to use per ppu */
int mirroring; /* mirroring options (PPU_MIRROR_* flag) */
};
// ======================> ppu2c0x_device
class ppu2c0x_device : public device_t,
public device_memory_interface,
public device_video_interface,
public ppu2c0x_interface
public device_video_interface
{
public:
// construction/destruction
@ -154,6 +148,9 @@ public:
// address space configurations
const address_space_config m_space_config;
static void set_cpu_tag(device_t &device, const char *tag) { downcast<ppu2c0x_device &>(device).m_cpu.set_tag(tag); }
static void set_color_base(device_t &device, int colorbase) { downcast<ppu2c0x_device &>(device).m_color_base = colorbase; }
static void set_nmi_delegate(device_t &device, ppu2c0x_nmi_delegate cb);
/* routines */
void init_palette( palette_device &palette, int first_entry );
@ -173,7 +170,6 @@ public:
void set_scanline_callback( ppu2c0x_scanline_delegate cb ) { m_scanline_callback_proc = cb; m_scanline_callback_proc.bind_relative_to(*owner()); };
void set_hblank_callback( ppu2c0x_hblank_delegate cb ) { m_hblank_callback_proc = cb; m_hblank_callback_proc.bind_relative_to(*owner()); };
void set_vidaccess_callback( ppu2c0x_vidaccess_delegate cb ) { m_vidaccess_callback_proc = cb; m_vidaccess_callback_proc.bind_relative_to(*owner()); };
static void set_nmi_delegate(device_t &device,ppu2c0x_nmi_delegate cb);
void set_scanlines_per_frame( int scanlines ) { m_scanlines_per_frame = scanlines; };
// MMC5 has to be able to check this
@ -186,7 +182,8 @@ public:
// void update_screen(bitmap_t &bitmap, const rectangle &cliprect);
cpu_device *m_cpu;
required_device<cpu_device> m_cpu;
bitmap_ind16 *m_bitmap; /* target bitmap */
UINT8 *m_spriteram; /* sprite ram */
pen_t *m_colortable; /* color table modified at run time */
@ -222,8 +219,6 @@ public:
emu_timer *m_nmi_timer; /* NMI timer */
emu_timer *m_scanline_timer; /* scanline timer */
const char *m_cpu_tag;
private:
static const device_timer_id TIMER_HBLANK = 0;
static const device_timer_id TIMER_NMI = 1;

34
src/mame/video/vsnes.c
View File

@ -5,16 +5,13 @@
PALETTE_INIT_MEMBER(vsnes_state,vsnes)
{
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu1");
ppu->init_palette_rgb(palette, 0 );
m_ppu1->init_palette_rgb(palette, 0);
}
PALETTE_INIT_MEMBER(vsnes_state,vsdual)
{
ppu2c0x_device *ppu1 = machine().device<ppu2c0x_device>("ppu1");
ppu2c0x_device *ppu2 = machine().device<ppu2c0x_device>("ppu2");
ppu1->init_palette_rgb(palette, 0 );
ppu2->init_palette_rgb(palette, 8*4*16 );
m_ppu1->init_palette_rgb(palette, 0);
m_ppu2->init_palette_rgb(palette, 8 * 4 * 16);
}
void vsnes_state::ppu_irq_1(int *ppu_regs)
@ -27,24 +24,6 @@ void vsnes_state::ppu_irq_2(int *ppu_regs)
m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
/* our ppu interface */
const ppu2c0x_interface vsnes_ppu_interface_1 =
{
"maincpu",
0, /* gfxlayout num */
0, /* color base */
PPU_MIRROR_NONE /* mirroring */
};
/* our ppu interface for dual games */
const ppu2c0x_interface vsnes_ppu_interface_2 =
{
"sub",
1, /* gfxlayout num */
512, /* color base */
PPU_MIRROR_NONE /* mirroring */
};
VIDEO_START_MEMBER(vsnes_state,vsnes )
{
}
@ -58,17 +37,16 @@ VIDEO_START_MEMBER(vsnes_state,vsdual )
Display refresh
***************************************************************************/
UINT32 vsnes_state::screen_update_vsnes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
/* render the ppu */
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu1");
ppu->render(bitmap, 0, 0, 0, 0);
m_ppu1->render(bitmap, 0, 0, 0, 0);
return 0;
}
UINT32 vsnes_state::screen_update_vsnes_bottom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu2");
ppu->render(bitmap, 0, 0, 0, 0);
m_ppu2->render(bitmap, 0, 0, 0, 0);
return 0;
}

17
src/mess/drivers/nes.c
View File

@ -652,14 +652,6 @@ void nes_state::ppu_nmi(int *ppu_regs)
}
static const ppu2c0x_interface nes_ppu_interface =
{
"maincpu",
0,
0,
PPU_MIRROR_NONE
};
static const floppy_interface nes_floppy_interface =
{
DEVCB_NULL,
@ -710,7 +702,8 @@ static MACHINE_CONFIG_START( nes, nes_state )
MCFG_PALETTE_ADD("palette", 4*16*8)
MCFG_PALETTE_INIT_OWNER(nes_state, nes)
MCFG_PPU2C02_ADD("ppu", nes_ppu_interface)
MCFG_PPU2C02_ADD("ppu")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(nes_state, ppu_nmi)
/* sound hardware */
@ -734,7 +727,8 @@ static MACHINE_CONFIG_DERIVED( nespal, nes )
MCFG_CPU_CLOCK(PAL_CLOCK)
MCFG_DEVICE_REMOVE("ppu")
MCFG_PPU2C07_ADD("ppu", nes_ppu_interface)
MCFG_PPU2C07_ADD("ppu")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(nes_state, ppu_nmi)
/* video hardware */
@ -757,7 +751,8 @@ static MACHINE_CONFIG_DERIVED( dendy, nes )
MCFG_CPU_CLOCK( 26601712/15 ) /* 26.601712MHz / 15 == 1.77344746666... MHz */
MCFG_DEVICE_REMOVE("ppu")
MCFG_PPU2C07_ADD("ppu", nes_ppu_interface)
MCFG_PPU2C07_ADD("ppu")
MCFG_PPU2C0X_CPU("maincpu")
MCFG_PPU2C0X_SET_NMI(nes_state, ppu_nmi)
/* video hardware */