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make the TMS34010 a bit safer when 8-bit writes are used (Megaphoenix does this..) I suspect skeetsht will need more improvements along these lines because it's hooked up to an 8-bit CPU?

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This at least means we don't have to overclock the 68k by a silly amount on on megaphx, and fixes round 4, although it doesn't fix all the graphic corruption, of note round 6.
This commit is contained in:
David Haywood 2014-03-18 15:02:26 +00:00
parent 52ca000b5b
commit 3d7638f066
15 changed files with 69 additions and 159 deletions
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91
src/emu/cpu/tms34010/tms34010.c
View File

@ -1224,50 +1224,57 @@ WRITE16_MEMBER( tms34010_device::io_register_w )
case REG_HSTCTLH:
/* if the CPU is halting itself, stop execution right away */
if ((data & 0x8000) && !tms->external_host_access)
tms->icount = 0;
tms->device->set_input_line(INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE);
if (mem_mask & 0xff00)
{
if ((data & 0x8000) && !tms->external_host_access)
tms->icount = 0;
/* NMI issued? */
if (data & 0x0100)
tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), 0, tms);
tms->device->set_input_line(INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE);
/* NMI issued? */
if (data & 0x0100)
tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), 0, tms);
}
break;
case REG_HSTCTLL:
/* the TMS34010 can change MSGOUT, can set INTOUT, and can clear INTIN */
if (!tms->external_host_access)
if (mem_mask & 0x00ff)
{
newreg = (oldreg & 0xff8f) | (data & 0x0070);
newreg |= data & 0x0080;
newreg &= data | ~0x0008;
}
/* the TMS34010 can change MSGOUT, can set INTOUT, and can clear INTIN */
if (!tms->external_host_access)
{
newreg = (oldreg & 0xff8f) | (data & 0x0070);
newreg |= data & 0x0080;
newreg &= data | ~0x0008;
}
/* the host can change MSGIN, can set INTIN, and can clear INTOUT */
else
{
newreg = (oldreg & 0xfff8) | (data & 0x0007);
newreg &= data | ~0x0080;
newreg |= data & 0x0008;
}
IOREG(tms, offset) = newreg;
/* the host can change MSGIN, can set INTIN, and can clear INTOUT */
else
{
newreg = (oldreg & 0xfff8) | (data & 0x0007);
newreg &= data | ~0x0080;
newreg |= data & 0x0008;
}
IOREG(tms, offset) = newreg;
/* the TMS34010 can set output interrupt? */
if (!(oldreg & 0x0080) && (newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space.device(), 1);
}
else if ((oldreg & 0x0080) && !(newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space.device(), 0);
}
/* the TMS34010 can set output interrupt? */
if (!(oldreg & 0x0080) && (newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space.device(), 1);
}
else if ((oldreg & 0x0080) && !(newreg & 0x0080))
{
if (tms->config->output_int)
(*tms->config->output_int)(&space.device(), 0);
}
/* input interrupt? (should really be state-based, but the functions don't exist!) */
if (!(oldreg & 0x0008) && (newreg & 0x0008))
tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), TMS34010_HI, tms);
else if ((oldreg & 0x0008) && !(newreg & 0x0008))
IOREG(tms, REG_INTPEND) &= ~TMS34010_HI;
/* input interrupt? (should really be state-based, but the functions don't exist!) */
if (!(oldreg & 0x0008) && (newreg & 0x0008))
tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), TMS34010_HI, tms);
else if ((oldreg & 0x0008) && !(newreg & 0x0008))
IOREG(tms, REG_INTPEND) &= ~TMS34010_HI;
}
break;
case REG_CONVSP:
@ -1588,8 +1595,9 @@ static void tms34010_state_postload(tms34010_state *tms)
HOST INTERFACE WRITES
***************************************************************************/
void tms34010_device::host_w(int reg, int data)
WRITE16_MEMBER( tms34010_device::host_w )
{
int reg = offset;
tms34010_state *tms = get_safe_token(this);
unsigned int addr;
@ -1626,8 +1634,8 @@ void tms34010_device::host_w(int reg, int data)
{
tms->external_host_access = TRUE;
address_space &space = tms->device->space(AS_PROGRAM);
io_register_w(space, REG_HSTCTLH, data & 0xff00, 0xffff);
io_register_w(space, REG_HSTCTLL, data & 0x00ff, 0xffff);
if (mem_mask&0xff00) io_register_w(space, REG_HSTCTLH, data & 0xff00, 0xff00);
if (mem_mask&0x00ff) io_register_w(space, REG_HSTCTLL, data & 0x00ff, 0x00ff);
tms->external_host_access = FALSE;
break;
}
@ -1645,12 +1653,13 @@ void tms34010_device::host_w(int reg, int data)
HOST INTERFACE READS
***************************************************************************/
int tms34010_device::host_r(int reg)
READ16_MEMBER( tms34010_device::host_r )
{
int reg = offset;
tms34010_state *tms = get_safe_token(this);
unsigned int addr;
int result = 0;
/* swap to the target cpu */
switch (reg)

4
src/emu/cpu/tms34010/tms34010.h
View File

@ -217,8 +217,8 @@ public:
DECLARE_WRITE16_MEMBER( io_register_w );
DECLARE_READ16_MEMBER( io_register_r );
void host_w(int reg, int data);
int host_r(int reg);
DECLARE_WRITE16_MEMBER(host_w);
DECLARE_READ16_MEMBER(host_r);
};
extern const device_type TMS34010;

25
src/mame/drivers/artmagic.c
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@ -88,25 +88,6 @@ void artmagic_state::machine_reset()
/*************************************
*
* TMS34010 interface
*
*************************************/
READ16_MEMBER(artmagic_state::tms_host_r)
{
return m_tms->host_r(offset);
}
WRITE16_MEMBER(artmagic_state::tms_host_w)
{
m_tms->host_w(offset, data);
}
/*************************************
*
* Misc control memory accesses
@ -439,7 +420,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, artmagic_state )
AM_RANGE(0x300000, 0x300003) AM_WRITE(control_w) AM_SHARE("control")
AM_RANGE(0x300004, 0x300007) AM_WRITE(protection_bit_w)
AM_RANGE(0x360000, 0x360001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x380000, 0x380007) AM_READWRITE(tms_host_r, tms_host_w)
AM_RANGE(0x380000, 0x380007) AM_DEVREADWRITE("tms", tms34010_device, host_r, host_w)
ADDRESS_MAP_END
@ -458,7 +439,7 @@ static ADDRESS_MAP_START( stonebal_map, AS_PROGRAM, 16, artmagic_state )
AM_RANGE(0x300000, 0x300003) AM_WRITE(control_w) AM_SHARE("control")
AM_RANGE(0x300004, 0x300007) AM_WRITE(protection_bit_w)
AM_RANGE(0x340000, 0x340001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x380000, 0x380007) AM_READWRITE(tms_host_r, tms_host_w)
AM_RANGE(0x380000, 0x380007) AM_DEVREADWRITE("tms", tms34010_device, host_r, host_w)
ADDRESS_MAP_END
READ16_MEMBER(artmagic_state::unk_r)
@ -484,7 +465,7 @@ static ADDRESS_MAP_START( shtstar_map, AS_PROGRAM, 16, artmagic_state )
AM_RANGE(0x300000, 0x300003) AM_WRITE(control_w) AM_SHARE("control")
AM_RANGE(0x3c0004, 0x3c0007) AM_WRITE(protection_bit_w)
AM_RANGE(0x340000, 0x340001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x380000, 0x380007) AM_READWRITE(tms_host_r, tms_host_w)
AM_RANGE(0x380000, 0x380007) AM_DEVREADWRITE("tms", tms34010_device, host_r, host_w)
ADDRESS_MAP_END

4
src/mame/drivers/exterm.c
View File

@ -78,13 +78,13 @@
WRITE16_MEMBER(exterm_state::exterm_host_data_w)
{
m_slave->host_w(offset / TOWORD(0x00100000), data);
m_slave->host_w(space,offset / TOWORD(0x00100000), data, 0xffff);
}
READ16_MEMBER(exterm_state::exterm_host_data_r)
{
return m_slave->host_r(offset / TOWORD(0x00100000));
return m_slave->host_r(space,offset / TOWORD(0x00100000), 0xffff);
}

18
src/mame/drivers/jpmimpct.c
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@ -167,22 +167,6 @@ MACHINE_RESET_MEMBER(jpmimpct_state,jpmimpct)
}
/*************************************
*
* TMS34010 host interface
*
*************************************/
WRITE16_MEMBER(jpmimpct_state::m68k_tms_w)
{
m_dsp->host_w(offset, data);
}
READ16_MEMBER(jpmimpct_state::m68k_tms_r)
{
return m_dsp->host_r(offset);
}
/*************************************
*
@ -614,7 +598,7 @@ static ADDRESS_MAP_START( m68k_program_map, AS_PROGRAM, 16, jpmimpct_state )
AM_RANGE(0x00480082, 0x00480083) AM_WRITE(volume_w)
AM_RANGE(0x00480084, 0x00480085) AM_READ(upd7759_r)
AM_RANGE(0x004801e0, 0x004801ff) AM_READWRITE(duart_2_r, duart_2_w)
AM_RANGE(0x00800000, 0x00800007) AM_READWRITE(m68k_tms_r, m68k_tms_w)
AM_RANGE(0x00800000, 0x00800007) AM_DEVREADWRITE("dsp", tms34010_device, host_r, host_w)
AM_RANGE(0x00c00000, 0x00cfffff) AM_ROM
AM_RANGE(0x00d00000, 0x00dfffff) AM_ROM
AM_RANGE(0x00e00000, 0x00efffff) AM_ROM

13
src/mame/drivers/littlerb.c
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@ -127,9 +127,6 @@ public:
#if USE_TMS
required_shared_ptr<UINT16> m_vram;
required_device<palette_device> m_palette;
DECLARE_READ16_MEMBER(tms_host_r);
DECLARE_WRITE16_MEMBER(tms_host_w);
#else
required_shared_ptr<UINT16> m_region4;
UINT16 m_vdp_address_low;
@ -271,7 +268,7 @@ static ADDRESS_MAP_START( littlerb_main, AS_PROGRAM, 16, littlerb_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x200000, 0x203fff) AM_RAM // main ram?
#if USE_TMS
AM_RANGE(0x700000, 0x700007) AM_READWRITE(tms_host_r, tms_host_w)
AM_RANGE(0x700000, 0x700007) AM_DEVREADWRITE("tms", tms34010_device, host_r, host_w)
#else
AM_RANGE(0x700000, 0x700007) AM_READ(littlerb_vdp_r) AM_WRITE(littlerb_vdp_w)
#endif
@ -401,15 +398,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(littlerb_state::littlerb_scanline)
#if USE_TMS
READ16_MEMBER(littlerb_state::tms_host_r)
{
return m_tms->host_r(offset);
}
WRITE16_MEMBER(littlerb_state::tms_host_w)
{
m_tms->host_w(offset, data);
}
static ADDRESS_MAP_START( littlerb_tms_map, AS_PROGRAM, 16, littlerb_state )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("vram")

17
src/mame/drivers/megaphx.c
View File

@ -110,9 +110,6 @@ public:
DECLARE_CUSTOM_INPUT_MEMBER(megaphx_rand_r);
DECLARE_READ16_MEMBER(tms_host_r);
DECLARE_WRITE16_MEMBER(tms_host_w);
DECLARE_READ16_MEMBER(megaphx_0x050002_r);
DECLARE_WRITE16_MEMBER(megaphx_0x050000_w);
DECLARE_READ8_MEMBER(megaphx_sound_sent_r);
@ -175,16 +172,6 @@ CUSTOM_INPUT_MEMBER(megaphx_state::megaphx_rand_r)
READ16_MEMBER(megaphx_state::tms_host_r)
{
return m_tms->host_r(offset);
}
WRITE16_MEMBER(megaphx_state::tms_host_w)
{
m_tms->host_w(offset, data);
}
READ16_MEMBER(megaphx_state::megaphx_0x050002_r)
{
@ -213,7 +200,7 @@ static ADDRESS_MAP_START( megaphx_68k_map, AS_PROGRAM, 16, megaphx_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_REGION("roms67", 0x00000) // or the rom doesn't map here? it contains the service mode grid amongst other things..
AM_RANGE(0x040000, 0x040007) AM_READWRITE(tms_host_r, tms_host_w)
AM_RANGE(0x040000, 0x040007) AM_DEVREADWRITE("tms", tms34010_device, host_r, host_w)
AM_RANGE(0x050000, 0x050001) AM_WRITE(megaphx_0x050000_w) // z80 comms?
AM_RANGE(0x050002, 0x050003) AM_READ(megaphx_0x050002_r) // z80 comms?
@ -735,7 +722,7 @@ static GFXDECODE_START( megaphx )
GFXDECODE_ENTRY( "roms67", 0, megaphxlay, 0x0000, 1 )
GFXDECODE_END
#define FAKE_BOOST 16
#define FAKE_BOOST 1
static MACHINE_CONFIG_START( megaphx, megaphx_state )

2
src/mame/drivers/micro3d.c
View File

@ -204,7 +204,7 @@ static ADDRESS_MAP_START( hostmem, AS_PROGRAM, 16, micro3d_state )
AM_RANGE(0x940000, 0x940001) AM_READ_PORT("INPUTS_A_B")
AM_RANGE(0x960000, 0x960001) AM_WRITE(micro3d_reset_w)
AM_RANGE(0x980000, 0x980001) AM_READWRITE(micro3d_adc_r, micro3d_adc_w)
AM_RANGE(0x9a0000, 0x9a0007) AM_READWRITE(micro3d_tms_host_r, micro3d_tms_host_w)
AM_RANGE(0x9a0000, 0x9a0007) AM_DEVREADWRITE("vgb", tms34010_device, host_r, host_w)
AM_RANGE(0x9c0000, 0x9c0001) AM_NOP /* Lamps */
AM_RANGE(0x9e0000, 0x9e002f) AM_DEVREADWRITE8("mc68901", mc68901_device, read, write, 0xff00)
AM_RANGE(0xa00000, 0xa0003f) AM_DEVREADWRITE8("duart68681", mc68681_device, read, write, 0xff00)

4
src/mame/drivers/skeetsht.c
View File

@ -131,13 +131,13 @@ WRITE8_MEMBER(skeetsht_state::tms_w)
if ((offset & 1) == 0)
m_lastdataw = data;
else
m_tms->host_w(offset >> 1, (m_lastdataw << 8) | data);
m_tms->host_w(space, offset >> 1, (m_lastdataw << 8) | data, 0xffff);
}
READ8_MEMBER(skeetsht_state::tms_r)
{
if ((offset & 1) == 0)
m_lastdatar = m_tms->host_r(offset >> 1);
m_lastdatar = m_tms->host_r(space, offset >> 1, 0xffff);
return m_lastdatar >> ((offset & 1) ? 0 : 8);
}

20
src/mame/drivers/skimaxx.c
View File

@ -66,8 +66,6 @@ public:
UINT32 m_blitter_src_dy;
DECLARE_WRITE32_MEMBER(skimaxx_blitter_w);
DECLARE_READ32_MEMBER(skimaxx_blitter_r);
DECLARE_WRITE32_MEMBER(m68k_tms_w);
DECLARE_READ32_MEMBER(m68k_tms_r);
DECLARE_WRITE32_MEMBER(skimaxx_fpga_ctrl_w);
DECLARE_READ32_MEMBER(unk_r);
DECLARE_READ32_MEMBER(skimaxx_unk1_r);
@ -219,22 +217,6 @@ static void skimaxx_scanline_update(screen_device &screen, bitmap_ind16 &bitmap,
}
/*************************************
*
* TMS34010 host interface
*
*************************************/
WRITE32_MEMBER(skimaxx_state::m68k_tms_w)
{
m_tms->host_w(offset, data);
}
READ32_MEMBER(skimaxx_state::m68k_tms_r)
{
return m_tms->host_r(offset);
}
/*************************************
*
@ -316,7 +298,7 @@ READ32_MEMBER(skimaxx_state::skimaxx_analog_r)
static ADDRESS_MAP_START( 68030_1_map, AS_PROGRAM, 32, skimaxx_state )
AM_RANGE(0x00000000, 0x001fffff) AM_ROM
AM_RANGE(0x10000000, 0x10000003) AM_WRITE(skimaxx_sub_ctrl_w )
AM_RANGE(0x10100000, 0x1010000f) AM_READWRITE(m68k_tms_r, m68k_tms_w)//AM_NOP
AM_RANGE(0x10100000, 0x1010000f) AM_DEVREADWRITE16("tms", tms34010_device, host_r, host_w, 0x0000ffff)
// AM_RANGE(0x10180000, 0x10187fff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x10180000, 0x1018ffff) AM_RAM AM_SHARE("share1") // above 10188000 accessed at level end (game bug?)
AM_RANGE(0x20000000, 0x20000003) AM_READNOP // watchdog_r?

2
src/mame/includes/artmagic.h
View File

@ -47,8 +47,6 @@ public:
UINT16 m_blitter_data[8];
UINT8 m_blitter_page;
attotime m_blitter_busy_until;
DECLARE_READ16_MEMBER(tms_host_r);
DECLARE_WRITE16_MEMBER(tms_host_w);
DECLARE_WRITE16_MEMBER(control_w);
DECLARE_READ16_MEMBER(ultennis_hack_r);
DECLARE_WRITE16_MEMBER(protection_bit_w);

2
src/mame/includes/jpmimpct.h
View File

@ -81,8 +81,6 @@ public:
optional_device<roc10937_t> m_vfd;
optional_shared_ptr<UINT16> m_vram;
struct bt477_t m_bt477;
DECLARE_WRITE16_MEMBER(m68k_tms_w);
DECLARE_READ16_MEMBER(m68k_tms_r);
DECLARE_READ16_MEMBER(duart_1_r);
DECLARE_WRITE16_MEMBER(duart_1_w);
DECLARE_READ16_MEMBER(duart_2_r);

2
src/mame/includes/micro3d.h
View File

@ -95,8 +95,6 @@ public:
DECLARE_READ16_MEMBER(micro3d_ti_uart_r);
DECLARE_WRITE32_MEMBER(micro3d_scc_w);
DECLARE_READ32_MEMBER(micro3d_scc_r);
DECLARE_READ16_MEMBER(micro3d_tms_host_r);
DECLARE_WRITE16_MEMBER(micro3d_tms_host_w);
DECLARE_WRITE32_MEMBER(micro3d_mac1_w);
DECLARE_READ32_MEMBER(micro3d_mac2_r);
DECLARE_WRITE32_MEMBER(micro3d_mac2_w);

8
src/mame/machine/harddriv.c
View File

@ -156,7 +156,7 @@ READ16_MEMBER( harddriv_state::hd68k_gsp_io_r )
UINT16 result;
offset = (offset / 2) ^ 1;
m_hd34010_host_access = TRUE;
result = m_gsp->host_r(offset);
result = m_gsp->host_r(space, offset, 0xffff);
m_hd34010_host_access = FALSE;
return result;
}
@ -166,7 +166,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_gsp_io_w )
{
offset = (offset / 2) ^ 1;
m_hd34010_host_access = TRUE;
m_gsp->host_w(offset, data);
m_gsp->host_w(space, offset, data, 0xffff);
m_hd34010_host_access = FALSE;
}
@ -183,7 +183,7 @@ READ16_MEMBER( harddriv_state::hd68k_msp_io_r )
UINT16 result;
offset = (offset / 2) ^ 1;
m_hd34010_host_access = TRUE;
result = (m_msp != NULL) ? m_msp->host_r(offset) : 0xffff;
result = (m_msp != NULL) ? m_msp->host_r(space, offset, 0xffff) : 0xffff;
m_hd34010_host_access = FALSE;
return result;
}
@ -195,7 +195,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_msp_io_w )
if (m_msp != NULL)
{
m_hd34010_host_access = TRUE;
m_msp->host_w(offset, data);
m_msp->host_w(space, offset, data, 0xffff);
m_hd34010_host_access = FALSE;
}
}

16
src/mame/machine/micro3d.c
View File

@ -205,22 +205,6 @@ READ32_MEMBER(micro3d_state::micro3d_scc_r)
}
/*************************************
*
* Host<->TMS34010 interface
*
*************************************/
READ16_MEMBER(micro3d_state::micro3d_tms_host_r)
{
return m_vgb->host_r(offset);
}
WRITE16_MEMBER(micro3d_state::micro3d_tms_host_w)
{
m_vgb->host_w(offset, data);
}
/*************************************
*