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https://github.com/holub/mame
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bfcobra.cpp: use ramdac_device instead of custom implementation. The driver also has a custom fdc implementation, which I failed to update to the device one. (nw)
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@ -83,6 +83,7 @@
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#include "sound/upd7759.h"
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#include "sound/ay8910.h"
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#include "machine/nvram.h"
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#include "video/ramdac.h"
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/*
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@ -168,26 +169,6 @@ struct bf_blitter_t
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#define LOOPTYPE ( ( blitter.command&0x60 ) >> 5 )
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/*
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MUSIC Semiconductor TR9C1710 RAMDAC or equivalent
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*/
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struct ramdac_t
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{
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UINT8 addr_w;
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UINT8 addr_r;
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UINT8 mask;
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/* 18-bit colors */
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UINT8 color_r[3];
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UINT8 color_w[3];
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UINT32 table[256];
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/* Access counts */
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UINT8 count_r;
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UINT8 count_w;
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};
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struct fdc_t
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{
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UINT8 MSR;
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@ -275,10 +256,7 @@ public:
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UINT8 m_col7bit[256];
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UINT8 m_col6bit[256];
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struct bf_blitter_t m_blitter;
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struct ramdac_t m_ramdac;
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struct fdc_t m_fdc;
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DECLARE_READ8_MEMBER(ramdac_r);
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DECLARE_WRITE8_MEMBER(ramdac_w);
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DECLARE_READ8_MEMBER(chipset_r);
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DECLARE_WRITE8_MEMBER(chipset_w);
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DECLARE_WRITE8_MEMBER(rombank_w);
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@ -759,85 +737,6 @@ void bfcobra_state::RunBlit(address_space &space)
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space.device().execute().spin_until_time(attotime::from_nsec( (1000000000 / Z80_XTAL)*cycles_used * 2 ) );
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}
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READ8_MEMBER(bfcobra_state::ramdac_r)
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{
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struct ramdac_t &ramdac = m_ramdac;
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UINT8 val = 0xff;
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switch (offset & 3)
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{
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case 1:
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{
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UINT8 *count = &ramdac.count_r;
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if (*count == 0)
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{
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rgb_t color;
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color = m_palette->pen_color(ramdac.addr_r);
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ramdac.color_r[0] = color.r();
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ramdac.color_r[1] = color.g();
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ramdac.color_r[2] = color.b();
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}
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val = ramdac.color_r[*count];
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/* 8bpp -> 6bpp */
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val = ((val & 0xc0) >> 2) | ((val >>2) & 0xf);
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if (++*count == 3)
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{
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*count = 0;
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ramdac.addr_r++;
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}
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break;
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}
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default:
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{
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osd_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", space.device().safe_pcbase());
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}
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}
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return val;
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}
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WRITE8_MEMBER(bfcobra_state::ramdac_w)
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{
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struct ramdac_t &ramdac = m_ramdac;
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switch (offset & 3)
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{
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case 0:
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{
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ramdac.addr_w = data;
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break;
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}
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case 1:
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{
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data &= 0x3f;
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ramdac.color_w[ramdac.count_w] = pal6bit(data);
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if (++ramdac.count_w == 3)
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{
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m_palette->set_pen_color(ramdac.addr_w, ramdac.color_w[0], ramdac.color_w[1], ramdac.color_w[2]);
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ramdac.count_w = 0;
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ramdac.addr_w++;
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}
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break;
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}
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case 2:
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{
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ramdac.mask = data;
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break;
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}
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case 3:
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{
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ramdac.addr_r = data;
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break;
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}
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}
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}
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/***************************************************************************
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Flare One Register Map
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@ -1340,7 +1239,6 @@ void bfcobra_state::machine_reset()
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}
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m_bank_data[0] = 1;
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memset(&m_ramdac, 0, sizeof(m_ramdac));
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reset_fdc();
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m_irq_state = m_blitter_irq = m_vblank_irq = m_acia_irq = 0;
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@ -1369,7 +1267,15 @@ ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x30, 0x30) AM_READ(fdctrl_r)
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AM_RANGE(0x31, 0x31) AM_READWRITE(fddata_r, fdctrl_w)
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AM_RANGE(0x40, 0x40) AM_WRITE(rombank_w)
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AM_RANGE(0x50, 0x53) AM_READWRITE(ramdac_r, ramdac_w)
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AM_RANGE(0x50, 0x50) AM_DEVWRITE("ramdac", ramdac_device, index_w)
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AM_RANGE(0x51, 0x51) AM_DEVREADWRITE("ramdac", ramdac_device, pal_r, pal_w)
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AM_RANGE(0x52, 0x52) AM_DEVWRITE("ramdac", ramdac_device, mask_w)
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AM_RANGE(0x53, 0x53) AM_DEVWRITE("ramdac", ramdac_device, index_r_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ramdac_map, AS_0, 8, bfcobra_state )
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AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac", ramdac_device, ramdac_pal_r, ramdac_rgb666_w)
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ADDRESS_MAP_END
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@ -1746,6 +1652,9 @@ static MACHINE_CONFIG_START( bfcobra, bfcobra_state )
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MCFG_PALETTE_ADD("palette", 256)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // MUSIC Semiconductor TR9C1710 RAMDAC or equivalent
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MCFG_RAMDAC_SPLIT_READ(1)
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("aysnd", AY8910, M6809_XTAL)
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