diff --git a/hash/gbcolor.xml b/hash/gbcolor.xml index b5b08df1930..fc3adee9ec7 100644 --- a/hash/gbcolor.xml +++ b/hash/gbcolor.xml @@ -5584,7 +5584,7 @@ List of unconfirmed retail cartridge roms Bomberman Selection (Kor) - 1996? + 2003 Hudson Soft diff --git a/src/emu/bus/gameboy/gb_slot.c b/src/emu/bus/gameboy/gb_slot.c index c04645d3290..c3d7b576f32 100644 --- a/src/emu/bus/gameboy/gb_slot.c +++ b/src/emu/bus/gameboy/gb_slot.c @@ -300,6 +300,14 @@ bool base_gb_cart_slot_device::call_load() else m_type = get_cart_type(ROM + offset, len - offset); + // setup additional mask/shift for MBC1 variants: + // a few game collections use the same mapper with slightly + // different lines connection with the ROM / RAM + if (m_type == GB_MBC_MBC1 || m_type == GB_MBC_188IN1) + m_cart->set_additional_wirings(0x1f, 0); + if (m_type == GB_MBC_MBC1_COL) + m_cart->set_additional_wirings(0x0f, -1); + // setup RAM/NVRAM/RTC/RUMBLE if (software_entry() != NULL) { diff --git a/src/emu/bus/gameboy/gb_slot.h b/src/emu/bus/gameboy/gb_slot.h index ea6036a1481..0f3947d805e 100644 --- a/src/emu/bus/gameboy/gb_slot.h +++ b/src/emu/bus/gameboy/gb_slot.h @@ -22,7 +22,7 @@ enum GB_MBC_MBC6, /* ?? ROM, 32KB SRAM */ GB_MBC_MBC7, /* ?? ROM, ?? RAM */ GB_MBC_WISDOM, /* ?? ROM, ?? RAM - Wisdom tree controller */ - GB_MBC_MBC1_COL, /* 1MB ROM, ?? RAM - MBC1 variant for multigame carts */ + GB_MBC_MBC1_COL, /* 1MB ROM, 32KB RAM - workaround for MBC1 on PCB that maps rom address lines differently */ GB_MBC_YONGYONG, /* ?? ROM, ?? RAM - Appears in Sonic 3D Blast 5 pirate */ GB_MBC_LASAMA, /* ?? ROM, ?? RAM - Appears in La Sa Ma */ GB_MBC_ATVRACIN, @@ -66,6 +66,7 @@ public: void rom_map_setup(UINT32 size); void ram_map_setup(UINT8 banks); + virtual void set_additional_wirings(UINT8 mask, int shift) { } // MBC-1 will then overwrite this! void set_has_timer(bool val) { has_timer = val; } void set_has_rumble(bool val) { has_rumble = val; } void set_has_battery(bool val) { has_battery = val; } diff --git a/src/emu/bus/gameboy/mbc.c b/src/emu/bus/gameboy/mbc.c index dcc5f828a92..ed2d34d9c94 100644 --- a/src/emu/bus/gameboy/mbc.c +++ b/src/emu/bus/gameboy/mbc.c @@ -17,7 +17,6 @@ //------------------------------------------------- const device_type GB_ROM_MBC1 = &device_creator; -const device_type GB_ROM_MBC1_COL = &device_creator; const device_type GB_ROM_MBC2 = &device_creator; const device_type GB_ROM_MBC3 = &device_creator; const device_type GB_ROM_MBC5 = &device_creator; @@ -40,17 +39,16 @@ gb_rom_mbc_device::gb_rom_mbc_device(const machine_config &mconfig, device_type } gb_rom_mbc1_device::gb_rom_mbc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) - : gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source) + : gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source), + m_mask(0x1f), + m_shift(0) { } gb_rom_mbc1_device::gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : gb_rom_mbc_device(mconfig, GB_ROM_MBC1, "GB MBC1 Carts", tag, owner, clock, "gb_rom_mbc1", __FILE__) -{ -} - -gb_rom_mbc1col_device::gb_rom_mbc1col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : gb_rom_mbc_device(mconfig, GB_ROM_MBC1_COL, "GB MBC1 Collection Carts", tag, owner, clock, "gb_rom_mbc1col", __FILE__) + : gb_rom_mbc_device(mconfig, GB_ROM_MBC1, "GB MBC1 Carts", tag, owner, clock, "gb_rom_mbc1", __FILE__), + m_mask(0x1f), + m_shift(0) { } @@ -135,7 +133,6 @@ void gb_rom_mbc_device::shared_start() save_item(NAME(m_latch_bank2)); save_item(NAME(m_ram_bank)); save_item(NAME(m_ram_enable)); - save_item(NAME(m_mode)); } //------------------------------------------------- @@ -148,7 +145,6 @@ void gb_rom_mbc_device::shared_reset() m_latch_bank2 = 1; m_ram_bank = 0; m_ram_enable = 0; - m_mode = 0; } //------------------------------------------------- @@ -177,7 +173,6 @@ void gb_rom_mbc6_device::device_start() save_item(NAME(m_latch_bank2)); save_item(NAME(m_ram_bank)); save_item(NAME(m_ram_enable)); - save_item(NAME(m_mode)); } void gb_rom_mbc6_device::device_reset() @@ -191,7 +186,6 @@ void gb_rom_mbc6_device::device_reset() m_latch_bank2 = 3; // correct default? m_ram_bank = 0; m_ram_enable = 0; - m_mode = 0; } void gb_rom_mmm01_device::device_start() @@ -276,41 +270,36 @@ WRITE8_MEMBER(gb_rom_mbc_device::write_ram) READ8_MEMBER(gb_rom_mbc1_device::read_rom) { if (offset < 0x4000) - return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; + { + int bank = (m_mode == MODE_4M_256k) ? (m_ram_bank << (5 + m_shift)) : 0; + return m_rom[rom_bank_map[bank] * 0x4000 + (offset & 0x3fff)]; + } else - return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; + return m_rom[rom_bank_map[(m_ram_bank << (5 + m_shift)) | m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; } WRITE8_MEMBER(gb_rom_mbc1_device::write_bank) { - if (offset < 0x2000) + if (offset < 0x2000) // RAM Enable Register m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; - else if (offset < 0x4000) + else if (offset < 0x4000) // ROM Bank Register { - // 5bits only data &= 0x1f; - // bank = 0 => bank = 1 - if (data == 0) - data = 1; - - m_latch_bank2 = (m_latch_bank2 & 0x01e0) | data; + m_latch_bank2 = data ? data : 0x01u; + m_latch_bank2 &= m_mask; } - else if (offset < 0x6000) - { - // 2bits only - data &= 0x3; - m_latch_bank2 = (m_latch_bank2 & 0x001f) | (data << 5); - } - else - m_mode = data & 0x1; + else if (offset < 0x6000) // RAM Bank Register + m_ram_bank = data & 0x3; + else // MBC1 Mode Register + m_mode = (data & 0x1) ? MODE_4M_256k : MODE_16M_8k; } READ8_MEMBER(gb_rom_mbc1_device::read_ram) { if (m_ram && m_ram_enable) { - m_ram_bank = m_mode ? (m_latch_bank2 >> 5) : 0; - return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset]; + int bank = (m_mode == MODE_4M_256k) ? m_ram_bank : 0; + return m_ram[ram_bank_map[bank] * 0x2000 + offset]; } else return 0xff; @@ -320,68 +309,12 @@ WRITE8_MEMBER(gb_rom_mbc1_device::write_ram) { if (m_ram && m_ram_enable) { - m_ram_bank = m_mode ? (m_latch_bank2 >> 5) : 0; - m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset] = data; + int bank = (m_mode == MODE_4M_256k) ? m_ram_bank : 0; + m_ram[ram_bank_map[bank] * 0x2000 + offset] = data; } } -// MBC1 Korean variant (used by Bomberman Selection) - -READ8_MEMBER(gb_rom_mbc1col_device::read_rom) -{ - if (offset < 0x4000) - return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)]; - else - return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)]; -} - -WRITE8_MEMBER(gb_rom_mbc1col_device::write_bank) -{ - if (offset < 0x2000) - m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0; - else if (offset < 0x4000) - { - // 4bits only? - data &= 0x0f; - // bank = 0 => bank = 1 - if (data == 0) - data = 1; - - m_latch_bank2 = (m_latch_bank2 & 0x01f0) | data; - } - else if (offset < 0x6000) - { - // 2bits only - data &= 0x3; - m_latch_bank2 = (m_latch_bank2 & 0x000f) | (data << 4); - m_latch_bank = m_latch_bank2 & 0x30; - } - else - m_mode = data & 0x1; -} - -// RAM access is the same as usual MBC1 -READ8_MEMBER(gb_rom_mbc1col_device::read_ram) -{ - if (m_ram && m_ram_enable) - { - m_ram_bank = m_mode ? (m_latch_bank2 >> 5) : 0; - return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset]; - } - else - return 0xff; -} - -WRITE8_MEMBER(gb_rom_mbc1col_device::write_ram) -{ - if (m_ram && m_ram_enable) - { - m_ram_bank = m_mode ? (m_latch_bank2 >> 5) : 0; - m_ram[ram_bank_map[m_ram_bank] * 0x2000 + offset] = data; - } -} - // MBC2 READ8_MEMBER(gb_rom_mbc2_device::read_rom) diff --git a/src/emu/bus/gameboy/mbc.h b/src/emu/bus/gameboy/mbc.h index f480dc875fd..e18a943d9ca 100644 --- a/src/emu/bus/gameboy/mbc.h +++ b/src/emu/bus/gameboy/mbc.h @@ -26,7 +26,6 @@ public: virtual DECLARE_WRITE8_MEMBER(write_ram); UINT8 m_ram_enable; - UINT8 m_mode; }; // ======================> gb_rom_mbc1_device @@ -34,36 +33,28 @@ public: class gb_rom_mbc1_device : public gb_rom_mbc_device { public: + + enum { + MODE_16M_8k = 0, /// 16Mbit ROM, 8kBit RAM + MODE_4M_256k = 1, /// 4Mbit ROM, 256kBit RAM + }; + // construction/destruction gb_rom_mbc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); // device-level overrides - virtual void device_start() { shared_start(); }; - virtual void device_reset() { shared_reset(); }; + virtual void device_start() { shared_start(); save_item(NAME(m_mode)); }; + virtual void device_reset() { shared_reset(); m_mode = MODE_16M_8k; }; + virtual void set_additional_wirings(UINT8 mask, int shift) { m_mask = mask; m_shift = shift; } // these get set at cart loading virtual DECLARE_READ8_MEMBER(read_rom); virtual DECLARE_WRITE8_MEMBER(write_bank); virtual DECLARE_READ8_MEMBER(read_ram); virtual DECLARE_WRITE8_MEMBER(write_ram); -}; -// ======================> gb_rom_mbc1col_device - -class gb_rom_mbc1col_device : public gb_rom_mbc_device -{ -public: - // construction/destruction - gb_rom_mbc1col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); - - // device-level overrides - virtual void device_start() { shared_start(); }; - virtual void device_reset() { shared_reset(); }; - - virtual DECLARE_READ8_MEMBER(read_rom); - virtual DECLARE_WRITE8_MEMBER(write_bank); - virtual DECLARE_READ8_MEMBER(read_ram); - virtual DECLARE_WRITE8_MEMBER(write_ram); + UINT8 m_mode, m_mask; + int m_shift; }; // ======================> gb_rom_mbc2_device @@ -298,7 +289,7 @@ public: virtual DECLARE_WRITE8_MEMBER(write_bank); virtual DECLARE_READ8_MEMBER(read_ram); virtual DECLARE_WRITE8_MEMBER(write_ram); - UINT8 m_bank_mask, m_bank, m_reg; + UINT8 m_bank_mask, m_bank, m_reg, m_mode; }; diff --git a/src/mess/drivers/gb.c b/src/mess/drivers/gb.c index 0ba652162c4..5d3c83e831b 100644 --- a/src/mess/drivers/gb.c +++ b/src/mess/drivers/gb.c @@ -638,7 +638,7 @@ INPUT_PORTS_END static SLOT_INTERFACE_START(gb_cart) SLOT_INTERFACE_INTERNAL("rom", GB_STD_ROM) SLOT_INTERFACE_INTERNAL("rom_mbc1", GB_ROM_MBC1) - SLOT_INTERFACE_INTERNAL("rom_mbc1col", GB_ROM_MBC1_COL) + SLOT_INTERFACE_INTERNAL("rom_mbc1col", GB_ROM_MBC1) SLOT_INTERFACE_INTERNAL("rom_mbc2", GB_ROM_MBC2) SLOT_INTERFACE_INTERNAL("rom_mbc3", GB_ROM_MBC3) SLOT_INTERFACE_INTERNAL("rom_huc1", GB_ROM_MBC3)