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m37710: Kill the unnecessary set_line indirection (nw)

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This commit is contained in:
AJR 2019-07-06 20:06:40 -04:00
parent 76ca04e403
commit 3e3679cf51
4 changed files with 49 additions and 74 deletions
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58
src/devices/cpu/m37710/m37710.cpp
View File

@ -744,14 +744,6 @@ const m37710_cpu_device::set_reg_func m37710_cpu_device::m37710i_set_reg[4] =
&m37710_cpu_device::m37710i_set_reg_M1X1,
};
const m37710_cpu_device::set_line_func m37710_cpu_device::m37710i_set_line[4] =
{
&m37710_cpu_device::m37710i_set_line_M0X0,
&m37710_cpu_device::m37710i_set_line_M0X1,
&m37710_cpu_device::m37710i_set_line_M1X0,
&m37710_cpu_device::m37710i_set_line_M1X1,
};
const m37710_cpu_device::execute_func m37710_cpu_device::m37710i_execute[4] =
{
&m37710_cpu_device::m37710i_execute_M0X0,
@ -952,7 +944,54 @@ void m37710_cpu_device::m37710_set_reg(int regnum, unsigned value)
/* Set an interrupt line */
void m37710_cpu_device::m37710_set_irq_line(int line, int state)
{
(this->*m_set_line)(line, state);
switch(line)
{
// maskable interrupts
case M37710_LINE_ADC:
case M37710_LINE_UART1XMIT:
case M37710_LINE_UART1RECV:
case M37710_LINE_UART0XMIT:
case M37710_LINE_UART0RECV:
case M37710_LINE_TIMERB2:
case M37710_LINE_TIMERB1:
case M37710_LINE_TIMERB0:
case M37710_LINE_TIMERA4:
case M37710_LINE_TIMERA3:
case M37710_LINE_TIMERA2:
case M37710_LINE_TIMERA1:
case M37710_LINE_TIMERA0:
case M37710_LINE_IRQ2:
case M37710_LINE_IRQ1:
case M37710_LINE_IRQ0:
case M37710_LINE_DMA0:
case M37710_LINE_DMA1:
case M37710_LINE_DMA2:
case M37710_LINE_DMA3:
switch(state)
{
case CLEAR_LINE:
LINE_IRQ &= ~(1 << line);
if (m37710_irq_levels[line])
{
m_m37710_regs[m37710_irq_levels[line]] &= ~8;
}
break;
case ASSERT_LINE:
case HOLD_LINE:
LINE_IRQ |= (1 << line);
if (m37710_irq_levels[line])
{
m_m37710_regs[m37710_irq_levels[line]] |= 8;
}
break;
default: break;
}
break;
default: break;
}
}
bool m37710_cpu_device::get_m_flag() const
@ -1230,7 +1269,6 @@ void m37710_cpu_device::m37710i_set_execution_mode(uint32_t mode)
m_opcodes89 = m37710i_opcodes3[mode];
FTABLE_GET_REG = m37710i_get_reg[mode];
FTABLE_SET_REG = m37710i_set_reg[mode];
FTABLE_SET_LINE = m37710i_set_line[mode];
m_execute = m37710i_execute[mode];
}

7
src/devices/cpu/m37710/m37710.h
View File

@ -229,7 +229,6 @@ private:
typedef void (m37710_cpu_device::*opcode_func)();
typedef uint32_t (m37710_cpu_device::*get_reg_func)(int regnum);
typedef void (m37710_cpu_device::*set_reg_func)(int regnum, uint32_t val);
typedef void (m37710_cpu_device::*set_line_func)(int line, int state);
typedef int (m37710_cpu_device::*execute_func)(int cycles);
static const int m37710_irq_levels[M37710_INTERRUPT_MAX];
@ -241,7 +240,6 @@ private:
static const opcode_func *const m37710i_opcodes3[4];
static const get_reg_func m37710i_get_reg[4];
static const set_reg_func m37710i_set_reg[4];
static const set_line_func m37710i_set_line[4];
static const execute_func m37710i_execute[4];
static const opcode_func m37710i_opcodes_M0X0[];
static const opcode_func m37710i_opcodes_M0X1[];
@ -261,7 +259,6 @@ private:
const opcode_func *m_opcodes89; /* opcodes with 0x89 prefix */
get_reg_func m_get_reg;
set_reg_func m_set_reg;
set_line_func m_set_line;
execute_func m_execute;
// Implementation
@ -277,10 +274,6 @@ private:
void m37710i_set_reg_M0X1(int regnum, uint32_t val);
void m37710i_set_reg_M1X0(int regnum, uint32_t val);
void m37710i_set_reg_M1X1(int regnum, uint32_t val);
void m37710i_set_line_M0X0(int line, int state);
void m37710i_set_line_M0X1(int line, int state);
void m37710i_set_line_M1X0(int line, int state);
void m37710i_set_line_M1X1(int line, int state);
int m37710i_execute_M0X0(int cycles);
int m37710i_execute_M0X1(int cycles);
int m37710i_execute_M1X0(int cycles);

1
src/devices/cpu/m37710/m37710cm.h
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@ -97,7 +97,6 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
#define FTABLE_GET_REG m_get_reg
#define FTABLE_SET_REG m_set_reg
#define FTABLE_SET_LINE m_set_line
#define SRC m_source /* Source Operand */
#define DST m_destination /* Destination Operand */

57
src/devices/cpu/m37710/m37710op.h
View File

@ -2486,61 +2486,6 @@ TABLE_OPCODES3 =
};
/* Assert or clear a line on the CPU */
TABLE_FUNCTION(void, set_line, (int line, int state))
{
switch(line)
{
// maskable interrupts
case M37710_LINE_ADC:
case M37710_LINE_UART1XMIT:
case M37710_LINE_UART1RECV:
case M37710_LINE_UART0XMIT:
case M37710_LINE_UART0RECV:
case M37710_LINE_TIMERB2:
case M37710_LINE_TIMERB1:
case M37710_LINE_TIMERB0:
case M37710_LINE_TIMERA4:
case M37710_LINE_TIMERA3:
case M37710_LINE_TIMERA2:
case M37710_LINE_TIMERA1:
case M37710_LINE_TIMERA0:
case M37710_LINE_IRQ2:
case M37710_LINE_IRQ1:
case M37710_LINE_IRQ0:
case M37710_LINE_DMA0:
case M37710_LINE_DMA1:
case M37710_LINE_DMA2:
case M37710_LINE_DMA3:
switch(state)
{
case CLEAR_LINE:
LINE_IRQ &= ~(1 << line);
if (m37710_irq_levels[line])
{
m_m37710_regs[m37710_irq_levels[line]] &= ~8;
}
break;
case ASSERT_LINE:
case HOLD_LINE:
LINE_IRQ |= (1 << line);
if (m37710_irq_levels[line])
{
m_m37710_regs[m37710_irq_levels[line]] |= 8;
}
break;
default: break;
}
break;
default: break;
}
}
/* Get a register from the CPU core */
TABLE_FUNCTION(uint32_t, get_reg, (int regnum))
{
@ -2583,7 +2528,7 @@ TABLE_FUNCTION(void, set_reg, (int regnum, uint32_t val))
case M37710_X: REG_X = MAKE_UINT_16(val); break;
case M37710_Y: REG_Y = MAKE_UINT_16(val); break;
#endif
case M37710_IRQ_STATE: (this->*FTABLE_SET_LINE)(M37710_LINE_IRQ0, val == 0 ? CLEAR_LINE : ASSERT_LINE); break;
case M37710_IRQ_STATE: m37710_set_irq_line(M37710_LINE_IRQ0, val == 0 ? CLEAR_LINE : ASSERT_LINE); break;
}
}