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More null fixes, nw

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This commit is contained in:
therealmogminer@gmail.com 2016-01-21 20:53:29 +01:00 committed by Miodrag Milanovic
parent f5d65e4583
commit 3e4605ebff
8 changed files with 355 additions and 316 deletions
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12
src/devices/sound/es5506.cpp
View File

@ -366,8 +366,16 @@ void es5505_device::device_start()
m_stream = machine().sound().stream_alloc(*this, 0, 2 * channels, clock() / (16*32));
/* initialize the regions */
m_region_base[0] = m_region0 ? (UINT16 *)machine().root_device().memregion(m_region0)->base() : nullptr;
m_region_base[1] = m_region1 ? (UINT16 *)machine().root_device().memregion(m_region1)->base() : nullptr;
if (m_region0)
{
memory_region* region = machine().root_device().memregion(m_region0);
m_region_base[0] = region ? reinterpret_cast<UINT16 *>(region->base()) : nullptr;
}
if (m_region1)
{
memory_region* region = machine().root_device().memregion(m_region1);
m_region_base[1] = region ? reinterpret_cast<UINT16 *>(region->base()) : nullptr;
}
/* initialize the rest of the structure */
m_master_clock = clock();

56
src/mame/drivers/fm7.cpp
View File

@ -313,29 +313,27 @@ READ8_MEMBER(fm7_state::fm7_sub_beeper_r)
READ8_MEMBER(fm7_state::vector_r)
{
UINT8* RAM = memregion("maincpu")->base();
UINT8* ROM = memregion("init")->base();
UINT32 init_size = memregion("init")->bytes();
UINT32 init_size = m_rom_ptr.bytes();
if(m_init_rom_en)
return ROM[(init_size-0x10)+offset];
if (m_init_rom_en)
{
return m_rom_ptr[(init_size-0x10)+offset];
}
else
{
if(m_type == SYS_FM7)
return RAM[0xfff0+offset];
return m_ram_ptr[0xfff0+offset];
else
return RAM[0x3fff0+offset];
return m_ram_ptr[0x3fff0+offset];
}
}
WRITE8_MEMBER(fm7_state::vector_w)
{
UINT8* RAM = memregion("maincpu")->base();
if(m_type == SYS_FM7)
RAM[0xfff0+offset] = data;
m_ram_ptr[0xfff0+offset] = data;
else
RAM[0x3fff0+offset] = data;
m_ram_ptr[0x3fff0+offset] = data;
}
/*
@ -1150,22 +1148,23 @@ void fm7_state::fm7_mmr_refresh(address_space& space)
}
if(m_init_rom_en)
{
UINT8* ROM = memregion("init")->base();
membank("init_bank_r")->set_base(ROM);
membank("init_bank_r")->set_base(m_rom_ptr);
}
else
{
membank("init_bank_r")->set_base(RAM+0x36000);
membank("init_bank_r")->set_base(m_ram_ptr + 0x36000);
}
if(m_basic_rom_en)
if (m_basic_rom_en)
{
UINT8* ROM = memregion("fbasic")->base();
if(ROM != nullptr)
membank("fbasic_bank_r")->set_base(ROM);
if (m_basic_ptr)
{
membank("fbasic_bank_r")->set_base(m_rom_ptr);
}
}
else
{
membank("fbasic_bank_r")->set_base(RAM+0x38000);
membank("fbasic_bank_r")->set_base(m_ram_ptr + 0x38000);
}
}
@ -1955,9 +1954,6 @@ MACHINE_START_MEMBER(fm7_state,fm16)
void fm7_state::machine_reset()
{
UINT8* RAM = memregion("maincpu")->base();
UINT8* ROM = memregion("init")->base();
m_timer->adjust(attotime::from_nsec(2034500),0,attotime::from_nsec(2034500));
m_subtimer->adjust(attotime::from_msec(20),0,attotime::from_msec(20));
m_keyboard_timer->adjust(attotime::zero,0,attotime::from_msec(10));
@ -1975,13 +1971,13 @@ void fm7_state::machine_reset()
{
m_init_rom_en = 1;
// last part of Initiate ROM is visible at the end of RAM too (interrupt vectors)
memcpy(RAM+0x3fff0,ROM+0x1ff0,16);
memcpy(m_ram_ptr + 0x3fff0, m_rom_ptr + 0x1ff0, 16);
}
else if (m_type == SYS_FM11)
{
m_init_rom_en = 1;
// last part of Initiate ROM is visible at the end of RAM too (interrupt vectors)
memcpy(RAM+0x3fff0,ROM+0x0ff0,16);
memcpy(m_ram_ptr + 0x3fff0, m_rom_ptr + 0x0ff0, 16);
}
else
m_init_rom_en = 0;
@ -1990,11 +1986,13 @@ void fm7_state::machine_reset()
if(!(m_dsw->read() & 0x02))
{
m_basic_rom_en = 0; // disabled for DOS mode
membank("bank1")->set_base(RAM+0x08000);
membank("bank1")->set_base(m_ram_ptr + 0x08000);
}
else
membank("bank1")->set_base(RAM+0x38000);
membank("bank2")->set_base(RAM+0x08000);
{
membank("bank1")->set_base(m_ram_ptr + 0x38000);
}
membank("bank2")->set_base(m_ram_ptr + 0x08000);
}
m_key_delay = 700; // 700ms on FM-7
m_key_repeat = 70; // 70ms on FM-7
@ -2025,8 +2023,8 @@ void fm7_state::machine_reset()
if(m_type == SYS_FM77AV || m_type == SYS_FM77AV40EX || m_type == SYS_FM11)
{
fm7_mmr_refresh(m_maincpu->space(AS_PROGRAM));
membank("fbasic_bank_w")->set_base(RAM+0x38000);
membank("init_bank_w")->set_base(RAM+0x36000);
membank("fbasic_bank_w")->set_base(m_ram_ptr + 0x38000);
membank("init_bank_w")->set_base(m_ram_ptr + 0x36000);
}
if(m_type == SYS_FM11)
{

18
src/mame/drivers/harddriv.cpp
View File

@ -358,12 +358,12 @@ harddriv_state::harddriv_state(const machine_config &mconfig, const char *tag, d
m_screen(*this, "screen"),
m_duartn68681(*this, "duartn68681"),
m_hd34010_host_access(0),
m_dsk_pio_access(0),
m_msp_ram(*this, "msp_ram"),
m_dsk_ram(nullptr),
m_dsk_rom(nullptr),
m_dsk_10c(*this, "dsk_10c"),
m_dsk_30c(*this, "dsk_30c"),
m_dsk_pio_access(0),
m_m68k_slapstic_base(nullptr),
m_m68k_sloop_alt_base(nullptr),
m_200e(*this, "200e"),
@ -410,7 +410,7 @@ harddriv_state::harddriv_state(const machine_config &mconfig, const char *tag, d
m_sim_memory(nullptr),
m_sim_memory_size(0),
m_adsp_pgm_memory_word(nullptr),
m_ds3_sdata_memory(nullptr),
m_ds3_sdata_memory(*this, "ds3sdsp_data"),
m_ds3_sdata_memory_size(0),
m_ds3_gcmd(0),
m_ds3_gflag(0),
@ -2005,8 +2005,8 @@ MACHINE_CONFIG_END
WRITE_LINE_MEMBER(harddriv_new_state::tx_a)
{
// passive connection, one way, to both screens
m_leftpcb->m_duartn68681->rx_a_w(state);
m_rightpcb->m_duartn68681->rx_a_w(state);
m_leftpcb->get_duart()->rx_a_w(state);
m_rightpcb->get_duart()->rx_a_w(state);
}
static MACHINE_CONFIG_START( racedriv_panorama_machine, harddriv_new_state )
@ -2026,9 +2026,9 @@ MACHINE_CONFIG_END
// by forcing them to stay in sync using this ugly method everything works much better.
TIMER_DEVICE_CALLBACK_MEMBER(harddriv_new_state::hack_timer)
{
m_leftpcb->m_screen->reset_origin(0, 0);
m_mainpcb->m_screen->reset_origin(0, 0);
m_rightpcb->m_screen->reset_origin(0, 0);
m_leftpcb->get_screen()->reset_origin(0, 0);
m_mainpcb->get_screen()->reset_origin(0, 0);
m_rightpcb->get_screen()->reset_origin(0, 0);
}
/*************************************
@ -4707,9 +4707,7 @@ void harddriv_state::init_ds3()
m_maincpu->space(AS_PROGRAM).install_write_handler(0x823800, 0x823fff, write16_delegate(FUNC(harddriv_state::hd68k_ds3_control_w), this));
/* predetermine memory regions */
m_ds3_sdata_memory = (UINT16 *)memregion("ds3sdsp_data")->base();
m_ds3_sdata_memory_size = memregion("ds3sdsp_data")->bytes() / 2;
m_ds3_sdata_memory_size = m_ds3_sdata_memory.bytes() / 2;
/*

23
src/mame/includes/dynax.h
View File

@ -14,16 +14,18 @@ class dynax_state : public driver_device
{
public:
dynax_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_soundcpu(*this, "soundcpu"),
m_ym2413(*this, "ym2413"),
m_oki(*this, "oki"),
m_msm(*this, "msm"),
m_screen(*this, "screen"),
m_palette(*this, "palette"),
m_rtc(*this, "rtc")
{ }
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_soundcpu(*this, "soundcpu")
, m_ym2413(*this, "ym2413")
, m_oki(*this, "oki")
, m_msm(*this, "msm")
, m_screen(*this, "screen")
, m_palette(*this, "palette")
, m_rtc(*this, "rtc")
, m_gfx_region(*this, "gfx")
{
}
/* devices */
required_device<cpu_device> m_maincpu;
@ -34,6 +36,7 @@ public:
optional_device<screen_device> m_screen;
required_device<palette_device> m_palette;
optional_device<msm6242_device> m_rtc;
optional_region_ptr<UINT8> m_gfx_region;
// up to 8 layers, 2 images per layer (interleaved on screen)
std::unique_ptr<UINT8[]> m_pixmap[8][2];

134
src/mame/includes/fm7.h
View File

@ -136,6 +136,9 @@ public:
m_floppy0(*this, "fdc:0"),
m_floppy1(*this, "fdc:1"),
m_floppy(nullptr),
m_ram_ptr(*this, "maincpu"),
m_rom_ptr(*this, "init"),
m_basic_ptr(*this, "fbasic"),
m_kanji(*this, "kanji1"),
m_key1(*this, "key1"),
m_key2(*this, "key2"),
@ -164,42 +167,22 @@ public:
m_avbank16(*this, "av_bank16")
{
}
DECLARE_DRIVER_INIT(fm7);
optional_shared_ptr<UINT8> m_shared_ram;
optional_shared_ptr<UINT8> m_boot_ram;
virtual void machine_reset() override;
virtual void video_start() override;
DECLARE_MACHINE_START(fm7);
DECLARE_MACHINE_START(fm77av);
DECLARE_MACHINE_START(fm11);
DECLARE_MACHINE_START(fm16);
DECLARE_WRITE_LINE_MEMBER(fm7_fdc_intrq_w);
DECLARE_WRITE_LINE_MEMBER(fm7_fdc_drq_w);
DECLARE_READ8_MEMBER(fm77av_joy_1_r);
DECLARE_READ8_MEMBER(fm77av_joy_2_r);
DECLARE_WRITE_LINE_MEMBER(fm77av_fmirq);
UINT8 m_irq_flags;
UINT8 m_irq_mask;
emu_timer* m_timer;
emu_timer* m_subtimer;
emu_timer* m_keyboard_timer;
UINT8 m_basic_rom_en;
UINT8 m_init_rom_en;
unsigned int m_key_delay;
unsigned int m_key_repeat;
UINT16 m_current_scancode;
UINT32 m_key_data[4];
UINT32 m_mod_data;
UINT8 m_key_scan_mode;
UINT8 m_break_flag;
UINT8 m_psg_regsel;
UINT8 m_psg_data;
UINT8 m_fdc_side;
UINT8 m_fdc_drive;
UINT8 m_fdc_irq_flag;
UINT8 m_fdc_drq_flag;
UINT8 m_fm77av_ym_irq;
UINT8 m_speaker_active;
UINT16 m_kanji_address;
fm7_encoder_t m_encoder;
fm7_mmr_t m_mmr;
UINT8 m_cp_prev;
std::unique_ptr<UINT8[]> m_video_ram;
emu_timer* m_fm77av_vsync_timer;
UINT8 m_type;
fm7_video_t m_video;
fm7_alu_t m_alu;
int m_sb_prev;
DECLARE_READ8_MEMBER(fm7_subintf_r);
DECLARE_WRITE8_MEMBER(fm7_subintf_w);
DECLARE_READ8_MEMBER(fm7_sub_busyflag_r);
@ -286,16 +269,62 @@ public:
DECLARE_WRITE8_MEMBER(fm7_mmr_w);
DECLARE_READ8_MEMBER(fm7_kanji_r);
DECLARE_WRITE8_MEMBER(fm7_kanji_w);
IRQ_CALLBACK_MEMBER(fm7_irq_ack);
IRQ_CALLBACK_MEMBER(fm7_sub_irq_ack);
DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
DECLARE_WRITE_LINE_MEMBER(write_centronics_fault);
DECLARE_WRITE_LINE_MEMBER(write_centronics_ack);
DECLARE_WRITE_LINE_MEMBER(write_centronics_perror);
UINT32 screen_update_fm7(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
optional_shared_ptr<UINT8> m_shared_ram;
optional_shared_ptr<UINT8> m_boot_ram;
UINT8 m_irq_flags;
UINT8 m_irq_mask;
emu_timer* m_timer;
emu_timer* m_subtimer;
emu_timer* m_keyboard_timer;
UINT8 m_basic_rom_en;
UINT8 m_init_rom_en;
unsigned int m_key_delay;
unsigned int m_key_repeat;
UINT16 m_current_scancode;
UINT32 m_key_data[4];
UINT32 m_mod_data;
UINT8 m_key_scan_mode;
UINT8 m_break_flag;
UINT8 m_psg_regsel;
UINT8 m_psg_data;
UINT8 m_fdc_side;
UINT8 m_fdc_drive;
UINT8 m_fdc_irq_flag;
UINT8 m_fdc_drq_flag;
UINT8 m_fm77av_ym_irq;
UINT8 m_speaker_active;
UINT16 m_kanji_address;
fm7_encoder_t m_encoder;
fm7_mmr_t m_mmr;
UINT8 m_cp_prev;
std::unique_ptr<UINT8[]> m_video_ram;
emu_timer* m_fm77av_vsync_timer;
UINT8 m_type;
fm7_video_t m_video;
fm7_alu_t m_alu;
int m_sb_prev;
void fm77av_encoder_setup_command();
void fm77av_encoder_handle_command();
DECLARE_DRIVER_INIT(fm7);
virtual void machine_reset() override;
virtual void video_start() override;
DECLARE_MACHINE_START(fm7);
DECLARE_MACHINE_START(fm77av);
DECLARE_MACHINE_START(fm11);
DECLARE_MACHINE_START(fm16);
UINT32 screen_update_fm7(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
TIMER_CALLBACK_MEMBER(fm7_beeper_off);
TIMER_CALLBACK_MEMBER(fm77av_encoder_ack);
TIMER_CALLBACK_MEMBER(fm7_timer_irq);
@ -303,13 +332,7 @@ public:
TIMER_CALLBACK_MEMBER(fm7_keyboard_poll);
TIMER_CALLBACK_MEMBER(fm77av_alu_task_end);
TIMER_CALLBACK_MEMBER(fm77av_vsync);
DECLARE_WRITE_LINE_MEMBER(fm7_fdc_intrq_w);
DECLARE_WRITE_LINE_MEMBER(fm7_fdc_drq_w);
DECLARE_READ8_MEMBER(fm77av_joy_1_r);
DECLARE_READ8_MEMBER(fm77av_joy_2_r);
IRQ_CALLBACK_MEMBER(fm7_irq_ack);
IRQ_CALLBACK_MEMBER(fm7_sub_irq_ack);
DECLARE_WRITE_LINE_MEMBER(fm77av_fmirq);
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_sub;
optional_device<cpu_device> m_x86;
@ -317,14 +340,19 @@ public:
required_device<beep_device> m_beeper;
optional_device<ym2203_device> m_ym;
optional_device<ay8910_device> m_psg;
required_device<centronics_device> m_centronics;
required_device<output_latch_device> m_cent_data_out;
required_device<mb8877_t> m_fdc;
required_device<floppy_connector> m_floppy0;
required_device<floppy_connector> m_floppy1;
floppy_image_device *m_floppy;
optional_region_ptr<UINT8> m_ram_ptr;
optional_region_ptr<UINT8> m_rom_ptr;
optional_region_ptr<UINT8> m_basic_ptr;
void fm7_alu_mask_write(UINT32 offset, int bank, UINT8 dat);
void fm7_alu_function_compare(UINT32 offset);
void fm7_alu_function_pset(UINT32 offset);
@ -350,11 +378,6 @@ public:
int m_centronics_ack;
int m_centronics_perror;
DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
DECLARE_WRITE_LINE_MEMBER(write_centronics_fault);
DECLARE_WRITE_LINE_MEMBER(write_centronics_ack);
DECLARE_WRITE_LINE_MEMBER(write_centronics_perror);
optional_memory_region m_kanji;
required_ioport m_key1;
required_ioport m_key2;
@ -383,7 +406,6 @@ public:
optional_device<address_map_bank_device> m_avbank15;
optional_device<address_map_bank_device> m_avbank16;
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
};

396
src/mame/includes/harddriv.h
View File

@ -46,7 +46,209 @@ class harddriv_state : public device_t
public:
harddriv_state(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
void init_strtdriv(void);
void init_harddriv(void);
void init_harddrivc(void);
void init_racedriv(void);
void init_racedrivb1(void);
void init_racedrivc(void);
void init_racedrivc1(void);
void init_hdrivair(void);
void init_hdrivairp(void);
void init_steeltal(void);
void init_steeltal1(void);
void init_steeltalp(void);
void init_stunrun(void);
void init_racedrivc_panorama_side();
mc68681_device* get_duart() { return m_duartn68681; }
screen_device* get_screen() { return m_screen; }
void init_video();
INTERRUPT_GEN_MEMBER(hd68k_irq_gen);
TIMER_CALLBACK_MEMBER(deferred_adsp_bank_switch);
TIMER_CALLBACK_MEMBER(rddsp32_sync_cb);
/*----------- defined in machine/harddriv.c -----------*/
/* Driver/Multisync board */
DECLARE_WRITE16_MEMBER( hd68k_irq_ack_w );
DECLARE_WRITE_LINE_MEMBER(harddriv_duart_irq_handler);
DECLARE_READ16_MEMBER( hd68k_gsp_io_r );
DECLARE_WRITE16_MEMBER( hd68k_gsp_io_w );
DECLARE_READ16_MEMBER( hd68k_msp_io_r );
DECLARE_WRITE16_MEMBER( hd68k_msp_io_w );
DECLARE_READ16_MEMBER( hd68k_a80000_r );
DECLARE_READ16_MEMBER( hd68k_port0_r );
DECLARE_READ16_MEMBER( hd68k_adc8_r );
DECLARE_READ16_MEMBER( hd68k_adc12_r );
DECLARE_READ16_MEMBER( hdc68k_port1_r );
DECLARE_READ16_MEMBER( hda68k_port1_r );
DECLARE_READ16_MEMBER( hdc68k_wheel_r );
DECLARE_READ16_MEMBER( hd68k_sound_reset_r );
DECLARE_WRITE16_MEMBER( hd68k_adc_control_w );
DECLARE_WRITE16_MEMBER( hd68k_wr0_write );
DECLARE_WRITE16_MEMBER( hd68k_wr1_write );
DECLARE_WRITE16_MEMBER( hd68k_wr2_write );
DECLARE_WRITE16_MEMBER( hd68k_nwr_w );
DECLARE_WRITE16_MEMBER( hdc68k_wheel_edge_reset_w );
DECLARE_READ16_MEMBER( hd68k_zram_r );
DECLARE_WRITE16_MEMBER( hd68k_zram_w );
DECLARE_WRITE16_MEMBER( hdgsp_io_w );
DECLARE_WRITE16_MEMBER( hdgsp_protection_w );
DECLARE_WRITE_LINE_MEMBER( hdgsp_irq_gen );
DECLARE_WRITE_LINE_MEMBER( hdmsp_irq_gen );
/* ADSP board */
DECLARE_READ16_MEMBER( hd68k_adsp_program_r );
DECLARE_WRITE16_MEMBER( hd68k_adsp_program_w );
DECLARE_READ16_MEMBER( hd68k_adsp_data_r );
DECLARE_WRITE16_MEMBER( hd68k_adsp_data_w );
DECLARE_READ16_MEMBER( hd68k_adsp_buffer_r );
DECLARE_WRITE16_MEMBER( hd68k_adsp_buffer_w );
DECLARE_WRITE16_MEMBER( hd68k_adsp_control_w );
DECLARE_WRITE16_MEMBER( hd68k_adsp_irq_clear_w );
DECLARE_READ16_MEMBER( hd68k_adsp_irq_state_r );
DECLARE_READ16_MEMBER( hdadsp_special_r );
DECLARE_WRITE16_MEMBER( hdadsp_special_w );
DECLARE_READ16_MEMBER(steeltal_dummy_r);
DECLARE_READ32_MEMBER(rddsp_unmap_r);
/* DS III/IV board */
DECLARE_WRITE16_MEMBER( hd68k_ds3_control_w );
DECLARE_READ16_MEMBER( hd68k_ds3_girq_state_r );
DECLARE_READ16_MEMBER( hd68k_ds3_gdata_r );
DECLARE_WRITE16_MEMBER( hd68k_ds3_gdata_w );
DECLARE_READ16_MEMBER( hdds3_special_r );
DECLARE_WRITE16_MEMBER( hdds3_special_w );
DECLARE_READ16_MEMBER( hdds3_control_r );
DECLARE_WRITE16_MEMBER( hdds3_control_w );
DECLARE_READ16_MEMBER( hd68k_ds3_program_r );
DECLARE_WRITE16_MEMBER( hd68k_ds3_program_w );
DECLARE_READ16_MEMBER( hd68k_ds3_sdata_r );
DECLARE_WRITE16_MEMBER( hd68k_ds3_sdata_w );
DECLARE_WRITE16_MEMBER( hd68k_ds3_sirq_clear_w );
DECLARE_READ16_MEMBER( hd68k_ds3_sirq_state_r );
DECLARE_READ16_MEMBER( hdds3_sdsp_special_r );
DECLARE_WRITE16_MEMBER( hdds3_sdsp_special_w );
DECLARE_READ16_MEMBER( hdds3_sdsp_control_r );
DECLARE_WRITE16_MEMBER( hdds3_sdsp_control_w );
DECLARE_READ16_MEMBER( hdds3_xdsp_control_r );
DECLARE_WRITE16_MEMBER( hdds3_xdsp_control_w );
TIMER_CALLBACK_MEMBER( xsdp_sport1_irq_off_callback );
WRITE16_MEMBER( watchdog_reset16_w );
DECLARE_READ16_MEMBER( hdgsp_control_lo_r );
DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w );
DECLARE_READ16_MEMBER( hdgsp_control_hi_r );
DECLARE_WRITE16_MEMBER( hdgsp_control_hi_w );
DECLARE_READ16_MEMBER( hdgsp_vram_2bpp_r );
DECLARE_WRITE16_MEMBER( hdgsp_vram_1bpp_w );
DECLARE_WRITE16_MEMBER( hdgsp_vram_2bpp_w );
DECLARE_READ16_MEMBER( hdgsp_paletteram_lo_r );
DECLARE_WRITE16_MEMBER( hdgsp_paletteram_lo_w );
DECLARE_READ16_MEMBER( hdgsp_paletteram_hi_r );
DECLARE_WRITE16_MEMBER( hdgsp_paletteram_hi_w );
/* DSK board */
DECLARE_WRITE32_MEMBER(hddsk_update_pif);
/* DS III/IV board */
TIMER_DEVICE_CALLBACK_MEMBER( ds3sdsp_internal_timer_callback );
TIMER_DEVICE_CALLBACK_MEMBER( ds3xdsp_internal_timer_callback );
TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_driver);
TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_multisync);
/*----------- defined in video/harddriv.c -----------*/
TMS340X0_TO_SHIFTREG_CB_MEMBER(hdgsp_write_to_shiftreg);
TMS340X0_FROM_SHIFTREG_CB_MEMBER(hdgsp_read_from_shiftreg);
INTERRUPT_GEN_MEMBER(video_int_gen);
DECLARE_WRITE_LINE_MEMBER(sound_int_write_line);
/* DSK board */
DECLARE_WRITE16_MEMBER( hd68k_dsk_control_w );
DECLARE_READ16_MEMBER( hd68k_dsk_ram_r );
DECLARE_WRITE16_MEMBER( hd68k_dsk_ram_w );
DECLARE_READ16_MEMBER( hd68k_dsk_small_rom_r );
DECLARE_READ16_MEMBER( hd68k_dsk_rom_r );
DECLARE_WRITE16_MEMBER( hd68k_dsk_dsp32_w );
DECLARE_READ16_MEMBER( hd68k_dsk_dsp32_r );
DECLARE_WRITE32_MEMBER( rddsp32_sync0_w );
DECLARE_WRITE32_MEMBER( rddsp32_sync1_w );
/* DSPCOM board */
DECLARE_WRITE16_MEMBER( hddspcom_control_w );
DECLARE_WRITE16_MEMBER( rd68k_slapstic_w );
DECLARE_READ16_MEMBER( rd68k_slapstic_r );
/* Game-specific protection */
DECLARE_WRITE16_MEMBER( st68k_sloop_w );
DECLARE_READ16_MEMBER( st68k_sloop_r );
DECLARE_READ16_MEMBER( st68k_sloop_alt_r );
DECLARE_WRITE16_MEMBER( st68k_protosloop_w );
DECLARE_READ16_MEMBER( st68k_protosloop_r );
/* GSP optimizations */
DECLARE_READ16_MEMBER( hdgsp_speedup_r );
DECLARE_WRITE16_MEMBER( hdgsp_speedup1_w );
DECLARE_WRITE16_MEMBER( hdgsp_speedup2_w );
DECLARE_READ16_MEMBER( rdgsp_speedup1_r );
DECLARE_WRITE16_MEMBER( rdgsp_speedup1_w );
/* MSP optimizations */
DECLARE_READ16_MEMBER( hdmsp_speedup_r );
DECLARE_WRITE16_MEMBER( hdmsp_speedup_w );
/* ADSP optimizations */
DECLARE_READ16_MEMBER( hdadsp_speedup_r );
DECLARE_READ16_MEMBER( hdds3_speedup_r );
DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback);
DECLARE_WRITE32_MEMBER(hdds3sdsp_serial_tx_callback);
DECLARE_READ32_MEMBER(hdds3sdsp_serial_rx_callback);
DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback);
DECLARE_WRITE32_MEMBER(hdds3xdsp_serial_tx_callback);
DECLARE_READ32_MEMBER(hdds3xdsp_serial_rx_callback);
protected:
required_device<cpu_device> m_maincpu;
required_device<tms34010_device> m_gsp;
optional_device<tms34010_device> m_msp;
@ -63,13 +265,15 @@ public:
optional_device<mc68681_device> m_duartn68681;
UINT8 m_hd34010_host_access;
UINT8 m_dsk_pio_access;
optional_shared_ptr<UINT16> m_msp_ram;
UINT16 * m_dsk_ram;
UINT16 * m_dsk_rom;
optional_device<eeprom_parallel_28xx_device> m_dsk_10c;
optional_device<eeprom_parallel_28xx_device> m_dsk_30c;
UINT8 m_dsk_pio_access;
UINT16 * m_m68k_slapstic_base;
UINT16 * m_m68k_sloop_alt_base;
@ -140,7 +344,7 @@ public:
UINT16 m_som_memory[0x8000/2];
UINT16 * m_adsp_pgm_memory_word;
UINT16 * m_ds3_sdata_memory;
optional_region_ptr<UINT16> m_ds3_sdata_memory;
UINT32 m_ds3_sdata_memory_size;
UINT8 m_ds3_gcmd;
@ -204,8 +408,6 @@ public:
INT8 m_gfx_finescroll;
UINT8 m_gfx_palettebank;
virtual void update_interrupts();
DECLARE_READ16_MEMBER(steeltal_dummy_r);
DECLARE_READ32_MEMBER(rddsp_unmap_r);
void init_driver();
void init_multisync(int compact_inputs);
void init_adsp();
@ -217,217 +419,33 @@ public:
void racedrivc_init_common(offs_t gsp_protection);
void steeltal_init_common(offs_t ds3_transfer_pc, int proto_sloop);
void init_strtdriv(void);
void init_harddriv(void);
void init_harddrivc(void);
void init_racedriv(void);
void init_racedrivb1(void);
void init_racedrivc(void);
void init_racedrivc1(void);
void init_hdrivair(void);
void init_hdrivairp(void);
void init_steeltal(void);
void init_steeltal1(void);
void init_steeltalp(void);
void init_stunrun(void);
void init_racedrivc_panorama_side();
void init_video();
INTERRUPT_GEN_MEMBER(hd68k_irq_gen);
TIMER_CALLBACK_MEMBER(deferred_adsp_bank_switch);
TIMER_CALLBACK_MEMBER(rddsp32_sync_cb);
required_device<mc68681_device> m_duart;
optional_device<asic65_device> m_asic65;
DECLARE_WRITE_LINE_MEMBER(harddriv_duart_irq_handler);
/*----------- defined in machine/harddriv.c -----------*/
/* Driver/Multisync board */
DECLARE_WRITE16_MEMBER( hd68k_irq_ack_w );
DECLARE_READ16_MEMBER( hd68k_gsp_io_r );
DECLARE_WRITE16_MEMBER( hd68k_gsp_io_w );
DECLARE_READ16_MEMBER( hd68k_msp_io_r );
DECLARE_WRITE16_MEMBER( hd68k_msp_io_w );
DECLARE_READ16_MEMBER( hd68k_a80000_r );
DECLARE_READ16_MEMBER( hd68k_port0_r );
DECLARE_READ16_MEMBER( hd68k_adc8_r );
DECLARE_READ16_MEMBER( hd68k_adc12_r );
DECLARE_READ16_MEMBER( hdc68k_port1_r );
DECLARE_READ16_MEMBER( hda68k_port1_r );
DECLARE_READ16_MEMBER( hdc68k_wheel_r );
DECLARE_READ16_MEMBER( hd68k_sound_reset_r );
DECLARE_WRITE16_MEMBER( hd68k_adc_control_w );
DECLARE_WRITE16_MEMBER( hd68k_wr0_write );
DECLARE_WRITE16_MEMBER( hd68k_wr1_write );
DECLARE_WRITE16_MEMBER( hd68k_wr2_write );
DECLARE_WRITE16_MEMBER( hd68k_nwr_w );
DECLARE_WRITE16_MEMBER( hdc68k_wheel_edge_reset_w );
DECLARE_READ16_MEMBER( hd68k_zram_r );
DECLARE_WRITE16_MEMBER( hd68k_zram_w );
DECLARE_WRITE16_MEMBER( hdgsp_io_w );
DECLARE_WRITE16_MEMBER( hdgsp_protection_w );
DECLARE_WRITE_LINE_MEMBER( hdgsp_irq_gen );
DECLARE_WRITE_LINE_MEMBER( hdmsp_irq_gen );
/* ADSP board */
DECLARE_READ16_MEMBER( hd68k_adsp_program_r );
DECLARE_WRITE16_MEMBER( hd68k_adsp_program_w );
DECLARE_READ16_MEMBER( hd68k_adsp_data_r );
DECLARE_WRITE16_MEMBER( hd68k_adsp_data_w );
DECLARE_READ16_MEMBER( hd68k_adsp_buffer_r );
DECLARE_WRITE16_MEMBER( hd68k_adsp_buffer_w );
DECLARE_WRITE16_MEMBER( hd68k_adsp_control_w );
DECLARE_WRITE16_MEMBER( hd68k_adsp_irq_clear_w );
DECLARE_READ16_MEMBER( hd68k_adsp_irq_state_r );
DECLARE_READ16_MEMBER( hdadsp_special_r );
DECLARE_WRITE16_MEMBER( hdadsp_special_w );
/* DS III/IV board */
void update_ds3_irq();
void update_ds3_sirq();
DECLARE_WRITE16_MEMBER( hd68k_ds3_control_w );
DECLARE_READ16_MEMBER( hd68k_ds3_girq_state_r );
DECLARE_READ16_MEMBER( hd68k_ds3_gdata_r );
DECLARE_WRITE16_MEMBER( hd68k_ds3_gdata_w );
DECLARE_READ16_MEMBER( hdds3_special_r );
DECLARE_WRITE16_MEMBER( hdds3_special_w );
DECLARE_READ16_MEMBER( hdds3_control_r );
DECLARE_WRITE16_MEMBER( hdds3_control_w );
DECLARE_READ16_MEMBER( hd68k_ds3_program_r );
DECLARE_WRITE16_MEMBER( hd68k_ds3_program_w );
DECLARE_READ16_MEMBER( hd68k_ds3_sdata_r );
DECLARE_WRITE16_MEMBER( hd68k_ds3_sdata_w );
DECLARE_WRITE16_MEMBER( hd68k_ds3_sirq_clear_w );
DECLARE_READ16_MEMBER( hd68k_ds3_sirq_state_r );
DECLARE_READ16_MEMBER( hdds3_sdsp_special_r );
DECLARE_WRITE16_MEMBER( hdds3_sdsp_special_w );
DECLARE_READ16_MEMBER( hdds3_sdsp_control_r );
DECLARE_WRITE16_MEMBER( hdds3_sdsp_control_w );
DECLARE_READ16_MEMBER( hdds3_xdsp_control_r );
DECLARE_WRITE16_MEMBER( hdds3_xdsp_control_w );
void hdds3sdsp_reset_timer();
void hdds3xdsp_reset_timer();
TIMER_CALLBACK_MEMBER( xsdp_sport1_irq_off_callback );
/* DSK board */
DECLARE_WRITE16_MEMBER( hd68k_dsk_control_w );
DECLARE_READ16_MEMBER( hd68k_dsk_ram_r );
DECLARE_WRITE16_MEMBER( hd68k_dsk_ram_w );
DECLARE_READ16_MEMBER( hd68k_dsk_small_rom_r );
DECLARE_READ16_MEMBER( hd68k_dsk_rom_r );
DECLARE_WRITE16_MEMBER( hd68k_dsk_dsp32_w );
DECLARE_READ16_MEMBER( hd68k_dsk_dsp32_r );
DECLARE_WRITE32_MEMBER( rddsp32_sync0_w );
DECLARE_WRITE32_MEMBER( rddsp32_sync1_w );
/* DSPCOM board */
DECLARE_WRITE16_MEMBER( hddspcom_control_w );
DECLARE_WRITE16_MEMBER( rd68k_slapstic_w );
DECLARE_READ16_MEMBER( rd68k_slapstic_r );
/* Game-specific protection */
int st68k_sloop_tweak(offs_t offset);
DECLARE_WRITE16_MEMBER( st68k_sloop_w );
DECLARE_READ16_MEMBER( st68k_sloop_r );
DECLARE_READ16_MEMBER( st68k_sloop_alt_r );
int st68k_protosloop_tweak(offs_t offset);
DECLARE_WRITE16_MEMBER( st68k_protosloop_w );
DECLARE_READ16_MEMBER( st68k_protosloop_r );
/* GSP optimizations */
DECLARE_READ16_MEMBER( hdgsp_speedup_r );
DECLARE_WRITE16_MEMBER( hdgsp_speedup1_w );
DECLARE_WRITE16_MEMBER( hdgsp_speedup2_w );
DECLARE_READ16_MEMBER( rdgsp_speedup1_r );
DECLARE_WRITE16_MEMBER( rdgsp_speedup1_w );
/* MSP optimizations */
DECLARE_READ16_MEMBER( hdmsp_speedup_r );
DECLARE_WRITE16_MEMBER( hdmsp_speedup_w );
/* ADSP optimizations */
DECLARE_READ16_MEMBER( hdadsp_speedup_r );
DECLARE_READ16_MEMBER( hdds3_speedup_r );
DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback);
DECLARE_WRITE32_MEMBER(hdds3sdsp_serial_tx_callback);
DECLARE_READ32_MEMBER(hdds3sdsp_serial_rx_callback);
DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback);
DECLARE_WRITE32_MEMBER(hdds3xdsp_serial_tx_callback);
DECLARE_READ32_MEMBER(hdds3xdsp_serial_rx_callback);
/*----------- defined in video/harddriv.c -----------*/
TMS340X0_TO_SHIFTREG_CB_MEMBER(hdgsp_write_to_shiftreg);
TMS340X0_FROM_SHIFTREG_CB_MEMBER(hdgsp_read_from_shiftreg);
void update_palette_bank(int newbank);
DECLARE_READ16_MEMBER( hdgsp_control_lo_r );
DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w );
DECLARE_READ16_MEMBER( hdgsp_control_hi_r );
DECLARE_WRITE16_MEMBER( hdgsp_control_hi_w );
DECLARE_READ16_MEMBER( hdgsp_vram_2bpp_r );
DECLARE_WRITE16_MEMBER( hdgsp_vram_1bpp_w );
DECLARE_WRITE16_MEMBER( hdgsp_vram_2bpp_w );
inline void gsp_palette_change(int offset);
DECLARE_READ16_MEMBER( hdgsp_paletteram_lo_r );
DECLARE_WRITE16_MEMBER( hdgsp_paletteram_lo_w );
DECLARE_READ16_MEMBER( hdgsp_paletteram_hi_r );
DECLARE_WRITE16_MEMBER( hdgsp_paletteram_hi_w );
/* DSK board */
DECLARE_WRITE32_MEMBER(hddsk_update_pif);
/* DS III/IV board */
TIMER_DEVICE_CALLBACK_MEMBER( ds3sdsp_internal_timer_callback );
TIMER_DEVICE_CALLBACK_MEMBER( ds3xdsp_internal_timer_callback );
TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_driver);
TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_multisync);
UINT8 m_sound_int_state;
UINT8 m_video_int_state;
optional_device<palette_device> m_palette;
int get_hblank(screen_device &screen) const { return (screen.hpos() > (screen.width() * 9 / 10)); }
WRITE16_MEMBER( watchdog_reset16_w );
INTERRUPT_GEN_MEMBER(video_int_gen);
DECLARE_WRITE_LINE_MEMBER(sound_int_write_line);
optional_device<atari_slapstic_device> m_slapstic_device;
protected:
//virtual machine_config_constructor device_mconfig_additions() const;
virtual void device_start() override;

4
src/mame/machine/gamecom.cpp
View File

@ -177,8 +177,8 @@ WRITE8_MEMBER( gamecom_state::gamecom_pio_w )
/* P3 bit6 clear, bit7 set -> enable cartridge port #1? */
switch (data & 0xc0)
{
case 0x40: m_cart_ptr = m_cart1_rom->base(); break;
case 0x80: m_cart_ptr = m_cart2_rom->base(); break;
case 0x40: m_cart_ptr = m_cart1_rom != NULL ? m_cart1_rom->base() : NULL; break;
case 0x80: m_cart_ptr = m_cart2_rom != NULL ? m_cart2_rom->base() : NULL; break;
default: m_cart_ptr = nullptr; break;
}
return;

28
src/mame/video/dynax.cpp
View File

@ -393,11 +393,7 @@ void dynax_state::blitter_plot_pixel( int layer, int mask, int x, int y, int pen
*/
int dynax_state::blitter_drawgfx( int layer, int mask, const char *gfx, int src, int pen, int x, int y, int wrap, int flags )
{
UINT8 cmd;
UINT8 *ROM = memregion(gfx)->base();
size_t ROM_size = memregion(gfx)->bytes();
int sx;
size_t rom_size = m_gfx_region.bytes();
if (m_layer_layout == LAYOUT_HNORIDUR) // e.g. yarunara
pen = ((pen >> 4) & 0xf) | ((mask & 0x10) ? ((pen & 0x08) << 1) : 0);
@ -409,18 +405,14 @@ int dynax_state::blitter_drawgfx( int layer, int mask, const char *gfx, int src,
if (flags & 1)
{
int start, len;
/* Clear the buffer(s) starting from the given scanline and exit */
int addr = x + (y << 8);
int start = addr;
if (m_flipscreen)
start = 0;
else
start = addr;
len = 0x10000 - addr;
int len = 0x10000 - addr;
switch (m_layer_layout)
{
@ -469,20 +461,20 @@ int dynax_state::blitter_drawgfx( int layer, int mask, const char *gfx, int src,
return src;
}
sx = x;
int sx = x;
src &= 0xfffff;
for ( ;; )
{
if (src >= ROM_size)
if (src >= rom_size)
{
popmessage("GFXROM %s OVER %08x",gfx,src);
LOG(("\nGFXROM %s OVER %08x",gfx,src));
return src;
}
cmd = ROM[src++];
UINT8 cmd = m_gfx_region[src++];
src &= 0xfffff;
if (!(flags & 0x02)) // Ignore the pens specified in ROM, draw everything with the pen supplied as parameter
pen = (pen & 0xf0) | ((cmd & 0xf0) >> 4);
@ -503,24 +495,24 @@ int dynax_state::blitter_drawgfx( int layer, int mask, const char *gfx, int src,
popmessage("Blitter unknown command %06X: %02X\n", src - 1, cmd);
case 0xd: // Skip X pixels
if (src >= ROM_size)
if (src >= rom_size)
{
popmessage("GFXROM %s OVER %08x",gfx,src);
LOG(("\nGFXROM %s OVER %08x",gfx,src));
return src;
}
x = sx + ROM[src++];
x = sx + m_gfx_region[src++];
src &= 0xfffff;
/* fall through into next case */
case 0xc: // Draw N pixels
if (src >= ROM_size)
if (src >= rom_size)
{
popmessage("GFXROM %s OVER %08x",gfx,src);
LOG(("\nGFXROM %s OVER %08x",gfx,src));
return src;
}
cmd = ROM[src++];
cmd = m_gfx_region[src++];
src &= 0xfffff;
/* fall through into next case */