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s2650.c: Modernized cpu core (nw)

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This commit is contained in:
Wilbert Pol 2013-09-06 19:44:05 +00:00
parent 6abd129bf8
commit 3e5c441b1c
3 changed files with 569 additions and 575 deletions
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1058
src/emu/cpu/s2650/s2650.c
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File diff suppressed because it is too large Load Diff

78
src/emu/cpu/s2650/s2650.h
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@ -21,8 +21,82 @@ enum
S2650_FO_PORT = 0x0103 /* Fake FO Line */
};
DECLARE_LEGACY_CPU_DEVICE(S2650, s2650);
extern CPU_DISASSEMBLE( s2650 );
extern const device_type S2650;
class s2650_device : public cpu_device
{
public:
// construction/destruction
s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 5; }
virtual UINT32 execute_max_cycles() const { return 13; }
virtual UINT32 execute_input_lines() const { return 2; }
virtual UINT32 execute_default_irq_vector() const { return 0; }
virtual void execute_run();
virtual void execute_set_input(int inputnum, int state);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL );
}
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry);
virtual void state_export(const device_state_entry &entry);
void state_string_export(const device_state_entry &entry, astring &string);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const { return 3; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
private:
address_space_config m_program_config;
address_space_config m_io_config;
UINT16 m_ppc; /* previous program counter (page + iar) */
UINT16 m_page; /* 8K page select register (A14..A13) */
UINT16 m_iar; /* instruction address register (A12..A0) */
UINT16 m_ea; /* effective address (A14..A0) */
UINT8 m_psl; /* processor status lower */
UINT8 m_psu; /* processor status upper */
UINT8 m_r; /* absolute addressing dst/src register */
UINT8 m_reg[7]; /* 7 general purpose registers */
UINT8 m_halt; /* 1 if cpu is halted */
UINT8 m_ir; /* instruction register */
UINT16 m_ras[8]; /* 8 return address stack entries */
UINT8 m_irq_state;
int m_icount;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
// For debugger
UINT16 m_debugger_temp;
inline void set_psu(UINT8 new_val);
inline UINT8 get_sp();
inline void set_sp(UINT8 new_sp);
inline int check_irq_line();
inline UINT8 ROP();
inline UINT8 ARG();
void s2650_set_flag(int state);
int s2650_get_flag();
void s2650_set_sense(int state);
int s2650_get_sense();
};
#endif /* __S2650_H__ */

8
src/emu/cpu/s2650/s2650cpu.h
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@ -27,7 +27,7 @@
#define FO 0x40 /* flag output */
#define SI 0x80 /* sense input */
#define R0 s2650c->reg[0]
#define R1 s2650c->reg[1]
#define R2 s2650c->reg[2]
#define R3 s2650c->reg[3]
#define R0 m_reg[0]
#define R1 m_reg[1]
#define R2 m_reg[2]
#define R3 m_reg[3]