hcastle: simplify ram banking

This commit is contained in:
hap 2023-05-06 21:21:01 +02:00
parent 9ce5064498
commit 3e707ab942

View File

@ -43,7 +43,9 @@ public:
m_k007232(*this, "k007232"),
m_spriteram(*this, "spriteram%u", 1U),
m_pf_videoram(*this, "pf_videoram%u", 1U),
m_mainbank(*this, "mainbank")
m_bankedram(*this, "bankedram", 0x1000, ENDIANNESS_BIG),
m_mainbank(*this, "mainbank"),
m_rambank(*this, "rambank")
{ }
void hcastle(machine_config &config);
@ -65,10 +67,9 @@ private:
// memory pointers
required_shared_ptr_array<uint8_t, 2> m_pf_videoram;
memory_share_creator<u8> m_bankedram;
required_memory_bank m_mainbank;
uint8_t m_workram[0x2000];
uint8_t m_control;
required_memory_bank m_rambank;
// video-related
tilemap_t *m_tilemap[2]{};
@ -90,9 +91,6 @@ private:
template <uint8_t Which> void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, uint8_t *sbank);
void volume_callback(uint8_t data);
uint8_t workram_r(offs_t offset);
void workram_w(offs_t offset, uint8_t data);
void main_map(address_map &map);
void sound_map(address_map &map);
};
@ -289,46 +287,15 @@ uint32_t hcastle_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
// machine
// Work RAM is an 8KiB 6264 RAM (H11) mapped to a 6 KiB region.
// The first 2KiB is bankswitched by bit 5 of the LS273 control
// latch (J11), while the upper 4KiB is directly mapped.
uint8_t hcastle_state::workram_r(offs_t offset)
{
if (offset >= 0x800)
{
return m_workram[offset + 0x800];
}
if (BIT(m_control, 5))
{
return m_workram[(offset & 0x7ff) | 0x800];
}
return m_workram[offset & 0x7ff];
}
void hcastle_state::workram_w(offs_t offset, uint8_t data)
{
if (offset >= 0x800)
{
m_workram[offset+0x800] = data;
return;
}
if (BIT(m_control, 5))
{
m_workram[(offset & 0x7ff) | 0x800] = data;
return;
}
m_workram[offset & 0x7ff] = data;
}
void hcastle_state::bankswitch_w(uint8_t data)
{
m_control = data;
m_mainbank->set_entry(data & 0x1f);
// Work RAM is an 8KiB 6264 RAM (H11) mapped to a 6 KiB region.
// The first 2KiB is bankswitched by bit 5 of the LS273 control
// latch (J11), while the upper 4KiB is directly mapped.
m_rambank->set_entry(BIT(data, 5));
machine().bookkeeping().coin_counter_w(0, data & 0x40);
machine().bookkeeping().coin_counter_w(1, data & 0x80);
}
@ -358,7 +325,8 @@ void hcastle_state::main_map(address_map &map)
map(0x0600, 0x06ff).ram().w(m_palette, FUNC(palette_device::write_indirect)).share("palette");
// Version E accesses 0x700-0x7ff, but nothing maps there on the PCB. This is fixed in
// version K and all later versions, so it seems to be a bug that was fixed.
map(0x0800, 0x1fff).rw(FUNC(hcastle_state::workram_r), FUNC(hcastle_state::workram_w));
map(0x0800, 0x0fff).bankrw(m_rambank);
map(0x1000, 0x1fff).ram();
map(0x2000, 0x2fff).ram().w(FUNC(hcastle_state::pf_video_w<0>)).share(m_pf_videoram[0]);
map(0x3000, 0x3fff).ram().share("spriteram1");
map(0x4000, 0x4fff).ram().w(FUNC(hcastle_state::pf_video_w<1>)).share(m_pf_videoram[1]);
@ -468,12 +436,11 @@ void hcastle_state::machine_start()
uint8_t *rom = memregion("maincpu")->base();
m_mainbank->configure_entries(0, 16, &rom[0x10000], 0x2000);
m_rambank->configure_entries(0, 2, m_bankedram, 0x800);
save_item(NAME(m_pf_bankbase));
save_item(NAME(m_gfx_bank));
save_item(NAME(m_old_pf));
save_item(NAME(m_control));
save_item(NAME(m_workram));
}
void hcastle_state::machine_reset()