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https://github.com/holub/mame
synced 2025-04-25 01:40:16 +03:00
hcastle: simplify ram banking
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parent
9ce5064498
commit
3e707ab942
@ -43,7 +43,9 @@ public:
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m_k007232(*this, "k007232"),
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m_spriteram(*this, "spriteram%u", 1U),
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m_pf_videoram(*this, "pf_videoram%u", 1U),
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m_mainbank(*this, "mainbank")
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m_bankedram(*this, "bankedram", 0x1000, ENDIANNESS_BIG),
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m_mainbank(*this, "mainbank"),
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m_rambank(*this, "rambank")
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{ }
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void hcastle(machine_config &config);
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@ -65,10 +67,9 @@ private:
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// memory pointers
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required_shared_ptr_array<uint8_t, 2> m_pf_videoram;
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memory_share_creator<u8> m_bankedram;
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required_memory_bank m_mainbank;
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uint8_t m_workram[0x2000];
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uint8_t m_control;
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required_memory_bank m_rambank;
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// video-related
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tilemap_t *m_tilemap[2]{};
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@ -90,9 +91,6 @@ private:
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template <uint8_t Which> void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, uint8_t *sbank);
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void volume_callback(uint8_t data);
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uint8_t workram_r(offs_t offset);
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void workram_w(offs_t offset, uint8_t data);
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void main_map(address_map &map);
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void sound_map(address_map &map);
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};
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@ -289,46 +287,15 @@ uint32_t hcastle_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
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// machine
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// Work RAM is an 8KiB 6264 RAM (H11) mapped to a 6 KiB region.
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// The first 2KiB is bankswitched by bit 5 of the LS273 control
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// latch (J11), while the upper 4KiB is directly mapped.
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uint8_t hcastle_state::workram_r(offs_t offset)
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{
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if (offset >= 0x800)
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{
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return m_workram[offset + 0x800];
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}
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if (BIT(m_control, 5))
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{
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return m_workram[(offset & 0x7ff) | 0x800];
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}
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return m_workram[offset & 0x7ff];
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}
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void hcastle_state::workram_w(offs_t offset, uint8_t data)
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{
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if (offset >= 0x800)
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{
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m_workram[offset+0x800] = data;
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return;
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}
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if (BIT(m_control, 5))
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{
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m_workram[(offset & 0x7ff) | 0x800] = data;
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return;
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}
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m_workram[offset & 0x7ff] = data;
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}
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void hcastle_state::bankswitch_w(uint8_t data)
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{
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m_control = data;
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m_mainbank->set_entry(data & 0x1f);
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// Work RAM is an 8KiB 6264 RAM (H11) mapped to a 6 KiB region.
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// The first 2KiB is bankswitched by bit 5 of the LS273 control
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// latch (J11), while the upper 4KiB is directly mapped.
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m_rambank->set_entry(BIT(data, 5));
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machine().bookkeeping().coin_counter_w(0, data & 0x40);
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machine().bookkeeping().coin_counter_w(1, data & 0x80);
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}
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@ -358,7 +325,8 @@ void hcastle_state::main_map(address_map &map)
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map(0x0600, 0x06ff).ram().w(m_palette, FUNC(palette_device::write_indirect)).share("palette");
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// Version E accesses 0x700-0x7ff, but nothing maps there on the PCB. This is fixed in
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// version K and all later versions, so it seems to be a bug that was fixed.
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map(0x0800, 0x1fff).rw(FUNC(hcastle_state::workram_r), FUNC(hcastle_state::workram_w));
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map(0x0800, 0x0fff).bankrw(m_rambank);
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map(0x1000, 0x1fff).ram();
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map(0x2000, 0x2fff).ram().w(FUNC(hcastle_state::pf_video_w<0>)).share(m_pf_videoram[0]);
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map(0x3000, 0x3fff).ram().share("spriteram1");
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map(0x4000, 0x4fff).ram().w(FUNC(hcastle_state::pf_video_w<1>)).share(m_pf_videoram[1]);
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@ -468,12 +436,11 @@ void hcastle_state::machine_start()
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uint8_t *rom = memregion("maincpu")->base();
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m_mainbank->configure_entries(0, 16, &rom[0x10000], 0x2000);
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m_rambank->configure_entries(0, 2, m_bankedram, 0x800);
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save_item(NAME(m_pf_bankbase));
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save_item(NAME(m_gfx_bank));
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save_item(NAME(m_old_pf));
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save_item(NAME(m_control));
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save_item(NAME(m_workram));
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}
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void hcastle_state::machine_reset()
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