From 3fcf8dcf30b8691445778fad65c48f81d631c0a6 Mon Sep 17 00:00:00 2001 From: yz70s Date: Wed, 1 Jan 2020 21:37:43 +0100 Subject: [PATCH] naomi: add communication with mainboard to dimm board plus some ram (nw) --- src/mame/machine/naomigd.cpp | 185 ++++++++++++++++++++++++++++++++++- src/mame/machine/naomigd.h | 36 +++++++ 2 files changed, 219 insertions(+), 2 deletions(-) diff --git a/src/mame/machine/naomigd.cpp b/src/mame/machine/naomigd.cpp index 7829442f7c0..a368f886013 100644 --- a/src/mame/machine/naomigd.cpp +++ b/src/mame/machine/naomigd.cpp @@ -408,7 +408,14 @@ naomi_gdrom_board::naomi_gdrom_board(const machine_config &mconfig, const char * m_i2c0(*this, "i2c_0"), m_i2c1(*this, "i2c_1"), m_eeprom(*this, "eeprom"), - picdata(*this, finder_base::DUMMY_TAG) + picdata(*this, finder_base::DUMMY_TAG), + dimm_command(0xffff), + dimm_offsetl(0xffff), + dimm_parameterl(0xffff), + dimm_parameterh(0xffff), + dimm_status(0xffff), + sh4_unknown(0), + dimm_des_key(0) { image_tag = nullptr; picbus = 0; @@ -418,9 +425,30 @@ naomi_gdrom_board::naomi_gdrom_board(const machine_config &mconfig, const char * picbus_used = false; } +void naomi_gdrom_board::submap(address_map &map) +{ + naomi_board::submap(map); + map(0x3c / 2, 0x3c / 2 + 1).rw(FUNC(naomi_gdrom_board::dimm_command_r), FUNC(naomi_gdrom_board::dimm_command_w)); + map(0x40 / 2, 0x40 / 2 + 1).rw(FUNC(naomi_gdrom_board::dimm_offsetl_r), FUNC(naomi_gdrom_board::dimm_offsetl_w)); + map(0x44 / 2, 0x44 / 2 + 1).rw(FUNC(naomi_gdrom_board::dimm_parameterl_r), FUNC(naomi_gdrom_board::dimm_parameterl_w)); + map(0x48 / 2, 0x48 / 2 + 1).rw(FUNC(naomi_gdrom_board::dimm_parameterh_r), FUNC(naomi_gdrom_board::dimm_parameterh_w)); + map(0x4c / 2, 0x4c / 2 + 1).rw(FUNC(naomi_gdrom_board::dimm_status_r), FUNC(naomi_gdrom_board::dimm_status_w)); +} + void naomi_gdrom_board::sh4_map(address_map &map) { - map(0x00000000, 0x001fffff).rom().region("bios", 0); + map(0x00000000, 0x001fffff).mirror(0xa0000000).rom().region("bios", 0); + map(0x0c000000, 0x0cffffff).ram(); + map(0x10000000, 0x103fffff).ram(); + map(0x14000000, 0x14000003).rw(FUNC(naomi_gdrom_board::sh4_unknown_r), FUNC(naomi_gdrom_board::sh4_unknown_w)); + map(0x14000014, 0x14000017).rw(FUNC(naomi_gdrom_board::sh4_command_r), FUNC(naomi_gdrom_board::sh4_command_w)); + map(0x14000018, 0x1400001b).rw(FUNC(naomi_gdrom_board::sh4_offsetl_r), FUNC(naomi_gdrom_board::sh4_offsetl_w)); + map(0x1400001c, 0x1400001f).rw(FUNC(naomi_gdrom_board::sh4_parameterl_r), FUNC(naomi_gdrom_board::sh4_parameterl_w)); + map(0x14000020, 0x14000023).rw(FUNC(naomi_gdrom_board::sh4_parameterh_r), FUNC(naomi_gdrom_board::sh4_parameterh_w)); + map(0x14000024, 0x14000027).rw(FUNC(naomi_gdrom_board::sh4_status_r), FUNC(naomi_gdrom_board::sh4_status_w)); + map(0x1400002c, 0x1400002f).lr32([]() { return 0x0c; }, "Constant 0x0c"); // 0x0a or 0x0e possible too + map(0x14000030, 0x14000033).rw(FUNC(naomi_gdrom_board::sh4_des_keyl_r), FUNC(naomi_gdrom_board::sh4_des_keyl_w)); + map(0x14000034, 0x14000037).rw(FUNC(naomi_gdrom_board::sh4_des_keyh_r), FUNC(naomi_gdrom_board::sh4_des_keyh_w)); map.unmap_value_high(); } @@ -429,6 +457,152 @@ void naomi_gdrom_board::sh4_io_map(address_map &map) map(0x00, 0x0f).rw(FUNC(naomi_gdrom_board::i2cmem_dimm_r), FUNC(naomi_gdrom_board::i2cmem_dimm_w)); } +WRITE16_MEMBER(naomi_gdrom_board::dimm_command_w) +{ + dimm_command = data; +} + +READ16_MEMBER(naomi_gdrom_board::dimm_command_r) +{ + return dimm_command & 0xffff; +} + +WRITE16_MEMBER(naomi_gdrom_board::dimm_offsetl_w) +{ + dimm_offsetl = data; +} + +READ16_MEMBER(naomi_gdrom_board::dimm_offsetl_r) +{ + return dimm_offsetl & 0xffff; +} + +WRITE16_MEMBER(naomi_gdrom_board::dimm_parameterl_w) +{ + dimm_parameterl = data; +} + +READ16_MEMBER(naomi_gdrom_board::dimm_parameterl_r) +{ + return dimm_parameterl & 0xffff; +} + +WRITE16_MEMBER(naomi_gdrom_board::dimm_parameterh_w) +{ + dimm_parameterh = data; +} + +READ16_MEMBER(naomi_gdrom_board::dimm_parameterh_r) +{ + return dimm_parameterh & 0xffff; +} + +WRITE16_MEMBER(naomi_gdrom_board::dimm_status_w) +{ + dimm_status = data; + if (dimm_status & 0x001) + m_maincpu->set_input_line(SH4_IRL3, CLEAR_LINE); + else + m_maincpu->set_input_line(SH4_IRL3, ASSERT_LINE); + if (dimm_status & 0x100) + set_ext_irq(CLEAR_LINE); + else + set_ext_irq(ASSERT_LINE); +} + +READ16_MEMBER(naomi_gdrom_board::dimm_status_r) +{ + return dimm_status & 0xffff; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_unknown_w) +{ + sh4_unknown = data; +} + +READ32_MEMBER(naomi_gdrom_board::sh4_unknown_r) +{ + return sh4_unknown; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_command_w) +{ + dimm_command = data; +} + +READ32_MEMBER(naomi_gdrom_board::sh4_command_r) +{ + return dimm_command; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_offsetl_w) +{ + dimm_offsetl = data; +} + +READ32_MEMBER(naomi_gdrom_board::sh4_offsetl_r) +{ + return dimm_offsetl; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_parameterl_w) +{ + dimm_parameterl = data; +} + +READ32_MEMBER(naomi_gdrom_board::sh4_parameterl_r) +{ + return dimm_parameterl; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_parameterh_w) +{ + dimm_parameterh = data; +} + +READ32_MEMBER(naomi_gdrom_board::sh4_parameterh_r) +{ + return dimm_parameterh; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_status_w) +{ + dimm_status = data; + if (dimm_status & 0x001) + m_maincpu->set_input_line(SH4_IRL3, CLEAR_LINE); + else + m_maincpu->set_input_line(SH4_IRL3, ASSERT_LINE); + if (dimm_status & 0x100) + set_ext_irq(CLEAR_LINE); + else + set_ext_irq(ASSERT_LINE); +} + +READ32_MEMBER(naomi_gdrom_board::sh4_status_r) +{ + return dimm_status; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_des_keyl_w) +{ + dimm_des_key = (dimm_des_key & 0xffffffff00000000) | (uint64_t)data; +} + +READ32_MEMBER(naomi_gdrom_board::sh4_des_keyl_r) +{ + return (uint32_t)dimm_des_key; +} + +WRITE32_MEMBER(naomi_gdrom_board::sh4_des_keyh_w) +{ + dimm_des_key = (dimm_des_key & 0xffffffff) | ((uint64_t)data << 32); +} + +READ32_MEMBER(naomi_gdrom_board::sh4_des_keyh_r) +{ + return (uint32_t)(dimm_des_key >> 32); +} + READ64_MEMBER(naomi_gdrom_board::i2cmem_dimm_r) { uint8_t ret; @@ -675,6 +849,13 @@ void naomi_gdrom_board::device_start() save_item(NAME(picbus_pullup)); save_item(NAME(picbus_io)); save_item(NAME(picbus_used)); + save_item(NAME(dimm_command)); + save_item(NAME(dimm_offsetl)); + save_item(NAME(dimm_parameterl)); + save_item(NAME(dimm_parameterh)); + save_item(NAME(dimm_status)); + save_item(NAME(sh4_unknown)); + save_item(NAME(dimm_des_key)); } void naomi_gdrom_board::device_reset() diff --git a/src/mame/machine/naomigd.h b/src/mame/machine/naomigd.h index d73b3c7c2a2..91c029e2885 100644 --- a/src/mame/machine/naomigd.h +++ b/src/mame/machine/naomigd.h @@ -33,6 +33,7 @@ public: naomi_gdrom_board(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void device_add_mconfig(machine_config &config) override; + virtual void submap(address_map& map) override; void sh4_map(address_map &map); void sh4_io_map(address_map &map); void pic_map(address_map &map); @@ -46,6 +47,34 @@ public: virtual const tiny_rom_entry *device_rom_region() const override; + DECLARE_WRITE16_MEMBER(dimm_command_w); // 5f703c + DECLARE_READ16_MEMBER(dimm_command_r); + DECLARE_WRITE16_MEMBER(dimm_offsetl_w); // 5f7040 + DECLARE_READ16_MEMBER(dimm_offsetl_r); + DECLARE_WRITE16_MEMBER(dimm_parameterl_w); // 5f7044 + DECLARE_READ16_MEMBER(dimm_parameterl_r); + DECLARE_WRITE16_MEMBER(dimm_parameterh_w); // 5f7048 + DECLARE_READ16_MEMBER(dimm_parameterh_r); + DECLARE_WRITE16_MEMBER(dimm_status_w); // 5f704c + DECLARE_READ16_MEMBER(dimm_status_r); + + DECLARE_WRITE32_MEMBER(sh4_unknown_w); // 14000000 + DECLARE_READ32_MEMBER(sh4_unknown_r); + DECLARE_WRITE32_MEMBER(sh4_command_w); // 14000014 + DECLARE_READ32_MEMBER(sh4_command_r); + DECLARE_WRITE32_MEMBER(sh4_offsetl_w); // 14000018 + DECLARE_READ32_MEMBER(sh4_offsetl_r); + DECLARE_WRITE32_MEMBER(sh4_parameterl_w); // 1400001c + DECLARE_READ32_MEMBER(sh4_parameterl_r); + DECLARE_WRITE32_MEMBER(sh4_parameterh_w); // 14000020 + DECLARE_READ32_MEMBER(sh4_parameterh_r); + DECLARE_WRITE32_MEMBER(sh4_status_w); // 14000024 + DECLARE_READ32_MEMBER(sh4_status_r); + DECLARE_WRITE32_MEMBER(sh4_des_keyl_w); // 14000030 + DECLARE_READ32_MEMBER(sh4_des_keyl_r); + DECLARE_WRITE32_MEMBER(sh4_des_keyh_w); // 14000034 + DECLARE_READ32_MEMBER(sh4_des_keyh_r); + DECLARE_READ64_MEMBER(i2cmem_dimm_r); DECLARE_WRITE64_MEMBER(i2cmem_dimm_w); DECLARE_READ8_MEMBER(pic_dimm_r); @@ -76,6 +105,13 @@ private: uint8_t picbus_pullup; uint8_t picbus_io[2]; // 0 for sh4, 1 for pic bool picbus_used; + uint32_t dimm_command; + uint32_t dimm_offsetl; + uint32_t dimm_parameterl; + uint32_t dimm_parameterh; + uint32_t dimm_status; + uint32_t sh4_unknown; + uint64_t dimm_des_key; // Note: voluntarily not saved into the state uint8_t *dimm_data;