mirror of
https://github.com/holub/mame
synced 2025-07-06 18:39:28 +03:00
More FM OPN fixes [Eke, R. Belmont]
- Pass chip type around and restore Jarek's original behavior for YM2203/YM2610 - Always recalculate attack rate in set_ar_ksr, fixes Megadrive/Genesis "Batman & Robin"
This commit is contained in:
R. Belmont
parent
654ec18554
commit
3fd8c0941b
@ -142,11 +142,12 @@
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#define TYPE_6CH 0x04 /* FM 6CH / 3CH */
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#define TYPE_DAC 0x08 /* YM2612's DAC device */
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#define TYPE_ADPCM 0x10 /* two ADPCM units */
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#define TYPE_2610 0x20 /* bogus flag to differentiate 2608 from 2610 */
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#define TYPE_YM2203 (TYPE_SSG)
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#define TYPE_YM2608 (TYPE_SSG |TYPE_LFOPAN |TYPE_6CH |TYPE_ADPCM)
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#define TYPE_YM2610 (TYPE_SSG |TYPE_LFOPAN |TYPE_6CH |TYPE_ADPCM)
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#define TYPE_YM2610 (TYPE_SSG |TYPE_LFOPAN |TYPE_6CH |TYPE_ADPCM |TYPE_2610)
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#define TYPE_YM2612 (TYPE_DAC |TYPE_LFOPAN |TYPE_6CH)
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@ -250,7 +251,48 @@ static const UINT8 eg_inc[19*RATE_STEPS]={
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#define O(a) (a*RATE_STEPS)
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/*note that there is no O(17) in this table - it's directly in the code */
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static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
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static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
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/* 32 infinite time rates */
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O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
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O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
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O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
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O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
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/* rates 00-11 */
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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/* rate 12 */
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O( 4),O( 5),O( 6),O( 7),
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/* rate 13 */
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O( 8),O( 9),O(10),O(11),
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/* rate 14 */
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O(12),O(13),O(14),O(15),
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/* rate 15 */
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O(16),O(16),O(16),O(16),
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/* 32 dummy rates (same as 15 3) */
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O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
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O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
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O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
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O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
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};
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static const UINT8 eg_rate_select2612[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) from tests on YM2612 */
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/* 32 infinite time rates */
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O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
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O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
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@ -873,23 +915,31 @@ INLINE void FM_BUSY_SET(FM_ST *ST,int busyclock )
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INLINE void FM_KEYON(FM_CH *CH , int s )
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INLINE void FM_KEYON(UINT8 type, FM_CH *CH , int s )
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{
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FM_SLOT *SLOT = &CH->SLOT[s];
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if( !SLOT->key )
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{
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SLOT->key = 1;
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SLOT->phase = 0; /* restart Phase Generator */
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if( (SLOT->ar + SLOT->ksr) < 32+62 )
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{
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SLOT->state = EG_ATT; /* phase -> Attack */
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SLOT->volume = MAX_ATT_INDEX; /* fix Ecco 2 splash sound */
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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if( (SLOT->ar + SLOT->ksr) < 32+62 )
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{
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SLOT->state = EG_ATT; /* phase -> Attack */
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SLOT->volume = MAX_ATT_INDEX; /* fix Ecco 2 splash sound */
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}
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else
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{
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/* directly switch to Decay */
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SLOT->state = EG_DEC;
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SLOT->volume = MIN_ATT_INDEX;
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}
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}
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else
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{
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/* directly switch to Decay */
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SLOT->state = EG_DEC;
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SLOT->volume = MIN_ATT_INDEX;
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SLOT->state = EG_ATT;
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}
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}
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}
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@ -1007,7 +1057,7 @@ INLINE void set_tl(FM_CH *CH,FM_SLOT *SLOT , int v)
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}
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/* set attack rate & key scale */
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INLINE void set_ar_ksr(FM_CH *CH,FM_SLOT *SLOT,int v)
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INLINE void set_ar_ksr(UINT8 type, FM_CH *CH,FM_SLOT *SLOT,int v)
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{
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UINT8 old_KSR = SLOT->KSR;
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@ -1018,50 +1068,76 @@ INLINE void set_ar_ksr(FM_CH *CH,FM_SLOT *SLOT,int v)
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{
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CH->SLOT[SLOT1].Incr=-1;
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}
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else
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/* refresh Attack rate */
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if ((SLOT->ar + SLOT->ksr) < 32+62)
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{
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/* refresh Attack rate */
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if ((SLOT->ar + SLOT->ksr) < 32+62)
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SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
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SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
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SLOT->eg_sel_ar = eg_rate_select2612[SLOT->ar + SLOT->ksr ];
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}
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else
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{
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SLOT->eg_sh_ar = 0;
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SLOT->eg_sel_ar = 17*RATE_STEPS;
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SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
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}
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}
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else
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{
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SLOT->eg_sh_ar = 0;
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SLOT->eg_sel_ar = 17*RATE_STEPS;
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}
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}
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/* set decay rate */
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INLINE void set_dr(FM_SLOT *SLOT,int v)
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INLINE void set_dr(UINT8 type, FM_SLOT *SLOT,int v)
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{
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SLOT->d1r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
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SLOT->eg_sh_d1r = eg_rate_shift [SLOT->d1r + SLOT->ksr];
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SLOT->eg_sel_d1r= eg_rate_select[SLOT->d1r + SLOT->ksr];
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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SLOT->eg_sel_d1r= eg_rate_select2612[SLOT->d1r + SLOT->ksr];
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}
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else
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{
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SLOT->eg_sel_d1r= eg_rate_select[SLOT->d1r + SLOT->ksr];
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}
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}
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/* set sustain rate */
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INLINE void set_sr(FM_SLOT *SLOT,int v)
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INLINE void set_sr(UINT8 type, FM_SLOT *SLOT,int v)
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{
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SLOT->d2r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
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SLOT->eg_sh_d2r = eg_rate_shift [SLOT->d2r + SLOT->ksr];
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SLOT->eg_sel_d2r= eg_rate_select[SLOT->d2r + SLOT->ksr];
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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SLOT->eg_sel_d2r= eg_rate_select2612[SLOT->d2r + SLOT->ksr];
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}
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else
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{
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SLOT->eg_sel_d2r= eg_rate_select[SLOT->d2r + SLOT->ksr];
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}
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}
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/* set release rate */
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INLINE void set_sl_rr(FM_SLOT *SLOT,int v)
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INLINE void set_sl_rr(UINT8 type, FM_SLOT *SLOT,int v)
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{
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SLOT->sl = sl_table[ v>>4 ];
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SLOT->rr = 34 + ((v&0x0f)<<2);
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SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr];
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SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr];
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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SLOT->eg_sel_rr = eg_rate_select2612[SLOT->rr + SLOT->ksr];
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}
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else
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{
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SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr];
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}
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}
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@ -1436,7 +1512,7 @@ INLINE void chan_calc(FM_OPN *OPN, FM_CH *CH, int chnum)
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}
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/* update phase increment and envelope generator */
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INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT , int fc , int kc )
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INLINE void refresh_fc_eg_slot(UINT8 type, FM_SLOT *SLOT , int fc , int kc )
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{
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int ksr = kc >> SLOT->KSR;
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@ -1456,7 +1532,14 @@ INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT , int fc , int kc )
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if ((SLOT->ar + SLOT->ksr) < 32+62)
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{
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SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
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SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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SLOT->eg_sel_ar = eg_rate_select2612[SLOT->ar + SLOT->ksr ];
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}
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else
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{
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SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
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}
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}
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else
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{
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@ -1465,27 +1548,35 @@ INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT , int fc , int kc )
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}
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SLOT->eg_sh_d1r = eg_rate_shift [SLOT->d1r + SLOT->ksr];
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SLOT->eg_sel_d1r= eg_rate_select[SLOT->d1r + SLOT->ksr];
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SLOT->eg_sh_d2r = eg_rate_shift [SLOT->d2r + SLOT->ksr];
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SLOT->eg_sel_d2r= eg_rate_select[SLOT->d2r + SLOT->ksr];
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SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr];
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SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr];
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if ((type == TYPE_YM2612) || (type == TYPE_YM2608))
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{
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SLOT->eg_sel_d1r= eg_rate_select2612[SLOT->d1r + SLOT->ksr];
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SLOT->eg_sel_d2r= eg_rate_select2612[SLOT->d2r + SLOT->ksr];
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SLOT->eg_sel_rr = eg_rate_select2612[SLOT->rr + SLOT->ksr];
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}
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else
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{
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SLOT->eg_sel_d1r= eg_rate_select[SLOT->d1r + SLOT->ksr];
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SLOT->eg_sel_d2r= eg_rate_select[SLOT->d2r + SLOT->ksr];
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SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr];
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}
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}
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}
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/* update phase increment counters */
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/* Changed from INLINE to static to work around gcc 4.2.1 codegen bug */
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static void refresh_fc_eg_chan(FM_CH *CH )
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static void refresh_fc_eg_chan(UINT8 type, FM_CH *CH )
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{
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if( CH->SLOT[SLOT1].Incr==-1){
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int fc = CH->fc;
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int kc = CH->kcode;
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refresh_fc_eg_slot(&CH->SLOT[SLOT1] , fc , kc );
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refresh_fc_eg_slot(&CH->SLOT[SLOT2] , fc , kc );
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refresh_fc_eg_slot(&CH->SLOT[SLOT3] , fc , kc );
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refresh_fc_eg_slot(&CH->SLOT[SLOT4] , fc , kc );
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refresh_fc_eg_slot(type, &CH->SLOT[SLOT1] , fc , kc );
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refresh_fc_eg_slot(type, &CH->SLOT[SLOT2] , fc , kc );
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refresh_fc_eg_slot(type, &CH->SLOT[SLOT3] , fc , kc );
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refresh_fc_eg_slot(type, &CH->SLOT[SLOT4] , fc , kc );
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}
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}
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@ -1668,15 +1759,15 @@ static void FMCloseTable( void )
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/* CSM Key Controll */
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INLINE void CSMKeyControll(FM_CH *CH)
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INLINE void CSMKeyControll(UINT8 type, FM_CH *CH)
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{
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/* this is wrong, atm */
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/* all key on */
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FM_KEYON(CH,SLOT1);
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FM_KEYON(CH,SLOT2);
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FM_KEYON(CH,SLOT3);
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FM_KEYON(CH,SLOT4);
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FM_KEYON(type, CH,SLOT1);
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FM_KEYON(type, CH,SLOT2);
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FM_KEYON(type, CH,SLOT3);
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FM_KEYON(type, CH,SLOT4);
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}
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#ifdef __STATE_H__
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@ -1828,10 +1919,10 @@ static void OPNWriteMode(FM_OPN *OPN, int r, int v)
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if( (v&0x04) && (OPN->type & TYPE_6CH) ) c+=3;
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CH = OPN->P_CH;
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CH = &CH[c];
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if(v&0x10) FM_KEYON(CH,SLOT1); else FM_KEYOFF(CH,SLOT1);
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if(v&0x20) FM_KEYON(CH,SLOT2); else FM_KEYOFF(CH,SLOT2);
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if(v&0x40) FM_KEYON(CH,SLOT3); else FM_KEYOFF(CH,SLOT3);
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if(v&0x80) FM_KEYON(CH,SLOT4); else FM_KEYOFF(CH,SLOT4);
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if(v&0x10) FM_KEYON(OPN->type,CH,SLOT1); else FM_KEYOFF(CH,SLOT1);
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if(v&0x20) FM_KEYON(OPN->type,CH,SLOT2); else FM_KEYOFF(CH,SLOT2);
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if(v&0x40) FM_KEYON(OPN->type,CH,SLOT3); else FM_KEYOFF(CH,SLOT3);
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if(v&0x80) FM_KEYON(OPN->type,CH,SLOT4); else FM_KEYOFF(CH,SLOT4);
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break;
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}
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}
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@ -1863,11 +1954,11 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
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break;
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case 0x50: /* KS, AR */
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set_ar_ksr(CH,SLOT,v);
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set_ar_ksr(OPN->type,CH,SLOT,v);
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break;
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case 0x60: /* bit7 = AM ENABLE, DR */
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set_dr(SLOT,v);
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set_dr(OPN->type, SLOT,v);
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if(OPN->type & TYPE_LFOPAN) /* YM2608/2610/2610B/2612 */
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{
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@ -1876,11 +1967,11 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
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break;
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case 0x70: /* SR */
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set_sr(SLOT,v);
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set_sr(OPN->type,SLOT,v);
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break;
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case 0x80: /* SL, RR */
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set_sl_rr(SLOT,v);
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set_sl_rr(OPN->type,SLOT,v);
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break;
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case 0x90: /* SSG-EG */
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@ -2113,19 +2204,19 @@ void YM2203UpdateOne(void *chip, FMSAMPLE *buffer, int length)
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/* refresh PG and EG */
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refresh_fc_eg_chan( cch[0] );
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refresh_fc_eg_chan( cch[1] );
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refresh_fc_eg_chan( OPN->type, cch[0] );
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refresh_fc_eg_chan( OPN->type, cch[1] );
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if( (F2203->OPN.ST.mode & 0xc0) )
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{
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/* 3SLOT MODE */
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if( cch[2]->SLOT[SLOT1].Incr==-1)
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{
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refresh_fc_eg_slot(&cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
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refresh_fc_eg_slot(&cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
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refresh_fc_eg_slot(&cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
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refresh_fc_eg_slot(&cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
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refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
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refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
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refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
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refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
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}
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}else refresh_fc_eg_chan( cch[2] );
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}else refresh_fc_eg_chan( OPN->type, cch[2] );
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/* YM2203 doesn't have LFO so we must keep these globals at 0 level */
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@ -2378,7 +2469,7 @@ int YM2203TimerOver(void *chip,int c)
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/* CSM mode key,TL control */
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if( F2203->OPN.ST.mode & 0x80 )
|
||||
{ /* CSM mode auto key on */
|
||||
CSMKeyControll( &(F2203->CH[2]) );
|
||||
CSMKeyControll( F2203->OPN.type, &(F2203->CH[2]) );
|
||||
}
|
||||
}
|
||||
return F2203->OPN.ST.irq;
|
||||
@ -3295,22 +3386,22 @@ void YM2608UpdateOne(void *chip, FMSAMPLE **buffer, int length)
|
||||
pcmsizeA = F2608->pcm_size;
|
||||
|
||||
/* refresh PG and EG */
|
||||
refresh_fc_eg_chan( cch[0] );
|
||||
refresh_fc_eg_chan( cch[1] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[0] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[1] );
|
||||
if( (OPN->ST.mode & 0xc0) )
|
||||
{
|
||||
/* 3SLOT MODE */
|
||||
if( cch[2]->SLOT[SLOT1].Incr==-1)
|
||||
{
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
|
||||
}
|
||||
}else refresh_fc_eg_chan( cch[2] );
|
||||
refresh_fc_eg_chan( cch[3] );
|
||||
refresh_fc_eg_chan( cch[4] );
|
||||
refresh_fc_eg_chan( cch[5] );
|
||||
}else refresh_fc_eg_chan( OPN->type, cch[2] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[3] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[4] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[5] );
|
||||
|
||||
|
||||
/* buffering */
|
||||
@ -3798,7 +3889,7 @@ int YM2608TimerOver(void *chip,int c)
|
||||
/* CSM mode key,TL controll */
|
||||
if( F2608->OPN.ST.mode & 0x80 )
|
||||
{ /* CSM mode total level latch and auto key on */
|
||||
CSMKeyControll( &(F2608->CH[2]) );
|
||||
CSMKeyControll( F2608->OPN.type, &(F2608->CH[2]) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
@ -3849,20 +3940,20 @@ void YM2610UpdateOne(void *chip, FMSAMPLE **buffer, int length)
|
||||
#endif
|
||||
|
||||
/* refresh PG and EG */
|
||||
refresh_fc_eg_chan( cch[0] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[0] );
|
||||
if( (OPN->ST.mode & 0xc0) )
|
||||
{
|
||||
/* 3SLOT MODE */
|
||||
if( cch[1]->SLOT[SLOT1].Incr==-1)
|
||||
{
|
||||
refresh_fc_eg_slot(&cch[1]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(&cch[1]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(&cch[1]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(&cch[1]->SLOT[SLOT4] , cch[1]->fc , cch[1]->kcode );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[1]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[1]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[1]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[1]->SLOT[SLOT4] , cch[1]->fc , cch[1]->kcode );
|
||||
}
|
||||
}else refresh_fc_eg_chan( cch[1] );
|
||||
refresh_fc_eg_chan( cch[2] );
|
||||
refresh_fc_eg_chan( cch[3] );
|
||||
}else refresh_fc_eg_chan( OPN->type, cch[1] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[2] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[3] );
|
||||
|
||||
/* buffering */
|
||||
for(i=0; i < length ; i++)
|
||||
@ -3978,22 +4069,22 @@ void YM2610BUpdateOne(void *chip, FMSAMPLE **buffer, int length)
|
||||
pcmsizeA = F2610->pcm_size;
|
||||
|
||||
/* refresh PG and EG */
|
||||
refresh_fc_eg_chan( cch[0] );
|
||||
refresh_fc_eg_chan( cch[1] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[0] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[1] );
|
||||
if( (OPN->ST.mode & 0xc0) )
|
||||
{
|
||||
/* 3SLOT MODE */
|
||||
if( cch[2]->SLOT[SLOT1].Incr==-1)
|
||||
{
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
|
||||
}
|
||||
}else refresh_fc_eg_chan( cch[2] );
|
||||
refresh_fc_eg_chan( cch[3] );
|
||||
refresh_fc_eg_chan( cch[4] );
|
||||
refresh_fc_eg_chan( cch[5] );
|
||||
}else refresh_fc_eg_chan( OPN->type, cch[2] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[3] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[4] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[5] );
|
||||
|
||||
/* buffering */
|
||||
for(i=0; i < length ; i++)
|
||||
@ -4446,7 +4537,7 @@ int YM2610TimerOver(void *chip,int c)
|
||||
/* CSM mode key,TL controll */
|
||||
if( F2610->OPN.ST.mode & 0x80 )
|
||||
{ /* CSM mode total level latch and auto key on */
|
||||
CSMKeyControll( &(F2610->CH[2]) );
|
||||
CSMKeyControll( F2610->OPN.type, &(F2610->CH[2]) );
|
||||
}
|
||||
}
|
||||
return F2610->OPN.ST.irq;
|
||||
@ -4499,22 +4590,22 @@ void YM2612UpdateOne(void *chip, FMSAMPLE **buffer, int length)
|
||||
dacen = F2612->dacen;
|
||||
|
||||
/* refresh PG and EG */
|
||||
refresh_fc_eg_chan( cch[0] );
|
||||
refresh_fc_eg_chan( cch[1] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[0] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[1] );
|
||||
if( (OPN->ST.mode & 0xc0) )
|
||||
{
|
||||
/* 3SLOT MODE */
|
||||
if( cch[2]->SLOT[SLOT1].Incr==-1)
|
||||
{
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(&cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT1] , OPN->SL3.fc[1] , OPN->SL3.kcode[1] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT2] , OPN->SL3.fc[2] , OPN->SL3.kcode[2] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
|
||||
refresh_fc_eg_slot(OPN->type, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
|
||||
}
|
||||
}else refresh_fc_eg_chan( cch[2] );
|
||||
refresh_fc_eg_chan( cch[3] );
|
||||
refresh_fc_eg_chan( cch[4] );
|
||||
refresh_fc_eg_chan( cch[5] );
|
||||
}else refresh_fc_eg_chan( OPN->type, cch[2] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[3] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[4] );
|
||||
refresh_fc_eg_chan( OPN->type, cch[5] );
|
||||
|
||||
/* buffering */
|
||||
for(i=0; i < length ; i++)
|
||||
@ -4820,7 +4911,7 @@ int YM2612TimerOver(void *chip,int c)
|
||||
/* CSM mode key,TL controll */
|
||||
if( F2612->OPN.ST.mode & 0x80 )
|
||||
{ /* CSM mode total level latch and auto key on */
|
||||
CSMKeyControll( &(F2612->CH[2]) );
|
||||
CSMKeyControll( F2612->OPN.type, &(F2612->CH[2]) );
|
||||
}
|
||||
}
|
||||
return F2612->OPN.ST.irq;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user