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New Working Game

Browse Source 
-------------------------------
Nightmare [Tomasz Slanina, Roberto Fresca, Jordi Beltran, Paco Ortiz, Recreativas.org]
This commit is contained in:
Tomasz Slanina 2018-08-22 10:19:16 +02:00
parent fbfab1d7a5
commit 403196c318
7 changed files with 752 additions and 0 deletions
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12
scripts/src/machine.lua
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@ -2541,6 +2541,18 @@ if (MACHINES["SERFLASH"]~=null) then
}
end
---------------------------------------------------
--
--@src/devices/machine/sda2006.h,MACHINES["SDA2006"] = true
---------------------------------------------------
if (MACHINES["SDA2006"]~=null) then
files {
MAME_DIR .. "src/devices/machine/sda2006.cpp",
MAME_DIR .. "src/devices/machine/sda2006.h",
}
end
---------------------------------------------------
--
--@src/devices/machine/smc91c9x.h,MACHINES["SMC91C9X"] = true

2
scripts/target/mame/arcade.lua
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@ -566,6 +566,7 @@ MACHINES["SATURN"] = true
MACHINES["SCSI"] = true
MACHINES["SCUDSP"] = true
--MACHINES["SECFLASH"] = true
MACHINES["SDA2006"] = true
MACHINES["SERFLASH"] = true
MACHINES["SMC91C9X"] = true
MACHINES["SEGA_SCU"] = true
@ -1758,6 +1759,7 @@ files {
MAME_DIR .. "src/mame/drivers/cidelsa.cpp",
MAME_DIR .. "src/mame/includes/cidelsa.h",
MAME_DIR .. "src/mame/video/cidelsa.cpp",
MAME_DIR .. "src/mame/drivers/nightmare.cpp",
}
createMAMEProjects(_target, _subtarget, "eolith")

191
src/devices/machine/sda2006.cpp Executable file
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@ -0,0 +1,191 @@
// license:BSD-3-Clause
// copyright-holders:Tomasz Slanina
#include "emu.h"
#include "machine/sda2006.h"
//-------------------------------------------------
//
// Siemens SDA2006 512-bit (32x16) NV EEPROM
//
// TODO:
// - 8/12 bit controll word selection (currently emulates only 8 bt one)
// - INV pin
// - better( and correct) state flow
// - read mode, with reversed data stream
//
//-------------------------------------------------
enum {
CMD_WRITE,
CMD_READ_REVERSED,
CMD_READ,
CMD_UNKNOWN
};
#define EEPROM_CAPACITY 0x40
#define EEPROM_ADDRESS_MASK 0x1f
// device type definition
DEFINE_DEVICE_TYPE(SDA2006, sda2006_device, "sda2006", "SDA2006 EEPROM")
//-------------------------------------------------
// sda2006_device - constructor
//-------------------------------------------------
sda2006_device::sda2006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SDA2006, tag, owner, clock)
, device_nvram_interface(mconfig, *this)
, m_latch(0), m_current_address(0), m_eeprom_state(),m_read_stream_pos(0),m_is_end_o_stream(false), m_write_stream_length(0), m_write_stream(0), m_write_state(0), m_clock_state (0)
{
}
//-------------------------------------------------
// device_validity_check - perform validity checks
// on this device
//-------------------------------------------------
void sda2006_device::device_validity_check(validity_checker &valid) const
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void sda2006_device::device_start()
{
save_item(NAME(m_latch));
save_item(NAME(m_current_address));
save_item(NAME(m_eeprom_state));
save_item(NAME(m_read_stream_pos));
save_item(NAME(m_is_end_o_stream));
save_item(NAME(m_write_stream_length));
save_item(NAME(m_write_stream));
save_item(NAME(m_write_state));
save_item(NAME(m_clock_state));
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void sda2006_device::device_reset()
{
m_current_address = 0;
m_is_end_o_stream = false;
m_write_stream_length = 0;
m_write_stream = 0;
m_write_state = 0;
m_read_stream_pos = 0;
m_eeprom_state = EEPROM_WRITE;
m_clock_state = 0;
}
//-------------------------------------------------
// nvram_default - called to initialize NVRAM to
// its default state
//-------------------------------------------------
void sda2006_device::nvram_default()
{
for (auto & elem : m_eeprom_data)
elem = 0xffff;
}
//-------------------------------------------------
// nvram_read - called to read NVRAM from the
// .nv file
//-------------------------------------------------
void sda2006_device::nvram_read(emu_file &file)
{
file.read(m_eeprom_data, EEPROM_CAPACITY);
}
//-------------------------------------------------
// nvram_write - called to write NVRAM to the
// .nv file
//-------------------------------------------------
void sda2006_device::nvram_write(emu_file &file)
{
file.write(m_eeprom_data, EEPROM_CAPACITY);
}
READ_LINE_MEMBER( sda2006_device::read_data )
{
return m_latch^1;
}
WRITE_LINE_MEMBER( sda2006_device::write_data )
{
m_latch = state;
}
WRITE_LINE_MEMBER( sda2006_device::write_enable )
{
if( (m_write_state ^ state) && (!state)){ //falling edge
m_is_end_o_stream = true;
}
m_write_state = state;
}
WRITE_LINE_MEMBER( sda2006_device::write_clock )
{
if( (m_clock_state ^ state) && (!state)) { // falling edge
if( m_eeprom_state == EEPROM_READ){
m_latch = (m_eeprom_data[m_current_address]>>(m_read_stream_pos))&1;
++m_read_stream_pos;
if ( m_read_stream_pos == 16) {
// end of read
m_eeprom_state = EEPROM_WRITE;
m_write_stream_length = 0;
m_write_stream = 0;
}
} else {
if( m_is_end_o_stream ){
// stream data = AAAAACCC (read) or DDDDDDDDDDDDDDDDAAAAACCC (write)
uint32_t reversed_stream = 0;
uint32_t mask = 1;
uint32_t counter = m_write_stream_length;
m_is_end_o_stream = false;
m_write_stream_length = 0;
while(counter>0){
reversed_stream<<=1;
if (m_write_stream & mask) {
reversed_stream |= 1;
}
mask <<= 1;
--counter;
}
uint32_t command = bitswap<8>(m_write_stream, 7,6,5,4,3,0,1,2);
switch (command&3){
case CMD_WRITE: m_eeprom_data[(reversed_stream>>16) & EEPROM_ADDRESS_MASK] = reversed_stream & 0xffff; break;
case CMD_READ:
m_current_address = reversed_stream & EEPROM_ADDRESS_MASK;
m_read_stream_pos = 0;
m_eeprom_state = EEPROM_READ;
break;
case CMD_READ_REVERSED:
case CMD_UNKNOWN: break;
}
} else {
if( m_write_state ) {
m_write_stream = ( m_write_stream << 1 ) | m_latch;
++m_write_stream_length;
}
}
}
}
m_clock_state = state;
}

60
src/devices/machine/sda2006.h Executable file
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@ -0,0 +1,60 @@
// license:BSD-3-Clause
// copyright-holders:Tomasz Slanina
#ifndef MAME_MACHINE_SDA2006_H
#define MAME_MACHINE_SDA2006_H
#pragma once
// sda2006_device
class sda2006_device : public device_t,
public device_nvram_interface
{
public:
// construction/destruction
sda2006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
// I/O operations
DECLARE_READ_LINE_MEMBER( read_data );
DECLARE_WRITE_LINE_MEMBER( write_data );
DECLARE_WRITE_LINE_MEMBER( write_clock );
DECLARE_WRITE_LINE_MEMBER( write_enable );
protected:
// device-level overrides
virtual void device_validity_check(validity_checker &valid) const override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void nvram_default() override;
virtual void nvram_read(emu_file &file) override;
virtual void nvram_write(emu_file &file) override;
private:
enum {
EEPROM_READ = 0,
EEPROM_WRITE
};
uint8_t m_latch;
uint8_t m_current_address;
uint32_t m_eeprom_state;
uint8_t m_read_stream_pos;
bool m_is_end_o_stream;
uint8_t m_write_stream_length;
uint32_t m_write_stream;
uint8_t m_write_state;
uint8_t m_clock_state;
uint16_t m_eeprom_data[0x20];
};
// device type definition
DECLARE_DEVICE_TYPE(SDA2006, sda2006_device)
#endif // MAME_MACHINE_SDA2006_H

1
src/mame/arcade.flt
View File

@ -836,6 +836,7 @@ nexus3d.cpp
nibble.cpp
nichild.cpp
nightgal.cpp
nightmare.cpp
ninjakd2.cpp
ninjaw.cpp
nitedrvr.cpp

483
src/mame/drivers/nightmare.cpp Normal file
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@ -0,0 +1,483 @@
// license:BSD-3-Clause
// copyright-holders:Tomasz Slanina, Roberto Fresca
/******************************************************************************
Nightmare / Clean Octopus.
E.F.O. S.A. Video IV System.
Barcelona, Spain.
This is a multi board system based on 2x RCA CDP1802 COSMAC (main & sound CPU),
and two graphics devices (VDP) similar to TMS9928 (Texas Instruments), marked
as EFO 90501. Also has an On-Screen settings instead of regular DIP switches,
saving the config into a SDA2006 NV EEPROM. A big design for 1982.
The game was designed by EFO/Playmatic in 1982, then dissappeared and remained
lost till now.
The name of the game for the local market was "Nightmare", but for the interna-
tional market they changed the name to "Clean Octopus".
--------------------------------------------------------------------------------
Main board:
1x CPU RCA 1802 @ 3.60398 MHz.
2x EFO 90501 (remarked TMS9928 VDP)
16x TMS4116 (16384 x 1 DRAM) (for VDPs).
2x MM2114N (1024 x 4 SRAM) (1024 KB for working RAM).
1x SDA2006 (non volatile 512-bit EEPROM) (for settings).
3x TMS2564 EPROMs.
3x CDP1852 (I/O).
1x Xtal @ 10.816 MHz.
Sound board:
1x CPU RCA 1802 @ 2.95008 MHz.
1x EFO 90503 (seems a remarked TMS5220, speech synthesizer IC).
1x CDP1824 (32 x 8) RAM.
2x CDP1852 (I/O).
1x Xtal @ 2.9500 MHz.
Sound ROM is missing.
Overall the board is pretty much dead, no interruptions observed, no video sync output.
PCBs layout:
.---------------------------------------------------.----------------------------------------------------------------------.
| SOUND-3 | O O O O | | .-------. .-------. | O O O O O O O O O O O | .---|
| '---------' | IC32 |TMS4116| |TMS4116| IC18 '-----------------------' | O |
| [ FUSE ] | '-------' '-------' J3 | O |
| .---| .-------. .-------. MALE CONNECTORS | O |
| [ FUSE ] S O U N D GND| O | IC33 |TMS4116| |TMS4116| IC19 J | O |
| SPK| O | '-------' '-------' 1 | O |
| B O A R D '---| .-------. .-------. .-------------. | O |
| | IC34 |TMS4116| |TMS4116| IC20 | CDP 1852 CE | IC8 | O |
| IC10 | '-------' '-------' | RCA | | O |
| .----------. | .-------. .-------. '-------------' >---|
| |CD40106BE | | IC35 |TMS4116| |TMS4116| IC21 | O |
| IC2 IC6 '----------' | '-------' '-------' .-------------. | O |
| .----------. .----------. | .-------. .-------. | CDP 1852 CE | IC9 J | O |
| |CDP1859CE | |CDP1824CE | | IC36 |TMS4116| |TMS4116| IC22 | RCA | 2 | O |
| '----------' '----------' IC9 | '-------' '-------' '-------------' | O |
| IC1 .--------------. .--------------. | .-------. .-------. | O |
| .----------. | MISSING | | EFO 90503 | | IC37 |TMS4116| |TMS4116| IC23 .-------------. | O |
| |CDP1859CE | | EPROM | | | | '-------' '-------' | CDP 1852 CE | IC10 '---|
| '----------' '--------------' '--------------' O=O .-------. .-------. | RCA | |
| IC5 IC8 O=O IC38 |TMS4116| |TMS4116| IC24 '-------------' |
| .-------------. O=O '-------' '-------' |
| [2.9500] | CDP 1852 CE | O=O J .-------. .-------. .-----IC11------. |
| [ XTAL ] | RCA | O=O 5 IC39 |TMS4116| |TMS4116| IC25 | TMS 2564 | .---IC1---. |
| '-------------' O=O '-------' '-------' | NM1-1A1 | |CDP1859CE| |
| IC6 IC7 O=O '---------------' '---------' |
| .-------------------. .-------------. O=O .-------. .-------. .---IC2---. |
| | CDP 1802 ACE | | CDP 1852 CE | O=O IC40 |74LS04N| |74LS04N| IC26 .-----IC12------. |CD4042BE | |
| | RCA | | RCA | O=O '-------' '-------' | TMS 2564 | '---------' |
| '-------------------' '-------------' | .---------. .---------. | NM1-1B1 | .---IC3---. |
| | IC41 |74LS373N | |74LS373N | IC27 '---------------' |CD4011UBE| |
'---------------------------------------------------| '---------' '---------' '---------' |
| .-------------------. .-----IC13------. .---IC4---. |
| IC28 | EFO 90501 | | TMS 2564 | |CD4071BE | |
.---------------------------------------------------| | | | NM1-1C1 | '---------' |
| | '-------------------' '---------------' .---IC5---. |
| P.S.U. - V. IV | .-------------------. |CD4001UBE| |
| | IC29 | EFO 90501 | '---------' |
| | | | .---------. .---IC6---. |
| P O W E R | '-------------------' | MM2114N | IC15 |CDP1853CE| |
| | [10.816] '---------' '---------' |
| S U P P L Y O=O +12 [ XTAL ] .---------. .---IC7---. |
| O=O GND | MM2114N | IC16 | SDA2006 | |
| B O A R D O=O -5 J .---------. '---------' '---------' |
| O=O +5 6 IC30 | 74LS04N | |
| O=O +15 '---------' |
| O=O +33 .-------------------. |
| O=O CLK .---------. | CDP 1802 ACE | IC17 |
| O=O +C IC31 |74LS107N | | RCA | |
| | J4 '---------' '-------------------' |
| | .-----------. |
| | | O O O O O | VIDEO IV |
'---------------------------------------------------'----------------------------------------------------------------------'
PINOUTS
-------
Main Board:
J1: Pin marked 0 ---> IC9 CDP1852CE, pin 3. J2: Pin marked +C --> Vcc for external use.
J1: Pin marked 1 ---> IC9 CDP1852CE, pin 5. J2: Pin marked +C --> Vcc for external use.
J1: Pin marked 2 ---> IC9 CDP1852CE, pin 7. J2: Pin marked 1 ---> IC10 CDP1852CE, pin 6.
J1: Pin marked 3 ---> IC9 CDP1852CE, pin 9. J2: Pin marked 2 ---> IC10 CDP1852CE, pin 8.
J1: Pin marked 4 ---> IC9 CDP1852CE, pin 16. J2: Pin marked 3 ---> IC10 CDP1852CE, pin 10.
J1: Pin marked 5 ---> IC9 CDP1852CE, pin 18. J2: Pin marked 4 ---> IC10 CDP1852CE, pin 17.
J1: Pin marked 6 ---> IC9 CDP1852CE, pin 20. J2: Pin marked 5 ---> IC10 CDP1852CE, pin 14.
J1: Pin marked 7 ---> IC9 CDP1852CE, pin 22.
J3: Pin marked 0 ---> IC8 CDP1852CE, pin 3. J4: Pin marked SY --> Video Sync.
J3: Pin marked 1 ---> IC8 CDP1852CE, pin 5. J4: Pin marked R ---> Red.
J3: Pin marked 2 ---> IC8 CDP1852CE, pin 7. J4: Pin marked G ---> Green.
J3: Pin marked 3 ---> IC8 CDP1852CE, pin 9. J4: Pin marked B ---> Blue.
J3: Pin marked 4 ---> IC8 CDP1852CE, pin 16. J4: Pin marked GND -> GND.
J3: Pin marked 5 ---> IC8 CDP1852CE, pin 18.
J3: Pin marked 6 ---> IC8 CDP1852CE, pin 20.
J3: Pin marked 7 ---> IC8 CDP1852CE, pin 22. J5: Pin marked GND --> GND.
J3: Pin marked D ---> IC7 CDP1802ACE, pin 21. J5: Pins marked 1-8 -> CPU data bus.
J3: Pin marked GND -> GND . J5: Pin marked 9 ----> Mainboard IC5 CD4001, pin 11.
J3: Pin marked T ---> IC7 CDP1802ACE, pin 22.
IC7, SDA2006 512-bit NV EEPROM:
.----v----.
-5V -|01 18|- N/C
+12V -|02 S 17|- N/C
+33V -|03 D 16|- IC17 CD1802, pin 04
GND -|04 A 15|- IC17 CD1802, pin 24
N/C -|05 2 14|- IC17 CD1802, pin 23
IC17 CD1802, pin 03 -|06 0 13|- GND
N/C -|07 0 12|- IC10 CDP1852, pin 19
IC10 CDP1852, pin 21 -|08 6 11|- GND
GND -|09 10|- +15V
'---------'
01: Ubb (Substrate vias). 10) CS2 (Chip select inputs: 12 bits CW).
02: Udd (Supply voltage). 11) CS2 (Chip select inputs: 12 bits CW).
03: Uph (Programming voltage). 12) Φ (Clock input).
04: STWL (Lenght of Control Word: 8/12 bits). 13) L (Programming signal output) (load).
05: N/C. 14) Dq (Data output).
06: /RES (Reset input). 15) INV (Invert input signals).
07: N/C. 16) REC (Data input control) (receive).
08: Di (Data input). 17) Uss (Ground).
09: CS3 (Chip select inputs: 8 or 12 bits CW). 18) Upi (Write voltage).
Since STWL is connected to GND, the control word is set to 8-bit lenght.
Sound Board:
IC9, EFO 90503 (seems a remarked TMS5220, speech synthesizer IC).
.-----v-----.
D0 -|01 28|- /RS
-|02 27|- /WS
-|03 E 26|- D1
.--- VBB -|04 F 25|-
(*)| VCC -|05 O 24|- D2
'--- OSC -|06 23|-
-|07 9 22|- D3
SPK -|08 0 21|-
-|09 5 20|-
-|10 0 19|- D4
GND -|11 3 18|- /RCI
D5 -|12 17|- /INT
D6 -|13 16|-
D7 -|14 15|-
'-----------'
(*) Pin 4 is wired to a pot + resistor, and then connected to pin 6.
This is surely to sync the 160 kHz needed for the device.
TODO:
- Soft reset doesn't work.
- Verify video mixing (Press F2 to enter service mode, then press 1 + 2 to continue
to settings screen. There's diagnostic color pattern at the top of screen)
- Add sound hardware (ROM is missing)
******************************************************************************/
#include "emu.h"
#include "video/tms9928a.h"
#include "cpu/cosmac/cosmac.h"
#include "machine/cdp1852.h"
#include "machine/sda2006.h"
#define MASTER_CLOCK XTAL(10'816'000)
#define SOUND_CLOCK XTAL( 2'950'000)
class nightmare_state : public driver_device
{
public:
enum
{
TIMER_SET_CPU_MODE
};
nightmare_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "cdp1802")
, m_soundcpu(*this,"cdp1802_sound")
, m_vdc(*this, "vdc")
, m_vdc2(*this, "vdc2")
, m_eeprom(*this,"eeprom")
{ }
DECLARE_READ_LINE_MEMBER( clear_r );
DECLARE_READ_LINE_MEMBER( ef1_r );
DECLARE_READ_LINE_MEMBER( ef2_r );
DECLARE_WRITE_LINE_MEMBER( q_w );
DECLARE_WRITE8_MEMBER( ic10_w );
DECLARE_WRITE8_MEMBER( unkout_w );
void nightmare(machine_config &config);
void nightmare_map(address_map &map);
void nightmare_io_map(address_map &map);
void nightmare_sound_map(address_map &map);
void nightmare_sound_io_map(address_map &map);
uint32_t screen_update_nightmare(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual void machine_start() override;
virtual void machine_reset() override;
required_device<cosmac_device> m_maincpu;
required_device<cosmac_device> m_soundcpu;
required_device<tms9928a_device> m_vdc;
required_device<tms9928a_device> m_vdc2;
required_device<sda2006_device> m_eeprom;
// cpu state
int m_reset;
};
void nightmare_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_SET_CPU_MODE:
m_reset = 1;
break;
default:
assert_always(false, "Unknown id in nightmare_state::device_timer");
}
}
void nightmare_state::machine_start()
{
save_item(NAME(m_reset));
}
/* Machine Reset */
void nightmare_state::machine_reset()
{
m_reset = 0;
timer_set(attotime::from_msec(200), TIMER_SET_CPU_MODE);
}
/* CDP1802 Interface */
READ_LINE_MEMBER( nightmare_state::clear_r )
{
return m_reset;
}
WRITE_LINE_MEMBER( nightmare_state::q_w )
{
m_eeprom->write_clock(state);
}
READ_LINE_MEMBER( nightmare_state::ef1_r )
{
//EEPROM Inv ???
return 0;
}
READ_LINE_MEMBER( nightmare_state::ef2_r )
{
//EEPROM Dq data read;
return m_eeprom->read_data();
}
WRITE8_MEMBER( nightmare_state::ic10_w )
{
/*
7 - EEPROM Di
6 - EEPROM Clock
5 - J2
4 - J2
3 - J2
2 - J2
1 - J2
0 - ?
*/
m_eeprom->write_data((data&0x80) ?1:0);
m_eeprom->write_enable((data&0x40) ?1:0);
}
WRITE8_MEMBER( nightmare_state::unkout_w )
{
// J3
}
void nightmare_state::nightmare_map(address_map &map)
{
map(0x0000, 0x5fff).rom();
map(0x8000, 0x83ff).ram();
}
void nightmare_state::nightmare_io_map(address_map &map)
{
map(0x0001, 0x0001).r("ic8", FUNC(cdp1852_device::read)).w(FUNC(nightmare_state::unkout_w));
map(0x0002, 0x0002).r("ic9", FUNC(cdp1852_device::read)).w("ic10", FUNC(cdp1852_device::write));
map(0x0004, 0x0004).rw(m_vdc, FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w));
map(0x0005, 0x0005).rw(m_vdc, FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w));
map(0x0006, 0x0006).rw(m_vdc2, FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w));
map(0x0007, 0x0007).rw(m_vdc2, FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w));
}
void nightmare_state::nightmare_sound_map(address_map &map)
{
map(0x0000, 0x3fff).rom();
}
void nightmare_state::nightmare_sound_io_map(address_map &map)
{
}
uint32_t nightmare_state::screen_update_nightmare(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
// combine two buffers (additive?)
for (int y = cliprect.top(); y <= cliprect.bottom(); y++)
{
uint32_t *const bitmap1 = &m_vdc2->get_bitmap().pix32(y);
uint32_t *const bitmap2 = &m_vdc->get_bitmap().pix32(y);
uint32_t *dst = &bitmap.pix32(y);
for (int x = cliprect.left(); x <= cliprect.right(); x++)
{
uint32_t p1 = bitmap1[x];
uint32_t p2 = bitmap2[x];
uint32_t result = 0;
for(int shift=0; shift<32;shift+=8){
uint32_t data = ((p2>>shift)&0xff)+((p1>>shift)&0xff);
result|=((data>0xff)?0xff:data)<<shift;
}
dst[x]=result;
}
}
return 0;
}
static INPUT_PORTS_START( nightmare )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
PORT_START("EF")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_WRITE_LINE_DEVICE_MEMBER("cdp1802", cosmac_device, ef3_w) //ic17 - cpu
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_TILT ) PORT_WRITE_LINE_DEVICE_MEMBER("cdp1802", cosmac_device, ef4_w)
INPUT_PORTS_END
void nightmare_state::nightmare(machine_config &config)
{
/* main cpu */
CDP1802(config, m_maincpu, MASTER_CLOCK/3);
m_maincpu->set_addrmap(AS_PROGRAM, &nightmare_state::nightmare_map);
m_maincpu->set_addrmap(AS_IO, &nightmare_state::nightmare_io_map);
m_maincpu->wait_cb().set_constant(1);
m_maincpu->clear_cb().set(FUNC(nightmare_state::clear_r));
m_maincpu->q_cb().set(FUNC(nightmare_state::q_w));
m_maincpu->ef1_cb().set(FUNC(nightmare_state::ef1_r));
m_maincpu->ef2_cb().set(FUNC(nightmare_state::ef2_r));
m_maincpu->tpb_cb().set("ic10", FUNC(cdp1852_device::clock_w));
/* sound cpu */
CDP1802(config, m_soundcpu, SOUND_CLOCK);
m_soundcpu->set_addrmap(AS_PROGRAM, &nightmare_state::nightmare_sound_map);
m_soundcpu->set_addrmap(AS_IO, &nightmare_state::nightmare_sound_io_map);
m_soundcpu->set_disable();
/* i/o hardware */
cdp1852_device &ic8(CDP1852(config, "ic8"));
ic8.mode_cb().set_constant(0);
ic8.di_cb().set_ioport("IN0");
cdp1852_device &ic9(CDP1852(config, "ic9"));
ic9.mode_cb().set_constant(0);
ic9.di_cb().set_ioport("IN1");
cdp1852_device &ic10(CDP1852(config, "ic10"));
ic10.mode_cb().set_constant(1);
ic10.do_cb().set(FUNC(nightmare_state::ic10_w));
SDA2006(config, m_eeprom);
/* video hardware */
TMS9928A( config, m_vdc, MASTER_CLOCK/2 );
m_vdc->set_vram_size(0x4000);
TMS9928A( config, m_vdc2, MASTER_CLOCK/2 );
m_vdc2->set_vram_size(0x4000);
m_vdc2->int_callback().set_inputline(m_maincpu, COSMAC_INPUT_LINE_INT);
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_raw(MASTER_CLOCK/2, tms9928a_device::TOTAL_HORZ, tms9928a_device::HORZ_DISPLAY_START-12, tms9928a_device::HORZ_DISPLAY_START + 256 + 12, \
tms9928a_device::TOTAL_VERT_NTSC, tms9928a_device::VERT_DISPLAY_START_NTSC - 12, tms9928a_device::VERT_DISPLAY_START_NTSC + 192 + 12);
screen.set_screen_update(FUNC(nightmare_state::screen_update_nightmare));
}
ROM_START( nightmare )
ROM_REGION( 0x6000, "cdp1802", 0 )
ROM_LOAD( "nm1-ia1.bin", 0x0000, 0x2000, CRC(5d648f62) SHA1(028a47d4b1b4910d0d4e00f81d4e94a5478834d3) )
ROM_LOAD( "nm1-ib1.bin", 0x2000, 0x2000, CRC(c10695f7) SHA1(929467fe7529782e8181d3caae3a67bb0a8d8753) )
ROM_LOAD( "nm1-ic1.bin", 0x4000, 0x2000, CRC(a3117246) SHA1(ca9601401f7ab34200c969e41ffae50bee0aca4d) )
ROM_REGION( 0x10000, "cdp1802_sound", 0 )
ROM_LOAD( "sound.bin", 0x0000, 0x4000, NO_DUMP )
ROM_END
GAME( 1982, nightmare, 0, nightmare, nightmare, nightmare_state, empty_init, ROT90, "E.F.O.", "Nightmare", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )

3
src/mame/mame.lst
View File

@ -30278,6 +30278,9 @@ vandykejal2 // UPL-90064 (c) Jaleco
@source:nmkmedal.cpp
trocana // NTC / NMK
@source:nightmare.cpp
nightmare // (c) 1982 E.F.O.
@source:nokia_3310.cpp
noki3210 //
noki3310 //