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https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
tsispch.cpp: bring the driver more up to modern MAME coding standards
This commit is contained in:
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1a95d0b336
commit
40646cd9dd
@ -4554,7 +4554,6 @@ files {
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MAME_DIR .. "src/mame/drivers/tr175.cpp",
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MAME_DIR .. "src/mame/drivers/trs80dt1.cpp",
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MAME_DIR .. "src/mame/drivers/tsispch.cpp",
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MAME_DIR .. "src/mame/includes/tsispch.h",
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MAME_DIR .. "src/mame/drivers/tulip1.cpp",
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MAME_DIR .. "src/mame/drivers/unistar.cpp",
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MAME_DIR .. "src/mame/drivers/v6809.cpp",
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@ -111,42 +111,69 @@
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/* Core includes */
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#include "emu.h"
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#include "includes/tsispch.h"
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#include "bus/rs232/rs232.h"
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#include "cpu/i86/i86.h"
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#include "cpu/upd7725/upd7725.h"
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#include "machine/clock.h"
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#include "machine/i8251.h"
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#include "machine/pic8259.h"
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#include "sound/dac.h"
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#include "speaker.h"
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namespace {
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// defines
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#define DEBUG_PARAM 1
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#undef DEBUG_DSP
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#undef DEBUG_DSP_W
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// class definition
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class tsispch_state : public driver_device
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{
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public:
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tsispch_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_dsp(*this, "dsp")
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, m_pic(*this, "pic8259")
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, m_uart(*this, "i8251a_u15")
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{
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}
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void prose2k(machine_config &config);
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void init_prose2k();
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private:
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uint8_t dsw_r();
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void peripheral_w(uint8_t data);
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uint16_t dsp_data_r();
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void dsp_data_w(uint16_t data);
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uint16_t dsp_status_r();
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void dsp_status_w(uint16_t data);
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DECLARE_WRITE_LINE_MEMBER(dsp_to_8086_p0_w);
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DECLARE_WRITE_LINE_MEMBER(dsp_to_8086_p1_w);
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void dsp_data_map(address_map &map);
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void dsp_prg_map(address_map &map);
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void i8086_io(address_map &map);
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void i8086_mem(address_map &map);
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virtual void machine_reset() override;
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required_device<cpu_device> m_maincpu;
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required_device<upd7725_device> m_dsp;
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required_device<pic8259_device> m_pic;
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required_device<i8251_device> m_uart;
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uint8_t m_paramReg; // status leds and resets and etc
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};
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/*
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Devices and handlers
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*/
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/*****************************************************************************
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USART 8251 and Terminal stuff
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*****************************************************************************/
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WRITE_LINE_MEMBER(tsispch_state::i8251_rxrdy_int)
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{
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m_pic->ir1_w(state);
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}
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WRITE_LINE_MEMBER(tsispch_state::i8251_txempty_int)
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{
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m_pic->ir2_w(state);
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}
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WRITE_LINE_MEMBER(tsispch_state::i8251_txrdy_int)
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{
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m_pic->ir3_w(state);
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}
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/*****************************************************************************
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LED/dipswitch stuff
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@ -173,7 +200,7 @@ void tsispch_state::peripheral_w(uint8_t data)
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m_paramReg = data;
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m_dsp->set_input_line(INPUT_LINE_RESET, BIT(data,6)?CLEAR_LINE:ASSERT_LINE);
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#ifdef DEBUG_PARAM
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//fprintf(stderr,"8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0));
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//logerror("8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0));
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logerror("8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0));
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#endif
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popmessage("LEDS: 6/Talking:%d 5:%d 4:%d 3:%d\n", 1-BIT(data,1), 1-BIT(data,2), 1-BIT(data,3), 1-BIT(data,4));
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@ -186,7 +213,7 @@ uint16_t tsispch_state::dsp_data_r()
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{
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#ifdef DEBUG_DSP
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uint8_t temp = m_dsp->snesdsp_read(true);
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fprintf(stderr, "dsp data read: %02x\n", temp);
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logerror("dsp data read: %02x\n", temp);
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return temp;
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#else
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return m_dsp->snesdsp_read(true);
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@ -196,7 +223,7 @@ uint16_t tsispch_state::dsp_data_r()
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void tsispch_state::dsp_data_w(uint16_t data)
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{
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#ifdef DEBUG_DSP_W
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fprintf(stderr, "dsp data write: %02x\n", data);
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logerror("dsp data write: %02x\n", data);
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#endif
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m_dsp->snesdsp_write(true, data);
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}
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@ -205,7 +232,7 @@ uint16_t tsispch_state::dsp_status_r()
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{
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#ifdef DEBUG_DSP
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uint8_t temp = m_dsp->snesdsp_read(false);
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fprintf(stderr, "dsp status read: %02x\n", temp);
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logerror("dsp status read: %02x\n", temp);
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return temp;
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#else
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return m_dsp->snesdsp_read(false);
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@ -214,19 +241,19 @@ uint16_t tsispch_state::dsp_status_r()
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void tsispch_state::dsp_status_w(uint16_t data)
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{
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fprintf(stderr, "warning: upd772x status register should never be written to!\n");
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logerror("warning: upd772x status register should never be written to!\n");
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m_dsp->snesdsp_write(false, data);
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}
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WRITE_LINE_MEMBER( tsispch_state::dsp_to_8086_p0_w )
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{
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fprintf(stderr, "upd772x changed p0 state to %d!\n",state);
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logerror("upd772x changed p0 state to %d!\n",state);
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//TODO: do stuff here!
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}
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WRITE_LINE_MEMBER( tsispch_state::dsp_to_8086_p1_w )
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{
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fprintf(stderr, "upd772x changed p1 state to %d!\n",state);
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logerror("upd772x changed p1 state to %d!\n",state);
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//TODO: do stuff here!
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}
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@ -235,7 +262,7 @@ WRITE_LINE_MEMBER( tsispch_state::dsp_to_8086_p1_w )
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*****************************************************************************/
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void tsispch_state::machine_reset()
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{
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fprintf(stderr,"machine reset\n");
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logerror("machine reset\n");
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m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // starts in reset
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}
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@ -243,7 +270,7 @@ void tsispch_state::init_prose2k()
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{
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uint8_t *dspsrc = (uint8_t *)(memregion("dspprgload")->base());
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uint32_t *dspprg = (uint32_t *)(memregion("dspprg")->base());
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fprintf(stderr,"driver init\n");
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logerror("driver init\n");
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// unpack 24 bit 7720 data into 32 bit space and shuffle it so it can run as 7725 code
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// data format as-is in dspsrc: (L = always 0, X = doesn't matter)
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// source upd7720 dest upd7725
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@ -307,13 +334,13 @@ void tsispch_state::init_prose2k()
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void tsispch_state::i8086_mem(address_map &map)
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{
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map.unmap_value_high();
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map(0x00000, 0x02FFF).mirror(0x34000).ram(); // verified; 6264*2 SRAM, only first 3/4 used
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map(0x03000, 0x03003).mirror(0x341FC).rw("i8251a_u15", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff);
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map(0x03200, 0x03203).mirror(0x341FC).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); // AMD P8259 PIC @ U5 (reads as 04 and 7c, upper byte is open bus)
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map(0x03400, 0x03400).mirror(0x341FE).r(FUNC(tsispch_state::dsw_r)); // verified, read from dipswitch s4
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map(0x03401, 0x03401).mirror(0x341FE).w(FUNC(tsispch_state::peripheral_w)); // verified, write to the 4 leds, plus 4 control bits
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map(0x03600, 0x03601).mirror(0x341FC).rw(FUNC(tsispch_state::dsp_data_r), FUNC(tsispch_state::dsp_data_w)); // verified; UPD77P20 data reg r/w
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map(0x03602, 0x03603).mirror(0x341FC).rw(FUNC(tsispch_state::dsp_status_r), FUNC(tsispch_state::dsp_status_w)); // verified; UPD77P20 status reg r
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map(0x00000, 0x02fff).mirror(0x34000).ram(); // verified; 6264*2 SRAM, only first 3/4 used
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map(0x03000, 0x03003).mirror(0x341fc).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff);
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map(0x03200, 0x03203).mirror(0x341fc).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); // AMD P8259 PIC @ U5 (reads as 04 and 7c, upper byte is open bus)
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map(0x03400, 0x03400).mirror(0x341fe).r(FUNC(tsispch_state::dsw_r)); // verified, read from dipswitch s4
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map(0x03401, 0x03401).mirror(0x341fe).w(FUNC(tsispch_state::peripheral_w)); // verified, write to the 4 leds, plus 4 control bits
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map(0x03600, 0x03601).mirror(0x341fc).rw(FUNC(tsispch_state::dsp_data_r), FUNC(tsispch_state::dsp_data_w)); // verified; UPD77P20 data reg r/w
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map(0x03602, 0x03603).mirror(0x341fc).rw(FUNC(tsispch_state::dsp_status_r), FUNC(tsispch_state::dsp_status_w)); // verified; UPD77P20 status reg r
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map(0xc0000, 0xfffff).rom(); // verified
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}
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@ -372,15 +399,15 @@ void tsispch_state::prose2k(machine_config &config)
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{
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/* basic machine hardware */
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/* There are two crystals on the board: a 24MHz xtal at Y2 and a 16MHz xtal at Y1 */
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I8086(config, m_maincpu, 8000000); /* VERIFIED clock, unknown divider */
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I8086(config, m_maincpu, XTAL(24'000'000)/3); /* VERIFIED clock, (which xtal does this come from? guessed 24MHz) */
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m_maincpu->set_addrmap(AS_PROGRAM, &tsispch_state::i8086_mem);
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m_maincpu->set_addrmap(AS_IO, &tsispch_state::i8086_io);
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m_maincpu->set_irq_acknowledge_callback("pic8259", FUNC(pic8259_device::inta_cb));
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m_maincpu->set_irq_acknowledge_callback(m_pic, FUNC(pic8259_device::inta_cb));
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/* TODO: the UPD7720 has a 10KHz clock to its INT pin */
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/* TODO: the UPD7720 has a 2MHz clock to its SCK pin */
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/* TODO: hook up p0, p1, int */
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UPD7725(config, m_dsp, 8000000); /* VERIFIED clock, unknown divider; correct dsp type is UPD77P20 */
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UPD7725(config, m_dsp, XTAL(16'000'000)/2); /* VERIFIED clock, unknown divider; correct dsp type is UPD77P20 (which xtal does this come from? guessed 16MHz) */
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m_dsp->set_addrmap(AS_PROGRAM, &tsispch_state::dsp_prg_map);
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m_dsp->set_addrmap(AS_DATA, &tsispch_state::dsp_data_map);
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m_dsp->p0().set(FUNC(tsispch_state::dsp_to_8086_p0_w));
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@ -391,17 +418,17 @@ void tsispch_state::prose2k(machine_config &config)
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m_pic->out_int_callback().set_inputline(m_maincpu, 0);
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/* uarts */
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i8251_device &u15(I8251(config, "i8251a_u15", 0));
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u15.txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
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u15.dtr_handler().set("rs232", FUNC(rs232_port_device::write_dtr));
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u15.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts));
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u15.rxrdy_handler().set(FUNC(tsispch_state::i8251_rxrdy_int));
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u15.txrdy_handler().set(FUNC(tsispch_state::i8251_txrdy_int));
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u15.txempty_handler().set(FUNC(tsispch_state::i8251_txempty_int));
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I8251(config, m_uart, 0);
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m_uart->txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
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m_uart->dtr_handler().set("rs232", FUNC(rs232_port_device::write_dtr));
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m_uart->rts_handler().set("rs232", FUNC(rs232_port_device::write_rts));
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m_uart->rxrdy_handler().set(m_pic, FUNC(pic8259_device::ir1_w));
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m_uart->txrdy_handler().set(m_pic, FUNC(pic8259_device::ir3_w));
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m_uart->txempty_handler().set(m_pic, FUNC(pic8259_device::ir2_w));
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clock_device &clock(CLOCK(config, "baudclock", 153600));
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clock.signal_handler().set("i8251a_u15", FUNC(i8251_device::write_txc));
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clock.signal_handler().append("i8251a_u15", FUNC(i8251_device::write_rxc));
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clock_device &clock(CLOCK(config, "baudclock", 153600)); // this comes from a resonator? or a divider? not sure.
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clock.signal_handler().set(m_uart, FUNC(i8251_device::write_txc));
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clock.signal_handler().append(m_uart, FUNC(i8251_device::write_rxc));
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/* sound hardware */
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SPEAKER(config, "speaker").front_center();
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@ -541,6 +568,8 @@ ROM_START( prose2ko )
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// no third PROM in this set, a 74S138 is used instead for e0000-fffff ROM mapping
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ROM_END
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} // anonymous namespace
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/******************************************************************************
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Drivers
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******************************************************************************/
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@ -1,59 +0,0 @@
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// license:BSD-3-Clause
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// copyright-holders:Jonathan Gevaryahu
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/***************************************************************************
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tsispch.h
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****************************************************************************/
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#ifndef MAME_INCLUDES_TSISPCH_H
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#define MAME_INCLUDES_TSISPCH_H
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#pragma once
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#include "cpu/upd7725/upd7725.h"
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#include "machine/pic8259.h"
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class tsispch_state : public driver_device
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{
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public:
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tsispch_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_dsp(*this, "dsp"),
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m_pic(*this, "pic8259")
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{
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}
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void prose2k(machine_config &config);
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void init_prose2k();
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private:
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uint8_t dsw_r();
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void peripheral_w(uint8_t data);
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uint16_t dsp_data_r();
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void dsp_data_w(uint16_t data);
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uint16_t dsp_status_r();
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void dsp_status_w(uint16_t data);
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DECLARE_WRITE_LINE_MEMBER(i8251_rxrdy_int);
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DECLARE_WRITE_LINE_MEMBER(i8251_txempty_int);
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DECLARE_WRITE_LINE_MEMBER(i8251_txrdy_int);
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DECLARE_WRITE_LINE_MEMBER(dsp_to_8086_p0_w);
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DECLARE_WRITE_LINE_MEMBER(dsp_to_8086_p1_w);
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void dsp_data_map(address_map &map);
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void dsp_prg_map(address_map &map);
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void i8086_io(address_map &map);
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void i8086_mem(address_map &map);
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virtual void machine_reset() override;
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required_device<cpu_device> m_maincpu;
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required_device<upd7725_device> m_dsp;
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required_device<pic8259_device> m_pic;
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uint8_t m_paramReg; // status leds and resets and etc
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};
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#endif // MAME_INCLUDES_TSISPCH_H
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