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m6502: Refactored the indexed read/write to use devcb, and fixed the peripheral port for plus4. (nw)

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(MESS) apple3: Fixed the CPU interface. (nw)
(MESS) vic10: Refactored to use datassette slot interface. (nw)
This commit is contained in:
Curt Coder 2012-09-04 12:23:59 +00:00
parent 3007da08e0
commit 4080118ce8
15 changed files with 126 additions and 134 deletions
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28
src/emu/cpu/m6502/m4510.c
View File

@ -148,8 +148,8 @@ struct _m4510_Regs {
direct_read_data *direct;
int icount;
read8_space_func rdmem_id; /* readmem callback for indexed instructions */
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
devcb_resolved_read8 rdmem_id; /* readmem callback for indexed instructions */
devcb_resolved_write8 wrmem_id; /* writemem callback for indexed instructions */
UINT8 ddr;
UINT8 port;
@ -184,25 +184,12 @@ INLINE int m4510_cpu_readop_arg(m4510_Regs *cpustate)
#define M4510
#include "t65ce02.c"
static UINT8 default_rdmem_id(address_space *space, offs_t address)
{
m4510_Regs *cpustate = get_safe_token(&space->device());
return space->read_byte(M4510_MEM(address));
}
static void default_wrmem_id(address_space *space, offs_t address, UINT8 data)
{
m4510_Regs *cpustate = get_safe_token(&space->device());
space->write_byte(M4510_MEM(address), data);
}
static CPU_INIT( m4510 )
{
m4510_Regs *cpustate = get_safe_token(device);
const m6502_interface *intf = (const m6502_interface *)device->static_config();
cpustate->interrupt_inhibit = 0;
cpustate->rdmem_id = default_rdmem_id;
cpustate->wrmem_id = default_wrmem_id;
cpustate->irq_callback = irqcallback;
cpustate->device = device;
cpustate->space = device->space(AS_PROGRAM);
@ -210,12 +197,8 @@ static CPU_INIT( m4510 )
if ( intf )
{
if ( intf->read_indexed_func )
cpustate->rdmem_id = intf->read_indexed_func;
if ( intf->write_indexed_func )
cpustate->wrmem_id = intf->write_indexed_func;
cpustate->rdmem_id.resolve(intf->read_indexed_func, *device);
cpustate->wrmem_id.resolve(intf->write_indexed_func, *device);
cpustate->in_port_func.resolve(intf->in_port_func, *device);
cpustate->out_port_func.resolve(intf->out_port_func, *device);
}
@ -223,6 +206,9 @@ static CPU_INIT( m4510 )
{
devcb_read8 nullrcb = DEVCB_NULL;
devcb_write8 nullwcb = DEVCB_NULL;
cpustate->rdmem_id.resolve(nullrcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device);
cpustate->in_port_func.resolve(nullrcb, *device);
cpustate->out_port_func.resolve(nullwcb, *device);
}

30
src/emu/cpu/m6502/m6502.c
View File

@ -76,8 +76,8 @@ struct _m6502_Regs
int int_occured;
int icount;
read8_space_func rdmem_id; /* readmem callback for indexed instructions */
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
devcb_resolved_read8 rdmem_id; /* readmem callback for indexed instructions */
devcb_resolved_write8 wrmem_id; /* writemem callback for indexed instructions */
UINT8 ddr;
UINT8 port;
@ -105,9 +105,6 @@ INLINE m6502_Regs *get_safe_token(device_t *device)
return (m6502_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
static UINT8 default_rdmem_id(address_space *space, offs_t offset) { return space->read_byte(offset); }
static void default_wdmem_id(address_space *space, offs_t offset, UINT8 data) { space->write_byte(offset, data); }
/***************************************************************
* include the opcode macros, functions and tables
***************************************************************/
@ -144,26 +141,27 @@ static void m6502_common_init(legacy_cpu_device *device, device_irq_acknowledge_
cpustate->direct = &cpustate->space->direct();
cpustate->subtype = subtype;
cpustate->insn = insn;
cpustate->rdmem_id = default_rdmem_id;
cpustate->wrmem_id = default_wdmem_id;
if ( intf )
{
if ( intf->read_indexed_func )
cpustate->rdmem_id = intf->read_indexed_func;
if ( intf->write_indexed_func )
cpustate->wrmem_id = intf->write_indexed_func;
cpustate->rdmem_id.resolve(intf->read_indexed_func, *device);
cpustate->wrmem_id.resolve(intf->write_indexed_func, *device);
cpustate->in_port_func.resolve(intf->in_port_func, *device);
cpustate->out_port_func.resolve(intf->out_port_func, *device);
cpustate->pullup = intf->external_port_pullup;
cpustate->pulldown = intf->external_port_pulldown;
}
else
{
devcb_write8 nullcb = DEVCB_NULL;
cpustate->out_port_func.resolve(nullcb, *device);
devcb_read8 nullrcb = DEVCB_NULL;
devcb_write8 nullwcb = DEVCB_NULL;
cpustate->rdmem_id.resolve(nullrcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device);
cpustate->in_port_func.resolve(nullrcb, *device);
cpustate->out_port_func.resolve(nullwcb, *device);
cpustate->pullup = 0;
cpustate->pulldown = 0;
}
@ -393,7 +391,7 @@ static READ8_HANDLER( m6510_read_0000 )
UINT8 output = cpustate->port & cpustate->ddr;
UINT8 pulldown = ~(cpustate->pulldown & ~cpustate->ddr);
result = (input | mask | output) & pulldown;
result = (input | mask | output) & (input | pulldown);
}
break;
}

4
src/emu/cpu/m6502/m6502.h
View File

@ -59,8 +59,8 @@ enum
typedef struct _m6502_interface m6502_interface;
struct _m6502_interface
{
read8_space_func read_indexed_func;
write8_space_func write_indexed_func;
devcb_read8 read_indexed_func;
devcb_write8 write_indexed_func;
devcb_read8 in_port_func;
devcb_write8 out_port_func;
UINT8 external_port_pullup;

22
src/emu/cpu/m6502/m6509.c
View File

@ -84,8 +84,8 @@ struct _m6509_Regs {
int icount;
read8_space_func rdmem_id; /* readmem callback for indexed instructions */
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
devcb_resolved_read8 rdmem_id; /* readmem callback for indexed instructions */
devcb_resolved_write8 wrmem_id; /* writemem callback for indexed instructions */
};
INLINE m6509_Regs *get_safe_token(device_t *device)
@ -135,16 +135,11 @@ static ADDRESS_MAP_START(m6509_mem, AS_PROGRAM, 8, legacy_cpu_device)
AM_RANGE(0x00001, 0x00001) AM_MIRROR(0xF0000) AM_READWRITE_LEGACY(m6509_read_00001, m6509_write_00001)
ADDRESS_MAP_END
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return space->read_byte(address); }
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
static CPU_INIT( m6509 )
{
m6509_Regs *cpustate = get_safe_token(device);
const m6502_interface *intf = (const m6502_interface *)device->static_config();
cpustate->rdmem_id = default_rdmem_id;
cpustate->wrmem_id = default_wdmem_id;
cpustate->irq_callback = irqcallback;
cpustate->device = device;
cpustate->space = device->space(AS_PROGRAM);
@ -152,11 +147,16 @@ static CPU_INIT( m6509 )
if ( intf )
{
if ( intf->read_indexed_func )
cpustate->rdmem_id = intf->read_indexed_func;
cpustate->rdmem_id.resolve(intf->read_indexed_func, *device);
cpustate->wrmem_id.resolve(intf->write_indexed_func, *device);
}
else
{
devcb_read8 nullrcb = DEVCB_NULL;
devcb_write8 nullwcb = DEVCB_NULL;
if ( intf->write_indexed_func )
cpustate->wrmem_id = intf->write_indexed_func;
cpustate->rdmem_id.resolve(nullrcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device);
}
}

22
src/emu/cpu/m6502/m65ce02.c
View File

@ -78,8 +78,8 @@ struct _m65ce02_Regs {
legacy_cpu_device *device;
address_space *space;
direct_read_data *direct;
read8_space_func rdmem_id; /* readmem callback for indexed instructions */
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
devcb_resolved_read8 rdmem_id; /* readmem callback for indexed instructions */
devcb_resolved_write8 wrmem_id; /* writemem callback for indexed instructions */
};
INLINE m65ce02_Regs *get_safe_token(device_t *device)
@ -95,16 +95,11 @@ INLINE m65ce02_Regs *get_safe_token(device_t *device)
#include "t65ce02.c"
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return space->read_byte(address); }
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
static CPU_INIT( m65ce02 )
{
m65ce02_Regs *cpustate = get_safe_token(device);
const m6502_interface *intf = (const m6502_interface *)device->static_config();
cpustate->rdmem_id = default_rdmem_id;
cpustate->wrmem_id = default_wdmem_id;
cpustate->irq_callback = irqcallback;
cpustate->device = device;
cpustate->space = device->space(AS_PROGRAM);
@ -112,11 +107,16 @@ static CPU_INIT( m65ce02 )
if ( intf )
{
if ( intf->read_indexed_func )
cpustate->rdmem_id = intf->read_indexed_func;
cpustate->rdmem_id.resolve(intf->read_indexed_func, *device);
cpustate->wrmem_id.resolve(intf->write_indexed_func, *device);
}
else
{
devcb_read8 nullrcb = DEVCB_NULL;
devcb_write8 nullwcb = DEVCB_NULL;
if ( intf->write_indexed_func )
cpustate->wrmem_id = intf->write_indexed_func;
cpustate->rdmem_id.resolve(nullrcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device);
}
}

4
src/emu/cpu/m6502/ops02.h
View File

@ -64,8 +64,8 @@
#define PPC cpustate->ppc.d
#define RDMEM_ID(a) cpustate->rdmem_id(cpustate->space,a)
#define WRMEM_ID(a,d) cpustate->wrmem_id(cpustate->space,a,d)
#define RDMEM_ID(a) (cpustate->rdmem_id.isnull() ? cpustate->space->read_byte(a) : cpustate->rdmem_id(a))
#define WRMEM_ID(a,d) (cpustate->wrmem_id.isnull() ? cpustate->space->write_byte(a,d) : cpustate->wrmem_id(a,d))
/***************************************************************
* RDOP read an opcode

5
src/emu/cpu/m6502/ops4510.h
View File

@ -59,3 +59,8 @@
UINT8 op = RDOP(); \
(*cpustate->insn[op])(cpustate); \
}
#undef RDMEM_ID
#undef WRMEM_ID
#define RDMEM_ID(a) (cpustate->rdmem_id.isnull() ? cpustate->space->read_byte(M4510_MEM(a)) : cpustate->rdmem_id(M4510_MEM(a)))
#define WRMEM_ID(a,d) (cpustate->wrmem_id.isnull() ? cpustate->space->write_byte(M4510_MEM(a),d) : cpustate->wrmem_id(M4510_MEM(a),d))

10
src/mess/drivers/apple3.c
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@ -36,10 +36,12 @@ ADDRESS_MAP_END
* different memory locations */
static const m6502_interface apple3_m6502_interface =
{
NULL, /* read_indexed_func */
NULL, /* write_indexed_func */
DEVCB_DRIVER_MEMBER(apple3_state, apple3_indexed_read), /* port_read_func */
DEVCB_DRIVER_MEMBER(apple3_state, apple3_indexed_write) /* port_write_func */
DEVCB_DRIVER_MEMBER(apple3_state, apple3_indexed_read), /* read_indexed_func */
DEVCB_DRIVER_MEMBER(apple3_state, apple3_indexed_write), /* write_indexed_func */
DEVCB_NULL, /* port_read_func */
DEVCB_NULL, /* port_write_func */
0x00,
0x00
};
static const floppy_interface apple3_floppy_interface =

10
src/mess/drivers/c128.c
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@ -663,12 +663,14 @@ static const sid6581_interface c128_sound_interface =
};
static const m6502_interface c128_m8502_interface =
static M6510_INTERFACE( c128_m8502_interface )
{
NULL, /* read_indexed_func */
NULL, /* write_indexed_func */
DEVCB_NULL, /* read_indexed_func */
DEVCB_NULL, /* write_indexed_func */
DEVCB_HANDLER(c128_m6510_port_read), /* port_read_func */
DEVCB_HANDLER(c128_m6510_port_write) /* port_write_func */
DEVCB_HANDLER(c128_m6510_port_write), /* port_write_func */
0x00,
0x00
};
static CBM_IEC_INTERFACE( cbm_iec_intf )

20
src/mess/drivers/c64.c
View File

@ -651,7 +651,7 @@ static const mos6526_interface cia2_intf =
//-------------------------------------------------
// m6502_interface cpu_intf
// M6510_INTERFACE( cpu_intf )
//-------------------------------------------------
READ8_MEMBER( c64_state::cpu_r )
@ -705,8 +705,8 @@ WRITE8_MEMBER( c64_state::cpu_w )
static M6510_INTERFACE( cpu_intf )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(c64_state, cpu_r),
DEVCB_DRIVER_MEMBER(c64_state, cpu_w),
0x17,
@ -715,7 +715,7 @@ static M6510_INTERFACE( cpu_intf )
//-------------------------------------------------
// m6502_interface sx64_cpu_intf
// M6510_INTERFACE( sx64_cpu_intf )
//-------------------------------------------------
READ8_MEMBER( sx64_state::cpu_r )
@ -759,8 +759,8 @@ WRITE8_MEMBER( sx64_state::cpu_w )
static M6510_INTERFACE( sx64_cpu_intf )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(sx64_state, cpu_r),
DEVCB_DRIVER_MEMBER(sx64_state, cpu_w),
0x07,
@ -769,7 +769,7 @@ static M6510_INTERFACE( sx64_cpu_intf )
//-------------------------------------------------
// m6502_interface c64gs_cpu_intf
// M6510_INTERFACE( c64gs_cpu_intf )
//-------------------------------------------------
READ8_MEMBER( c64gs_state::cpu_r )
@ -811,10 +811,10 @@ WRITE8_MEMBER( c64gs_state::cpu_w )
m_charen = BIT(data, 2);
}
static const m6502_interface c64gs_cpu_intf =
static M6510_INTERFACE( c64gs_cpu_intf )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(c64gs_state, cpu_r),
DEVCB_DRIVER_MEMBER(c64gs_state, cpu_w),
0x07,

24
src/mess/drivers/plus4.c
View File

@ -438,7 +438,7 @@ INPUT_PORTS_END
//**************************************************************************
//-------------------------------------------------
// m6502_interface cpu_intf
// M6510_INTERFACE( cpu_intf )
//-------------------------------------------------
READ8_MEMBER( plus4_state::cpu_r )
@ -489,7 +489,7 @@ READ8_MEMBER( plus4_state::c16_cpu_r )
*/
UINT8 data = 0x2f;
UINT8 data = 0;
// cassette read
data |= m_cassette->read() << 4;
@ -538,20 +538,24 @@ WRITE8_MEMBER( plus4_state::cpu_w )
m_cassette->write(!BIT(data, 1));
}
static const m6502_interface cpu_intf =
static M6510_INTERFACE( cpu_intf )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(plus4_state, cpu_r),
DEVCB_DRIVER_MEMBER(plus4_state, cpu_w)
DEVCB_DRIVER_MEMBER(plus4_state, cpu_w),
0x00,
0xc0
};
static const m6502_interface c16_cpu_intf =
static M6510_INTERFACE( c16_cpu_intf )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(plus4_state, c16_cpu_r),
DEVCB_DRIVER_MEMBER(plus4_state, cpu_w)
DEVCB_DRIVER_MEMBER(plus4_state, cpu_w),
0x00,
0xc0
};
//-------------------------------------------------

10
src/mess/drivers/sbc6510.c
View File

@ -197,12 +197,14 @@ static MACHINE_RESET(sbc6510)
{
}
static const m6502_interface sbc6510_m6510_interface =
static M6510_INTERFACE( sbc6510_m6510_interface )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
0x00,
0x00
};
READ8_MEMBER( sbc6510_state::psg_a_r )

50
src/mess/drivers/vic10.c
View File

@ -471,7 +471,7 @@ static const mos6526_interface cia_intf =
//-------------------------------------------------
// m6502_interface cpu_intf
// M6510_INTERFACE( cpu_intf )
//-------------------------------------------------
READ8_MEMBER( vic10_state::cpu_r )
@ -481,19 +481,21 @@ READ8_MEMBER( vic10_state::cpu_r )
bit description
P0 EXPANSION PORT
P1 1
P2 1
P1
P2
P3
P4 CASS SENS
P5
P5 0
*/
UINT8 data = 0x06;
UINT8 data = 0;
// expansion port
data |= m_exp->p0_r();
data |= ((m_cassette->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED) << 4;
// cassette sense
data |= m_cassette->sense_r() << 4;
return data;
}
@ -519,40 +521,31 @@ WRITE8_MEMBER( vic10_state::cpu_w )
}
// cassette write
m_cassette->output(BIT(data, 3) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
m_cassette->write(BIT(data, 3));
// cassette motor
if (!BIT(data, 5))
{
m_cassette->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
m_cassette_timer->adjust(attotime::zero, 0, attotime::from_hz(44100));
}
else
{
m_cassette->change_state(CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
m_cassette_timer->reset();
}
m_cassette->motor_w(BIT(data, 5));
}
static const m6502_interface cpu_intf =
static M6510_INTERFACE( cpu_intf )
{
NULL,
NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(vic10_state, cpu_r),
DEVCB_DRIVER_MEMBER(vic10_state, cpu_w)
DEVCB_DRIVER_MEMBER(vic10_state, cpu_w),
0x10,
0x20
};
//-------------------------------------------------
// TIMER_DEVICE_CALLBACK( cassette_tick )
// PET_DATASSETTE_PORT_INTERFACE( datassette_intf )
//-------------------------------------------------
static TIMER_DEVICE_CALLBACK( cassette_tick )
static PET_DATASSETTE_PORT_INTERFACE( datassette_intf )
{
vic10_state *state = timer.machine().driver_data<vic10_state>();
mos6526_flag_w(state->m_cia, state->m_cassette->input() > +0.0);
}
DEVCB_DEVICE_LINE(MOS6526_TAG, mos6526_flag_w)
};
//-------------------------------------------------
@ -638,8 +631,7 @@ static MACHINE_CONFIG_START( vic10, vic10_state )
// devices
MCFG_MOS6526R1_ADD(MOS6526_TAG, VIC6566_CLOCK, cia_intf)
MCFG_CASSETTE_ADD(CASSETTE_TAG, cbm_cassette_interface)
MCFG_TIMER_ADD(TIMER_C1531_TAG, cassette_tick)
MCFG_PET_DATASSETTE_PORT_ADD(PET_DATASSETTE_PORT_TAG, datassette_intf, cbm_datassette_devices, NULL, NULL)
MCFG_VIC10_EXPANSION_SLOT_ADD(VIC10_EXPANSION_SLOT_TAG, VIC6566_CLOCK, expansion_intf, vic10_expansion_cards, NULL, NULL)
// software list

7
src/mess/includes/vic10.h
View File

@ -8,6 +8,7 @@
#include "includes/cbm.h"
#include "machine/6526cia.h"
#include "machine/cbmipt.h"
#include "machine/petcass.h"
#include "machine/ram.h"
#include "sound/dac.h"
#include "sound/sid6581.h"
@ -31,8 +32,7 @@ public:
m_cia(*this, MOS6526_TAG),
m_exp(*this, VIC10_EXPANSION_SLOT_TAG),
m_ram(*this, RAM_TAG),
m_cassette(*this, CASSETTE_TAG),
m_cassette_timer(*this, TIMER_C1531_TAG),
m_cassette(*this, PET_DATASSETTE_PORT_TAG),
m_cia_irq(CLEAR_LINE),
m_vic_irq(CLEAR_LINE),
m_exp_irq(CLEAR_LINE)
@ -44,8 +44,7 @@ public:
required_device<mos6526_device> m_cia;
required_device<vic10_expansion_slot_device> m_exp;
required_device<ram_device> m_ram;
optional_device<cassette_image_device> m_cassette;
optional_device<timer_device> m_cassette_timer;
optional_device<pet_datassette_port_device> m_cassette;
virtual void machine_start();
virtual void machine_reset();

14
src/mess/machine/c1551.c
View File

@ -70,7 +70,7 @@ const rom_entry *c1551_device::device_rom_region() const
//-------------------------------------------------
// m6502_interface m6510t_intf
// M6510_INTERFACE( cpu_intf )
//-------------------------------------------------
READ8_MEMBER( c1551_device::port_r )
@ -131,12 +131,14 @@ WRITE8_MEMBER( c1551_device::port_w )
m_ga->ds_w((data >> 5) & 0x03);
}
static const m6502_interface m6510t_intf =
static M6510_INTERFACE( cpu_intf )
{
NULL, // read_indexed_func
NULL, // write_indexed_func
DEVCB_NULL, // read_indexed_func
DEVCB_NULL, // write_indexed_func
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, c1551_device, port_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, c1551_device, port_w)
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, c1551_device, port_w),
0x00,
0x00
};
@ -406,7 +408,7 @@ static PLUS4_EXPANSION_INTERFACE( expansion_intf )
static MACHINE_CONFIG_FRAGMENT( c1551 )
MCFG_CPU_ADD(M6510T_TAG, M6510T, XTAL_16MHz/8)
MCFG_CPU_PROGRAM_MAP(c1551_mem)
MCFG_CPU_CONFIG(m6510t_intf)
MCFG_CPU_CONFIG(cpu_intf)
MCFG_QUANTUM_PERFECT_CPU(M6510T_TAG)
MCFG_PLS100_ADD(PLA_TAG)